Single-Phase High-Performance
Wide-Span Energy Metering IC
90E21/22/23/24
Version 6
April 2, 2013
X X X X
Atmel Corporation
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Table of Contents
FEATURES .............................................................................................................................................................................. 6
APPLICATION ......................................................................................................................................................................... 6
DESCRIPTION......................................................................................................................................................................... 6
BLOCK DIAGRAM .................................................................................................................................................................. 7
1 PIN ASSIGNMENT ............................................................................................................................................................. 9
2 PIN DESCRIPTION .......................................................................................................................................................... 10
3 FUNCTIONAL DESCRIPTION ......................................................................................................................................... 12
3.1
3.2
3.3
3.4
3.5
3.6
3.7
DYNAMIC METERING RANGE .................................................................................................................................................................... 12
STARTUP AND NO-LOAD POWER ............................................................................................................................................................. 12
ENERGY REGISTERS .................................................................................................................................................................................. 12
N LINE METERING AND ANTI-TAMPERING .............................................................................................................................................. 13
3.4.1 Metering Mode and L/N Line Current Sampling Gain Configuration ......................................................................................... 13
3.4.2 Anti-Tampering Mode .................................................................................................................................................................... 13
MEASUREMENT AND ZERO-CROSSING ................................................................................................................................................... 14
3.5.1 Measurement .................................................................................................................................................................................. 14
3.5.2 Zero-Crossing ................................................................................................................................................................................. 14
CALIBRATION .............................................................................................................................................................................................. 15
RESET ........................................................................................................................................................................................................... 15
4 INTERFACE ..................................................................................................................................................................... 16
4.1
4.2
4.3
SERIAL PERIPHERAL INTERFACE (SPI) ................................................................................................................................................... 16
4.1.1 Four-Wire Mode .............................................................................................................................................................................. 16
4.1.2 Three-Wire Mode ............................................................................................................................................................................ 17
4.1.3 Timeout and Protection ................................................................................................................................................................. 18
WARNOUT PIN FOR FATAL ERROR WARNING ....................................................................................................................................... 18
LOW COST IMPLEMENTATION IN ISOLATION WITH MCU ...................................................................................................................... 18
5 REGISTER ........................................................................................................................................................................ 19
5.1
5.2
5.3
5.4
5.5
REGISTER LIST ............................................................................................................................................................................................ 19
STATUS AND SPECIAL REGISTER ............................................................................................................................................................ 21
METERING/ MEASUREMENT CALIBRATION AND CONFIGURATION .................................................................................................... 25
5.3.1 Metering Calibration and Configuration Register ....................................................................................................................... 25
5.3.2 Measurement Calibration Register ............................................................................................................................................... 32
ENERGY REGISTER .................................................................................................................................................................................... 37
MEASUREMENT REGISTER ....................................................................................................................................................................... 41
6.1
6.2
6.3
6.4
6.5
6.6
6.7
ELECTRICAL SPECIFICATION ................................................................................................................................................................... 48
SPI INTERFACE TIMING .............................................................................................................................................................................. 50
POWER ON RESET TIMING ........................................................................................................................................................................ 51
ZERO-CROSSING TIMING ........................................................................................................................................................................... 51
VOLTAGE SAG TIMING ............................................................................................................................................................................... 52
PULSE OUTPUT ........................................................................................................................................................................................... 52
ABSOLUTE MAXIMUM RATING .................................................................................................................................................................. 53
6 ELECTRICAL SPECIFICATION ....................................................................................................................................... 48
PACKAGE DIMENSIONS...................................................................................................................................................... 54
ORDERING INFORMATION.................................................................................................................................................. 57
Table of Contents
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April 2, 2013
List of Tables
Table-1
Table-2
Table-3
Table-4
Table-5
Table-6
Table-7
Table-8
Table-9
Table-10
Table-11
Table-12
Table-13
Table-14
Table-15
Function List ................................................................................................................................................................................................... 6
Pin Description ............................................................................................................................................................................................. 10
Active Energy Metering Error ....................................................................................................................................................................... 12
Reactive Energy Metering Error ................................................................................................................................................................... 12
Threshold Configuration for Startup and No-Load Power ............................................................................................................................ 12
Energy Registers ......................................................................................................................................................................................... 12
Metering Mode ............................................................................................................................................................................................. 13
The Measurement Format ........................................................................................................................................................................... 14
Read / Write Result in Four-Wire Mode ....................................................................................................................................................... 18
Read / Write Result in Three-Wire Mode ..................................................................................................................................................... 18
Register List ................................................................................................................................................................................................. 19
SPI Timing Specification .............................................................................................................................................................................. 50
Power On Reset Specification ..................................................................................................................................................................... 51
Zero-Crossing Specification ......................................................................................................................................................................... 52
Voltage Sag Specification ............................................................................................................................................................................ 52
List of Tables
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April 2, 2013
List of Figures
Figure-1
Figure-2
Figure-3
Figure-4
Figure-5
Figure-6
Figure-7
Figure-8
Figure-9
Figure-10
Figure-11
Figure-12
Figure-13
Figure-14
Figure-15
90E21 Block Diagram .................................................................................................................................................................................... 7
90E22 Block Diagram .................................................................................................................................................................................... 7
90E23 Block Diagram .................................................................................................................................................................................... 8
90E24 Block Diagram .................................................................................................................................................................................... 8
Pin Assignment (Top View) ............................................................................................................................................................................ 9
Read Sequence in Four-Wire Mode ............................................................................................................................................................ 16
Write Sequence in Four-Wire Mode ............................................................................................................................................................. 16
Read Sequence in Three-Wire Mode .......................................................................................................................................................... 17
Write Sequence in Three-Wire Mode ........................................................................................................................................................... 17
4-Wire SPI Timing Diagram ......................................................................................................................................................................... 50
3-Wire SPI Timing Diagram ......................................................................................................................................................................... 50
Power On Reset Timing Diagram ................................................................................................................................................................ 51
Zero-Crossing Timing Diagram ................................................................................................................................................................... 51
Voltage Sag Timing Diagram ...................................................................................................................................................................... 52
Output Pulse Width ..................................................................................................................................................................................... 52
List of Figures
5
April 2, 2013
Single-Phase High-Performance
90E21/22/23/24
Wide-Span Energy Metering IC
FEATURES
Other Features
Metering Features
• 3.3V single power supply. Operating voltage range: 2.8~3.6V.
Metering accuracy guaranteed within 3.0V~3.6V. 5V compatible
for digital input.
• Built-in hysteresis for power-on reset.
• Four-wire SPI interface or simplified three-wire SPI interface with
fixed 24 cycles for all registers operation
• Parameter diagnosis function and programmable interrupt output
of the IRQ interrupt signal and the WarnOut signal.
• Programmable voltage sag detection and zero-crossing output.
• Channel input range
- Voltage channel (when gain is '1'): 120μVrms~600mVrms.
- L line current channel (when gain is '24'): 5μVrms~25mVrms.
- N line current channel (when gain is '1'): 120μVrms~600mVrms.
• Programmable L line current gain: 1, 4, 8, 16, 24; Programmable
N line gain: 1, 2, 4.
• Support L line and N line offset compensation.
• CF1 and CF2 output active and reactive energy pulses respectively which can be used for calibration or energy accumulation.
• Crystal oscillator frequency: 8.192 MHz. On-chip 10pF capacitors and no need of external capacitors.
• Green SSOP28 package.
• Operating temperature: -40 ℃ ~ +85 ℃ .
• Metering features fully in compliance with the requirements of
IEC62052-11, IEC62053-21 and IEC62053-23; applicable in
class 1 or class 2 single-phase watt-hour meter or class 2 singlephase var-hour meter.
• Accuracy of 0.1% for active energy and 0.2% for reactive energy
over a dynamic range of 5000:1.
• Temperature coefficient is 15 ppm/ ℃ (typical) for on-chip reference voltage
• Single-point calibration over a dynamic range of 5000:1 for
active energy; no calibration needed for reactive energy.
• Energy Meter Constant doubling at low current to save verification time.
• Electrical parameters measurement: less than ±0.5% fiducial
error for Vrms, Irms, mean active/ reactive/ apparent power, frequency, power factor and phase angle.
• Forward/ reverse active/ reactive energy with independent
energy registers. Active/ reactive energy can be output by pulse
or read through energy registers to adapt to different applications.
• Programmable startup and no-load power threshold.
• Dedicated ADC and different gains for L line and N line current
sampling circuits. Current sampled over shunt resistor or current
transformer (CT); voltage sampled over resistor divider network
or potential transformer (PT).
• Programmable L line and N line metering modes: anti-tampering
mode (larger power), L line mode (fixed L line), L+N mode (applicable for single-phase three-wire system) and flexible mode
(configure through register).
• Programmable L line and N line power difference threshold in
anti-tampering mode.
APPLICATION
• The 90E21/22/23/24 series are used for active and reactive
energy metering for single-phase two-wire, single-phase threewire or anti-tampering energy meters. With the measurement
function, the 90E21/22/23/24 series can also be used in power
instruments which need to measure voltage, current, etc.
DESCRIPTION
90E21/22/23/24 are all of green SSOP28 package with the same pin
alignment. In this datasheet, all reactive energy metering parts are only
applicable for the 90E22/24, and all N line metering and measurement
parts are only applicable for the 90E23/24.
The 90E21/22/23/24 series are high-performance wide-span energy
metering chips. The ADC and DSP technology ensure the chips' longterm stability over variations in grid and ambient environmental conditions.
Table-1 Function List
Part
Number
90E21
90E22
90E23
90E24
Active Energy Reactive Energy
Metering
Metering
√
√
√
√
N Line
Metering
√
√
√
√
Electrical
Parameters
Measurement
√
√
√
√
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DSC-7277/6
90E21/22/23/24
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
BLOCK DIAGRAM
I1P
I1N
VP
VN
Vref
PGA
X1/X4/X8/
X16/X24
PGA
X1
DSP Module
∑△ADC
HPF0
L Line Forward/Reverse Active Power
L Line Apparent Power
L Line Irms
HPF1
HPF0
Vrms
∑△ADC
Reference Voltage
Crystal Oscillator
RESET
HPF1
3-wire or 4-wire SPI
Active Energy
Pulse Output
Power Factor/
Angle/Frequency
WarnOut/IRQ/ZX
Power On Reset
OSCI
OSCO
CS SCLK SDO SDI
CF1
WarnOut IRQ
ZX
Figure-1 90E21 Block Diagram
I1P
I1N
VP
VN
Vref
PGA
X1/X4/X8/
X16/X24
PGA
X1
DSP Module
∑△ADC
HPF0
L Line Forward/Reverse Active/
Reactive Power
L Line Apparent Power
L Line Irms
HPF1
HPF0
Vrms
∑△ADC
Reference Voltage
Crystal Oscillator
RESET
HPF1
3-wire or 4-wire SPI
Power On Reset
OSCI
OSCO
CS SCLK SDO SDI
Active
Reactive
Energy Pulse Energy Pulse
Output
Output
CF1
CF2
WarnOut/IRQ/ZX
WarnOut IRQ
Power Factor/
Angle/Frequency
ZX
Figure-2 90E22 Block Diagram
Block Diagram
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90E21/22/23/24
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
MMD1
I1P
I1N
VP
VN
I2P
I2N
Vref
PGA
X1/X4/X8/
X16/X24
DSP Module
∑△ADC
PGA
X1
∑△ADC
PGA
X1/X2/X4
∑△ADC
HPF1
HPF0
L Line Forward/Reverse Active Power
L Line Apparent Power
L Line Irms
HPF1
HPF0
Vrms
HPF1
HPF0
N Line Forward/Reverse Active Power
N Line Apparent Power
N Line Irms
Reference Voltage
Crystal Oscillator
RESET
MMD0
3-wire or 4-wire SPI
Active Energy
Pulse Output
Power Factor/
Angle/Frequency
WarnOut/IRQ/ZX
Power On Reset
OSCI
OSCO
CF1
CS SCLK SDO SDI
WarnOut IRQ
ZX
Figure-3 90E23 Block Diagram
MMD1
I1P
I1N
VP
VN
I2P
I2N
Vref
PGA
X1/X4/X8/
X16/X24
PGA
X1
PGA
X1/X2/X4
DSP Module
∑△ADC
HPF1
HPF0
L Line Forward/Reverse Active/
Reactive Power
L Line Apparent Power
L Line Irms
HPF1
HPF0
Vrms
HPF1
HPF0
N Line Forward/Reverse Active/
Reactive Power
N Line Apparent Power
N Line Irms
∑△ADC
∑△ADC
Reference Voltage
Crystal Oscillator
RESET
MMD0
3-wire or 4-wire SPI
Power On Reset
OSCI
OSCO
CS SCLK SDO SDI
Active
Reactive
Energy Pulse Energy Pulse
Output
Output
CF1
CF2
WarnOut/IRQ/ZX
WarnOut IRQ
Power Factor/
Angle/Frequency
ZX
Figure-4 90E24 Block Diagram
Block Diagram
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90E21/22/23/24
1
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
PIN ASSIGNMENT
MMD1
1note 1
28note 1
MMD0
DGND
2
27
SDI
DVDD
3
26
SDO
Reset
4
25
SCLK
AVDD
5
24
CS
AGND
6
23
OSCO
I2P
note 2
7
22
OSCI
I2N
8note 2
21
ZX
NC
9
20
IRQ
I1P
10
19note 3
CF2
I1N
11
18
CF1
NC
12
17
WarnOut
Vref
13
16
VP
AGND
14
15
VN
Figure-5 Pin Assignment (Top View)
Note 1: Pin 1 and 28 are dedicated for the 90E23/24. Pin 1 should connect to DGND and pin 28 should connect to DVDD for 90E21/22.
Note 2: Pin 7 and 8 are dedicated for the 90E23/24. They should be left open for the 90E21/22.
Note 3: Pin 19 is dedicated for the 90E22/24. It should be left open for the 90E21/23.
Pin Assignment
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April 2, 2013
90E21/22/23/24
2
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
PIN DESCRIPTION
Table-2 Pin Description
note 1
Name
Pin No.
Reset
4
I
LVTTL
DVDD
3
I
Power
DGND
2
I
Power
AVDD
5
I
Power
Vref
13
O
Analog
AGND
6, 14
I
Power
I1P
I1N
10
11
I
Analog
I2P
I2N
7
8
I
Analog
VP
VN
16
15
I
Analog
NC
9, 12
I/O
Type
Reset: Reset Pin (active low)
This pin should connect to ground through a 0.1μF filter capacitor. In application it can also
directly connect to one output pin from microcontroller (MCU).
DVDD: Digital Power Supply
This pin provides power supply to the digital part. It should be decoupled with a 10μF electrolytic capacitor and a 0.1μF capacitor.
DGND: Digital Ground
AVDD: Analog Power Supply
This pin provides power supply to the analog part. This pin should connect to DVDD through
a 10Ω resistor and be decoupled with a 0.1μF capacitor.
Vref: Output Pin for Reference Voltage
This pin should be decoupled with a 1μF capacitor and a 1nF capacitor.
AGND: Analog Ground
I1P: Positive Input for L Line Current
I1N: Negative Input for L Line Current
These pins are differential inputs for L line current. Input range is 5μVrms~25mVrms when
gain is '24'.
I2P: Positive Input for N Line Current
I2N: Negative Input for N Line Current
These pins are differential inputs for N line current. Input range is 120μVrms~600mVrms
when gain is '1'.
Note: I2P and I2N are dedicated for the 90E23/24. They should be left open for the 90E21/
22.
VP: Positive Input for Voltage
VN: Negative Input for Voltage
These pins are differential inputs for voltage. Input range is 120μVrms~600mVrms.
NC: This pin should be left open.
CS
24
I
LVTTL
SCLK
25
I
LVTTL
SDO
26
OZ
LVTTL
SDI
27
I
LVTTL
MMD1
MMD0
1
28
I
LVTTL
Pin Description
Description
CS: Chip Select (Active Low)
In 4-wire SPI mode, this pin must be driven from high to low for each read/write operation,
and maintain low for the entire operation. In 3-wire SPI mode, this pin must be low all the
time. Refer to section 4.1.
SCLK: Serial Clock
This pin is used as the clock for the SPI interface. Data on SDI is shifted into the chip on the
rising edge of SCLK while data on SDO is shifted out of the chip on the falling edge of SCLK.
SDO: Serial Data Output
This pin is used as the data output for the SPI interface. Data on this pin is shifted out of the
chip on the falling edge of SCLK.
SDI: Serial Data Input
This pin is used as the data input for the SPI interface. Address and data on this pin is shifted
into the chip on the rising edge of SCLK.
MMD1/0: Metering Mode Configuration
00: anti-tampering mode (larger power);
01: L line mode (fixed L line);
10: L+N mode (applicable for single-phase three-wire system);
11: flexible mode (line specified by the LNSel bit (MMode, 2BH))
Note: The MMD1/0 pins are dedicated for the 90E23/24. For the 90E21/22, the metering
mode is fixed as L line mode, and MMD1 should connect to DGND and MMD0 should connect to DVDD.
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90E21/22/23/24
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
Table-2 Pin Description (Continued)
note 1
Name
Pin No.
OSCI
22
I
LVTTL
OSCO
23
O
LVTTL
CF1
CF2
18
19
O
LVTTL
ZX
21
O
LVTTL
IRQ
20
O
LVTTL
WarnOut
17
O
LVTTL
I/O
Type
Description
OSCI: External Crystal Input
An 8.192 MHz crystal is connected between OSCI and OSCO. There is an on-chip 10pF
capacitor, therefore no need of external capacitors.
OSCO: External Crystal Output
An 8.192 MHz crystal is connected between OSCI and OSCO. There is an on-chip 10pF
capacitor, therefore no need of external capacitors.
CF1: Active Energy Pulse Output
CF2: Reactive Energy Pulse Output
These pins output active/reactive energy pulses.
Note: CF2 is dedicated for the 90E22/24. It should be left open for the 90E21/23.
ZX: Voltage Zero-Crossing Output
This pin is asserted when voltage crosses zero. Zero-crossing mode can be configured to
positive zero-crossing, negative zero-crossing or all zero-crossing by the Zxcon[1:0] bits
(MMode, 2BH).
IRQ: Interrupt Output
This pin is asserted when one or more events in the SysStatus register (01H) occur. It is
deasserted when there is no bit set in the SysStatus register (01H).
WarnOut: Fatal Error Warning
This pin is asserted when there is metering parameter calibration error or voltage sag. Refer
to section 4.2.
Note 1: All digital inputs are 5V tolerant except for the OSCI pin.
Pin Description
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April 2, 2013
90E21/22/23/24
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
3
FUNCTIONAL DESCRIPTION
3.1
DYNAMIC METERING RANGE
Table-5 Threshold Configuration for Startup and No-Load Power
Accuracy is 0.1% for active energy metering and 0.2% for reactive
energy metering over a dynamic range of 5000:1 (typical). Refer to
Table-3 and Table-4.
Table-3 Active Energy Metering Error
Current
20mA ≤ I ＜ 50mA
50mA ≤ I ≤ 100A
Power Factor
1.0
±0.2
±0.1
3.3
Table-4 Reactive Energy Metering Error
20mA ≤ I ＜ 50mA
50mA ≤ I ≤ 100A
1.0
50mA ≤ I ＜ 100mA
PStartTh, 27H
PNolTh, 28H
QStartTh, 29H
QNolTh, 2AH
ENERGY REGISTERS
The 90E21/22/23/24 provides energy pulse output CFx (CF1/CF2)
which is proportionate to active/reactive energy. Energy is usually accumulated by adding the CFx pulses in system applications. Alternatively,
the 90E21/22/23/24 provides energy registers. There are forward
(inductive), reverse (capacitive) and absolute energy registers for both
active and reactive energy. Refer to Table-6.
Error(%)
±0.4
±0.2
±0.4
0.5
100mA ≤ I ≤ 100A
±0.2
Note: Shunt resistor is 250 μΩ or CT ratio is 1000:1 and load resistor is 6Ω.
3.2
Threshold for Active Startup Power
Threshold for Active No-load Power
Threshold for Reactive Startup Power
Threshold for Reactive No-load Power
The chip has no-load status bits, the Pnoload/Qnoload bit (EnStatus,
46H). The chip will not output any active pulse (CF1) in active no-load
state. The chip will not output any reactive pulse (CF2) in reactive noload state.
±0.2
0.5 (Inductive)
100mA ≤ I ≤ 100A
0.8 (Capacitive)
±0.1
Note: Shunt resistor is 250 μΩ or CT ratio is 1000:1 and load resistor is 6Ω.
Current
Register
The chip will start within 1.2 times of the theoretical startup time of
the configured startup power, if startup power is less than the corresponding power of 20mA when power factor or sinφ is 1.0.
Error(%)
50mA ≤ I ＜ 100mA
sinφ (Inductive or
Capacitive)
Threshold
Table-6 Energy Registers
STARTUP AND NO-LOAD POWER
Startup and no-load power thresholds are programmable, both for
active and reactive power. The related registers are listed in Table-5.
Energy
Register
Forward Active Energy
Reverse Active Energy
Absolute Active Energy
Forward (Inductive) Reactive Energy
Reverse (Capacitive) Reactive Energy
Absolute Reactive Energy
APenergy, 40H
ANenergy, 41H
ATenergy, 42H
RPenergy, 43H
RNenergy, 44H
RTenergy, 45H
Each energy register is cleared after read. The resolution of energy
registers is 0.1CF, i.e. one LSB represents 0.1 energy pulse.
Functional Description
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April 2, 2013
90E21/22/23/24
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
3.4
N LINE METERING AND ANTI-TAMPERING
3.4.1
METERING MODE AND L/N LINE CURRENT SAMPLING
GAIN CONFIGURATION
1.5625%, altogether 16 choices. The configuration is made by the
Pthresh[3:0] bits (MMode, 2BH) and the default value is 3.125%. The
threshold is applicable for active energy. The metering line of the reactive energy follows that of the active energy.
The 90E23 and 90E24 have two current sampling circuits with N line
metering and anti-tampering functions. The MMD1 and MMD0 pins are
used to configure the metering mode. Refer to Table-7.
Compare Method
In anti-tampering mode, the compare method is as follows:
If current metering line is L line and
Table-7 Metering Mode
MMD1 MMD0
0
0
0
1
1
0
1
1
Metering Mode
N Line Active Power - L Line Active Power
* 100% > Threshold
L Line Active Power
CFx (CF1 or CF2) Output
Anti-tampering
(larger power)
Mode CFx represents the larger energy
line. Refer to section 3.4.2.
CFx represents L line energy all
L Line Mode (fixed L line)
the time.
L+N Mode (applicable for
CFx represents the arithmetic
single-phase three-wire
sum of L line and N line energy
system)
Flexible Mode (line speciCFx represents energy of the
fied by the LNSel bit
specified line.
(MMode, 2BH))
N line is switched as the metering line, otherwise L line keeps as the
metering line.
If current metering line is N line and
L Line Active Power - N Line Active Power
* 100% > Threshold
N Line Active Power
L line is switched as the metering line, otherwise N line keeps as the
metering line.
This method can achieve hysteresis around the threshold automatically. L line is employed after reset by default.
The 90E23 and 90E24 have two current sampling circuits with different gain configurations. L line gain can be 1, 4, 8, 16 and 24, and N line
gain can be 1, 2 and 4. The configuration is made by the MMode register
(2BH). Generally L line can be sampled over shunt resistor or CT. N line
can be sampled over CT for isolation consideration. Note that Rogowski
coil is not supported.
3.4.2
Special Treatment at Low Power
When power is low, general factors such as the quantization error or
calibration difference between L line and N line might cause the power
difference to be exceeded. To ensure L line and N line to start up normally, special treatment as follows is adopted:
ANTI-TAMPERING MODE
The line with higher power is selected as the metering line when both
L line and N line power are lower than 8 times of the startup power but
higher than the startup power.
Threshold
In anti-tampering mode, the power difference threshold between L
line and N line can be: 1%, 2%,... 12%, 12.5%, 6.25%, 3.125% and
Functional Description
13
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90E21/22/23/24
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
3.5
MEASUREMENT AND ZERO-CROSSING
3.5.1
MEASUREMENT
The above measurements are all calculated with fiducial error except
for frequency. The frequency accuracy is 0.01Hz, and the other measurement accuracy is 0.5%. Fiducial error is calculated as follow:
The 90E21/22/23/24 has the following measurements:
• voltage rms
• current rms (L line/N line)
• mean active power (L line/N line)
• mean reactive power (L line/N line)
• voltage frequency
• power factor (L line/N line)
• phase angle between voltage and current (L line/N line)
• mean apparent power (L line/N line)
Fiducial_E rror =
U mea - U real
* 100%
U FV
Where Umea is the measured voltage, Ureal is the actual voltage and
UFV is the fiducial value.
Table-8 The Measurement Format
90E21/22/23/24 Defined
Format
Range
Un
Imax
as 4Ib
maximum power as
Un*4Ib
XXX.XX
0~655.35V
XX.XXX
0~65.535A
XX.XXX
-32.768~+32.767
kW/kvar
Complement, MSB as the sign bit
Un*4Ib
XX.XXX
0~+32.767 kVA
Complement, MSB always '0'
fn
XX.XX
45.00~65.00 Hz
1.000
X.XXX
-1.000~+1.000
Measurement
Fiducial Value (FV)
Voltage rms
Current rms
note 1, note 2
Active/ Reactive Power
Apparent Power
Frequency
note 1
note 1
note 3
Power Factor
Comment
Signed, MSB as the sign bit
note 4
180°
XXX.X
-180°~+180°
Signed, MSB as the sign bit
Phase Angle
Note 1: All registers are of 16 bits. For cases when the current and active/reactive/apparent power goes beyond the above range, it is suggested to be handled by
microcontroller (MCU) in application. For example, register value can be calibrated to 1/2 of the actual value during calibration, then multiply 2 in application. Note that
if the actual current is twice of that of the 90E21/22/23/24, the actual active/reactive/apparent power is also twice of that of the chip.
Note 2: The accuracy is not guaranteed when the current is lower than 15mA. Note that the tolerance is 25 mA at IFV of 5A and fiducial accuracy of 0.5%.
Note 3: Power factor is obtained by active power dividing apparent power
Note 4: Phase angle is obtained when voltage/current crosses zero at the frequency of 256kHz. Precision is not guaranteed at small current.
3.5.2
ZERO-CROSSING
The ZX pin is asserted when the sampling voltage crosses zero.
Zero-crossing mode can be configured to positive zero-crossing, negative zero-crossing and all zero-crossing by the Zxcon[1:0] bits (MMode,
2BH). Refer to section 6.4.
The zero-crossing signal can facilitate operations such as relay operation and power line carrier transmission in typical smart meter applications.
Functional Description
14
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90E21/22/23/24
3.6
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
CALIBRATION
3.7
Metering Calibration
RESET
Only single-point calibration is needed over the entire dynamic
range.
The 90E21/22/23/24 has an on-chip power supply monitor circuit with
built-in hysteresis. The 90E21/22/23/24 only works within the voltage
range.
Metering calibration is realized by first calibrating gain at unity power
factor and then calibrating phase angle compensation at 0.5 inductive
power factor.
The 90E21/22/23/24 has three means of reset: power-on reset, hardware reset and software reset. All registers resume to their default value
after reset.
Power-on Reset: Power-on reset is initiated during power-up. Refer
to section 6.3.
However, due to very small signal in L line current sampling circuits,
any external interference, e.g., a tens of nano volts influence voltage on
shunt resistor conducted by transformer in the energy meter’s power
supply may cause perceptible metering error, especially in low current
state. For this nearly constant external interference, the 90E21/22/23/24
also provides power offset compensation.
Hardware Reset: Hardware Reset is initiated when the reset pin is
pulled low. The width of the reset signal should be over 200μs.
Software Reset: Software Reset is initiated when ‘789AH’ is written
to the software reset register (SoftReset, 00H).
L line and N line need to be calibrated sequentially. Reactive does
not need to be calibrated.
Measurement Calibration
Measurement calibration is realized by calibrating the gains for voltage rms and current rms. Considering the possible nonlinearity around
zero caused by external components, the chip also provides offset compensation for voltage rms, current rms, mean active power and mean
reactive power.
Frequency, phase angle and power factor do not need calibration.
For more calibration details, please refer to Application Note AN-641.
Functional Description
15
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90E21/22/23/24
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
4
INTERFACE
4.1.1
4.1
SERIAL PERIPHERAL INTERFACE (SPI)
In four-wire mode, the CS pin must be driven low for the entire read
or write operation. The first bit on SDI defines the access type and the
lower 7-bit is decoded as address.
SPI is a full-duplex, synchronous channel. There are two SPI modes:
four-wire mode and three-wire mode. In four-wire mode, four pins are
used: CS, SCLK, SDI and SDO. In three-wire mode, three pins are
used: SCLK, SDI and SDO. Data on SDI is shifted into the chip on the
rising edge of SCLK while data on SDO is shifted out of the chip on the
falling edge of SCLK. The LastSPIData register (06H) stores the 16-bit
data that is just read or written.
FOUR-WIRE MODE
Read Sequence
As shown in Figure-6, a read operation is initiated by a high on SDI
followed by a 7-bit register address. A 16-bit data in this register is then
shifted out of the chip on SDO. A complete read operation contains 24
cycles.
CS
1
2
3
4
5
6
7
8
A1
A0
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
SCLK
Register Address
SDI
A6
A5
A4
A3
A2
16-bit data
High Impedance
SDO
Don't care
D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Figure-6 Read Sequence in Four-Wire Mode
Write Sequence
As shown in Figure-7, a write operation is initiated by a low on SDI
followed by a 7-bit register address. A 16-bit data is then shifted into the
chip on SDI. A complete write operation contains 24 cycles.
CS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
SCLK
Register Address
SDI
SDO
A6
A5
A4
A3
A2
A1
16-bit data
A0 D15 D14 D13 D12 D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
High Impedance
Figure-7 Write Sequence in Four-Wire Mode
Interface
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90E21/22/23/24
4.1.2
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
THREE-WIRE MODE
In three-wire mode, CS is always at low level. When there is no operation, SCLK keeps at high level. The start of a read or write operation is
triggered if SCLK is consistently low for at least 400μs. The subsequent
read or write operation is similar to that in four-wire mode. Refer to Figure-8 and Figure-9.
CS
Drive Low
1
SCLK
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
Low ≥ 400μs
Low ≥ 400μs
Register address
SDI
Don’t care
A6
A5
A4
A3
A2
A1
Don't care
A0
16-bit data
Hign Impedance
SDO
A6
D
15
D
14
D
13
D
12
D
11
D
10
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
23
24
A5
A4
3
4
High Impedance
Figure-8 Read Sequence in Three-Wire Mode
CS
Drive low
1
SCLK
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SDO
17
18
19
20
21
22
Don't care
1
2
Low ≥ 400μs
Register Address
SDI
16
Low ≥ 400μs
A6
A5
A4
A3
A2
A1
16-bit data
A0
D
15
D
14
D
13
D
12
D
11
D
10
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Don't care
A6
A5
A4
High Impedance
Figure-9 Write Sequence in Three-Wire Mode
Interface
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90E21/22/23/24
4.1.3
SINGLE-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
4.2
TIMEOUT AND PROTECTION
WARNOUT PIN FOR FATAL ERROR WARNING
Timeout occurs if SCLK does not toggle for 6ms in both four-wire and
three-wire modes. When timeout, the read or write operation is aborted.
Fatal error warning is raised through the WarnOut pin in two cases:
checksum calibration error and voltage sag.
If there are more than 24 SCLK cycles when CS is driven low in fourwire mode or between two starts in three-wire mode, writing operation is
prohibited while normal reading operation can be completed by taking
the first 24 SCLK cycles as the valid ones. However, the reading result
might not be the intended one.
Calibration Error
The 90E21/22/23/24 performs diagnosis on a regular basis for important parameters such as calibration parameters and metering configuration. When checksum is not correct, the CalErr[1:0] bits (SysStatus,
01H) are set, and both the WarnOut pin and the IRQ pin are asserted.
When checksum is not correct, the metering part does not work to prevent a large number of pulses during power-on or any abnormal situation upon incorrect parameters.
A read access to an invalid address returns all zero. A write access
to an invalid address is discarded.
Table-9 and Table-10 list the read or write result in different conditions.
Voltage Sag
Voltage sag is detected when voltage is continuously below the voltage sag threshold for one cycle which starts from any zero-crossing
point. Voltage threshold is configured by the SagTh register (03H). Refer
to section 6.5.
Table-9 Read / Write Result in Four-Wire Mode
Condition
Operation
Timeout
Result
SCLK Cycles
note 2
>=24
Read
Write
note 1
Read/Write
Status
LastSPIData
Register Update
Normal Read
Yes
note 2
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