ATSAM4C-EK

ARM-based Embedded MCUs ATSAM4C-EK USER GUIDE Introduction The ATSAM4C-EK is an evaluation kit for the 32-bit ARM® Cortex®-M4 SAM4C microcontroller from Atmel® Corporation. The ATSAM4C-EK can be used with the following SAM4C series microcontrollers:  SAM4C16C  SAM4C8C This document describes the kit contents and architecture, and provides guidelines on how to use the kit. 11251A–ATARM–16-Dec-13 Contents  Board  Power Supply    One SAM4C Evaluation Kit Board (EK)  One universal input AC/DC power supply with US, Europe and UK plug adapters  One 3V Lithium Battery type CR1225 Cables  One serial RS232 cable  One micro A/B-type USB cable Welcome letter Reference documents  Atmel SAM4C Series Datasheet (http://www.atmel.com/images/atmel_11102_smartenergy_sam4c16-c8_datasheet.pdf) ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 2 Table of Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Reference documents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1. Evaluation Kit Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1 1.2 1.3 Electrostatic Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Battery. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recovery Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2. Power Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 2.2 Power up the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Sample Code and Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3. Evaluation Kit Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Equipment List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Function Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Embedded Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Communication Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Debug Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Extend Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 LCD Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Analog I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 CryptoAuthentication (optional). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 LEDs and Buttons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Miscellaneous I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Metrology Core Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 PIO Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4. Evaluation Kit Firmware Demonstration . . . . . . . . . . . . . . . . . . . . . . 35 4.1 4.2 ATSAM4C-EK Default Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Measuring the Backup mode current consumption on VDDBU . . . . . . . . . . . 35 5. ATSAM4C-EK Design Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 5.1 5.2 ATSAM4C-EK Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 ATSAM4C-EK Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 6. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 3 1. Evaluation Kit Specifications Table 1-1. Evaluation Kit Specifications Characteristic Specifications PCB 6 layers, 140 mm x 100 mm PCB Material Standard FR4 in 1.6 mm thickness Crystal 8 MHz Clock Speed Piezoelectric Ceramic Resonator 8.192 MHz 32.768 kHz external clock RS232 Ports RS485 USB TWI EEPROM Memory Serial Data Flash 5V DC from main connector power supply Board Supply Voltage 5V DC from USB 3V Battery for Backup and RTC 1.1 ROHS Compliant CE and FCC Part 15 status Compliant Electrostatic Warning Warning: ESD-Sensitive Electronic Equipment! Electrostatic sensitive device 1.2 The evaluation kit is shipped in a protective anti-static package. The board system must not be subjected to high electrostatic discharge. We strongly recommend using a grounding strap or similar ESD protective device when handling the board in hostile ESD environments (offices with synthetic carpet, for example). Avoid touching the component pins or any other metallic element on the board. Battery The ATSAM4C-EK ships with a 3V coin battery. This battery is not required for the board to start up as long as Jumper JP8 is closed. The coin battery is provided for user convenience in case the user would like to exercise the date and time backup function of the SAM4C devices when the board is switched off. 1.3 Recovery Procedure The demo software is stored in internal Flash memory. If the content of the internal Flash has been erased, it can be reprogrammed recovered to the state as it was when shipped by Atmel using Atmel SAM-BA® In-system Programmer available on the Atmel website (www.atmel.com/tools/atmelsam-bain-systemprogrammer.aspx). The binary file of the demo software is available on the Atmel website in the ATSAM4C-EK Evaluation Kit Section (http://www.atmel.com/tools/SAM4C-EK.aspx). ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 4 2. Power Up 2.1 Power up the Board Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right power plug adapter corresponding to that of your country, and insert it in the power supply. Connect the power supply DC connector to the board and plug the power supply to an AC power plug. The board LCD should light up and display a graphic demo program. 2.2 Sample Code and Technical Support After boot up, designers can run sample code or their own application, on the development kit. Users can download sample code and get technical support from the Atmel website. The ATSAM4C-EK is supported by the Atmel Software Framework (ASF) (http://www.atmel.com/tools/AVRSOFTWAREFRAMEWORK.aspx). ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 5 3. Evaluation Kit Hardware 3.1 Overview This section introduces the Atmel SAM4C Evaluation Kit design. It introduces system-level concepts, such as power distribution, memory, and interface assignments. The Atmel SAM4C16C and SAM4C8C microcontrollers are system-on-chip solutions for smart energy applications, built around two high-performance 32-bit ARM Cortex-M4 RISC processors. These devices operate at a maximum speed of 120 MHz and feature up to 1 Mbyte of embedded Flash, 152 Kbytes of SRAM and on-chip cache for each core. The dual ARM Cortex-M4 architecture allows for integration of application layer, communications layers and security functions in a single device, with the ability to extend program and data memory via a 16-bit external bus interface. The peripheral set includes an advanced cryptographic engine, two anti-tamper pins with time-stamping function, floating point unit (FPU), five USARTs, two UARTs, two TWIs, up to seven SPIs, as well as a PWM timer, two 3-channel generalpurpose 16-bit timers, temperature compensable low-power RTC running on backup area down to 0.5 µA, and a 50 x 6 segmented LCD controller. The SAM4C series is a scalable platform providing, alongside Atmel's industry leading SAM4 standard microcontrollers, unprecedented cost structure, performance and flexibility to smart meter designers worldwide. Figure 3-1. ATSAM4C-EK Board Architecture 4-Wire RS232 RS485 2-Wire RS232 XPRO Extension RZ600 Wireless 1 6 3V3 LDO 3V3 USART2 SHDN UART1 SPI, TWI, UART, ADC,... AT24C EEPROM AT30TS75 Temperature Sensor SPI 0 SAM4C16C LQFP100 TWI UART TO USB USART0 Serial Debug JTAG ATSHA204 Crypto Authentification FWUP, Reset (Optional) VDDBU LCD SCROLL UP, SCROLL DOWN Tamper 0, Tamper 2 ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 6 3.2 Equipment List 3.2.1 Features List The CM board components are listed as follows:  CPU SAM4C with its embedded resources      3.2.2  8 MHz and 32.768 kHz Quartz Crystal, SMB connector for external source  Main regulator 5V/3.3V with red LED indicator  1 Lithium Coin Cell Battery Main board with:  1 custom segmented LCD  1 shared interface RS232 / RS485  1 Serial data Flash SPI  1 Two-Wire Serial EEPROM  1 Two-Wire Temperature Sensor  1 Two-Wire CryptoAuthentification™ Memory (optional) Debug solution:  2 peripheral Input/Output extension connectors HE10 (PIO A, B)  1 peripheral Input/Output extension connector HE10 (PIO Sense)  1 JTAG/ICE interface  1 UART/USB bridge Device Communication interface Analog  1 Analog 3V reference  1 Potentiometer connected on ADC input Buttons  4 system push buttons: Reset, Force Wake-Up, Tamper 0, Tamper 2  2 user push buttons: Scroll Up and Scroll Down LEDs  1 amber LED  1 blue LED  1 green LED Interface Connection The ATSAM4C-EK board includes hardware interfaces such as:  1 RS232/RS485 (USART0 RX, TX, RTS, CTS) connected to:  9-way male D-type RS232 connector  3-pin connector  1 JTAG/SWD 20-pin IDC connector  1 USB 5-pin type Micro AB connector (bridge UART)  3 PIOs connected to HE10 connectors ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 7 Figure 3-2. Annotated ATSAM4C-EK Board Layout RS232 Interface RS485 Interface Debug Interface + Power Supply Power Supply JTAG Interface Zigbee Interface ATMEL SAM4C16 System Buttons ATMEL Custom LCD User Buttons XPRO Interface Battery Coin Cell PIO Extension PIO Extension PIO Metering Extension ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 8 3.3 Function Blocks 3.3.1 Processor The ATSAM4C-EK board is equipped with a SAM4C16 device in an LQFP100 package. SAM4C Processor 90 96 100 64 83 82 62 98 25 68 69 70 84 71 72 73 74 75 24 23 22 65 66 67 21 20 19 61 60 59 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 Figure 3-3. PA0 PA1 PA2 PA3 PA4/AD1 PA5/AD2 PA6 PA7 PA8 PA9 PA10 PA11 PA12/AD0 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 MN1 R1.R2 should close to SAM4C. Do Not Populate FWUP FWUP 26 30 28 27 ERASE/PC9 FWUP 85 VDDIN 3.3.2 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 TDI/PB0 TDO/TRACESWO/PB1 TMS/SWDIO/PB2 TCK/SWCLK/PB3 VDDIN PB0 PB1 PB2 PB3 35 JTAGSEL VDDOUT VDDCORE PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 47 31 58 57 56 55 32 46 54 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 VDDREF VDDPLL VDDLCD VDDIO GND_1 GND_3 GND_2 GND_4 29 43 45 1 2 6 13 14 15 16 81 17 18 95 97 3 5 88 87 7 80 10 9 93 91 94 12 8 79 ADVREF 77 4 52 42 78 PC9 SHDN VDDBU 36 34 37 VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 SHDN JTAGSEL ATMEL Cortex-M4 Processor SAM4C16CA-AU LQFP100 TMP0 33 49 76 99 39 VDDLCD TMP0 NRST TST 92 {7} 38 VDDPLL SHDN 48 TST 53 {4} NRST XIN32 XOUT32 VDDCORE_1 VDDCORE_2 VDDCORE_3 VDDCORE_4 TMP0 40 41 PA30/XOUT PA31/XIN 11 44 63 89 50 51 R1 0R/DNP XIN32 XOUT32 {7} PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13/AD3 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23/AD4 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31/AD5 0R/DNP VDDOUT R2 86 PA30 XOUT XIN PA31 VDDBU Clock Distribution The ATSAM4C-EK board includes two clock systems (see Table 3-1 and Figure 3-4). Table 3-1. Components Clock System Qty Description Component Assignment 1 Crystal for Internal Clock 8 MHz Y2 1 Crystal for RTC Clock 32.768 kHz Y1 Clock System Do Not Populate 0R_DNP C 20 18pF Y1 C 19 R4 0R XIN32 32.768 kHz 18pF XOUT32 R5 0R 0R XOUT Y2 8MHz 4 C1 R6 18pF 1 RTC_32 2 R3 {4} C 24 3 Figure 3-4. 18pF XIN R9 0R ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 9 3.3.3 Reset and Wake-Up Circuitry The reset sources for the EK board are:  Power on reset 3.3.4  Push button reset (refer to Section 3.11.2 “Push Buttons”)  JTAG reset from an in-circuit emulator Power Supplies The ATSAM4C-EK board evaluation and development platform embeds all the necessary power rails required for the SAM4C processor and peripherals. The ATSAM4C-EK board can be supplied by either a 5V DC block through input J2 (see Figure 3-5) or a USB connection via J6 (refer to “DBGU/USB Bridge Schematic” on page 16). A manual power supply selection switch (SW1) is provided to power on/off the main power line. Figure 3-5. Power Supply Schematic J2 DC Power Jack 1 2 SW1 SW-SLIDE-3 U1 ZEN056V130A24LS 1 3 D2 5V 1 2 3 NSR0320MW2T1G 2 D3 USB5V C29 100nF 3 C30 C31 33µF/16V R12 NSR0320MW2T1G 3.3.5 TP4 33µF/16V 1K Power Rails The SAM4C supports 1.6V–3.6V single supply mode (VDDIN). An internal regulator input is connected to the source and its output feeds VDDCORE (VDDOUT connected to VDDCORE). When the 3.3V supply is present, the Power LED D5 is lit. Test points TP2 to TP5 are used to perform testing. Table 3-2. Power Supply Voltage Ranges Power Supply VDDIO Ranges 1.6V–3.6V Comments Flash Memory Charge Pumps Supply for Erase and Program Operations, and Read operation Input Output buffers Supply VDDBU 1.6V–3.6V Backup Area power supply. VDDBU is automatically disconnected when VDDIO is present (> 1.9V) VDDIN 1.6V–3.6V 1.6V min. if LCD and ADC not used, 2.5V otherwise LCD Voltage Regulator Output VDDLCD 2.5V–3.6V External LCD power supply input (LCD regulator not used) VDDIO/VDDIN need to be supplied when the LCD Controller is used VDDOUT 1.2V Output 120 mA Output Current VDDPLL 1.08V–1.32V – VDDCORE 1.08V–1.32V – ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 10 Power Rails Schematic 5V 3V3 R15 100 Ω 100K R14 FORCE_ON 1 2 3 4 5V 6 5 4 Q1 Si1563EDH JP9 C36 100nF C37 10µF FORCE POWER ON 1 C43 2 3 8 7 6 5 PGOOD GND EN ADJ VIN VOUT VDD NC R16 C38 1µF R18 15K Ω 1% 15 3V3 10nF 47K Ω 1% C41 1µF R17 470Ω D5 C39 10µF RED FORCE_ON C44 1µF R19 10K Ω 15pF TP7 C35 U2 RT9018A VSS 100K Ω 9 Figure 3-6. Power LED Vout = 0.8 x (1 + Rtop/Rbottom) 3V3 POWER {3} SHDN R20 10K Ω TP5 VDDOUT VDDCORE JP6 3V3 JP7 VDDPLL 56µH TP10 VDDMAIN TP11 VDDIN TP12 VDDIO JP11 TP6 L2 JP12 R13 2.2R . C32 Do Not Populate 2.2µF/DNP C34 22µF 22 C33 JP13 100nF close to SAM4C Note: 3.3.6 Test points and jumpers are provided for easy access to each of the regulated power lines and measure the current on each line. Battery Backup The VDDBU pin is powered from the 3.3V rail or from a backup battery BT1 via a dual Schottky diode D4. Test points TP8 and jumper JP8/JP10 are used to perform voltage and current measurements. Figure 3-7. Backup Battery Schematic D4 BAT54C VDDBU VDDIN BT1 1 JP8 3 TP8 2 JP10 C40 2.2µF VBATT C42 100nF VDDBU ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 11 3.4 3.4.1 Embedded Memories  I2C for data storage in EEPROM (Atmel AT24C1024B)  SPI Serial Flash AT45 or AT25F TWI EEPROM The AT24C1024B provides 1,048,576 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 131,072 words of 8 bits each. Device slave address byte: 0x50. Figure 3-8. TWI EEPROM Schematic VDDMAIN VDDMAIN Do Not Populate (SCL) PA25 (SDA) PA24 R41 R42 4.7K 4.7K U4 6 5 8 4 VDDMAIN C62 100nF 1 SCL A0 SDA A1 VCC A3 GND WP R39 R40 0R/DNP 0R/DNP R45 R46 0R 0R 2 3 7 AT24C1024B ADDR: 0X50 3.4.2 SPI Serial Flash The ATSAM4C-EK embeds one serial Flash device AT25DFxx or AT45DBxx connected through the SPI. (The AT25DF321A is mounted by default.) Figure 3-9. SPI Serial Flash Schematic VDDIN U10 PA7 PA6 PA8 PA5 VDDIN R100 R101 R102 R103 R105 33R 33R 33R 0R 470K SPI0_MOSIC SPI0_MISOC SPI0_SPCKC SPI0_NPCSC 5 2 6 1 SI VCC SO /WP SCK /HOLD /CS GND 8 3 7 4 C80 100nF AT25DF321A-SH-B R100 to R103 should be close to SAM4C. Do Not Populate U13 SPI0_MOSIC SPI0_SPCKC VDDIN SPI0_NPCSC 1 2 3 4 SI SCK /RESET /CS SO GND VCC /WP 8 7 6 5 SPI0_MISOC VDDIN AT45DB321D DNP U13 and U10 PCB footprints differ by 90 degrees and are stacked. ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 12 3.4.3 Compatible Devices Table 3-3. Compatible Devices Adesto AT45DB Series Devices Adesto AT25DF Series Devices AT45DB64D2-CNU AT25DF641A-SH AT45DB321D-MWU AT25DF321A-SH AT45DB131D-SS AT25DF161-SH AT45DB081D-SS AT25DF081-SSH AT45DB041D-SS AT25DF021-SH AT45DB021D-SS – AT45DB011D-SS – ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 13 3.5 Communication Interfaces 3.5.1 Serial Port USART2 RS232 The USART2 is buffered with one RS-232 Transceiver ADM3312E (Analog Devices) and is connected to a DB9 connector. A classic implementation RS232 transceiver selection should include double source capability. The USART2 connector with RTS/CTS handshake signal support is connected to the RS232 transceiver. Features:  One RS232 transceiver connected to RXD2, TXD2, RTS2, and CTS2  One DB9 male connector  Required resistors and capacitors Figure 3-10. USART2 RS232 Schematic USART2 MN3 ADM3312EARU VDDMAIN 3 C48 100nF 21 PA10 PA9_232 PA14 PA15 V+ 6 C1C2+ 23 19 R26 R 0R 5 R28 R30 R31 R33 R34 0R 0R 0R 0R 47K 7 10 8 11 9 12 Male Straight Angle C51 100nF C2C3+ GND 4 24 J3 SD EN T1IN R1OUT T2IN R2OUT T3IN R3OUT 1 6 2 7 3 8 4 9 5 C53 100nF C3T1OUT R1IN T2OUT R2IN T3OUT R3IN 22 18 15 17 14 16 13 R35 0R 10 VDDMAIN 20 2 V- C52 100nF VDDMAIN R25 47K/DNP (TXD2) (RXD2) (RTS2) (CTS2) C1+ C50 100nF 1 Do Not Populate VCC C49 100nF 11 C47 4.7µF FGND Serial Port USART2 RS485 The USART2 is buffered with an Analog Devices ADM3485 RS-485/RS-422 transceiver and is connected to a 3-point jumper. Features:  One RS485 transceiver connected to RXD2, TXD2 and RTS2, CTS2  One 3-point connector  Required resistors and capacitors USART2 RS485 Schematic VDDMAIN VDDMAIN RS 485 R23 10K R24 3.3K/DNP MN4 ADM3485ARZ (RXD2) PA9_485 R27 0R 1 (CTS2) PA15 R29 0R 2 (RTS2) PA14 R32 0R 3 (TXD2) PA10 R36 0R 4 RO VCC RE GND Do Not Populate VDDMAIN 8 5 JP14 C54 100nF J4 1 DE DI 2 A B 6 7 3 PA9_485 1 Figure 3-11. JP15 PA9 PA9_232 2 3 3.5.2 R37 120R JP16 JP17 3.3K/DNP R38 FGND Do Not Populate ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 14 3.5.3 Serial Port UART1 RS232 The UART1 is buffered with an Analog Devices ADM3312E RS-232 transceiver and is connected to the HE10 PIO port C. A classic implementation RS232 transceiver selection should include double source capability. Features:  One RS232 transceiver connected to RXD (PC1) and TXD (PC0) only  One HE10 male connector (PIO port C)  Required resistors and capacitors Figure 3-12. Serial Port Schematic UART1 MN5 ADM3312EARU VDDMAIN 3 C55 4.7µF C56 100nF 21 PC0 PC1 23 R43 47K/DNP 19 R44 0R 5 R47 R48 R49 0R 0R 47K R51 47K 7 10 8 11 9 12 VDDMAIN 3.6 Debug Interfaces 3.6.1 JTAG/ICE V+ C1C2+ 6 20 2 V- C59 100nF C60 100nF Do Not Populate (TXD1) (RXD1) C1+ C58 100nF 1 VDDMAIN VCC C57 100nF GND 4 24 C2C3+ C61 100nF SD EN 22 C3- T1IN R1OUT T2IN R2OUT T3IN R3OUT J5 (RS232_TXD) (RS232_RXD) 18 15 17 14 16 13 T1OUT R1IN T2OUT R2IN T3OUT R3IN R50 0R R52 0R 1 2 3 HE10 The ATSAM4C-EK includes a JTAG interface port to provide debug level access to the system-on-chip. The JTAG port is a 20-pin, dual-row, 0.1-inch male connector. This port provides the required interface for in-circuit emulators such as the ARM Multi-ICE® and Atmel SAM-ICE. Features:  One HE10 20-pin male connector Required resistors JTAG/ICE Interface Schematic VDDIN R134 100K Ω J11 2 4 6 8 10 12 14 16 18 20 1 3 5 7 9 11 13 15 17 19 R135 100K Ω R136 100K Ω R137 R138 100K Ω 100K Ω PB0 PB2 PB3 (TDI) (TMS) (TCK) NRST (NRST) R146 0R/DNP Do Not Populate JTAG/ICE INTERFACE (TDO) 1 Figure 3-13. JP24 {3,4} PB1 PB1 2 3  BP6 TMP2 1 2 3 4 R149 100K Ω R148 33Ω PB27 ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 15 3.6.2 UART/USB Bridge Interface The UART is connected to an interface USB through an FTDI FT232R (TTL to USB converter) device. RX and TX DBGU only are connected to the USB connector Micro AB. Figure 3-14. DBGU/USB Bridge Schematic L3 J6 USB Micro AB 10 8 9 1 USB5V 220Ω at 100MHz 2 C66 10nF 3V3OUT C64 4.7µF/16V C68 C67 100nF 4 20 5V 1 R58 0R D- 2 D+ 3 4 ID VCCIO VCC 16 15 C70 47pF R59 C71 47pF 0R 5V R60 G 5 Do Not Populate USBDM USBDP 8 19 24 27 28 4.7K/DNP NC1 RESET# NC2 OSCI OSCO 3V3OUT 11 7 6 17 3V3OUT 25 7 18 21 C72 100nF R63 0R DBGU/USB Bridge FGND 3.7 U8 100nF AGND GND1 GND2 GND3 TXD RXD RTS# CTS# DTR# DSR# DCD# RI# CBUS0 CBUS1 CBUS2 CBUS3 CBUS4 TEST FT232RL 1 5 3 11 2 9 10 6 R56 0R R57 PB4 PB5 (RXD0) (TXD0) 0R 3V3OUT 23 D7 Red 22 13 14 12 D6 Green R61 6 470R R62 470R R64 10K/DNP Do Not Populate 26 R65 0R Extend Interfaces The SAMAC-EK embeds two connectors to interface Atmel IEEE 802.15.4-compliant wireless transceivers for ZigBee®based applications. Features: 3.7.1  Atmel RZ600 module  Atmel REB233-XPRO module RZ600 Interface  The RZ600 interface connects with Atmel modules used for ZigBee communication platforms that are equipped with a 10-pin HE10 male connector. Figure 3-15. RZ600 Interface Schematic J7 (ZB_RSTN) (ZB_IRQ1) (SPI0_NPCS0) (SPI0_MISO) PA17 PA12 PA5 PA6 R66 R68 R70 R72 0R 0R 0R 33R 1 3 5 7 9 2 4 6 8 10 R67 R69 R71 R73 0R 0R 33R 33R C73 18pF R70 to R73 should be close to SAM4C. PA11 PA18 PA7 PA8 C74 2.2nF (ZB_IRQ0) (ZB_SLPTR) (SPI0_MOSI) (SPI0_SPCK) L4 C75 2.2µF JP18 VDDMAIN 220Ω at 100MHz ZigBee . Table 3-4. RZ600 HE10 Pin Functions Function Pin Pin Function Reset 1 2 IRQ0 Interrupt Request 3 4 SLP_TR SPI Chip Select 5 6 SPI MOSI SPI MISO 7 8 SPI CLK Power Ground 9 10 Power Supply ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 16 3.7.2 REB233-XPRO Interface The XPRO interface connects with new Atmel modules used for XPRO platforms that are equipped with a 20-pin HE14 male connector. Figure 3-16. XPRO Interface Schematic Do Not Populate HE14 100-mil right angled male DNP J8 (ID_DATA) (ADC_0) (ADC_2) (PWM_0/RST_ZB) (PWM_2/IRQ) (TWI_SDA) (UART_RX) (SPI_SS_0) (SPI_MISO) PB23 PA12 PA5 PB18 PA22 PA24 PB16 PB22 PB20 R74 R75 R77 R79 R81 R83 R85 R87 R89 0R 0R 0R 0R 0R 0R 0R 0R 0R 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 R76 R78 R80 R82 R84 R86 R88 R90 0R 0R 0R 0R 0R 0R 0R 0R PA4 PB13 PC7 PB15 PA25 PB17 PB19 PB21 L5 R84, R83 Should be close to SAM4C. C76 18pF C77 2.2nF (ADC_1) (ADC_3) (PWM_1) (PWM_3/SLP_TR/SPI_SS_1) (TWI_SCL) (UART_TX) VDDMAIN (SPI_MOSI) (SPI_SCK) 220Ω at 100MHz JP19 C78 2.2µF XPRO Table 3-5. XPRO HE10 Pin Functions Function Pin Pin Function Module Identity 1 2 Ground ADC Input 3 4 ADC Input ADC Input 5 6 ADC Input ZigBit Reset 7 8 PWM Output IRQ Interrupt from ZigBit to Host Processor 9 10 SLP_TR wake-up signal to ZigBit Two-Wire Data Line 11 12 Two-Wire Clock Line UART RX Line 13 14 UART TX Line SPI Chip Select 15 16 SPI MOSI SPI MISO 17 18 SPI Clock Power Ground 19 20 Power Supply ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 17 LCD Display The ATSAM4C-EK board is equipped with one LCD segment interfaced with the SAM4C device through the LCD controller. Note that only certain segments (highlighted in blue in Figure 3-17 on page 18) are usable without using U11 and U12 analog switches or unpopulated 0 ohm resistors. Features: LCD segment YMCC42364AAANDCL (Anshan Yes Optoelectronics Display Co., Ltd.) LCD Display Schematic 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 0R 0R 0R 0R 0R 0R 0R 0R R91 R92 R93 R94 R95 R96 R97 R98 PA3 PA2 PA1 PA0 PB30 PB31 Figure 3-17. PB9 PB8 PB7 PB6 PA28 PA27 PA26 PA23  YMCC42364AAANDCL COM3 COM2 COM1 COM0 SEG_0 SEG_1 SEG_2 SEG_3 SEG_4 SEG_5 SEG_6 SEG_7 SEG_8 SEG_9 SEG_10 SEG_11 U9 VDDMAIN VDDMAIN JP20 46 Q2 10µF 100nF R104 4.7K PA16 LED+ U11 13 5 LED- IRLML6401 R106 PA13 1E 2E 1Z 2Z 3Z 4Z 74HC4066 3E 4E 1Y 2Y 3Y 4Y 6 12 1 4 8 11 PB22 PB21 PB20 PB19 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 100R 2 3 9 10 14 45 VCC C82 49R9 GND R99 7 C81 C79 100nF 3 SEG_39 SEG_38 SEG_37 SEG_36 SEG_35 SEG_34 SEG_33 SEG_32 SEG_31 SEG_30 SEG_29 SEG_28 SEG_27 SEG_26 SEG_25 SEG_24 SEG_23 SEG_22 SEG_21 SEG_20 SEG_19 SEG_18 SEG_17 SEG_16 SEG_15 SEG_14 SEG_13 SEG_12 2 1 U12 13 5 2 3 9 10 1E 2E 1Z 2Z 3Z 4Z 74HC4066 Figure 3-18. 14 0R 0R 0R 0R 0R 0R 0R 0R VCC R115 R116 R117 R118 R119 R120 R121 R122 3E 4E GND PB23 PB24 PB25 PB26 PB27 PB28 PB29 C83 100nF 1Y 2Y 3Y 4Y 6 12 1 4 8 11 PB18 PB17 PB16 PB15 7 Do Not Populate R107 R108 R109 R110 R111 R112 R113 R114 DNP DNP DNP DNP DNP DNP DNP DNP VDDMAIN PA23 PA26 PA27 PA28 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 3.8 LCD Layout a f g h i j b k e L m n c d ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 18 . Table 3-6. LCD pinout vs Segment Pin COM0 COM1 COM2 COM3 Pin COM0 COM1 COM2 COM3 1 – – – COM3 23 A5-a A5-b A5-c B12 2 – – COM2 – 24 A5-g A5-j A5-L A5-m 3 – COM1 – – 25 A4-h A4-i A4-k A4-n 4 COM0 – – – 26 B6 A4-f A5-e A5-d 5 G1 G0 G2 G3 27 A4-a A4-b A4-c B11 6 G4 G5 G6 G7 28 A4-g A4-j A4-L A4-m 7 E0 E2 E4 E6 29 A3-h A3-i A3-k A3-n 8 E1 E3 E5 E7 30 B4 A3-f A3-e A3-d 9 D3-a D3-b D3-c B9 31 A3-a A3-b A3-c B10 10 D3-f D3-g D3-e D3-d 32 A3-g A3-j A3-L A3-m 11 D2-a D2-b D2-c D2-p 33 A2-h A2-i A2-k A2-n 12 D2-f D2-g D2-e D2-d 34 B3 A2-f A2-e A2-d 13 D1-a D1-b D1-c D1-p 35 A2-a A2-b A2-c B1 14 D1-f D1-g D1-e D1-d 36 A2-g A2-j A2-L A2-m 15 D0-a D0-b D0-c D0-p 37 A1-h A1-i A1-k A1-n 16 D0-f D0-g D0-e D0-d 38 B2 A1-f A1-e A1-d 17 A6-h A6-i A6-k A6-n 39 A1-a A1-b A1-c B8 18 B14 A6-f A6-e A6-d 40 A1-g A1-j A1-L A1-m 19 A6-a A6-b A6-c B13 41 A0-h A0-i A0-k A0-n 20 A6-g A6-j A6-L A6-m 42 B0 A0-f A0-e A0-d 21 A5-h A5-i A5-k A5-n 43 A0-a A0-b A0-c B7 22 B5 A5-f A5-e A5-d 44 A0-g A0-j A0-L A0-m ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 19 Table 3-7. LCD PIO Mapping Pin Name LCD Pin PIO PIO LCD Pin Pin Name COM0 4 PA0 PA1 3 COM1 COM2 2 PA2 PA3 1 COM3 SEG0 5 PB30 PB31 6 SEG1 SEG2 7 Not used Not used 8 SEG3 SEG4 9 PB9 PB8 10 SEG5 SEG6 11 PB7 PB6 12 SEG7 SEG8 13 PA28 PA27 14 SEG9 SEG10 15 PA26 PA23 16 SEG11 SEG12 17 PB29 PB28 18 SEG13 SEG14 19 PB27 PB26 20 SEG15 SEG16 21 PB25 PB24 22 SEG17 SEG18 23 PB23 PB22 24 SEG19 SEG20 25 PB21 PB20 26 SEG21 SEG22 27 PB19 PB18 28 SEG23 SEG24 29 PB17 PB16 30 SEG25 SEG26 31 PB15 PB14 32 SEG27 SEG28 33 PB13 PB12 34 SEG29 SEG30 35 PB11 PB10 36 SEG31 SEG32 37 PB9 PB8 38 SEG33 SEG34 39 PB7 PB6 40 SEG35 SEG36 41 PA28 PA27 42 SEG37 SEG38 43 PA26 PA23 44 SEG39 ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 20 3.9 Analog I/O 3.9.1 Analog Reference The SAM4C features a LM4040 precision micropower curvature-corrected bandgap shunt voltage reference with a several fixed reverse breakdown voltages. The device voltage reference on the board is 3.0V. Figure 3-19. Analog Reference Schematic TP2 L1 VDDIN 56µH R8 C22 2.2Ω . 2.2µF C25 22µF C23 100nF VDDREF 1 TP3 +3V3 2 JP5 +3V 3 5V R7 C28 RC0603JR-073K3L 100nF D1 LM4040AIM3X-3.0/NOPB C26 + C27 10µF 10nF ADVREF Analog Input One potentiometer VR1 multi-turn 10K Ω is connected to the jumper JP4. If JP4 is closed, this analog reference is available on analog input PA4. Analog Input Schematic VDDIN 3 Figure 3-20. VR1 10K 2 (Analog input) JP4 1 3.9.2 PA4 C21 10nF ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 21 3.9.3 Temperature Sensor The Atmel AT30TS75 temperature sensor converts temperatures from -40°C to +125°C to a digital word and provides a typical accuracy of ±0.5°C over the operating temperature range of 0°C to +85°C. The device is factory calibrated and requires no external components to help provide a cost effective solution. To reduce current consumption and save power, the AT30TS75 features a shutdown mode that turns off all internal circuitry except for the internal power-on reset and serial interface circuits. In addition, the device features a power saving one-shot mode that allows the device to make a temperature measurement and update the temperature register and then return to shutdown mode. Device slave address byte: 0x48. Figure 3-21. Temperature Sensor Schematic Do Not Populate VDDMAIN R53 4.7K/DNP R55 0R VDDMAIN C65 U6 7 6 5 4 A0 VCC A1 ALERT A2 SCL GND SDA 8 3 2 1 100nF R54 10K PA26 PA25 PA24 (SCL) (SDA) AT30TS75 ADDR:0X48 3.10 CryptoAuthentication (optional) The Atmel ATSHA204 is a member of the Atmel CryptoAuthentication family of high-security hardware authentication devices. It has a flexible command set that allows use for many applications, such as Anti-counterfeiting, Protection for Firmware or Media, Session Key Exchange, Secure Data Storage or User Password Checking. Device slave address byte: 0xC9. Figure 3-22. CryptoAuthentication Schematic Do Not Populate U5 (SCL) PA25 (SDA) PA24 VDDMAIN 6 5 8 C63 100nF 4 SCL NC1 SDA NC2 VCC NC3 GND NC4 1 2 3 7 ATSHA204-SH ADDR: 0XC9 DNP ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 22 3.11 LEDs and Buttons The ATSAM4C-EK is equipped with two user push buttons and three LEDs. 3.11.1 Discrete LEDs Indicators on the main board include three discrete LEDs:  1 blue LED connected to a PIO  1 amber LED connected to a PWM output  1 green LED connected to a PWM output Figure 3-23. Debug Discrete LED Schematic VDDIN D8 D9 D10 BLUE AMBER GREEN R125 470Ω R126 470Ω LED R127 470Ω PWM PC6 PWM PC7 PC8 3.11.2 Push Buttons The EK board is equipped with four system push buttons and two user push buttons. The push buttons consist of momentary push button switches mounted directly to the board. When any switch is depressed it will cause a low (zero) to appear at the associated input pin.   System push buttons:  NRST (Reset, perform system reset)  FWPU (Force Wake-Up)  TMP0 (Tamper)  TMP2 (Tamper) User push buttons:  SCROLL_UP  SCROLL_DOWN Figure 3-24. Push Buttons Schematic VDDBU (TDO) USER INTERFACE VDDIN 3 BP1 FWUP R124 100K 1.5K 3 4 1 2 FWUP 1 2 PB1 3 4 TMP2 R147 1 2 1 2 3 4 Scroll up 1 2 NRST R148 3 4 33R PB27 R132 0R PA19 3 4 R133 0R PA20 BP5 Scroll down 3 4 PB1 BP4 BP3 TMP0 PB1 R149 100K BP6 100K BP2 NRST 2 JP24 1 2 R123 1 3 VDDBU JP25 1 2 TMP0 It is possible to select the pull-up level for Tamper TMP0 pin. By selecting PB1 instead of VDDBU, it allows to end user a dynamic tampering synchronized with RTCOUT pin. It allows a diminution of the power consumption when the button is pressed (divided by the Duty Cycle applied on RTCOUT Output signal). It is possible to use the TMP2 Push Button as another Tamper input. By using this feature, the end user must use JTAG in 2-wire mode (SWIO and SWD) due to the loss of the TDO pin. In this case TMP2 is pull-up at RTCOUT Level (PB1 pin) and can be managed dynamically synchronized with the RTCOUT pin. ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 23 3.12 Miscellaneous I/O This board is equipped with additional I/O connectors which allow the measurements of specific points are allow the connection of an additional extension board. PIO A and PIO B Extension I/O Connectors Schematic JP21 3 5V VDDMAIN 1 JP22 3 J10 PA5 PA6 PA7 PA8 PA0 PA1 PA2 PA3 PA4 0R 33R 33R 33R PA9 PA10 PA11 PA12 PA13 PA14 PA15 R128 R129 R130 R131 R128 to R130 should be close to SAM4C. VDDMAIN 1 J9 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 VDDMAIN VDDMAIN PIOA 3.13 VDDMAIN 2 5V 2 Figure 3-25. 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 VDDMAIN PIOB Metrology Core Serial Interface This board includes an additional connector which allows connecting to an external board through the SPI 1 port. Figure 3-26. Connector Schematic VDDMAIN JP23 J12 PC2 PC3 PC4 PC5 PC8 R139 R140 R143 R144 27R 27R 27R 27R 1 3 5 7 9 11 13 2 4 6 8 10 12 14 R141 R142 R145 0R 0R PC0 (TXD1) PC1 (RXD1) PC6 PC7 27R PA29 (MCLK) PIOsense ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 24 3.14 PIO Usage 3.14.1 PIO Port A Pin Assignments Table 3-8. PIO Port A Pin Assignments Peripheral I/O Line A B C Extra Function System Function PA0 RTS3 PCK2 A10 COM0 WKUP5 LCD Com PA1 CTS3 NCS1 A9 COM1 – LCD Com PA2 SCK3 NCS2 A8 COM2 – LCD Com PA3 RXD3 NCS3 A7 COM3 WKUP6 LCD Com PA4 TXD3 – A6 COM4/AD1 – Analog input PA5 SPI0_NPCS0 – A5 COM5/AD2 – SerFlash / NPCS PA6 SPI0_MISO – A4 SEG0 – ZigBee PA7 SPI0_MOSI – A3 SEG1 – ZigBee PA8 SPI0_SPCK – A2 SEG2 – ZigBee PA9 RXD2 – A1 SEG3 WKUP2 RS232/485 PA10 TXD2 – A0/NBS0 SEG4 – RS232/485 PA11 RXD1 – A23 SEG5 WKUP9 ZigBee / IRQ0 PA12 TXD1 – A22-NCLE SEG6/AD0 – ZigBee/IRQ1/IRTC PA13 SCK2 TIOA0 A21-NALE SEG7 – Backlight On/off PA14 RTS2 TIOB0 A20 SEG8 WKUP3 PA15 CTS2 TIOA4 A19 SEG9 – RS232/485 PA16 SCK1 TIOB4 A18 SEG10 – MuxLCD PA17 RTS1 TCLK4 A17 SEG11 WKUP7 ZigBee / RST PA18 CTS1 TIOA5 A16 SEG12 – ZigBee / SLPTR PA19 RTS0 TCLK5 A15 SEG13 WKUP4 PB ScrUp PA20 CTS0 TIOB5 A14 SEG14 – PB ScrDwn PA21 SPI0_NPCS1 – A13 SEG15 – ZigBee / NPCS PA22 SPI0_NPCS2 – A12 SEG16 – ZigBit / IRQ PA23 SPI0_NPCS3 – A11 SEG17 – – PA24 TWD0 – A10 SEG18 WKUP1 TWI / ZigBit PA25 TWCK0 – A9 SEG19 – TWI / ZigBit PA26 CTS4 – A8 SEG20 – – PA27 – – NCS0 SEG21 – – PA28 – – NRD SEG22 – – PA29 PCK1 – NWAIT SEG23 – – MCLK (ATSense) PA30 PCK1 – A15 – XOUT XOUT – PA31 PCK0 – A14 – XIN XIN – Reset State PIO, I, PU, ST Using RS232/485 ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 25 3.14.2 PIO Port B Pin Assignments Table 3-9. PIO Port B Pin Assignments Peripheral I/O Line A B C Extra Function System Function PB0 TWD1 – – – TDI PB1 TWCK1 – – RTCOUT0 TDO/TRACESWO Reset State Using – – JTAG, I, ST PB2 – – – – TMS/SWDIO – PB3 – – – – TCK/SWCLK – PB4 URXD0 TCLK0 A17 – WKUP8 DBGU PB5 UTXD0 – A16 – – DBGU PB6 – – D0 SEG24 – – PB7 TIOA1 – D1 SEG25 – – PB8 TIOB1 – D2 SEG26 – – PB9 TCLK1 – D3 SEG27 – – PIO, I, PU, ST PB10 TIOA2 – D4 SEG28 – – PB11 TIOB2 – D5 SEG29 – – PB12 TCLK2 – D6 SEG30 – – PB13 PCK0 – D7 SEG31/AD3 – – PB14 – – NWR0–NWE SEG32 – – PB15 – – NWR1–NBS1 SEG33 – ZigBit / SLPTR PB16 RXD0 – D8 SEG34 WKUP10 ZigBit / RXD PB17 TXD0 – D9 SEG35 – ZigBit / TXD PB18 SCK0 PCK2 D10 SEG36 – ZigBit / RST PIO, I, PD, ST PB19 RXD4 – D11 SEG37 – ZigBit / MOSI PB20 TXD4 – D12 SEG38 – ZigBit / MISO PB21 SCK4 NANDOE D13 SEG39 WKUP11 ZigBit / SPCK PB22 RTS4 NANDWE D14 SEG40 – ZigBit / NPCS PB23 ADTRG – D15 SEG41/AD4 – – PB24 TIOA3 – A7 SEG42 – – PB25 TIOB3 – A6 SEG43 – – PB26 TCLK3 – A5 SEG44 WKUP13 – PIO, I, PD, ST PB27 – – A4 SEG45 WKUP14 – PB28 – – A3 SEG46 WKUP15 – PB29 – – A2 SEG47 – – PB30 – – A1 SEG48 – – PB31 – – A0–NBS0 SEG49/AD5 – – ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 26 3.14.3 PIO Port C Pin Assignments Table 3-10. PIO Port C Pin Assignments Peripheral I/O Line A B C Extra Function System Function Reset State Using PC0 UTXD1 PWM0 – – – – – PC1 URXD1 PWM1 WKUP12 – – – – PC2 SPI1_NPCS0 PWM2 – – – – – PC3 SPI1_MISO PWM3 – – – – – PC4 SPI1_MOSI – – – – – – PC5 SPI1_SPCK – – – – – – PC6 PWM0 SPI1_NPCS1 – – – – LED Green PC7 PWM1 SPI1_NPCS2 – – – – LED Amber PC8 PWM2 SPI1_NPCS3 – – – – LED Blue PC9 PWM3 – – – ERASE – Jumper Erase ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 27 3.15 Connectors 3.15.1 Power Supply Connector The ATSAM4C-EK is equipped with an ACDC wall adapter that can be connected to a J2 connector (described below). The maximum input voltage that can be applied on this connector must be lower than 6V. Figure 3-27. Power Supply Connector 2 1 3 Table 3-11. Power Supply Connector Pinout Pin Signal Name Description 1 +5V Wall Adapter Main Voltage 2 NC Floating Point 3 GND Ground ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 28 3.15.2 JTAG/ICE Connector Figure 3-28. Table 3-12. JTAG/ICE Connector JTAG/ICE Connector Pinout Pin Signal Name 4, 6, 8, 10, 12, 14, 16, 18, 20 GND Description Common ground 1 VTref 3.3V power This is the target reference voltage. It is used to check if the target has power, to create the logic-level reference for the input comparators, and to control the output logic levels to the target. It is normally fed from VDD on the target board and must not have a series resistor. 2 Vsupply 3.3V power This pin is not connected in SAM-ICE. It is reserved for compatibility with other equipment. Connect to VDD or leave open in target system. 3 nTRST TARGET RESET JTAG Reset (active-low output signal that resets the target). Output from SAMICE to the Reset signal on the target JTAG port. Typically connected to nTRST on the target CPU. This pin is normally pulled HIGH on the target to avoid unintentional resets when there is no connection. 5 TDI TEST DATA INPUT JTAG data input of target CPU (serial data output line, sampled on the rising edge of the TCK signal). It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TDI on target CPU. 7 TMS TEST MODE SELECT JTAG mode set input of target CPU. This pin should be pulled up on the target. Typically connected to TMS on target CPU. Output signal that sequences the target's JTAG state machine, sampled on the rising edge of the TCK signal. 9 TCK TEST CLOCK JTAG clock signal to target CPU (output timing signal, for synchronizing test logic and control register access). It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TCK on target CPU. Input Return test clock signal from the target. Some targets must synchronize the JTAG inputs to internal clocks. To assist in meeting this requirement, a returned and retimed TCK can be used to dynamically control the TCK rate. SAM-ICE supports adaptive clocking which waits for TCK changes to be echoed correctly before making further changes. Connect to RTCK if available, otherwise to GND 11 RTCK 13 TDO JTAG TEST DATA OUTPUT 15 nSRST RESET 17 RFU This pin is not connected in SAM-ICE 19 RFU This pin is not connected in SAM-ICE JTAG data output from target CPU (serial data input from the target). Typically connected to TDO on target CPU. Active-low reset signal. Target CPU reset signal ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 29 3.15.3 RS232 Connector Figure 3-29. RS232 Connector Table 3-13. RS232 Connector Pinout Pin Signal Name Description 1, 4, 6, 9 NC 2 RXD RS232 Serial Data Output Signal 3 TXD RS232 Serial Data Input Signal 5 GND Common Ground 7 RTS Request To Send - Not Used 8 CTS Clear To Send - Not Used Not Connected ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 30 3.15.4 UART/USB Micro AB Figure 3-30. Micro AB USB Connector 12345 6-7 8-9 MICRO AB Table 3-14. Micro AB USB Connector Pinout Pin Signal Name Description 1 VBUS 2 DM Data Minus 3 DP Data Plus 4 ID On The Go Identification 5 GND Common Ground 6, 7, 8, 9 Shield Mechanical Pins 5V Power ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 31 3.15.5 RZ600 IEEE 802.15.4 Wireless Transceiver Socket J12 Figure 3-31. Socket J12 Table 3-15. Socket Pinout Function Signal Name Pin Pin Signal Name Function Reset /RST 1 2 IRQ0 Interrupt Request Interrupt Request IRQ1 3 4 SLP_TR SLP_TR SPI Chip Select /CS 5 6 MOSI SPI MOSI SPI MISO MISO 7 8 SCLK SPI CLK Power Supply GND 9 10 VCC VCC ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 32 3.15.6 I/O Expansion Port Figure 3-32. Expansion Port J9 & J10 Table 3-16. Expansion Port J9 Pinout Function Signal Name Pin Pin Signal Name Function 3.3V or 5V – 1 2 – 3.3V or 5V Ground GND 3 4 GND Ground – PB0 5 6 PB16 – – PB1 7 8 PB17 – – PB2 9 10 PB18 – – PB3 11 12 PB19 – – PB4 13 14 PB20 – – PB5 15 16 PB21 – – PB6 17 18 PB22 – – PB7 19 20 PB23 – – PB8 21 22 PB24 – – PB9 23 24 PB25 – – PB10 25 26 PB26 – – PB11 27 28 PB27 – – PB12 29 30 PB28 – – PB13 31 32 PB29 – – PB14 33 34 PB30 – – PB15 35 36 PB31 – Ground GND 37 38 GND Ground Power Supply VDDMAIN 39 40 VDDMAIN Power Supply Table 3-17. Expansion Port J10 Pinout Function Signal Name Pin Pin Signal Name Function 3.3V or 5V – 1 2 – 3.3V or 5V Ground GND 3 4 GND Ground – PA0 5 6 PA16 – – PA1 7 8 PA17 – ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 33 Table 3-17. Figure 3-33. Expansion Port J10 Pinout (Continued) Function Signal Name Pin Pin Signal Name Function – PA2 9 10 PA18 – – PA3 11 12 PA19 – – PA4 13 14 PA20 – – PA5 15 16 PA21 – – PA6 17 18 PA22 – – PA7 19 20 PA23 – – PA8 21 22 PA24 – – PA9 23 24 PA25 – – PA10 25 26 PA26 – – PA11 27 28 PA27 – – PA12 29 30 PA28 – – PA13 31 32 PA29 – – PA14 33 34 PA30 – – PA15 35 36 PA31 – Ground GND 37 38 GND Ground Power Supply VDDMAIN 39 40 VDDMAIN Power Supply Expansion Port J12 Table 3-18. Expansion Port J12 Pinout PIO Power Pin Pin Power PIO – 3.3V 1 2 3.3V – PC2 – 3 4 – PC0 PC3 – 5 6 – PC1 PC4 – 7 8 – PC6 PC5 – 9 10 – PC7 PC8 – 11 12 – PA29 – GND 13 14 GND – ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 34 4. Evaluation Kit Firmware Demonstration 4.1 ATSAM4C-EK Default Application The ATSAM4C-EK is delivered with a preprogrammed default application in SAM4C Flash memory. This application implements SAM4C embedded peripherals and external (on-board) peripherals as detailed in the table below. Table 4-1. SAM4C Embedded Peripheral Connected to External (on-board) Peripheral Real-Time Clock (RTC) — Anti-Tamper BP3 Push Button Two-wire Interface Temperature Sensor AT30TS75 Segmented LCD Custom Atmel Display SAM4C Core 1 — 10-bit ADC Internal ADC channel connected to Battery Backup Power Rail (VDDBU) After the first power-up without the backup battery, the time (hour and minute) of the RTC can be configured. The Hour and Minute settings are entered using the following push buttons:  BP4 (SCROLL-UP)—sets the Hour (24H mode entries must be made)  BP5 (SCROLL-DOWN)—sets the Minute  BP6 (TMP2)—saves the Hour and Minute settings Once the time settings have been saved, BP4 (SCROLL-UP) can be used to toggle the Hour display between 12H or 24H mode. Note: RTC time configuration can be skipped by pressing BP6. Once the Hour and Minute have been configured, the main application on core 0 runs in an infinite loop, repeating the following steps:  Every second, the time is displayed with colon (:) icon blinking  Every fifteen (15) seconds, the VDDBU pin voltage is measured and displayed (1)  Every thirty (30) seconds, the temperature (using the AT30TS75) is measured and displayed in °C and in °F. Note: 1. On the ATSAM4C-EK, the voltage measured is the VDDIO voltage minus the forward voltage of the diode in the BAT54C (D4). At startup, the main application configures the core 1 subsystem to run a CoreMark algorithm from the core 1 SRAM memories (SRAM1 and SRAM2). Once the CoreMark is finished, the result of the CoreMark (number of CoreMark/MHz) is passed to the main application using the inter-processor communication embedded in the SAM4C. Once the result is retrieved by the main application, the result of the CoreMark is displayed and the CoreMark algorithm running on core 1 is restarted. An ammeter connected either on JP12 (VDDIN) or on JP6 (VDDCORE) can measure the active current consumption of both cores. 4.2 Measuring the Backup mode current consumption on VDDBU The SAM4C has an ultra-low-power mode RTC and Supply controller allowing less than 1µA (typical) on VDDBU, with the following functions/peripherals configuration:  32.768 kHz Crystal Oscillator enabled  POR backup on VDDBU disabled  RTC running  RTT enabled on 1 Hz mode  Force wake-up (FWUP) enabled  Anti-tamper Input (TMP0) enabled ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 35 To measure the current consumption on VDDBU when in backup mode, JP9 (Shutdown control) must be opened and an ammeter connected on JP8 (VDDBU) as described in the following procedure: 1. Power off the board using SW1 2. Insert the 3V lithium battery provided in the battery holder 3. Place an ammeter (with sufficient capacity to measure current lower than 1µA) on JP8 4. Power on the board using SW1 5. (optional) Set the RTC as described above 6. Press the push button BP5 (SCROLL-DOWN) to place the board in low-power mode Before shutdown, the following messages are displayed on the LCD: “ENTERING BACKUP MODE” “PRESS FWUP BP1 TO WAKE UP” “USE BP3 TO GENERATE TAMPER EVENTS” Blinking “BYE” At this point, the current consumption on the ammeter should be less than 1µA @ 25°C @ 3V. Once in backup mode, the Anti-tamper pin 0 (TMP0) is enabled. BP3 (TMP0) push button can be used to generate tamper events before waking up the board. Tamper events are registered without waking up the board. Up to 15 tamper events can be registered. To wake up the board, press BP1 (FWUP). Upon start-up, the number of tamper events and time-stamping of the tamper events are displayed on the LCD. ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 36 5. ATSAM4C-EK Design Files 5.1 ATSAM4C-EK Schematics This section contains the schematics for the SAM4C Evaluation Kit (Rev. C).  Main page with Block Diagram  Information regarding the design  SAM4C Microcontroller and its crystals, decoupling capacitors and analog inputs  Power Supplies Distribution  RS232, RS485 and DBGU Interfaces, TWI Memories, and Temperature Sensor  Custom Glass LCD and ZigBee, XPRO interfaces  User Buttons, I/O expansion headers and JTAG Interfaces ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 37 A B C D 5 5 4 Sheet 4 RTC Sheet 5 TWI TWI TWI USART0 UART1 USART2 USART2 4 POWER SUPPLY LED 5 V DC Input 1.3mm/Jack RS485 RS232 USB EEPROM AUTHENTICATION TEMP_SENSOR PIO A, B, C POWER Sheet 3 3 ATMEL Cortex M4 SAM4C16CA-AU LQFP100 Evaluation Board/Kit 3 PIO A, B,C PIO A, B,C 2 2 ZIGBEE XPRO FLASH Sheet 6 LCM LEDS User_PB JTAG Sheet 7 INTERFACE ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 C B A 1/1 LCD INIT EDIT MODIF. SCALE REV DES. DATE XXX 09-Dec -13 XXX 09-JAN-13 XXX 12-OCT-12 1 This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. TOP SAM4C-EK PIOA,B,C 20PINS 6 PushButtons 3 LEDS Segment LCD FLASH ON SPI XPRO INTERFACE ZIGBEE INTERFACE 1 SHEET 1 7 REV. C DATE RCr 09-Dec -13 XXX XX-XXX-XX XXX XX-XXX-XX VER. A B C D Figure 5-1. ATSAM4C-EK Schematic (Page 1 of 7) 38 A B C D 2013.1 2013.4 C Update XPRO interface/Add TMP2 Modify LCD circuit Original released NOTE Reference guide Microcontroller,AD 2 3 4 PA27 ZigBee PA11 5 PA31 PA26 RS232/485 PA10 PA30 PA25 RS232/485 PA9 RS232/485 PA24 ZB/SerFlash PA8 RS232/485 PA23 ZB/SerFlash PA7 PA15 PA22 ZB/SerFlash PA6 PA14 PA21 Serial Flash PA5 PA29 PA20 AD Input PA4 BackLight PA19 LCD_COM PA3 PA13 PA18 LCD_COM PA2 PA28 PA17 LCD_COM PA1 ZigBee/IRTC PA16 LCD_COM PA0 PA12 PIOA USAGE PIOA JTAG PB0 PB1 PB2 MuxLCD ZigBee ZigBee ZigBit LCD_SEG32 PB15 PB14 XIN XOUT LCD_SEG31 PB13 LCD_SEG23 LCD_SEG30 PB12 LCD_SEG22 4 PC4 PC5 PC6 PC7 ZigBit ZigBit ZigBit ZigBit LCD_SEG44 PC9 PC3 ZigBit LCD_SEG43 PC2 ZigBit PC8 PC1 ZigBit LCD_SEG42 PC0 PB31 PB30 LCD_SEG49 LCD_SEG48 PB27 TMP2/LCD SEG45 LCD_SEG46 PB28 MCLK PB29 PB26 PB25 LCD_SEG29 LCD_SEG28 LCD_SEG27 PB10 TempSensor PB11 PB9 SCL/ZigBit LCD_SEG21 PB24 PB23 PB22 LCD_SEG26 LCD_SEG25 PB8 PB7 PB6 PB21 PB20 PB19 PB18 PB17 PB16 ZigBit TP13 to TP17 JumperErase LED Blue LED Amber LED Green SPI1_SPCK SPI1_MOSI SPI1_MISO SPI1_NPCS0 RS232 RS232 USAGE VDDIO GND TP12 PIOC VDDIN TP11 USAGE VDDMAIN TP10 PIOB VDDBU RTC_32 3V3 TP7 TP8 VDDPLL TP9 VDDCORE TP6 TP3 TP5 VDDREF TP2 5V VDDREF_P TP1 TP4 FUNCTION VDDLCD REFERENCE SDA/ZigBit LCD_SEG17 LCD_SEG24 DBGU ZigBee ZigBit DBGU PB5 JTAG PB3 JTAG PB Scroll down PB4 PB Scroll up USAGE 4 3 PAGE TEST POINT (2)"DNP"means the component is not populated by default. (1)Resistance Unit:"K"is"Kohm","R"is"Ohm". PIOB JTAG 4 SCHEMATICS CONVENTIONS USAGE LED,Button,IO Expansion,JTAG 7 PIO MUXING LCD,FLASH,ZIGBEE,ZIGBIT Temperature Sensor,Crypto Authentication RS232,RS485,USB,EEPROM, 6 5 Block Diagram 1 Power,RTC DESCRIPTION PAGE TABLE OF CONTENTS 2012.10 B DATA A REV REVISON HISTORY 5 3 3 CLOSE 2-3 CLOSE 1-2 2-3 JP23 JP24 1-2 JP22 JP25 1-2 CLOSE OPEN CLOSE OPEN CLOSE JP21 JP20 JP19 JP18 JP17 JP16 JP15 OPEN CLOSE JP14 CLOSE JP13 OPEN JP11,JP12 JP10 JP9 Analog reference voltage selection between 3.3V and 3.0V. CLOSE JP6,JP7,JP8 Close to connect JTAG(TDO). Close to connect JTAG(TDO). Supply the PIOSense Power 3V3. Expansion Power selection VDDMAIN(3V3) or 5V. Expansion Power selection VDDMAIN(3V3) or 5V. Close to connect 3V3 Power for LCD Backlight directly. Close to connect 3V3 Power for ZigBit. Close to connect 3V3 Power for ZigBee. Close to connect Pull-Down Resistor. Matched transmission line impedance. USART2 Selection between RS232 and RS485. Close to connect Pull-Up Resistor. Respective SAM4C Power connection. Respective SAM4C Power connection. Use Back-up Batter to supply RTC Power. Close to unable Power supply with SHDN command. Respective Power connection. Connect AD input from potentiometer. 1-2 Close to select JTAG. R64 R60 R53 R39,R40 R24,R38 R10 R1,R2 REFERENCE REVB -> REVC FUNCTION When USB suspend is HIGH level PowerUp to Reset FT232RL. Change Temperature Sensor I2C Address. Change EEPROM I2C Address. RS485 Pull-up and Pull-down Resistor. External clock resource input. Expansion IO Interface. 2 Push button TMP0, add pull up VDDBU 4 ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 SCALE 1/1 LCD INIT EDIT MODIF. DES. DATE XXX 09-Dec -13 XXX 09-JAN-13 XXX 12-OCT-12 1 This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. INFO SAM4C-EK REV C B A R3 DNP Add TMP2 2 3 Update XPRO interface (Change J8 ZigBit HE14 right angled male DNP ) 1 LIST OF CHANGES 5 4 3 PAGE 2 7 C DATE SHEET REV. VER. RCr 09-Dec -13 XXX XX-XXX-XX XXX XX-XXX-XX Close for JTAG boundary scan manufacturing test or Fast flash programming mode. CLOSE JP4 FUNCTION 1 Close to reinitialize the Flash contents and some of its NVM bits. JP5 OPEN OPEN JP3 JP2 DEFAULT OPEN REFERENCE JP1 DEFAULT NO POPULATE PARTS 7 6 5 4 3 PAGE JUMPER AND SOLDERDROP 2 A B C D Figure 5-2. ATSAM4C-EK Schematic (Page 2 of 7) 39 A B C TMP0 SHDN FWUP {7} {4} {7} PA30 XOUT XIN PA31 {4} DNP SMB C24 5 18pF 0R R5 XIN XIN XOUT XOUT32 XIN32 R10 0R/DNP R11 49R9 4 ATMEL Cortex-M4 Processor SAM4C16CA-AU LQFP100 VDDCORE Do Not Populate R9 0R Y2 8MHz R6 0R 0R Y1 32.768 kHz R4 R3 0R/DNP Do Not Populate VDDOUT VDDIN 18pF 18pF 18pF C20 C19 C1 J1 TDI/PB0 TDO/TRACESWO/PB1 TMS/SWDIO/PB2 TCK/SWCLK/PB3 FWUP ERASE/PC9 JTAGSEL SHDN TMP0 TST NRST XIN32 XOUT32 PA30/XOUT PA31/XIN RTC_32 26 30 28 27 Do Not Populate PB0 PB1 PB2 PB3 35 29 PC9 FWUP 36 37 SHDN JTAGSEL 39 38 TMP0 48 NRST TST 50 51 40 41 0R/DNP R1 0R/DNP XIN32 XOUT32 R2 R1.R2 should be close to SAM4C. Do Not Populate 1 4 D MN1 2 3 5 85 VDDOUT 86 VDDCORE_1 VDDCORE_2 VDDCORE_3 VDDCORE_4 11 44 63 89 VDDPLL VDDPLL 53 VDDLCD VDDLCD 92 4 VR1 10K JP3 JP2 VDDBU JTAGSEL TST C21 10nF PA4 PC9 (ERASE) 2 (Analog input) JP4 VDDIN VDDIO VDDIO JP1 VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 33 49 76 99 3 VDDIN PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 90 96 100 64 83 82 62 98 25 68 69 70 84 71 72 73 74 75 24 23 22 65 66 67 21 20 19 61 60 59 1 ADVREF PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13/AD3 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23/AD4 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31/AD5 NRST {4,7} 48 38 39 37 36 29 35 26 30 28 27 NRST TST TMP0 SHDN JTAGSEL PC9 FWUP PB0 PB1 PB2 PB3 D1 56uH 10uF C26 + MN2 DNP TDI/PB0 TDO/TRACESWO/PB1 TMS/SWDIO/PB2 TCK/SWCLK/PB3 FWUP ERASE/PC9 JTAGSEL SHDN TMP0 TST NRST XIN32 XOUT32 PA30/XOUT PA31/XIN 2.2R R8 TP2 10nF C27 ADVREF JP5 +3V 2 +3V3 VDDOUT 100nF C23 VDDIN C25 22uF RC0603JR-073K3L R7 2.2uF C22 5V LM4040AIM3X-3.0/NOPB 3 40 41 XIN32 XOUT32 L1 50 51 XOUT XIN VDDIN PB[0..31] PC[0..9] {5,6,7} {5,6,7} VDDREF PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 47 31 58 57 56 55 32 46 54 77 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 43 45 1 2 6 13 14 15 16 81 17 18 95 97 3 5 88 87 7 80 10 9 93 91 94 12 8 79 3 {4,5,6,7} PA[0..31] VDDIN PA0 PA1 PA2 PA3 PA4/AD1 PA5/AD2 PA6 PA7 PA8 PA9 PA10 PA11 PA12/AD0 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 VDDBU 34 GND_1 GND_3 GND_2 GND_4 4 52 42 78 2 TP3 2 100nF C28 VDDREF VDDCORE Do Not Populate LQFP100 SOCKET VDDCORE_1 VDDCORE_2 VDDCORE_3 VDDCORE_4 11 44 63 89 VDDPLL VDDPLL 53 VDDLCD VDDIO TP1 C12 ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 C7 SAM4C SAM4C-EK 10uF C13 VDDIO C8 C B A SCALE 1/1 LCD INIT EDIT MODIF. C10 100nF C18 VDDBU DES. DATE XXX 09-Dec -13 XXX 09-JAN-13 XXX 12-OCT-12 100nF100nF100nF100nF C14 C15 C16 C17 REV C9 77 1 3 7 C DATE SHEET REV. VER. RCr 09-Dec -13 XXX XX-XXX-XX XXX XX-XXX-XX VDDREF PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 47 31 58 57 56 55 32 46 54 2.2uF 100nF 100nF 100nF 100nF C6 VDDCORE ADVREF PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 43 45 1 2 6 13 14 15 16 81 17 18 95 97 3 5 88 87 7 80 10 9 93 91 94 12 8 79 This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. 2.2uF 100nF C11 C5 2.2uF 100nF C4 VDDOUT VDDBU 1 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13/AD3 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23/AD4 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31/AD5 Decouple Cap should be close to SAM4C. 100nF C3 VDDLCD 10uF C2 VDDIN VDDLCD 92 VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 33 49 76 99 VDDOUT 86 1 3 85 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 90 96 100 64 83 82 62 98 25 68 69 70 84 71 72 73 74 75 24 23 22 65 66 67 21 20 19 61 60 59 PA0 PA1 PA2 PA3 PA4/AD1 PA5/AD2 PA6 PA7 PA8 PA9 PA10 PA11 PA12/AD0 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 VDDBU 34 GND_1 GND_3 GND_2 GND_4 4 52 42 78 A B C D Figure 5-3. ATSAM4C-EK Schematic (Page 3 of 7) 40 A B C {3,7} NRST DS3231SN DNP U3 PA25 PA24 {3} SHDN R20 5 4 5 6 7 8 16 15 C45 100nF DNP 2 NRST NC1 NC2 NC3 NC4 SCL SDA nINT 32K VDDMAIN 10k 15pF 3 FORCE_ON Do Not Populate VBatt NC5 NC6 NC7 NC8 14 9 10 11 12 3 1 10k R19 C44 1uF TP9 PA12 RTC_32 {3} 3V3 POWER R22 10K/DNP C46 100nF DNP VBATT R21 10K/DNP 1uF C38 R15 100K 3V3 1 2 3 4 100nF C29 PGOOD GND EN ADJ VIN VOUT VDD NC U2 RT9018A 10uF C30 4 1 8 7 6 5 R12 3 1.5K 2 SW1 8SS1012-Z R18 15K 1% R16 C35 4 3V3 JP13 JP12 JP11 C31 10uF 5V 1uF C41 47K 1% 10nF TP4 Vout = 0.8 x (1 + Rtop/Rbottom) 10uF 5V FORCE_ON C37 1 C43 SI1563EDH-T1-E3 4 Q1 NSR0320MW2T1G D3 100nF FORCE POWER ON 5 D2 NSR0320MW2T1G U1 ZEN056V130A24LS 3 1 C36 JP9 R14 100K 6 5V USB5V J2 DC630-20D01 1 2 3 D 2 5 2 VCC GND 13 VSS 9 RED D5 R17 470R 3V3 TP12 TP11 TP10 VDDIO VDDIN VDDMAIN POWER LED C39 10uF TP7 3 3 TP8 C40 2.2uF VDDBU 2 JP8 Do Not Populate JP7 VDDOUT JP6 2 2 1 VDDIN JP10 C34 22uF 2.2R R13 TP6 C42 100nF 100nF C33 VDDPLL VDDCORE ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 C B A 1/1 LCD INIT EDIT MODIF. SCALE REV BT1 DATE XXX 09-Dec -13 XXX 09-JAN-13 XXX 12-OCT-12 DES. 1 This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. POWER SAM4C-EK TP13 TP14 TP15 TP16 TP17 VBATT D4 BAT54C close to SAM4C C32 2.2uF/DNP VDDBU 3 L2 56uH TP5 {3,5,6,7} PA[0..31] 1 SHEET 4 7 C DATE RCr 09-Dec -13 XXX XX-XXX-XX XXX XX-XXX-XX REV. VER. A B C D Figure 5-4. ATSAM4C-EK Schematic (Page 4 of 7) 41 A B C D FGND 5 R63 0R R44 2 5 4 3 C56 100nF C60 100nF C57 100nF C52 100nF C49 100nF C71 47pF Do Not Populate 5V T1IN R1OUT T2IN R2OUT T3IN R3OUT EN SD GND V- V+ VCC C72 100nF 4 18 15 17 14 16 13 22 4 24 20 2 6 18 15 17 14 16 13 22 4 24 20 2 6 25 7 18 21 17 8 19 24 27 28 16 15 4 20 100nF C68 3V3OUT T1OUT R1IN T2OUT R2IN T3OUT R3IN C3- C2C3+ C1C2+ C1+ 4.7K/DNP 3V3OUT R60 C67 100nF C3- C2C3+ C1C2+ C1+ T1OUT R1IN T2OUT R2IN T3OUT R3IN MN5 ADM3312EARU UART1 T1IN R1OUT T2IN R2OUT T3IN R3OUT EN SD GND V- V+ VCC USB5V 7 10 8 11 9 12 5 19 23 21 1 3 7 10 8 11 9 12 5 19 23 21 1 3 MN3 ADM3312EARU USART2 DBGU/USB Brige C70 47pF 0R R58 0R R59 C64 4.7uF 220ohm at 100MHz 2 1 L3 47K 0R 0R 47K 0R R43 47K/DNP C66 10nF R47 R48 R49 VDDMAIN R51 1 PC0 PC1 C55 4.7uF VDDMAIN 0R 0R 0R 0R 47K 0R R25 47K/DNP Do Not Populate VDDMAIN VDDMAIN R28 R30 R31 R33 R34 R26 VDDMAIN PA10 PA9_232 PA14 PA15 J6 USB Micro B (TXD1) (RXD1) (TXD2) (RXD2) (RTS2) (CTS2) C48 100nF Do Not Populate C47 4.7uF VDDMAIN FT232RL AGND GND1 GND2 GND3 3V3OUT NC1 RESET# NC2 OSCI OSCO USBDM USBDP VCCIO VCC U8 R52 R50 R35 TEST CBUS1 CBUS2 CBUS3 CBUS4 CBUS0 RTS# CTS# DTR# DSR# DCD# RI# TXD RXD 0R 0R C61 100nF C59 100nF C58 100nF 0R C53 100nF C51 100nF C50 100nF 26 22 13 14 12 23 3 11 2 9 10 6 1 5 R65 D6 D7 Green RED 0R 0R R57 R56 0R (RS232_TXD) (RS232_RXD) 3 J3 FGND R64 10K/DNP R62 470R R61 470R 3 3V3OUT (RXD0) (TXD0) HE10 J5 PB4 PB5 1 2 3 1 6 2 7 3 8 4 9 5 Male Straight Angle 10 4 11 5 10 8 9 5V D- D+ ID G 11 7 6 PA25 PA24 R36 PA14 PA10 R55 0R C62 100nF R41 4.7K 6 5 8 4 A0 A1 A3 WP 2 AT30TS75-SS8 ADDR:0X48 8 3 2 1 ADDR:0X50 100nF C65 VDDMAIN 4 0R 1 2 3 7 3 0R AT24C1024B SCL SDA VCC GND U4 2 JP15 1 0R R23 10K VDDMAIN 0R 2 VCC A0 A1 ALERT A2 SCL GND SDA U6 R42 4.7K 7 6 5 4 VDDMAIN PA9_232 PA9 VDDMAIN Do Not Populate 4.7K/DNP R53 VDDMAIN (SCL) (SDA) R32 PA15 2 R27 R29 PA9_485 PA9_485 (TXD2) (RTS2) (CTS2) (RXD2) 1 3 VCC 8 6 7 5 PA26 PA25 PA24 R45 0R R37 120R C54 100nF VDDMAIN C B A 100nF C63 ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 1/1 3 J4 DES. 1 7 1 2 3 DNP DATE 5 7 C DATE SHEET REV. VER. RCr 09-Dec -13 XXX XX-XXX-XX XXX XX-XXX-XX ATSHA204-SH-DA-T ADDR:0XC9 GND NC4 SCL NC1 SDA NC2 VCC NC3 U5 Do Not Populate XXX 09-Dec -13 XXX 09-JAN-13 XXX 12-OCT-12 4 6 5 8 Do Not Populate FGND 1 2 This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. SCALE LCD INIT EDIT MODIF. PA25 PA24 3.3K/DNP R38 JP17 JP14 R24 3.3K/DNP Do Not Populate NRST {3,4,7} REV VDDMAIN COM&TWI&USB SAM4C-EK (SCL) (SDA) R46 0R JP16 (SCL) (SDA) Do Not Populate R40 R39 0R/DNP 0R/DNP VDDMAIN A B GND R54 10K DI DE RE RO MN4 ADM3485ARZ RS 485 PC[0..9] {3,6,7} VDDMAIN PB[0..31] {3,6,7} {3,4,6,7} PA[0..31] 1 A B C D Figure 5-5. ATSAM4C-EK Schematic (Page 5 of 7) 42 A B C 10uF C81 C82 2 100nF R104 4.7K VDDMAIN JP20 5 5 100R R106 PA17 PA12 PA5 PA6 R66 R68 R70 R72 0R 0R 0R 33R 1 3 5 7 9 J7 Do Not Populate 46 45 49.9R 1% LED- LED+ U9 2 4 6 8 10 ZIGBEE R70 to R73 should be close to SAM4C. PA13 R99 Q2 IRLML6401 3 (ZB_RSTN) (ZB_IRQ1) (SPI0_NPCS0) (SPI0_MISO) PA3 PA2 PA1 PA0 PB30 PB31 DNP DNP DNP DNP DNP DNP DNP DNP R107 R108 R109 R110 R111 R112 R113 R114 R67 R69 R71 R73 PA23 PA26 PA27 PA28 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 D 1 0R 0R 33R 33R C73 18pF 4 L4 C75 2.2uF 4 R115 R116 R117 R118 R119 R120 R121 R122 JP18 0R 0R 0R 0R 0R 0R 0R 0R 220ohm at 100MHz PA11 (ZB_IRQ0) PA18 (ZB_SLPTR) PA7 (SPI0_MOSI) PA8 (SPI0_SPCK) C74 2.2nF PB9 PB8 PB7 PB6 PA28 PA27 PA26 PA23 R91 R92 R93 R94 R95 R96 R97 R98 0R 0R 0R 0R 0R 0R 0R 0R 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 COM3 COM2 COM1 COM0 SEG_0 SEG_1 SEG_2 SEG_3 SEG_4 SEG_5 SEG_6 SEG_7 SEG_8 SEG_9 SEG_10 SEG_11 SEG_39 SEG_38 SEG_37 SEG_36 SEG_35 SEG_34 SEG_33 SEG_32 SEG_31 SEG_30 SEG_29 SEG_28 SEG_27 SEG_26 SEG_25 SEG_24 SEG_23 SEG_22 SEG_21 SEG_20 SEG_19 SEG_18 SEG_17 SEG_16 SEG_15 SEG_14 SEG_13 SEG_12 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 PB23 PB24 PB25 PB26 PB27 PB28 PB29 1Z 2Z 3Z 4Z 1E 2E 74HC4066 2 3 9 10 13 5 U12 3 1Y 2Y 3Y 4Y 3E 4E 3 1Y 2Y 3Y 4Y 3E 4E 1 4 8 11 6 12 C83 100nF 1 4 8 11 6 12 C79 100nF VDDMAIN 1Z 2Z 3Z 4Z 1E 2E U11 74HC4066 2 3 9 10 13 5 VDDMAIN VDDMAIN 14 VCC GND 7 14 VCC GND 7 PB18 PB17 PB16 PB15 PB22 PB21 PB20 PB19 PA16 PB23 PA12 PA5 PB18 PA22 PA24 PB16 PB22 PB20 R74 R75 R77 R79 R81 R83 R85 R87 R89 0R 0R 0R 0R 0R 0R 0R 0R 0R R100 R101 R102 R103 R105 NRST 33R 33R 33R 0R 470K 2 4 6 8 10 12 14 16 18 20 SPI0_MOSIC SPI0_MISOC SPI0_SPCKC SPI0_NPCSC XPRO 1 3 5 7 9 11 13 15 17 19 J8 DNP 5 2 6 1 C76 18pF R76 R78 R80 R82 R84 R86 R88 R90 1 2 3 4 SI SO SCK GND /RESET VCC /CS /WP 8 7 6 5 ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 2 1/1 LCD INIT EDIT MODIF. SCALE REV C B A VDDIN C80 100nF VDDIN 220ohm at 100MHz DES. DATE XXX 09-Dec -13 XXX 09-JAN-13 XXX 12-OCT-12 JP19 1 This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. FLASH&ZB&LCM 1 (ADC_1) (ADC_3) (PWM_1) (PWM_3/SLP_TR/SPI_SS_1) (TWI_SCL) (UART_TX) VDDMAIN (SPI_MOSI) (SPI_SCK) SPI0_MISOC SAM4C-EK AT45DB321D-SU DNP U13 and U10'PCB FootPrint differ by 90 degrees and Stacked. SPI0_NPCSC SPI0_MOSIC SPI0_SPCKC Do Not Populate U13 8 3 7 4 C78 2.2uF L5 PA4 PB13 PC7 PB15 PA25 PB17 PB19 PB21 AT25DF321A-SH-T SI VCC SO /WP SCK /HOLD GND /CS U10 C77 2.2nF 0R 0R 0R 0R 0R 0R 0R 0R HE14 100-mil right angled male DNP PC[0..9] {3,4,7} Do Not Populate PB[0..31] {3,5,7} {3,5,7} {3,4,5,7} PA[0..31] R100 to R103 Should be close to SAM4C VDDIN VDDIN PA7 PA6 PA8 PA5 R84, R83 Should be close to SAM4C (ID_DATA) (ADC_0) (ADC_2) (PWM_0/RST_ZB) (PWM_2/IRQ) (TWI_SDA) (UART_RX) (SPI_SS_0) (SPI_MISO) 2 DATE SHEET 6 7 REV. C RCr 09-Dec -13 XXX XX-XXX-XX XXX XX-XXX-XX VER. A B C D Figure 5-6. ATSAM4C-EK Schematic (Page 6 of 7) 43 A B C D 2 4 6 8 10 12 14 16 18 20 VDDIN TMP2 J11 1 3 5 7 9 11 13 15 17 19 Scroll down Scroll up TMP0 NRST FWUP R136 100k R137 100k 3 4 3 4 3 4 3 4 3 4 {3,4} 5 R138 100k R133 R132 1 2 PB1 BP6 3 4 PB1 2 JP24 PA20 PA19 NRST R148 R149 100K (TDI) (TMS) (TCK) 33R 3 4 PB27 FWUP {3} NRST (NRST) PB0 PB2 PB3 1.5K R124 (TDO) 0R 0R 100K R123 VDDIN 100K R147 JP25 2 VDDBU R146 0R/DNP Do Not Populate R135 100k BP5 BP4 BP3 BP2 BP1 JTAG/ICE INTERFACE R134 100k 1 2 1 2 1 2 1 2 1 2 USER INTERFACE VDDBU 4 1 TMP0 {3} R126 470R Yellow R125 470R D9 D8 BLUE VDDIN LED PB1 {3,4} R127 470R Green D10 PA5 PA6 PA7 PA8 R128 R129 R130 R131 PC7 PC8 PC6 PWM VDDMAIN R128 to R130 should be close to SAM4C PWM 3 3 PA0 PA1 PA2 PA3 PA4 0R 33R 33R 33R PA9 PA10 PA11 PA12 PA13 PA14 PA15 5V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 3 JP21 PIOA J10 2 5 1 3 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 1 NRST 2 PC2 PC3 PC4 PC5 PC8 R139 R140 R143 R144 J12 2 4 6 8 10 12 14 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 3 JP22 ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 1 DES. DATE XXX 09-Dec -13 XXX 09-JAN-13 XXX 12-OCT-12 1 This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. 1/1 LCD INIT EDIT MODIF. SCALE REV C B A PC0 (TXD1) PC1 (RXD1) PC6 PC7 27R PA29 (MCLK) VDDMAIN PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 VDDMAIN 0R 0R 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 SAM4C-EK R145 R141 R142 PIOB J9 1 INTERFACE&JTAG PIOsense 1 3 5 7 9 11 13 5V PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 VDDMAIN 27R 27R 27R 27R VDDMAIN JP23 PC[0..9] {3,4} VDDMAIN PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 VDDMAIN PB[0..31] {3,5,6} {3,5,6} {3,4,5,6} PA[0..31] 2 2 DATE SHEET 7 7 REV. C RCr 09-Dec -13 XXX XX-XXX-XX XXX XX-XXX-XX VER. A B C D Figure 5-7. ATSAM4C-EK Schematic (Page 7 of 7) 44 5.2 ATSAM4C-EK Layout This section contains the layout graphics for the SAM4C Evaluation Kit (Rev. C).  Layer 1: Top Layer (Figure 5-8 on page 45)  Layer 2: Ground Layer (Figure 5-9 on page 46)  Layer 3: Internal Signals 1 (Figure 5-10 on page 47)  Layer 4: Internal Signals 2 (Figure 5-11 on page 48)  Layer 5: Power Supplies (Figure 5-12 on page 49)  Layer 6: Bottom Layer (Figure 5-13 on page 50)  TOP Components Placement (Figure 5-14 on page 51)  BOTTOM Components Placement (Figure 5-15 on page 52) Figure 5-8. ATSAM4C-EK Layout: Top Layer ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 45 Figure 5-9. ATSAM4C-EK Layout: Ground Layer ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 46 Figure 5-10. ATSAM4C-EK Layout: Internal Signals 1 Layer ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 47 Figure 5-11. ATSAM4C-EK Layout: Internal Signals 2 Layer ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 48 Figure 5-12. ATSAM4C-EK Layout: Power Supplies Layer ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 49 Figure 5-13. ATSAM4C-EK Layout: Bottom Layer ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 50 Figure 5-14. ATSAM4C-EK Layout: TOP Components Placement ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 51 Figure 5-15. ATSAM4C-EK Layout: BOTTOM Components Placement ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 52 6. Revision History Table 6-1. Revision History Doc. Rev. Date Changes A 16-Dec-2013 First issue ATSAM4C-EK [USER GUIDE] 11251A–ATARM–16-Dec-13 53 Atmel Corporation 1600 Technology Drive Atmel Asia Limited Unit 01-5 & 16, 19F Atmel Munich GmbH Business Campus Atmel Japan G.K. 16F Shin-Osaki Kangyo Bldg San Jose, CA 95110 BEA Tower, Millennium City 5 Parkring 4 1-6-4 Osaki, Shinagawa-ku USA 418 Kwun Tong Road D-85748 Garching b. Munich Tokyo 141-0032 Tel: (+1) (408) 441-0311 Kwun Tong, Kowloon GERMANY JAPAN Fax: (+1) (408) 487-2600 HONG KONG Tel: (+49) 89-31970-0 Tel: (+81) (3) 6417-0300 www.atmel.com Tel: (+852) 2245-6100 Fax: (+49) 89-3194621 Fax: (+81) (3) 6417-0370 Fax: (+852) 2722-1369 © 2013 Atmel Corporation. All rights reserved. / Rev.: 11251A–ATARM–16-Dec-13 Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. ARM®, Cortex®, and others are registered trademarks or trademarks of ARM Ltd. Other terms and product names may be trademarks of others. Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. 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