CL88020
Sequential Linear LED Driver with Four Taps
Features
Description
• Optimized for 120 VAC Nominal Input Voltage
- 120 VAC ± 15% input voltage
• Targeted for 8.5W Output Power
• Programmable Overtemperature Protection
- Provides Gradual Reduction in Light Output
with Increasing Temperature
• Active Line Regulation
- Provides Fairly Constant Output Power over
Variations in AC Line Voltage
- Typical Line Regulation of –12% to +0%
• Four Taps with Two Current Set Resistors
- Allows Optimization of THD
• Optional Reduced Light Output Ripple
- Provides Continuous Power to the LED
- Eliminates Strobing
- Uses an External Ceramic Storage Capacitor
• TRIAC Dimmer Compatible
• Available in a Thermally Enhanced 8-Lead SOIC
Package with Heat Slug
- Larger Creepage Distances between High
Voltage and Low Voltage Pins
The CL88020 LED Driver Integrated Circuit (IC) is an
off-line sequential linear LED driver designed to provide 8.5W of LED power from a 120 VAC nominal input
voltage.
Applications
• LED Lamps
• LED Lighting Fixtures
CL88020 is designed to drive a long string of inexpensive, low-current LEDs directly from the AC mains. A
basic driver circuit consists of Microchip Technology
Inc.’s CL88020 LED driver IC, six resistors and a bridge
rectifier. Two to four additional components are optional
for various levels of transient protection, also with a
low-cost NTC to assure remote overtemperature protection (OTP). No capacitors, EMI filters, or power factor correction circuits are needed unless the optional
reduced light output ripple feature is desired.
A string of series/parallel LEDs is tapped at four locations. Four linear current regulators sink current at each
tap through a single control point and are sequentially
turned on and off. High efficiency is achieved by shutting off upstream regulators when downstream regulators achieve regulation. This makes controlling overall
input current easier than trying to control multiple current paths, thereby tracking the input sine wave voltage. CL88020 uses a self-commutation technique
using only the tap currents themselves; this technique
inherently provides smooth transitions from one regulator to the next, without relying on tap voltages or the
rectified AC to coordinate the transitions.
PIN DIAGRAM
CL88020
8-Pin SOIC
TAP1
1
TAP2
2
TAP3
3
TAP4
4
8 ALR
GND
9
7 BIAS
6 OTP
5 CS
* Includes Exposed Thermal Pad (EP); see Table 2-1
2017 Microchip Technology Inc.
DS20005753A-page 1
CL88020
TYPICAL APPLICATION CIRCUIT
RTP1
BR
MOV
RTP2
RBIAS
RALR1
CALR
TAP1
ALR
RALR2
TAP2
TAP3
TAP4
CL88020
BIAS
CBIAS
OTP
GND
CS
ROT
RCS
ROW
RNTC
INTERNAL BLOCK DIAGRAM
BIAS
TAP1
TAP2
TAP3
TAP4
VBIAS
VAREF
KTAP3
ALR
RAS
RAF
(300k) (120k)
OTP
KTAP2
VBIAS
ROU
VLIM
KTAP1
(480k)
ROL
(90k)
ROF
(150k)
GND
DS20005753A-page 2
CS
2017 Microchip Technology Inc.
CL88020
1.0
ELECTRICAL CHARACTERISTICS
Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other conditions, above those indicated in the operational listings
of this specification, is not intended. Exposure to maximum rating conditions for extended periods may affect
device reliability. CL88020 is susceptible to
electrostatic discharge (ESD).
ABSOLUTE MAXIMUM RATINGS
TAP1-4 to GND (non-conducting) ........ –0.5V to +352V
OTP, ALR, CS to GND .............–0.3V to (BIAS + 0.5V)
BIAS to GND ............................................–0.3V to 14V
Maximum current into BIAS pin.......................... 10 mA
ESD Rating (OTP, ALR, CS, BIAS, GND pins) Human
Body Model ......................................................... 750 V
Operating junction temperature ........ –40°C to +125°C
Storage temperature ......................... –65°C to +150°C
1.1
ELECTRICAL SPECIFICATIONS
TABLE 1-1:
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all specifications are for TA = TJ = +25°C. BIAS = 12V.
VTAP = 20V, ALR pin open, OTP = 5V unless otherwise noted. Boldface specifications apply over the full temperature
range TA = TJ = –15°C to +95°C.
Parameters
Sym.
Min.
Typ.
Max.
ITAP,max
105
110
—
—
—
—
130
130
—
—
—
—
—
—
—
—
67
56
—
—
56
Units
Conditions
Power Supply (PVDD)
Maximum TAP current capability for TAP 1
Maximum TAP current capability for TAP 2
Maximum TAP current capability for TAP 3
Maximum TAP current capability for TAP 4
TAP on resistance for TAP 1
TAP on resistance for TAP 2
RTAP
TAP on resistance for TAP 3
RSET = 6.19Ω
mA
Ω
VTAP = 6V
IBIAS = 0.8 - 5 mA
TAP on resistance for TAP 4
Voltage at BIAS pin
VBIAS
—
12.0
—
12.5
52
13.64
V
Quiescent current consumption
Limiting current (measured at TAP 4)
IBIAS,Q
ILIM
—
12.96
550
15.25
750
17.54
μA
mA
Regulated Tap current for TAP 4
TAP 3 to TAP 4 current ratio
ITAP4
KTAP3
121.1
0.883
127.5
0.929
133.9
0.975
mA
TAP 2 to TAP 4 current ratio
TAP 1 to TAP 4 current ratio
KTAP2
KTAP1
0.747
0.542
0.786
0.571
0.825
0.600
VCS(REG)
10
—
—
—
—
—
—
Self-commutation (TAP 1 to TAP 2)
Self-commutation (TAP 2 to TAP 3)
Self-commutation (TAP 3 to TAP 4)
2017 Microchip Technology Inc.
mV
10
Note 1
VALR = 0V, RSET = 100Ω
RSET = 10Ω;
mV
10
RSET = 7.50Ω
mV
Rset = 100
(VCS at VTAP2 = 20V) (VCS at VTAP1 = 20V)
Rset = 100
(VCS at VTAP3 = 20V) (VCS at VTAP2 = 20V)
Rset = 100
(VCS at VTAP4 = 20V) (VCS at VTAP3 = 20V)
DS20005753A-page 3
CL88020
TABLE 1-1:
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all specifications are for TA = TJ = +25°C. BIAS = 12V.
VTAP = 20V, ALR pin open, OTP = 5V unless otherwise noted. Boldface specifications apply over the full temperature
range TA = TJ = –15°C to +95°C.
Parameters
TAP 1 to TAP 2 cross regulation
Sym.
Min.
X-Reg
-2
Typ.
Max.
Units
2
mV
2
mV
2
mV
mA
—
TAP 2 to TAP 3 cross regulation
-2
—
TAP 3 to TAP 4 cross regulation
-2
—
ILR,nom
Nominal TAP 4 current
ILR,HI
TAP4 current to ILR,NOM ratio
ILR,LO
TAP4 current to ILR,LO ratio
—
12.75
—
0.801
0.843
0.885
1.073
1.129
1.186
9.01
10.60
12.19
Note 1:
Rset = 100
ITAP2 = 2 mA
VTAP1 = 20V
Rset = 100
ITAP3 = 2 mA
VTAP2 = 20V
Rset = 100
ITAP4 = 2 mA
VTAP3 = 20V
Rset = 100
VALR = 1.275V
VTAP4 = 20V
Rset = 100
VALR = 1.776V
VTAP4 = 20V
OTP
OPT current limit
Conditions
mA
Rset = 100
VALR = 0.863V
VTAP4 = 20V
VOTP = 1.6V;
RSET = 100
VTAP4 = 20V
Does not include the bias current.
TABLE 1-2:
TEMPERATURE SPECIFICATIONS
Parameters
Sym
Min.
Typ.
Max.
Units
Operating Temperature Range
TJ
-40°C
—
+125°C
°C
Storage Temperature Range
TA
-65°C
—
+150°C
°C
JC
—
+8°C
—
°C/W
Conditions
Temperature Ranges
Note 1
Package Thermal Resistances
Thermal Resistance, 8LD-SOIC
Note 1:
2:
Note 2
The Operating Temperature Range is specified at the junction. The junction temperature must be
computed using the thermal resistance (TR) from junction-to-case, and the case-to-ambient TR of the
PCB design.
Thermal resistance is measured from junction to bottom metal slug.
DS20005753A-page 4
2017 Microchip Technology Inc.
CL88020
2.0
PIN DESCRIPTION
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN DESCRIPTION
Pin #
Name
Description
1
TAP1
Drives the most upstream LED string
2
TAP2
Drives the first and second LED strings
3
TAP3
Drives the first, second and third LED strings
4
TAP4
5
CS
6
OTP
Provides remote Over-Temperature protection.
7
BIAS
Provides power to the IC using an internal shunt regulator. It is recommended to be bypassed
with a low ESR ceramic capacitor (at least 1 μF)
8
ALR
An external resistive voltage divider and capacitor provide line regulation for the TAP currents
9
GND
Regulator ground
2.1
Drives all 4 LED strings
Used to set the currents in the Taps
TAP1 Pin
Open drain power FET connection to the first/top LED
string.
2.2
Active Line Regulation Pin (ALR)
This input pin is connected to an RC network to sense
the input main voltage and regulate the LED string
current against variations in AC input voltage.
TAP2 Pin
Open drain power FET connection to the second LED
string.
2.3
2.8
2.9
Ground Terminal (GND)
Reference ground for all input voltages.
TAP3 Pin
Open drain power FET connection to the third LED
string.
2.4
TAP4 Pin
Open drain power FET connection to the fourth/bottom
LED string.
2.5
Current Set Pin (CS)
A resistor from this pin to ground sets the LED string
current.
2.6
Over-temperature Protection Pin
(OTP)
This input is connected to a resistor/NTC-thermistor
combination to reduce the LED current when the
temperature becomes too high.
2.7
BIAS Pin
An input pin to provide voltage to the chip. The BIAS pin
is the input to a shunt regulator and must be fed by a
current source, not a fixed voltage.
2017 Microchip Technology Inc.
DS20005753A-page 5
CL88020
3.0
FUNCTIONAL DESCRIPTION
3.1
Introduction
The CL88020 Sequential Linear LED Driver is
designed to drive a long string of inexpensive, low-current LEDs directly from the AC mains. A string of
series/parallel LEDs is tapped at four locations. Four
linear current regulators sink current at each tap
through a single control point and are sequentially
turned on and off.
This IC is targeted to drive a string of LEDs from a
nominal 120 VAC input voltage and provide 8.5W of
output power.
It has an internal line regulation circuit to regulate the
output power as the line voltage changes from minimum to maximum. It also includes a remote over-temperature protection which allows thermal de-rating of
the output power using a remote NTC to sense the LED
temperature.
3.2
Principle of Operation
The CL88020 employs a very simple method of implementing single-point control and self-commutation, as
shown in Figure 3-1. The single current sense resistor
to ground (RCS) comprises single-point control. Each
taps’ error amplifier shares this single control point,
although only one err amp is active at any one time.
Initially, VCS is at 0V, causing all the current regulators
to be turned on but not conducting. Once the rectified
AC rises high enough to forward bias the first LED
string segment, the first current regulator begins conducting. Eventually it achieves regulation. At this point
VREF1 and VCS are in equilibrium. As the rectified AC
continues to rise, the next LED segment becomes forward biased. Since the second regulator’s reference
voltage (VREF2) is higher than VCS, the second regulator is already on and begins conducting (although not
regulating), injecting current (ITAP2) into the single control point., raising the VCS voltage. The first regulator
responds to the increase in VCS by reducing ITAP1
such that VCS remains equal to VREF1.
EQUATION 3-1:
V REF1
I TAP1 = --------------- – I TAP2
R CS
ITAP1 continues to decrease as ITAP2 increases. When
the rectified AC rises sufficiently for the second regulator to achieve regulation, VCS increases to be equal
with VREF2. With VCS now greater than VREF1, the first
regulator is effectively shut off and the second regulator takes over. This repeats for the other taps and also
works in reverse as the rectified AC passes the peak
and begins decreasing.
This simple self-commutating mechanism and singlepoint control automatically sequences the current
regulators and assures smooth tap-to-tap transitions.
3.2.1
TAP1
TAP2
TAP3
TAP4
ACTIVE LINE REGULATION (ALR)
Without compensating for line voltage variations, as
the AC voltage increases, downstream LED segments
become active. In addition, the dwell time at the higher
tap currents increases as AC voltage goes up. This
causes brightness to increase with AC voltage,
resulting in poor line regulation.
The ALR circuit maintains fairly constant output power
over variations in AC line voltage. It is not a closed
loop system that directly monitors and corrects output
power. Instead it monitors the voltage applied to the
LED string and uses it to adjust the reference voltage
provided by the OTP circuit. The circuit used for
achieving the active line regulation is shown in
Figure 3-2.
VREF4
VREF3
VREF2
VREF1
CS
RCS
FIGURE 3-1:
Tap Commutation.
Each current regulator has its own reference voltage,
derived from a resistive voltage divider such that:
VAREF
(1.275V)
VREF4
RALR1
RALR2
ALR
RAF
RAS
(300k) (120k)
VREF4 > VREF3 > VREF2 > VREF1
FIGURE 3-2:
DS20005753A-page 6
ALR Circuit.
2017 Microchip Technology Inc.
CL88020
Under normal operation (OTP not activated) the OTP
limiting voltage is essentially the reference voltage
used to set the tap currents. The ALR circuit adjusts
this voltage up or down to compensate for variations in
the AC line voltage as represented by the voltage at
the ALR pin.
EQUATION 3-2:
V REF4
ROT
OTP
The function of the limiter circuit is three-fold. Except
during OTP, the limiting voltage is fixed. First, during
the initial application of power, the ALR filter capacitor
(CALR) is at 0V. This would result in high LED current
until CALR charges up. Without a limiter, this would
cause a bright flash at turn-on. The second purpose of
the limiter is during dimming, where the average ALR
voltage will be low, causing the LED drive current to be
high. This defeats the dimmer and could result in
excessive currents. Lastly, during an overtemperature
condition, the OTP circuit gradually lowers the limiting
voltage from its fixed value. This reduces the power
applied to the LEDs, lowering their temperature until
an equilibrium is established.
OVERTEMPERATURE
PROTECTION (OTP)
OTP uses an inexpensive, external NTC thermistor to
remotely sense LED temperature. The thermistor can
be located in close proximity to the LEDs, providing
near-direct LED temperature monitoring. The OTP
temperature is adjustable via selection of NTC resistance. It is essential that OTP operate linearly, gradually reducing output power as temperature increases.
The thermistor is arranged in a full-bridge configuration with the active arm consisting of the NTC and a
discrete resistor to VBIAS (Figure 3-3). The passive
arm consists of internal resistors. The thermistors’
resistance versus temperature curve asymptotically
approaches 0 as temperature rises. To provide a
well-defined window between the threshold temperature and the extinguishing temperature, a small segment of the thermistors’ resistance-temperature curve
must be used.
To ALR
amp
VBIAS
ROW
ROU
480k
RNTC
ROL
90k
VALR – 1.275V
= 1.275V – ------------------------------------ 120k
300k
The external resistor divider at the ALR pin is usually
chosen such that the average voltage at the pin is
1.275V at nominal 120 VAC input. The ALR divider is
connected after the first LED segment to increase its
sensitivity to changes in the AC line voltage.
3.2.2
VBIAS
FIGURE 3-3:
VLIM
ROF
150k
OTP Equivalent Circuit.
ROF and the parallel combination of ROU and ROL
determine OTP gain and set the width of the OTP window — the higher the gain, the narrower the window.
Offset is determined by the passive arm of the bridge
and sets the location of the OTP window along the
temperature axis.
If OTP is unused, the OTP pin should be connected to
VDD.
The output of the OTP amplifier (which is used as a
limit for the ALR amplifier) can be expressed as:
EQUATION 3-3:
V BIAS
1
1
1
VREF4 = ROF VOTP ---------- + ----------- + ---------- – ------------- R OF ROU R OL R OU
= 2.979 VOTP – 0.3125 VBIAS
Note that in the above equation, it is assumed that the
input voltage is at nominal value and there is no
adjustment to the reference due to the ALR circuit.
The output of the OTP amplifier is internally clamped
to 1.575V, which corresponds to a voltage of 1.787V at
the OTP pin when VBIAS is 12.0 volts. As the voltage at
the OTP pin decreases to 1.686V, the output of the
OTP amplifier falls to 1.275V. It is at this point, the
OTP circuit starts modifying the TAP currents and
causes thermal derating.
Using two fixed resistors and one NTC, both the
breakpoint and the slope of the derating curve can be
set independently.
For example, consider a case with a breakpoint of
85°C with a derating curve such that the LED driver
is at 20% of full power at 110°C. So, the VREF4 voltages at 85°C and 110°C are 1.275V and 0.255V
respectively. The NTC thermistor used is a 470 kΩ,
with a Bvalue of 4500K. The NTC resistance at a
given temperature (Tc, expressed in °C) can be
expressed as:
EQUATION 3-4:
RNTC Tc = R NTC 25C e
2017 Microchip Technology Inc.
1
1
– B ------------- – ---------------------
298K Tc + 273
DS20005753A-page 7
CL88020
3.2.3
Using Equation 3-4, the corresponding NTC resistances at 85°C and 110°C are 33.4 kΩ and 14.2 kΩ.
Using these NTC resistance values, ROW and ROT can
then be computed. The final set of values that are
computed assuming 12.0 volts VBIAS are provided in
the Table 3-1.
TABLE 3-1:
Low output ripple is achieved using a capacitor and
four diodes. The capacitor may one or more paralleled
ceramic capacitors or a single electrolytic. Multiple
ceramic capacitors may be needed due to their poor
voltage coefficient. The four diodes may be obtained in
a single small package.The LED and rectifier arrangement is shown in Figure 3-4.
OVERTEMPERATURE
PROTECTION
Parameter
25C
85C
110C
ROT
511 kΩ
511 kΩ
511 kΩ
ROW
49.9 kΩ
49.9 kΩ
49.9 kΩ
RNTC
470 kΩ
33.4 kΩ
14.2 kΩ
VOTP
6.05V
1.68V
1.34V
VREF4
1.575V
1.262V
0.234V
With this method all currents, including ripple capacitor
charging and discharging currents, are controlled,
passing through the same single control point. This
allows the input current wave-shape to be maintained
and avoids peak-charging the ripple-reduction
capacitor.
CRPL
Ripple Reduction Circuit
D2
D1
AC
line
RIPPLE REDUCTION (OPTIONAL)
VCRPL
D4
D3
VRAC
VSEG2
VSEG1
BIAS
TAP1
TAP2
VSEG3
TAP3
VSEG4
TAP4
IREF voltage divider
OE
OE
OE
Note 2
OE
Tap op amps
shown in blue.
CS
RSET1
RSET2
FIGURE 3-4:
DS20005753A-page 8
Ripple Reduction Circuit.
2017 Microchip Technology Inc.
CL88020
The CL88020 with the ripple reduction circuit operates
in four phases: recharge, hold-up, direct and under
certain conditions, idle. Note that all active current
paths include Segment 1, assuring uninterrupted light
output during all phases of operation, excluding the
idle phase.
Recharge (red path)
Recharging of the ripple capacitor (CRPL) occurs when
(VRAC – VSEG1) > VCRPL. The maximum voltage that
CRPL can be charged to is:
VCRP(max) = VSEG2 + VSEG3 + VSEG4
The numbers of LEDs for each segment must be chosen carefully so as not to exceed CRPL’s voltage rating
while at the same time allowing CRPL to charge up to a
voltage sufficient to drive at least SEG1. To provide
continuous light output, the recharge path must
include LEDs.
Hold-Up (green path)
When the rectified AC falls below VCRPL, the capacitor
takes over, supplying the LEDs. The discharge path
flows through RSET1 only. Since this is lesser sense
resistance than for the other current paths, the current
for the hold-up phase will be higher. This allows for
normal currents to be drawn from the AC line to better
track the input voltage sine wave while allowing a
higher current during the hold-up interval.
Direct (purple paths)
When VCRPL< VRAC < (VCRPL + VSEG1), the LEDs are
supplied directly from the AC line. The window when
the direct phase is active is determined by VSEG1.
Idle (no path)
At low AC line voltages, there is not enough voltage to
charge CRPL sufficiently to power SEG1 and strobing
will occur. Also, strobing will occur if CRPL is too small.
2017 Microchip Technology Inc.
DS20005753A-page 9
CL88020
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
8-Pin SOIC
Example
CL88020
SE^^1723
NNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20005753A-page 10
256
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
may not include the corporate logo.
2017 Microchip Technology Inc.
CL88020
8-Lead Small Outline Integrated Circuit (5DX) - .150 In. (3.90 mm) Body [SOIC]
With 3.30x2.41 mm Exposed Pad
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
E1
E
SEE DETAIL A
N
E
2
(DATUM A)
(DATUM B)
NOTE 1
2X
0.10 C B
2X
2X
0.10 C A
1
h
0.20 C A
2
8X b
h
0.25
e
C A B
TOP VIEW
C
H
END VIEW
A1
A A2
SEATING
PLANE
SIDE VIEW
16X
0.08 C
D2
1
2
E2
N
BOTTOM VIEW
Microchip Technology Drawing C04-419A Sheet 1 of 2
2017 Microchip Technology Inc.
DS20005753A-page 11
CL88020
8-Lead Small Outline Integrated Circuit (5DX) - .150 In. (3.90 mm) Body [SOIC]
With 3.30x2.41 mm Exposed Pad
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
4X Ĭ1
Ĭ2
R1
R
C
c
SEATING
PLANE
L
Ĭ
(L1)
4X Ĭ1
DETAIL A
Units
Dimension Limits
Number of Pins
N
e
Pitch
Overall Height
A
Molded Package Thickness
A2
§
Standoff
A1
Overall Width
E
Molded Package Width
E1
Overall Length
D
E2
Exposed Pad Width
D2
Exposed Pad Length
Chamfer (Optional)
h
Foot Length
L
Footprint
L1
c
Lead Thickness
b
Lead Width
Foot Angle
Ĭ
Ĭ2
Lead Angle
Ĭ1
Mold Draft Angle
MIN
1.25
0.00
1.78
2.67
0.15
0.40
0.10
0.31
0°
0°
0°
MILLIMETERS
NOM
8
1.27 BSC
1.45
6.00 BSC
3.90 BSC
4.90 BSC
0.71
1.04 REF
-
MAX
1.70
0.15
1.27
0.25
0.51
8°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-419A Sheet 2 of 2
DS20005753A-page 12
2017 Microchip Technology Inc.
CL88020
2017 Microchip Technology Inc.
DS20005753A-page 13
CL88020
NOTES:
DS20005753A-page 14
2017 Microchip Technology Inc.
CL88020
APPENDIX A:
REVISION HISTORY
Revision A (May 2017)
• Original Release of this Document.
2017 Microchip Technology Inc.
DS20005753A-page 15
CL88020
NOTES:
DS20005753A-page 16
2017 Microchip Technology Inc.
CL88020
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
-
X
-
X
Tape and Temperature
Range
Reel
XX
Package
Device:
CL88020= Sequential Linear LED Driver with 4 Taps
Tape and Reel
Option
T
Temperature Range
E
=
Package:
SE
=
=
2017 Microchip Technology Inc.
Examples:
a)
CL88020T-E/SE:
Sequential
Linear
LED Driver with 4
Taps
Tape and Reel
-40C to +125C (Extended)
DS20005753A-page 17
CL88020
NOTES:
DS20005753A-page 18
2017 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2017, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-1676-0
== ISO/TS 16949 ==
2017 Microchip Technology Inc.
DS20005753A-page 19
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DS20005753A-page 20
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2017 Microchip Technology Inc.
11/07/16
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