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DSC6111JE1B-025.0000

DSC6111JE1B-025.0000

  • 厂商:

    ACTEL(微芯科技)

  • 封装:

    VLGA4

  • 描述:

    有源晶振 25MHz 1.71V~3.63V VLGA-4

  • 数据手册
  • 价格&库存
DSC6111JE1B-025.0000 数据手册
DSC61XXB Ultra-Small, Ultra-Low Power MEMS Oscillator Features General Description • Wide Frequency Range: 3.5 kHz to 100 MHz • Ultra-Low Power Consumption: 3 mA/1 µA (Active/Standby) • Ultra-Small Footprints - 1.6 mm  1.2 mm - 2.0 mm  1.6 mm - 2.5 mm  2.0 mm • Frequency Select Input Supports Two Pre-Defined Frequencies • High Stability: ±20 ppm, ±25 ppm, ±50 ppm • Wide Temperature Range - Automotive: –40°C to +125°C - Ext. Industrial: –40°C to +105°C - Industrial: –40°C to +85°C - Ext. Commercial: –20° to +70°C • Excellent Shock and Vibration Immunity - Qualified to MIL-STD-883 • High Reliability - 20x Better MTF Than Quartz Oscillators • Supply Range of 1.71V to 3.63V • Short Sample Lead Time: 3.3V VDD. Includes frequency variations due to initial tolerance, temp. and power supply voltage. Input waveform must be monotonic with rise/fall time < 10 ms Output Disable time takes up to two periods of the output waveform + 200 ns. For parts configured with OE, not Standby. Output is enabled if pad is floated or not connected. Time to reach 90% of target VDD. Power ramp rise must be monotonic.  2019 Microchip Technology Inc. DS20006155A-page 3 DSC61XXB ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, VDD = 1.8V –5% to 3.3V +10%, TA = –40°C to +125°C. Parameters Sym. VOH Min. 0.8 x VDD Typ. — Max. — Units V Output Logic Levels VOL — — 0.2 x VDD V — 1 1.5 ns — 0.5 1.0 ns — 1.2 2.0 ns — 0.6 1.2 ns — 8.5 — — 7 — — 50 70 — 35 60 — 70 — — 60 — tRX/tFX Output Transition Time Rise Time/Fall Time tRY/tFY Period Jitter, RMS Cycle-to-Cycle Jitter (Peak) Period Jitter (Peak-to-Peak) Note 1: 2: 3: 4: 5: 6: 7: 8: JPER JCy–Cy JPP Conditions Output Logic High, I = 3 mA, Std. Drive Output Logic High, I = 6 mA, High Drive Output Logic Low, I = –3 mA, Std. Drive Output Logic Low, I = –6 mA, High Drive DSC61x2 VDD = 1.8V High Drive, 20% to 80% CL = 15 pF VDD = 2.5V/3.3V DSC61x1 VDD = 1.8V Std Drive, 20% to 80% CL = 10 pF VDD = 2.5V/3.3V psRMS fOUT = 27 MHz ps fOUT = 27 MHz ps fOUT = 27 MHz VDD = 1.8V VDD = 2.5V/3.3V VDD = 1.8V VDD = 2.5V/3.3V VDD = 1.8V VDD = 2.5V/3.3V Pin 4 VDD should be filtered with 0.1 µF capacitor. Not including current through pull-up resistor on EN pin (if configured). Higher standby current seen at >3.3V VDD. Includes frequency variations due to initial tolerance, temp. and power supply voltage. Input waveform must be monotonic with rise/fall time < 10 ms Output Disable time takes up to two periods of the output waveform + 200 ns. For parts configured with OE, not Standby. Output is enabled if pad is floated or not connected. Time to reach 90% of target VDD. Power ramp rise must be monotonic. DS20006155A-page 4  2019 Microchip Technology Inc. DSC61XXB TEMPERATURE SPECIFICATIONS (Note 1) Parameters Sym. Min. Typ. Max. Units Conditions TJ –40 — +150 °C — Storage Ambient Temperature Range TA –55 — +150 °C — Soldering Temperature TS — +260 — °C 40 sec. max. Temperature Ranges Junction Operating Temperature Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, θJA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability.  2019 Microchip Technology Inc. DS20006155A-page 5 DSC61XXB 2.0 PIN DESCRIPTIONS The DSC61xxB is a highly configurable device and can be factory programmed in many different ways to meet the customer’s needs. Microchip’s ClockWorks® Configurator http://clockworks.microchip.com/Timing/ must be used to choose the necessary options, create the final part number, data sheet, and order samples. The descriptions of the pins are listed in Table 2-1. TABLE 2-1: DSC61XXB PIN FUNCTION TABLE Pin Number Pin Name 1 (Note 1) STDBY 2 GND 3 Output 4 VDD Note 1: OE FS Description Output Enable: H = Active, L = Disabled (High Impedance). Standby: H = Device is active, L = Device is in standby (Low Power Mode). Frequency Select: H = Output Frequency 1, L = Output Frequency 2. Ground. Oscillator clock output. Power supply: 1.71V to 3.63V. DSC610xB/1xB/3xB has a 300 kΩ internal pull-up resistor on pin 1. DSC614xB/5xB/7xB has no internal pull-up resistor on pin 1 and needs an external pull-up or to be driven by another chip. An explanation of the different options listed in Table 2-1 follows. 2.1 Pin 1 This is a control pin and may be configured to fulfill one of three different functions. If not actively driven, a 10 kΩ pull-up resistor is recommended. 2.1.1 OUTPUT ENABLE (OE) Pin 1 may be configured as OE. Oscillator output may be turned on and off according to the state of this pin. 2.1.2 2.3 Output Buffer Options The DSC61xx family is available in multiple output driver configurations. The standard-drive (61x1) and high-drive (61x2) deliver respective output currents of greater than 3 mA and 6 mA at 20%/80% of the supply voltage. For heavy loads of 15 pF or higher, the high-drive option is recommended. STDBY Pin 1 may be configured as Standby. When the pin is low, both output buffer and PLL will be off and the device will enter a low power mode. 2.1.3 FREQUENCY SELECT (FS) Pin 1 may be configured as FS. The output may be set to one of two pre-programmed frequencies. The output clock frequencies can only be set to either kHz or MHz. A combination of kHz and MHz cannot be set. 2.2 Pins 2 through 4 Pins 2 and 4 are the supply terminals, GND and VDD respectively. Pin 3 is the clock output, programmable to Standard and High Drive strength settings. Visit ClockWorks® Configurator to customize your device. DS20006155A-page 6  2019 Microchip Technology Inc. DSC61XXB 3.0 DIAGRAMS tR tF VOH OUTPUT VOL tEN 1/fo tDA VIH ENABLE FIGURE 3-1: VIL Output Waveform. IDD VDD 0.1μF 4 3 1 2 CL VDA FIGURE 3-2: Test Circuit. Via to GND Layer C1 VDD Enable FIGURE 3-3: Output GND Via to GND Layer Recommended Board Layout.  2019 Microchip Technology Inc. DS20006155A-page 7 DSC61XXB SOLDER REFLOW PROFILE . 4.0 ax cm se ax cm se 3° C/ Reflow Pre-Heat 8 minutes max. FIGURE 4-1: ax. 25°C 60-180 Seconds cm 150°C 60-150 Seconds /se . 3° C/ 217°C 200°C 6°C Temperature (°C) 260°C 20-40 Seconds Cool Time Solder Reflow Profile. MSL 1 @ 260°C refer to JSTD-020C Ramp-Up Rate (200°C to Peak Temp) 3°C/sec. max. Preheat Time 150°C to 200°C 60 to 180 sec. Time maintained above 217°C 60 to 150 sec. Peak Temperature 255°C to 260°C Time within 5°C of actual Peak 20 to 40 sec. Ramp-Down Rate 6°C/sec. max. Time 25°C to Peak Temperature 8 minutes max. DS20006155A-page 8  2019 Microchip Technology Inc. DSC61XXB 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 4-Lead VLGA* 2.5 x 2.0 XXXXXXX XXXYYWW SSS 4-Lead VFLGA* 2.0 x 1.6/1.6 x 1.2 XXXX SSS Legend: XX...X Y YY WW SSS e3 * Example 0400000 DCP1834 287 Example 011H 502 Product code or customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. ●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle mark). Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. Underbar (_) and/or Overbar (⎯) symbol may not be to scale.  2019 Microchip Technology Inc. DS20006155A-page 9 DSC61XXB 4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) NOTE 1 E 2X 0.05 C 1 2X 2 TOP VIEW 0.05 C 0.10 C A1 A C SEATING PLANE 4X (A3) 0.08 C SIDE VIEW b2 3X b1 CH 1 2 CH NOTE 1 0.07 0.03 C A B C e1 e1 2 4X L N e BOTTOM VIEW Microchip Technology Drawing C04-1199A Sheet 1 of 2 DS20006155A-page 10  2019 Microchip Technology Inc. DSC61XXB 4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Terminals N e Terminal Pitch Terminal Pitch e1 A Overall Height Standoff A1 Substrate Thickness (with Terminals) A3 Overall Length D E Overall Width b1 Terminal Width b2 Terminal Width L Terminal Length Terminal 1 Index Chamfer CH MILLIMETERS NOM MAX 4 1.20 BSC 0.75 BSC 0.79 0.89 0.84 0.00 0.05 0.02 0.20 REF 1.60 BSC 1.20 BSC 0.25 0.30 0.35 0.325 0.425 0.375 0.30 0.40 0.35 0.125 MIN Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-1199A Sheet 2 of 2  2019 Microchip Technology Inc. DS20006155A-page 11 DSC61XXB 4-Lead Very Thin Fine Pitch Land Grid Array (ARA) - 1.6x1.2 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E1 X1 G1 4 Y C G2 1 2 (CH) SILK SCREEN X2 E2 RECOMMENDED LAND PATTERN Units Dimension Limits Contact Pitch E1 Contact Pitch E2 Contact Spacing C Contact Width (X3) X1 Contact Width X2 Contact Pad Length (X6) Y Space Between Contacts (X4) G1 Space Between Contacts (X3) G2 Contact 1 Index Chamfer CH MIN MILLIMETERS NOM 1.20 BSC 1.16 BSC 0.75 MAX 0.35 0.43 0.50 0.85 0.25 0.13 X 45° REF Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-3199A DS20006155A-page 12  2019 Microchip Technology Inc. DSC61XXB 4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) NOTE 1 E 2X 0.05 C 1 2X 2 TOP VIEW 0.05 C 0.10 C C A1 A SEATING PLANE 4X (A3) SIDE VIEW b2 3X b1 0.07 0.03 CH 1 0.08 C 2 CH NOTE 1 C A B C e1 e1 2 4X L N e BOTTOM VIEW Microchip Technology Drawing C04-1200A Sheet 1 of 2  2019 Microchip Technology Inc. DS20006155A-page 13 DSC61XXB 4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Terminals N e Terminal Pitch Terminal Pitch e1 Overall Height A Standoff A1 Substrate Thickness (with Terminals) A3 Overall Length D Overall Width E b1 Terminal Width Terminal Width b2 Terminal Length L Terminal 1 Index Chamfer CH MIN 0.79 0.00 0.30 0.40 0.50 - MILLIMETERS NOM 6 1.55 BSC 0.95 BSC 0.84 0.02 0.20 REF 2.00 BSC 1.60 BSC 0.35 0.45 0.55 0.15 MAX 0.89 0.05 0.40 0.50 0.60 - Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-1200A Sheet 2 of 2 DS20006155A-page 14  2019 Microchip Technology Inc. DSC61XXB 4-Lead Very Thin Fine Pitch Land Grid Array (ASA) - 2.0x1.6 mm Body [VFLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X1 4 Y G2 C 1 2 (CH) G1 SILK SCREEN E RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Contact Spacing C Contact Width (X4) X1 Contact Width (X2) X2 Contact Pad Length (X6) Y Space Between Contacts (X4) G1 Space Between Contacts (X3) G2 Contact 1 Index Chamfer CH MIN MILLIMETERS NOM 1.55 BSC 0.95 MAX 0.50 0.40 0.70 1.05 0.25 0.13 X 45° REF Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-3200A  2019 Microchip Technology Inc. DS20006155A-page 15 DSC61XXB 4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) NOTE 1 E 2X 0.05 C 1 2X 0.05 C 2 TOP VIEW 0.10 C A1 C A SEATING PLANE (A3) 4X SIDE VIEW 0.08 C 4X b1 CH 1 2 CH NOTE 1 0.07 0.03 C A B C e1 e1 2 4X L N e BOTTOM VIEW Microchip Technology Drawing C04-1202A Sheet 1 of 2 DS20006155A-page 16  2019 Microchip Technology Inc. DSC61XXB 4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Terminals N e Terminal Pitch e1 Terminal Pitch Overall Height A Standoff A1 Substrate Thickness (with Terminals) A3 Overall Length D Overall Width E Terminal Width b1 Terminal Length L Terminal 1 Index Chamfer CH MIN 0.79 0.00 0.60 0.60 - MILLIMETERS NOM 4 1.65 BSC 1.25 BSC 0.84 0.02 0.20 REF 2.50 BSC 2.00 BSC 0.65 0.65 0.225 MAX 0.89 0.05 0.70 0.70 - Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-1202A Sheet 2 of 2  2019 Microchip Technology Inc. DS20006155A-page 17 DSC61XXB 4-Lead Very Thin Land Grid Array (AUA) - 2.5x2.0 mm Body [VLGA] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X 4 Y C G2 1 2 (CH) G1 SILK SCREEN E RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Contact Spacing C Contact Width (X4) X Contact Pad Length (X6) Y Space Between Contacts (X4) G1 Space Between Contacts (X3) G2 Contact 1 Index Chamfer CH MIN MILLIMETERS NOM 1.65 BSC 1.25 MAX 0.70 0.80 0.95 0.45 0.13 X 45° REF Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-3202A DS20006155A-page 18  2019 Microchip Technology Inc. DSC61XXB APPENDIX A: REVISION HISTORY Revision A (January 2019) • Initial creation of DSC61xxB Microchip data sheet DS20006155A.  2019 Microchip Technology Inc. DS20006155A-page 19 DSC61XXB NOTES: DS20006155A-page 20  2019 Microchip Technology Inc. DSC61XXB PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Examples: PART NO. X X X X X X – XXX.XXXX X Device Pin 1 Output Package Temperature Frequency Revision Frequency Media Definition Drive Type Range Stability Strength Device: DSC61: Pin Definition: Ultra-Small, Ultra-Low Power MEMS Oscillator Selection Pin 1 Internal Pull-Up Register 0 OE Pull-up 1 STDBY Pull-up 2 FS Pull-up 4 OE None 5 STDBY None 6 FS None Output Drive Strength: 1 2 Standard High Packages: J M H = = = 4-Lead 2.5 mm x 2.0 mm VLGA 4-Lead 2.0 mm x 1.6 mm VFLGA 4-Lead 1.6 mm x 1.2 mm VFLGA Temperature Range: A L I E = = = = –40C to +125C (Automotive) –40C to +105C (Extended Industrial) –40C to +85C (Industrial) –20C to +70C (Extended Commercial) Frequency Stability: 1 2 3 = = = ± 50 ppm ± 25 ppm ± 20 ppm Revision: B = Revision B Frequency: xxx.xxxx = User-Defined Frequency between 001.0000 MHz and 100.0000 MHz xxxkxxx = User-Defined Frequency between 003.500 kHz and 999.999 kHz xxxx = Frequency configuration code when pin 1 = FS. Configure the part online through ClockWorks Media Type: = = T = B = a) DSC6112JI2B-100.0000: Ultra-Small, Ultra-Low Power MEMS Oscillator, Pin 1 = STDBY with Internal Pull-Up, High Drive Strength, 4-Lead 2.5 mm x 2.0 mm VLGA, Industrial Temperature, ±25 ppm Stability, Revision B, 100 MHz Frequency, 140/Tube b) DSC6101HE1B-016.0000T: Ultra-Small, Ultra-Low Power MEMS Oscillator, Pin 1 = OE with Internal Pull-Up, Standard Drive Strength, 4-Lead 1.6 mm x 1.2 mm VFLGA, Extended Commercial Temperature, ±50 ppm Stability, Revision B, 16 MHz Frequency, 1,000/Reel c) DSC6121MI2B-005QB: Ultra-Small, Ultra-Low Power MEMS Oscillator, Pin 1 = Freq. Select with Internal Pull-Up, Standard Drive Strength, 4-Lead 2.0 mm x 1.6 mm VFLGA, Industrial Temperature, ±25 ppm Stability, Revision B, Two Frequencies Configured through ClockWorks, 3,000/Reel Note 1: Note 1: Media Type identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with different media options. 140/Tube (J Package Option) 100/Bag (M & H Package Option) 1,000/Reel 3,000/Reel Please visit Microchip ClockWorks® Configurator Website to configure the part number for customized frequency. http://clockworks.microchip.com/timing/.  2019 Microchip Technology Inc. DS20006155A-page 21 DSC61XXB NOTES: DS20006155A-page 22  2019 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2019, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-4095-6 == ISO/TS 16949 ==  2019 Microchip Technology Inc. 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