Le79R241
Intelligent Subscriber Line Interface Circuit
Ve790 Series
Data Sheet
Features
•
Document ID#: 080249
Monitor of two-wire interface voltages and
currents supports
•
Voice transmission
•
Programmable DC feed characteristics
-
Independent of battery
-
Current limited
Device
Le79R241JC
Le79R241DJC
Le79R241QC
Package1,2
32 Pin PLCC
32 Pin PLCC (Green)
32 Pin QFN
Packing3
Tubes
Tubes
Trays
1. Due to size constraints, QFN devices are marked by omitting the
“Le” prefix. For example, Le79R241QC is marked 79R241QC.
2. The green package meets RoHS Directive 2002/95/EC of the European Council to minimize the environmental impact of electrical
equipment.
•
Subscriber line diagnostics
3. For delivery using a tape and reel packing system, add a "T" suffix
to the OPN (Ordering Part Number) when placing an order.
-
Leakage resistance
-
Loop resistance
-
Line capacitance
-
Bell capacitance
-
Foreign voltage sensing
Applications
•
Power cross and fault detection
Supports internal short loop or external ringing
•
+5 V and battery supplies
•
Dual battery operation for system power saving
•
Automatic battery switching
•
Intelligent thermal management
Metering capable
12 kHz and 16 kHz
•
Smooth polarity reversal
•
Tip-open state supports ground start signaling
•
Integrated test load switches/relay drivers
•
5 REN with DC offset trapezoid.
•
For US standard:
•
drives ring up to 4.4 kft of 26 gauge wire.
•
drives ring up to 7 kft of 24 gauge wire.
•
For European (British) standard:
•
drives ring up to 1.7 km of 0.5 mm copper cable.
•
CO
•
DLC
•
PBX/KTS
•
Pair Gain
The Le79R241 Intelligent Subscriber Line Interface
Circuit (ISLIC™) device, in combination with a VE790
series ISLAC™ device, implements the telephone line
interface function. This enables the design of a low
cost, high performance, fully software programmable
line interface for multiple country applications
worldwide. All AC, DC, and signaling parameters are
fully programmable via microprocessor or GCI
interfaces on the VE790 series ISLAC device.
Additionally, the Le79R241 ISLIC device has
integrated self-test and line-test capabilities to resolve
faults to the line or line circuit. The integrated test
capability is crucial for remote applications where
dedicated test hardware is not cost effective.
Accommodates low tolerance fuse resistors or
PTC thermistors
•
Enables a cost effective voice solution for long or
short loop applications providing POTS and
integrated test capabilities
Description
Compatible with inexpensive protection networks
•
•
Ordering Information
Selectable off-hook and ground-key
thresholds
•
•
May 2011
•
•
•
Version 3
Space Saving Package Options (8 x 8 QFN)
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2007-2011, Zarlink Semiconductor Inc. All Rights Reserved.
Le79R241
Data Sheet
Related Literature
•
080248 Le79231 ISLIC™ Device Data Sheet
•
080253 Le79R251 ISLIC™ Device Data Sheet
•
080250 Le79Q224x Quad ISLAC™ Device Data Sheet
•
081065 Le79228 Quad ISLAC™ Device Data Sheet
•
080262 VE790 Series Evaluation Board User’s Guide
•
080804 Le79R2xx/Le79Q224x Chip Set User’s Guide
•
080923 Le79R2xx/Le79228 Chip Set User’s Guide
•
081103 Le79610 PacketSLAC™ Device Data Sheet
Revision History
Below are the changes from the September 2007 version to the May 2011 version.
Page
1
Item
Ordering Information
Description
Obsoleted Le79R241FQC package.
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Zarlink Semiconductor Inc.
Le79R241
Data Sheet
Table of Contents
1.0 Product Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.0 Features of the VE790 Series Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.0 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.0 Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.0 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2 Thermal Resistance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2.1 Package Assembly. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3.1 Environmental Ranges. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3.2 Electrical Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.0 Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.1 Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.2 DC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.3 Relay Driver Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.4 Transmission Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.5 Ringing Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.6 Current-Limit Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.7 Thermal Shutdown Fault Indications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.0 Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.1 Operating Mode Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.2 Driver Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.3 Thermal-Management Equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8.0 Timing Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
9.0 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
10.0 Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
10.1 Internal Ringing Line Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
11.0 Line Card Parts List - Internal Ringing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
11.1 External Ringing Line Schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
12.0 Line card Parts List - External Ringing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
13.0 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
13.1 32-Pin PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
13.2 32-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
List of Figures
Figure 1 - Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2 - Le79R241 ISLIC Device Internal Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3 - Chip Set Block Diagram - Four Channel Line Card Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 4 - Le79241DJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5 - Le79R241QC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6 - Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4
Zarlink Semiconductor Inc.
Le79R241
1.0
Data Sheet
Product Description
Zarlink’s VE790 series voice chip sets integrate all functions of the subscriber line. Two chip types are used to
implement the line card — the Le79R241 ISLIC device and a VE790 series ISLAC device. These provide the
following basic functions:
1. The Le79R241 ISLIC device: A high voltage, bipolar device that drives the subscriber line, maintains longitudinal
balance and senses line conditions.
2. The VE790 series ISLAC devices: Low voltage CMOS ICs that provide conversion, control and DSP functions
for the Le79R241 ISLIC device.
A complete schematic of the line card using a VoiceEdge chip set for internal and external ringing is shown in
“Application Circuit” on page 25.
The Le79R241 ISLIC device uses reliable, bipolar technology to provide the power necessary to drive a wide
variety of subscriber lines. It can be programmed by the VE790 series ISLAC device to operate in eight different
modes that control power consumption and signaling. This enables it to have full control over the subscriber loop.
The Le79R241 ISLIC device is designed to be used exclusively with the VE790 series ISLAC devices. The
Le79R241 ISLIC device requires only +5 V power and the battery supplies for its operation.
The Le79R241 ISLIC device implements a linear loop-current feeding method with the enhancement of intelligent
thermal management. This limits the amount of power dissipated on the Le79R241 ISLIC device by dissipating
power in external resistors in a controlled manner.
Each codec contains high-performance circuits that provide A/D and D/A conversion for the voice (codec), DC-feed
and supervision signals. The VE790 series ISLAC devices contain a DSP core that handles signaling, DC-feed,
supervision and line diagnostics for all channels.
The DSP core selectively interfaces with three types of backplanes:
•
Standard PCM/MPI
•
Standard GCI
•
Modified GCI with a single analog line per GCI channel
The 790 series voice chip set provides a complete software configurable solution to the BORSCHT functions as
well as complete programmable control over subscriber line DC-feed characteristics, such as current limit and feed
resistance. In addition, these chip sets provide system level solutions for the loop supervisory functions and
metering. In total, they provide a programmable solution that can satisfy worldwide line card requirements by
software configuration.
Software programmed filter coefficients, DC-feed data and supervision data are easily calculated with WinSLAC™
software. This PC software is provided free of charge. It allows the designer to enter a description of system
requirements. WinSLAC then computes the necessary coefficients and plots the predicted system results.
The Le79R241 ISLIC device interface unit inside the VE790 series ISLAC device processes information regarding
the line voltages, loop currents and battery voltage levels. These inputs allow the VE790 series ISLAC device to
place several key Le79R241 ISLIC device performance parameters under software control.
The main functions that can be observed and/or controlled through the VE790 series ISLAC device backplane
interface are:
•
DC-feed characteristics
•
Ground-key detection
•
Off-hook detection
•
Metering signal
•
Longitudinal operating point
5
Zarlink Semiconductor Inc.
Le79R241
•
Subscriber line voltage and currents
•
Ring-trip detection
•
Abrupt and smooth battery reversal
•
Subscriber line matching
•
Ringing generation
•
Sophisticated line and circuit tests
Data Sheet
To accomplish these functions, the Le79R241 ISLIC device collects the following information and feeds it, in analog
form, to the VE790 series ISLAC device:
•
The metallic (IMT) and longitudinal (ILG) loop currents
•
The AC (VTX) and DC (VSAB) loop voltage
The outputs supplied by the VE790 series ISLAC devices to the Le79R241 ISLIC device are then:
•
A voltage (VHLi*) that provides control for the following high-level Le79R241 ISLIC device outputs:
•
DC loop current
•
Internal ringing signal
•
12 or 16 kHz metering signal
•
A low-level voltage proportional to the voice signal (VOUTi)
•
A voltage that controls longitudinal offset for test purposes (VLBi)
The VE790 series ISLAC devices perform the codec and filter functions associated with the four-wire section of the
subscriber line circuitry in a digital switch. These functions involve converting an analog voice signal into digital
PCM samples and converting digital PCM samples back into an analog signal. During conversion, digital filters are
used to band-limit the voice signals.
The user-programmable filters set the receive and transmit gain, perform the transhybrid balancing function, permit
adjustment of the two-wire termination impedance and provide frequency attenuation adjustment (equalization) of
the receive and transmit paths. Adaptive transhybrid balancing is also included. All programmable digital filter
coefficients can be calculated using WinSLAC software. The PCM codes can be either 16-bit linear
two’s-complement or 8-bit companded A-law or µ-law.
Besides the codec functions, the 790 series voice chip set provides all the sensing, feedback, and clocking
necessary to completely control Le79R241 ISLIC device functions with programmable parameters. System-level
parameters under programmable control include active loop current limits, feed resistance, and feed mode
voltages.
The VE790 series ISLAC devices supply complete mode control to the Le79R241 ISLIC device using the control
bus (P1-P3) and tri-level load signal (LDi).
The 790 series voice chip set provides extensive loop supervision capability including off-hook, ring-trip and
ground-key detection. Detection thresholds for these functions are programmable. A programmable debounce
timer is available that eliminates false detection due to contact bounce.
For subscriber line diagnostics, AC and DC line conditions can be monitored using built-in test tools. Measured
parameters can be compared to programmed threshold levels to set a pass/fail bit. The user can choose to send
the actual measurement data directly to a higher level processor by way of the PCM voice channel. Both
longitudinal and metallic resistance and capacitance can be measured, which allows leakage resistance, line
capacitance, and telephones to be identified.
*Note:
i = channel number
6
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
Signal
Transmission
RSN
VTX
Gain/Level
Shift
VLB
Attenuator
VSAB
AD
SA
HPA
Longitudinal
Control
Two-Wire
Interface
HPB
SB
BD
VREF
Signal
Conditioning
IMT
ILG
TMN
TMP
Thermal
Management
Control
CREF
Fault
Meas.
TMS
VBL
Switch Driver
VBH
Relay
Driver 1
Input Decoder and
Control Registers
VCC
R1
Relay
Control
GND
Relay
Drivers
BGND
R2
R3
RYE
Figure 1 - Block Diagram
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Zarlink Semiconductor Inc.
P1
P2
P3
LD
Le79R241
Data Sheet
A Amplifier
IA sense
AD
IA
RSN
IA
600
SA
+
-
Fault
Meas.
+
HPA
-
+
TMS
VTX
VREF
BGND
+
HPB
Fault
Meas.
+
+
VSAB
β = 0.01
SB
-
B Amplifier
IB
VREF
IB sense
BD
VREF
IB
600
TMN
TMP
VREF
Thermal
Management
Control
Gain/Level Shift
To Power
Amplifiers
VLB
Thermal
Shutdown
VBH
IA
IB
+
600 600
IMT
IA
IB
600 600
ILG
Tip Open
Active Low Battery
Standby
RYE
Reserved
Active High Battery
R3
OHT Fixed Longitudinal
Voltage
VBL
Disconnect
High Neg.
Bat. sel.
Decoder
R2
CREF
RD1
RD2
R1
RD3
C1
Control Register
C2
C3
Demux
Power amplifiers positive supply
BGND
P1
P2
P3
LD
VCC
Figure 2 - Le79R241 ISLIC Device Internal Block Diagram
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Zarlink Semiconductor Inc.
GND
Le79R241
2.0
Data Sheet
Features of the VE790 Series Chipset
•
Performs all battery feed, ringing, signaling, hybrid
and test (BORSCHT) functions
•
Supports both loop-start and ground-start
signaling
•
Two chip solution supports high density,
multi-channel architecture
•
Exceeds LSSGR and CCITT central office
requirements
•
Single hardware design meets multiple country
requirements through software programming of:
•
Selectable PCM or GCI interface
•
•
Supports most available master clock
frequencies from 512 kHz to 8.192 MHz
•
Ringing waveform and frequency
•
DC loop-feed characteristics and current-limit
•
On-hook transmission
•
Loop-supervision detection thresholds
•
Power/service denial mode
-
Off-hook debounce circuit
•
-
Ground-key and ring-trip filters
Line-feed characteristics independent of battery
voltage
•
Only 5 V, 3.3 V and battery supplies needed
•
Low idle-power per line
•
Linear power-feed with intelligent
power-management feature
•
Compatible with inexpensive protection networks;
Accommodates low-tolerance fuse resistors while
maintaining longitudinal balance
•
Monitors two-wire interface voltages and currents
for subscriber line diagnostics
•
Built-in voice-path test modes
•
Power-cross, fault, and foreign voltage detection
•
Integrated line-test features
•
Off-hook detect de-bounce interval
•
Two-wire AC impedance
•
Transhybrid balance
•
Transmit and receive gains
•
Equalization
•
Digital I/O pins
•
A-law/µ-law and linear selection
Supports internal and external battery-backed
ringing
•
Self-contained ringing generation and control
•
Supports external ringing generator and ring
relay
•
Ring relay operation synchronized to zero
crossings of ringing voltage and current
•
Integrated ring-trip filter and software enabled
manual or automatic ring-trip mode
•
•
Leakage
•
Line and ringer capacitance
•
Loop resistance
Integrated self-test features
•
Echo gain, distortion, and noise
•
Supports metering generation with envelope
shaping
•
Guaranteed performance over commercial and
industrial temperature ranges.
•
Smooth or abrupt polarity reversal
•
•
Adaptive transhybrid balance
Up to three relay drivers per Le79R241 ISLIC
device
•
•
Continuous or adapt and freeze
Configurable as test load switches
9
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
7
4 VCCA
A1
Le79R241
VCCD
LD1
B1
DGND1
VREF
DGND2
4 IO(1-4)
7
A2
Le79R241
B2
A3
LD2
RC
Networks
and
Protection
TSCA/G
AGND1
AGND2
7
TSCB
DRA/DD
Le79R241
LD3
B3
3
P1-P3
7
A4
Le79R241
LD4
B4
RREF
RSHB
BATH
RSLB
BATL
Le79Q224x
Quad Codec/
Filter
DRB
DXB
DXA/DU
DCLK/S0
PCLK/FS
MCLK
FS/DCL
CS/RST
DIO/S1
INT
Figure 3 - Chip Set Block Diagram - Four Channel Line Card Example
10
Zarlink Semiconductor Inc.
Le79R241
VBL
VBH
VCC
BGND
BD
AD
RSVD
Connection Diagrams
4
3
2
1
32
31
30
R1
5
29
SB
R2
6
28
SA
RYE
7
27
IMT
R3
8
26
ILG
TMS
9
25
CREF
TMP
10
24
RSVD
TMN
11
23
HPB
P1
12
22
HPA
P2
13
21
VTX
17
18
GND
19
20
VREF
16
RSN
15
VLB
P3
14
VSAB
32-Pin PLCC
LD
3.0
Data Sheet
VBH
VCC
BGND
BD
AD
RSVD
32
1
31
30
29
28
27
26
R1
R2
SB
VBL
Figure 4 - Le79241DJC
25
24
SA
2
23
IMT
RYE
3
22
ILG
R3
4
21
CREF
32-Pin QFN
5
20
RSVD
TMP
6
19
HPB
TMN
7
18
HPA
P1
8
17
16
VTX
P3
LD
VSAB
13
14
15
RSN
12
GND
11
VLB
10
P2
Exposed Pad
9
VREF
TMS
Figure 5 - Le79R241QC
Notes:
1.
Pin 1 is marked for orientation.
2.
RSVD = Reserved. Do not connect to this pin.
3.
The thermally enhanced QFN package features an exposed pad on the underside which must be electrically tied to VBH.
11
Zarlink Semiconductor Inc.
Le79R241
4.0
Data Sheet
Pin Descriptions
Pin Name
Type
Description
AD, BD
Output
Provide the currents to the A and B leads of the subscriber loop.
BGND
Ground
Ground return for high and low battery supplies.
CREF
+3.3 VDC
VCCD reference. It is the digital high logic supply rail, used by the Le79R241 ISLIC device to codec
interface.
GND
Ground
Analog and digital ground return for VCC.
HPA, HPB
Output
These pins connect to CHP, the external high-pass filter capacitor that separates the DC loop-voltage
from the voice transmission path.
ILG
Output
ILG is proportional to the common-mode line current (IAD–IBD), except in disconnect mode, where
ILG is proportional to the current into grounded SB.
IMT
Output
IMT is proportional to the differential line current (IAD + IBD), except in disconnect mode, where IMT
is proportional to the current into grounded SA. The Le79R241 ISLIC device indicates thermal
overload by pulling IMT to CREF.
LD
Input
The LD pin controls the input latch and responds to a 3-level input. When the LD pin is a logic 1 (CREF
1), the logic levels on P1–P3 latch into the Le79241 control register bits that operate the
mode-decoder. When the LD pin is a logic 0 ( 0.6), the logic levels on P1–P3 latch into the Am79241
control register bits that control the relay drivers (RD1–RD3). When the LD pin level is at ~VREF ± 0.3
V, the control register contents are locked.
P1–P3
Input
Inputs to the latch for the operating-mode decoder and the relay-drivers.
R1
Output
Collector connection for relay 1 driver. Emitter internally connected to BGND.
R2
Output
Collector connection for relay 2 driver. Emitter internally connected to RYE
R3
Output
Collector connection for relay 3 driver. Emitter internally connected to RYE.
RSN
Input
The metallic current between AD and BD is equal to 500 times the current into this pin. Networks that
program receive gain and two-wire impedance connect to this node. This input is at a virtual potential
of VREF.
RSVD
Reserved
These pins are used during Zarlink testing. In the application, they must be left floating.
RYE
Output
Emitter connection for R2 and R3. Normally connected to relay ground.
SA, SB
Input
Sense the voltages on the line side of the fuse resistors at the A and B leads. External sense resistors,
RSA and RSB, protect these pins from lightning or power-cross.
TMP,
TMN, TMS
Output
External resistors connected from TMP to TMS and TMN to VBL to offload excess power from the
Le79R241 ISLIC device.
VBH
Battery (Power)
Connection to high-battery supply used for ringing and long loops. Connects to the substrate. When
only a single battery is available, it connects to both VBH and VBL.
VBL
Battery (Power)
Connection to low-battery supply used for short loops. When only a single battery is available, this pin
can be connected to VBH.
VCC
+5 V Power Supply
Positive supply for low voltage analog and digital circuits in the Le79R241 ISLIC device.
Input
Sets the DC longitudinal voltage of the Le79R241 ISLIC device. It is the reference for the longitudinal
control loop. When the VLB pin is greater than VREF, the Le79R241 ISLIC device sets the
longitudinal voltage to a voltage approximately half-way between the positive and negative power
supply battery rails. When the VLB pin is driven to levels between 0V and VREF, the longitudinal
voltage decreases linearly with the voltage on the VLB pin.
VLB
12
Zarlink Semiconductor Inc.
Le79R241
Pin Name
Type
Data Sheet
Description
VREF
Input
The VE790 series SLAC device provides this voltage which is used by the Le79R241 ISLIC device
for internal reference purposes. All analog input and output signals interfacing to the VE790 series
SLAC device are referenced to this pin.
VSAB
Output
Scaled-down version of the voltage between the sense points SA and SB on this pin.
VTX
Output
The voltage between this pin and VREF is a scaled down version of the AC component of the voltage
sensed between the SA and SB pins. One end of the two-wire input impedance programming network
connects to VTX. The voltage at VTX swings positive and negative with respect to VREF.
Exposed
Pad
Battery
This must be electrically tied to VBH.
13
Zarlink Semiconductor Inc.
Le79R241
5.0
Electrical Characteristics
5.1
Absolute Maximum Ratings
Data Sheet
Stresses above those listed under Absolute Maximum Ratings can cause permanent device failure. Functionality at
or above these limits is not implied. Exposure to absolute maximum ratings for extended periods can affect device
reliability.
Storage temperature
–55° to +150° C
Ambient temperature, under bias
–40° to +85° C
Humidity
5% to 95%
VCC with respect to GND
–0.4 to +7 V
VBH, VBL with respect to GND (see note 2)
+0.4 to –104 V
BGND with respect to GND
–3 to +3 V
Voltage on relay outputs
+7 V
AD or BD to BGND:
Continuous
VBH – 1 to BGND + 1
10 ms (F = 0.1 Hz)
VBH – 5 to BGND + 5
1 µs (F = 0.1 Hz)
VBH – 10 to BGND + 10
250 ns (F = 0.1 Hz)
VBH – 15 to BGND + 15
Current into SA or SB:
10 µs rise to Ipeak
1000 µs fall to 0.5 Ipeak;
2000 µs fall to I =0
Ipeak = ±5 mA
Current into SA or SB:
2 µs rise to Ipeak
10 µs fall to 0.5 Ipeak;
20 µs fall to I = 0
Ipeak = ±12.5 mA
SA SB continuous
5 mA
Current through AD or BD
± 150 mA
P1, P2, P3, LD to GND
–0.4 to VCC + 0.4 V
Maximum power dissipation (see note 1)
TA = 70° C
In 32-pin PLCC package
In 32-pin QFN package
TA = 85° C
In 32-pin PLCC package
In 32-pin QFN package
1.67 W
3.00 W
1.33 W
2.40 W
ESD Immunity (Human Body Model)
JESD22 Class 1C compliant
Notes:
1.
Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165° C. Operation above 145° C junction
temperature may degrade device reliability.
The thermal performance of a thermally enhanced package is assured through optimized printed circuit board layout. Specified performance
requires that the exposed thermal pad be soldered to an equally sized exposed copper surface, which, in turn, conducts heat through
multiple vias to a large internal copper plane.
2.
Rise time of VBH (dv/dt) must be limited to less than 27 v/µs.
14
Zarlink Semiconductor Inc.
Le79R241
5.2
Data Sheet
Thermal Resistance
The junction to air thermal resistance of the Le79R241 ISLIC device in a 32-pin PLCC package is 45° C/W and in a
32-pin QFN package is 25° C/W (measured under free air convection conditions and without external heat sinking).
5.2.1
Package Assembly
The standard (non-green) package devices are assembled with industry-standard mold compounds, and the leads
possess a tin/lead (Sn/Pb) plating. These packages are compatible with conventional SnPb eutectic solder board
assembly processes. The peak soldering temperature should not exceed 225°C during printed circuit board
assembly.
Green package devices are assembled with enhanced, environmental compatible lead-free, halogen-free, and
antimony-free materials. The leads possess a matte-tin plating which is compatible with conventional board
assembly processes or newer lead-free board assembly processes. The peak soldering temperature should not
exceed 245°C during printed circuit board assembly.
Refer to IPC/JEDEC J-Std-020B Table 5-2 for the recommended solder reflow temperature profile.
5.3
Operating Ranges
Zarlink guarantees the performance of this device over commercial (0ºC to 70ºC) and industrial (-40ºC to 85ºC)
temperature ranges by conducting electrical characterization over each range and by conducting a production test
with single insertion coupled to periodic sampling. These characterization and test procedures comply with section
4.6.2 of Bellcore GR-357-CORE Component Reliability Assurance Requirements for Telecommunications
Equipment.
5.3.1
Environmental Ranges
0 to 70° C Commercial
Ambient Temperature
–40 to +85 ° C extended temperature
Ambient Relative Humidity
5.3.2
15 to 85%
Electrical Ranges
VCC
5 V ± 5%
VBL
–15 V to VBH
VBH
–42.5 to –99V
BGND with respect to GND
–100 to +100 mV
Load resistance on VTX to VREF
20 k minimum
Load resistance on VSAB to VREF
20 k minimum
15
Zarlink Semiconductor Inc.
Le79R241
6.0
Specifications
6.1
Power Dissipation
Data Sheet
Loop resistance = 0 to unless otherwise noted (not including fuse resistors), 2 x 50 fuse resistors, BATL =
–36 V, BATH = –90 V, VCC = +5 V. For power dissipation measurements, DC-feed conditions are as follows:
•
ILA (Active mode current limit) = 25 mA (IRSN = 50 µA)
•
RFD (Feed resistance) = 500
•
VAS (Anti-sat activate voltage) = 10 V
•
VAPP (Apparent Battery Voltage) = 48 V
•
RMGLi = RMGPi (Thermal management resistors) = 1 k
Description
Power Dissipation
Normal Polarity
Typ.
Max.
On-Hook Disconnect
Test Conditions
55
70
On-Hook Standby
80
100
On-Hook Transmission Le79R241 ISLIC device
Fixed Longitudinal Voltage
175
215
On-Hook Active High Battery Le79R241 ISLIC
device
340
400
Off-Hook Active Low Battery Le79R241 ISLIC
device
RL = 294
TMG
700
200
800
On-Hook Disconnect
On-Hook Standby
Power Supply Currents
On-Hook Transmission
Fixed Longitudinal Voltage
On-Hook Active High Battery
Off-Hook Active Low Battery
RL = 294
Min.
mW
VBH
VBL
VCC
0.4
0.1
3.0
0.7
VBH
VBL
VCC
0.75
0
3.1
1.1
VBH
VBL
VCC
1.85
0
5
2.5
VBH
VBL
VCC
3.6
0
7.3
4.5
VBH
VBL
VCC
0.9
26.9
7.5
2.0
16
Zarlink Semiconductor Inc.
Unit
3.5
3.5
mA
6
8.0
10
Le79R241
6.2
Data Sheet
DC Specifications
30 k Ω
Unless otherwise specified, test conditions are: VCC = 5 V, RMGPi = RMGLi = 1 k, BATH =
–90 V, BATL = –36 V, RRX = 150 k, RL = 600 , RSA = RSB = 200 k, RFA = RFB = 50 ,
CHP = 22 nF, CAD = CBD = 22 nF, IRSN = 50 A, Active low battery. DC-feed conditions are
normally set by the 790 series codec. When the Le79R241 ISLIC device is tested by itself, its
operating conditions must be simulated as if it were connected to an ideal 790 series codec.
30 k Ω
RT Network
390 pf
VREF
No.
1
Item
Two-wire loop voltage
(including offset)
Condition
Standby mode, open circuit,
|VBH| < 55 V
|VBH| > 55 V
GND VB
Any Active mode (does not
include OHT),
RL = 600 , IRSN = 50 µA
OHT mode, RL = 2200
IRSN = 20 µA
Min.
Typ.
Max.
Unit
Note
VBH – 8
48
13.88
VBH–7
51
15
VBH–6
55.5
55.5
16.13
V
2.
19.8
22
2.
Feed resistance per leg
at pins AD & BD
Standby mode
130
250
375
ohm
s
Feed current limit
Feed current
Standby mode, RL = 600
18
34
45
mA
IMT current
Standby mode, RL = 2200
44.6
56
ILG current
Standby mode
A to VBH
B to Ground
Ternary input voltage
boundaries for LD pin.
Mid-level input source
must be Vref.
Low boundary
Mid boundary
High boundary
Input high current
Input low current
Mid-level current
5
Logic Inputs P1, P2, P3
Input high voltage
Input low voltage
Input high current
Input low current
6
VTX output offset
7
VREF input current
VREF = 1.4 V
8
CREF input current
CREF = 3.3 V
2
3
4
µA
28
28
VREF–0.
3
CREF – 1
VREF
0.6
VREF+0.
3
108
47
51
2.0
-20
-20
0
0
0.8
20
20
–50
0
+50
50
V
V
V
µA
µA
µA
V
V
µA
µA
mV
2.
2.
2.
µA
2.
2.
-3
0
3
µA
0.0088
0.0097
0.0106
V/V
2.8
CREF – 0.3 V
CREF
V
ß, DC Ratio of VSAB to
loop voltage:
9
V SAB
= --------------------------V SA – V SB
Tj < 145°C, VSA – VSB = 22 V
10
Fault Indicator
Threshold
11
Gain from VLB pin to A
or B pin, KLG
12
VLB pin input current
VLB = VREF ± 1 V
13
ILOOP/IMT
ILOOP = 10 mA
14
ILONG/ILG
ILONG = 10 mA
Voltage Output on IMT
30
V/V
0
100
µA
283
308
333
A/A
575
615
655
A/A
17
Zarlink Semiconductor Inc.
2.
2.
Le79R241
No.
6.3
Item
Condition
Data Sheet
Min.
Typ.
Max.
Unit
Note
1.0
3.0
µA
2.
462.5
500
537.5
15
Input current, SA and
SB pins
Active modes
16
K1
Incremental DC current gain
17
ISA/IMT
Disconnect ISA = 2 mA
4
6
8.75
18
ISB/ILG
Disconnect ISB = 2 mA
10
12
16
19
VSAB output offset
20
IMT output offset
–3
0
3
µA
21
ILG output offset
–1
0
1
µA
–40°C
+25°C
+85°C
2.
A/A
7.0
3.6
1.4
mV
Relay Driver Specifications
Item
Condition
On Voltage
Min.
Typ.
25 mA/relay sink
0.4
0.5
40 mA/ relay sink
0.8
1.0
0
100
R2,R3 = BGND
R2,R3 Off Leakage
Max.
RYE = VBH
Zener Break Over
Iz = 100 A
6.6
7.9
10
Zener On Voltage
Iz = 30 mA
6
11
17
R3
R2
RYE
A. Relay Driver Configuration
R1
BGND
B. Ring Relay
Figure 6 - Relay Drivers
18
Zarlink Semiconductor Inc.
Unit
Note
V
2
µA
V
Le79R241
6.4
Data Sheet
Transmission Specifications
No.
Item
Condition
Min.
1
RSN input impedance
f = 300 to 3400 Hz
2
VTX output impedance
3
Max, AC + DC loop current
Active High Battery or Active Low
Battery
4
Longitudinal impedance,
A or B to GND
Active mode
5
2-4 wire gain
–10 dBm, 1 kHz, 0 to 70°C
TA = –40°C to 85°C
–14.13
–14.18
6
2-4 wire gain variation with
frequency
300 to 3400 Hz, relative to 1 kHz
TA = –40°C to 85°C
7
2-4 wire gain tracking
+3 dBm to –55 dBm
Reference: –10 dBm
TA = –40 to 85°C
Typ.
Max.
1
Unit
Note
2
3
70
mA
2
70
135
–13.98
–13.98
–13.83
–13.78
2
–0.1
–0.15
+0.1
+0.15
2
–0.1
+0.1
–0.15
+0.15
TA = –40°C to 85°C
–0.15
–0.2
+0.15
+0.2
2,5
dB
–10 dBm, 1 kHz
8
4-2 wire gain
9
4-2 wire gain variation with
frequency
300 to 3400 Hz, relative to 1 kHz
–0.1
+0.1
10
4-2 wire gain tracking
+3 dBm to –55 dBm
Reference: –10 dBm
–40°C to 85°C
–0.1
–0.15
+0.1
+0.15
Total harmonic distortion
level
2-wire
11
4-wire
4-wire overload level at VTX
OHT
Idle channel noise
C-message
12
Weighted
Psophometric
300 Hz to 3400 Hz
0 dBm
11.2 dBm
–12 dBm
–0.8 dBm
RLOAD = 600
VAB - 50 V 0 dBm
±1
–50
Active modes, RL = 600
2-wire
4-wire
2-wire
4-wire
+9
–5
–81
–95
–50
–40
–48
–38
2
2,5
dB
dB
dB
dB
Vp
dB
+11
dBrnC
–79
dBmp
—
3
3
Weighted
13
Longitudinal balance
(IEEE method)
Normal Polarity
L - T 200 to 1000 Hz
TA = –40°C to 85°C
1000 to 3400 Hz
TA = –40°C to 85°C
58
53
53
48
T - L 200 to 3400 Hz
40
L - T, IL = 0 50 to 3400 Hz
3
2
63
dB
3
Reverse Polarity
L-T
200 to 1000 Hz
TA = –40°C to 85°C
50
48
14
PSRR (VBH, VBL)
50 to 3400 Hz
3.4 to 50 kHz
25
45
40
3,4,1,
2,4
15
PSRR (VCC)
50 to 3400 Hz
3.4 to 50 kHz
25
45
35
3,4,1,
2,4
16
Longitudinal AC current per
wire
F = 15 to 60 Hz Active mode
20
30
19
Zarlink Semiconductor Inc.
2
mArms
2
Le79R241
No.
17
6.5
Item
Data Sheet
Condition
Min.
Freq = 12 kHz 2.8 Vrms
Freq = 16 kHz
metering load = 200
Metering distortion
Typ.
Max.
40
Unit
Note
dB
2
Ringing Specifications
Item
Condition
Peak Ringing Voltage
6.6
Min.
Active Internal Ringing
Typ.
Max.
VBH+6
Unit
Note
V
7
Current-Limit Behavior
SLIC Mode
Min.
Typ.
Max.
Unit
Note
1
VBH/200 k
100
µA
A
6
Disconnect
Applied fault between ground and T/R
VBH applied to Tip or Ring
Tip Open
Ring Short to GND
20
35
46
Short Tip-to-VBH
24
26
38
47
35
44
Standby
Active Ringing
6.7
Condition
Short Ring-to-GND
790 series codec generating internal ringing
mA
100
2
Thermal Shutdown Fault Indications
Fault
Indication
No Fault
IMT operates normally (VREF ±1 V)
Thermal Shutdown
KG, IMT above 2.8 V; ILG operates normally
Note:
1.
These tests are performed with the following load impedances:
Frequency < 12 kHz – Longitudinal impedance = 500 ; metallic impedance = 300
Frequency > 12 kHz – Longitudinal impedance = 90 ; metallic impedance = 135
2.
Not tested or partially tested in production. This parameter is guaranteed by characterization or correlation to other tests.
3.
This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
4.
When the Le79R241 ISLIC device and 790 series codec is in the anti-sat operating region, this parameter is degraded. The exact
degradation depends on system design.
5.
–55 dBm gain tracking level not tested in production. This parameter is guaranteed by characterization and correlation to other tests.
6.
This spec is valid from 0 V to VBL or –50 V, whichever is lower in magnitude.
7.
Other ringing-voltage characteristics are set by the 790 series codec.
20
Zarlink Semiconductor Inc.
Le79R241
7.0
Data Sheet
Operating Modes
The Le79R241 ISLIC device receives multiplexed control data on the P1, P2 and P3 pins. The LD pin then controls
the loading of P1, P2, and P3 values into the proper bits in the Le79R241 ISLIC device control register. When the
LD pin is less than 0.3 V below VREF (< (VREF – 0.3 V)), P1–P3 must contain data for relay control bits RD1, RD2
and RD3. These are latched into the first three bits in the Le79R241 ISLIC device control register. When the LD pin
is more than 0.3 V above VREF, P1–P3 must contain Le79R241 ISLIC device control data C1, C2, and C3, which
are latched into the last three bits of the Le79R241 ISLIC device control register. Connecting the LD pin to VREF
locks the contents of the Le79R241 ISLIC device control register.
The operating mode of the Le79R241 ISLIC device is determined by the C1, C2, and C3 bits in the control register
of the Le79R241 ISLIC device. Table 1 defines the Le79R241 ISLIC device operating modes set by these signals.
Under normal operating conditions, the Le79R241 ISLIC device does not have active relays. The Le79R241 ISLIC
device to VE790 series ISLAC device interface is designed to allow continuous real-time control of the relay drivers
to avoid incorrect data loads to the relay bit latches of the Le79R241 devices.
To perform external ringing, the VE790 series ISLAC device is set to external ringing mode (RMODE = 1), enables
the ring relay, and puts the Le79R241 ISLIC device in the Standby mode.
Operating Mode
Battery Voltage
Selection
Operating Mode
C3
C2
C1
0
0
0
Standby (See note 1)
High Battery
(BATH) and BGND
(High ohmic feed): Loop supervision
active, A and B amplifiers shut down
Open
0
0
1
Tip Open (See note 1)
High Battery
(BATH) and BGND
Tip Open: AD at High-Impedance,
Channel A power amplifier shut down
Open
0
1
0
On-Hook
Transmission, Fixed
Longitudinal Voltage
High Battery
(BATH) and BGND
Fixed longitudinal voltage of –28 V
0
1
1
Disconnect
Low Battery
selection at VBL
AD and BD at High-Impedance, Channel A
and B power amplifiers shut down
1
0
0
RSVD
1
0
1
Active High Battery
High Battery
(BATH) and BGND
1
1
0
Active Low Battery
Low Battery (BATL)
and BGND
1
1
1
Active Internal Ringing
High Battery
(BATH) and BGND
A and B Amplifier
Output
Active feed, normal or reverse polarity
Active Internal Ringing
Table 1 - Operating Modes
Note:
1.
Connection to
RMGPi & RMGLi
Resistors
In these modes, the ring lead (B-lead) output has a –50 V internal clamp to battery ground (BGND).
21
Zarlink Semiconductor Inc.
Le79R241
7.1
Operating Mode Descriptions
Operating Mode
7.2
Data Sheet
Description
Disconnect
This mode disconnects both A and B output amplifiers from the AD and BD outputs. The A and B
amplifiers are shut down and the Le79R241 ISLIC device selects the low battery voltage at the VBL pin.
In the Disconnect state, the currents on IMT and ILG represent the voltages on the SA and SB pins,
respectively. These currents are scaled to produce voltages across RMTi and RLGi of
V SA
V SB
------------ and ------------ , respectively.
400
400
Standby
The power amplifiers are turned off. The AD output is driven by an internal 250 (typical) resistor,
which connects to ground. The BD output is driven by an internal 250 (typical) resistor, which
connects to the high battery (BATH) at the VBH pin, through a clamp circuit, which clamps to
approximately –50 V with respect to BGND. For VBH values above –55 V, the open-circuit voltage,
which appears at this output is ~VBH + 7 V. If VBH is below –55 V, the voltage at this output is –50 V.
The battery selection for the balance of the circuitry on the chip is VBL. Line supervision remains active.
Current limiting is provided on each line to limit power dissipation under short-loop conditions as
specified in “Current-Limit Behavior” on page 20. In external ringing, the Standby Le79R241 ISLIC
device state is selected.
Tip Open
In this mode, the AD (Tip) lead is opened and the BD (Ring) lead is connected to a clamp, which
operates from the high battery on VBH pin and clamps to approximately –50 V with respect to BGND
through a resistor of approximately 250 (typical). The battery selection for the balance of the circuitry
on the chip is VBL.
Active High Battery
In the Active High Battery mode, battery connections are connected as shown in Table 1. Both output
amplifiers deliver the full power level determined by the programmed DC-feed conditions. Active High
Battery mode is enabled during a call in applications when a long loop can be encountered.
Active Low Battery
Both output amplifiers deliver the full power level determined by the programmed DC-feed conditions.
VBL, the low negative battery, is selected in the Active Low Battery mode. This is typically used during
the voice part of a call.
Active Internal Ringing
In the Internal Ringing mode, the Le79R241 ISLIC device selects the battery connections as shown in
Table 1. When using internal ringing, both the AD and BD output amplifiers deliver the ringing signal
determined by the programmed ringing level.
On-Hook Transmission
(OHT), Fixed Longitudinal
Voltage
In the On-Hook Transmission, Fixed Longitudinal Voltage mode, battery connections are as shown in
Table 1. The longitudinal voltage is fixed at the voltage shown in Table 1 to allow compliance with safety
specifications for some classes of products.
Driver Descriptions
Driver
Description
R1
A logic 1 on RD1 turns the R1 driver on and operates a relay connected between the R1 pin and VCCD. R1
drives the ring relay when external ringing is selected.
R2
A logic 1 on the RD2 signal turns the R2 driver on and routes current from the R2 pin to the RYE pin. In the
option where the RYE pin is connected to ground, the R2 pin can sink current from a relay connected to
VCCD.
Another option is to connect the RYE pin to the BD (Ring) lead and connect a test load between R2 and the
AD (Tip) lead. This technique avoids the use of a relay to connect a test load. However, it does not isolate
the subscriber line from the line card. The test load must be connected to the Le79R241 ISLIC device side
of the protection resistor to avoid damage to the R2 driver.
R3
A logic 1 on the RD3 signal turns the R3 driver on and routes current from the R3 pin to the RYE pin. In the
option where the RYE pin is connected to ground, the R3 pin can sink current from a relay connected to
VCCD.
Another option is to connect the RYE pin to the B (Ring) lead and connect a test load between R3 and the A
(Tip) lead. This technique avoids the use of a relay to connect a test load. However, it does not isolate the
subscriber line from the line card. The test load must be connected to the Le79R241 ISLIC device side of the
protection resistor to avoid damage to the R3 driver.
Control bits RD1, RD2, and RD3 do not affect the operating mode of the Le79R241 ISLIC device. These signals
usually perform the following functions.
22
Zarlink Semiconductor Inc.
Le79R241
7.3
Data Sheet
Thermal-Management Equations
Applies to all modes except Standby and Ringing, which has no thermal management..
Equation
Description
IL < 5 mA
TMG resistor-current is limited to be 5 mA < IL. If IL < 5
mA, no current flows in the TMG resistor and it all flows in
the Am79241.
PSLIC = (SBAT – IL(RL + 2RFUSE)) • IL + 0.3 W
PTRTMG = 0
IL > 5 mA
These equations are valid when
RTMG • (IL – 5 mA) < (SBAT – (RF + RL)IL) / 2 – 2
because the longitudinal voltage is one-half the battery
voltage and the TMG switches require approximately 2 V.
RMGPi = RMGLi = RTMG
PTRTMG: total power dissipation of RMGPi and RMGLi
RTMG = (SBAT – IL(RL + 2RFUSE)) / (2(IL – 5 mA))
To choose a power rating for RTMG:
PRATING > PTRTMG / 2
PSLIC = IL(SBAT – IL(RL + 2RFUSE)) + 0.3 W – PTRTMG
PTRTMG = (IL – 5
8.0
mA)2(2RTMG)
Timing Specifications
Symbol
Signal
Parameter
Min.
Typ.
Max.
trSLD
LD
Rise time Le79R241 ISLIC device LD
pin
2
tfSLD
LD
Fall time Le79R241 ISLIC device LD
pin
2
tSLDPW
LD
LD minimum pulse width
tSDXSU
P1,P2,P3
P1–3 data Setup time
4.5
tSDXHD
P1,P2,P3
P1–3 data hold time
4.5
tSDXD
P1,P2,P3
Max P1–3 data delay
Unit
µs
3
5
Note:
1.
The P1–3 pins are updated continuously during operation by the LD signal.
2.
After a power-on reset or hardware reset, the relay outputs from the Le79R241 ISLIC device turn all relays off. An unassuming state is to
place the relay control pins, which are level triggered, to a reset state for all relays. Any noise encountered only raises the levels toward the
register lock state.
3.
When writing to the Le79R241 ISLIC device registers, the sequence is:
a)
Set LD pin to mid-state
b)
Place appropriate data on the P1–3 pins
c)
Assert the LD pin to High or Low to write the proper data
d)
Return LD pin to mid-state
4.
Le79R241 ISLIC device registers are refreshed at 5.33 kHz when used with a 790 series codec.
5.
If the clock or MPI becomes disabled, the LD pins and P1–3 returns to 0 V state, thus protecting the Le79R241 ISLIC device and the line
connection.
6.
Not tested in production. Guaranteed by characterization.
23
Zarlink Semiconductor Inc.
Le79R241
9.0
Data Sheet
Waveforms
187.5 usec
LD
P1,P2,P3
S
R
S
R
S
Write State Register
VCC
VREF
LD
Lock Registers
0V
P1,P2,P3
R
Write Relay Register
Previous
Relay Data
State Data
Relay Data
New State
Data
DETAIL A
VREF
LD
Write State Register
trSLD
tfSLD
VREF
Write Relay Register
tSLDPW
tSDXHD
tSDXSU
P1,P2,P3
Relay driver
response
tSDXD
24
Zarlink Semiconductor Inc.
Le79R241
10.0
Application Circuit
10.1
Internal Ringing Line Schematic
+5V
3.3V
VCC
RSAi
Data Sheet
CREF
RRXi
SA
VOUTi
RSN
DGND
RHLai
RFAi
A
CHLbi
AD
RHLbi
VHLi
U3
RHLci
U5
RTi
RHLdi
CHLdi
AGND
VREF
CADi
VCCA
VSAB
CHPi
BATH
CS1
CS2
U4
U6
VSABi
VCC
+3.3VDC
VCCD
HPA
BATP
DT1i
VTX
HPB
RFBi
B
BD
VINi
U1
Le79R241
or
Le79R251
U2
Le79228x
codec
VLB
VLBi
IMT
VIMTi
RSBi
SB
CBDi
TMS
RMTi
RTEST
VREF
RMGPi
VILGi
ILG
BACK
PLANE
DT2i
TMP
RLGi
TMN
VREF
RMGLi
DHi
VREF
VBH
BATH
VREF
CBATHi
DLi
DLHi
VBL
BATL
LD
CBATLi
P1
SPB
BATP
RSPB
P1
SLB
BATL
RSLB
P2
P2
P3
P3
CBATPi
BATP
LDi
GND
SHB
BATH
RSHB
VBP
RYE
IREF
R2
RREF
R3
R1
BGND
RSVD
* Connections shown for one channel
25
Zarlink Semiconductor Inc.
XSBi
XSC
Le79R241
11.0
Data Sheet
Line Card Parts List - Internal Ringing
The following list defines the parts and part values required to meet target specification limits for channel i of the line
card (i = 1, 2, 3, 4).
Item
Type
Value
Tol.
Rating
Comments
U1
Le79R241 ISLIC
device
-
U2
VE790 series ISLAC
device
-
U3, U4, U5, U6
B1100CC
-
100 V
DT1i, DT2i
Diode
1A
-
100 V
DHi1, DLi, DT1i, DT2i, DLHi
Diode
100 mA
-
100 V
RFAi, RFBi
Resistor
50
2%
2W
RSAi, RSBi
Resistor
200 k
2%
1/4 W
Sense resistors
RTi
Resistor
80.6 k
1%
1/8 W
Impedance control resistor
RRXi
Resistor
90.9 k
1%
1/8 W
Receive path gain resistor
RREF
Resistor
69.8 k
1%
1/8 W
Current reference setting resistor
RSHB, RSLB, RSPB
Resistor
750 k
1%
1/8 W
Battery sense resistors
RHLai
Resistor
40.2 k
1%
1/10 W
Feed/metering resistor
RHLbi
Resistor
4.32 k
1%
1/10 W
Feed/metering resistor
RHLci
Resistor
2.87 k
1%
1/10 W
Feed/metering resistor
RHLdi
Resistor
2.87 k
1%
1/10 W
Feed/metering resistor
CHLbi
Capacitor
3.3 nF
10%
10 V
Feed/metering capacitor - Not Polarized
CHLdi
Capacitor
0.82 F
10%
10 V
Feed/metering capacitor -Ceramic
RMTi
Resistor
3.01 k
1%
1/8 W
Metallic loop current gain resistor
RLGi
Resistor
6.04 k
1%
1/8 W
Longitudinal loop current gain resistor
RTEST
Resistor
2 k
1%
1W
CADi, CBDi2
Capacitor
22 nF
10%
100 V
Ceramic
CBATHi, CBATLi, CBATPi
Capacitor
100 nF
20%
100 V
Ceramic
CHPi
Capacitor
22 nF
20%
100 V
High pass filter capacitor - Ceramic
CS1i, CS2i2
Capacitor
100 nF
20%
100 V
Protector speed up capacitor
RMGLi
Resistor
1 k
5%
2W
Thermal management resistor
RMGPi
Resistor
1 k
5%
2W
Thermal management resistor
codec
Notes:
1.
Required to insure VBH < VBL during startup. May not be needed for some supplies.
2.
DT2i is optional - Should be put if Le79R251 is used.
3.
Value can be adjusted to suit application.
26
Zarlink Semiconductor Inc.
TECCOR Battrax protector
50 ns response time
Fusible or PTC protection resistors
Test board
Le79R241
11.1
Data Sheet
External Ringing Line Schematic
RSAi
+5 V
3.3 V
VCC
SA
CREF
RRXi
RSN
VOUTi
DGND
RHLai
RFAi
A
1
8
RHLbi
CHLbi
AD
KRi(A)
AGND
VHLi
CADi
6
7
RHLci
RTi
U5
RHLdi
CHLdi
VREF
VCCA
VSAB
2
CHPi
CS
RFBi
B
KRi (B)
VTX
4
5
VCC
+3.3 VDC
VCCD
VINi
U1
Le79231,
Le79R241
HPB
or
Le79R251
DT1i
BATH
HPA
VSABi
U2
Le79Q224x
or Le79228x
codec
VLB
VLBi
IMT
VIMTi
CBDi
BD
RSBi
RMTi
SB
RTEST
TMS
VREF
VILGi
ILG
U2
ISLAC
RMGPi
DT2i***
RLGi
BACK
PLANE
TMP
VREF
TMN
VREF
VREF
RMGLi
DHi
BATH
CBATHi
LD
VBH
LDi
GND
DLHi
BATL
VBL
DLi
CBATLi
P1
P1
P2
P2
P3
P3
SPB
SLB
BATL
RSLB
RSVD2
RYE
SHB
IREF
R2H
RREF
R3H
R1
RGFDi
KRi
BGND
BATH
RSHB
VBP
RSVD
+5 V
*Connections shown for one channel
**DT2i is optional - Should be put if Le79R251 is used.
Ring Bus
RSRBi
RSRC
27
Zarlink Semiconductor Inc.
XSBi
XSC
Le79R241
12.0
Data Sheet
Line card Parts List - External Ringing
The following list defines the parts and part values required to meet target specification limits for channel i of the line card (i = 1,
2, 3, 4).
Item
Type
Value
Tol.
Rating
Comments
U1
Le79R241 ISLIC device
U2
VE790 series ISLAC
device
U5
TISP61089
DLHi1, DHi, DLi, DT1i DT2i2
Diode
RFAi, RFBi
Resistor
50
2%
2W
RSAi, RSBi
Resistor
200 k
2%
1/4 W
Sense resistors
RTi
Resistor
80.6 k
1%
1/8 W
Impedance control resistor
RRXi
Resistor
90.9 k
1%
1/8 W
Receive path gain resistor
RREF
Resistor
69.8 k
1%
1/8 W
Current reference setting resistor
RMGLi, RMGPi
Resistor
1 k
5%
1W
RSHB, RSLB
Resistor
750 k
1%
1/8 W
Battery Sense Resistors
RHLai
Resistor
40.2 k
1%
1/10 W
Feed/Metering resistor
RHLbi
Resistor
4.32 k
1%
1/10 W
Feed/Metering resistor
RHLci
Resistor
2.49 k
1%
1/10 W
Use 2.87kin metering
Feed/Metering resistor
RHLdi
Resistor
2.49 k
1%
1/10 W
Use 2.87kin metering
Feed/Metering resistor
CHLbi
Capacitor
3.3 nF
10%
10 V
Feed/Metering capacitor - Not Polarized
CHLdi
Capacitor
0.82 µF
10%
10 V
Feed/Metering capacitor - Ceramic
RMTi
Resistor
3.01 k
1%
1/8 W
Metallic Current Sense Resistors
RLGi
Resistor
6.04 k
1%
1/8 W
Longitudinal Current Sense Resistors
Resistor
2 k
1%
1W
Capacitor
22 nF
10%
100 V
Ceramic
CBATHi, CBATLi
Capacitor
100 nF
20%
100 V
Ceramic
CHPi
Capacitor
22 nF
20%
100 V
Ceramic
CSi3
Capacitor
100 nF
20%
100 V
Protector speed up capacitor
RGFDi
Resistor
510
2%
2W
RSRBi, RSRC
Resistor
750 k
1%
1/4 W
KRi
Relay
5 V Coil
RTEST
CADi, CBDi
3
codec
100 mA
80 V
Transient Voltage Suppressor, Power
Innovations
100 V
50 ns response time
Notes:
1.
Required to insure VBH < VBL during startup. May not be needed for some supplies.
2.
DT2i is optional - Should be put if Le79R251 is used.
3.
Value can be adjusted to suit application.
28
Zarlink Semiconductor Inc.
Fusible or PTC protection resistors
Thermal management resistors
Test board
1.2 W typ
External Ringing sense resistors
DPDT
Le79R241
13.0
Physical Dimensions
13.1
32-Pin PLCC
Data Sheet
NOTES:
32-Pin PLCC
JEDEC # MS-016
Min
Nom
Symbol
A
0.125
-A1
0.075
0.090
D
0.485
0.490
D1
0.447
0.450
0.205 REF
D2
E
0.585
0.590
E1
0.547
0.550
E2
0.255 REF
Ө
0 deg
--
1
Dimensioning and tolerancing conform to ASME Y14,5M-1994.
2
To be measured at seating plan - C - contact point.
3
Dimensions “D1” and “E1” do not include mold protrusion.
Allowable mold protrusion is 0.010 inch per side. Dimensions
“D” and “E” include mold mismatch and determined at the
parting line; that is “D1” and “E1” are measured at the extreme
material condition at the upper or lower parting line.
0.595
0.553
4
Exact shape of this feature is optional.
10 deg
5
Details of pin 1 identifier are optional but must be located
within the zone indicated.
6
Sum of DAM bar protrusions to be 0.007 max per lead.
7
Controlling dimension : Inch.
8
Reference document : JEDEC MS-016
Max
0.140
0.095
0.495
0.453
32-Pin PLCC
Note:
Packages may have mold tooling markings on the surface. These markings have no impact on the form, fit or function of the
device. Markings will vary with the mold tool used in manufacturing.
29
Zarlink Semiconductor Inc.
Le79R241
13.2
Data Sheet
32-Pin QFN
Symbol
A
A2
b
D
D2
E
E2
e
L
N
A1
A3
aaa
bbb
ccc
Min
0.80
0.18
5.70
5.70
0.43
0.00
32 LEAD QFN
Nom
0.90
0.57 REF
0.23
8.00 BSC
5.80
8.00 BSC
5.80
0.80 BSC
0.53
32
0.02
0.20 REF
0.20
0.10
0.10
Max
1.00
0.28
5.90
5.90
0.63
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5M-1994.
2. All dimensions are in millimeters.
is in degrees.
3. N is the total number of terminals.
4. The Terminal #1 identifier and terminal numbering convention
shall conform to JEP 95-1 and SSP-012. Details of the Terminal #1
identifier are optional, but must be located within the zone
indicated. The Terminal #1 identifier may be either a mold or
marked feature.
5. Coplanarity applies to the exposed pad as well as the terminals.
6. Reference Document: JEDEC MO-220.
7. Lead width deviates from the JEDEC MO-220 standard.
0.05
32-Pin QFN
Note:
Packages may have mold tooling markings on the surface. These markings have no impact on the form, fit or function of the device. Markings will vary with the mold tool used in manufacturing.
30
Zarlink Semiconductor Inc.
Le79R241
Data Sheet
For more information about all Zarlink products
visit our Web Site at
www.zarlink.com
Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable.
However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such
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This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part
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information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the
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suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does
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conforms to the I2C Standard Specification as defined by Philips.
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