MCP1802T-1802I/OT

MCP1802 300 mA, High PSRR, Low Quiescent Current LDO Features: Description: • • • • • • The MCP1802 is a family of CMOS low dropout (LDO) voltage regulators that can deliver up to 300 mA of current while consuming only 25 µA of quiescent current (typical). The input operating range is specified from 2.0V to 10.0V, making it an ideal choice for two to six primary cell battery-powered applications, 9V alkaline and one or two cell Li-Ion-powered applications. • • • • • 300 mA Maximum Output Current Low Dropout Voltage, 200 mV typical @ 100 mA 25 µA Typical Quiescent Current 0.01 µA Typical Shutdown Current Input Operating Voltage Range: 2.0V to10.0V Standard Output Voltage Options: - (0.9V, 1.8V, 2.5V, 3.0V, 3.3V, 5.0V, 6.0V) Output voltage accuracy: - ±2% (VR > 1.5V), ±30 mV (VR  1.5V) Stable with Ceramic output capacitors Current Limit Protection Shutdown pin High PSRR: 70 dB typical @ 10 kHz Applications: • • • • • • • • • • • • • • Battery-powered Devices Battery-powered Alarm Circuits Smoke Detectors CO2 Detectors Pagers and Cellular Phones Wireless Communications Equipment Smart Battery Packs Low Quiescent Current Voltage Reference PDAs Digital Cameras Microcontroller Power Solar-Powered Instruments Consumer Products Battery Powered Data Loggers Related Literature: • AN765, “Using Microchip’s Micropower LDOs”, DS00765, Microchip Technology Inc., 2002 • AN766, “Pin-Compatible CMOS Upgrades to BiPolar LDOs”, DS00766, Microchip Technology Inc., 2002 • AN792, “A Method to Determine How Much Power a SOT23 Can Dissipate in an Application”, DS00792, Microchip Technology Inc., 2001  2010 Microchip Technology Inc. The MCP1802 is capable of delivering 100 mA with only 200 mV (typical) of input to output voltage differential (VOUT = 3.0V). The output voltage tolerance of the MCP1802 at +25°C is typically ±0.4% with a maximum of ±2%. Line regulation is ±0.01% typical at +25°C. The LDO output is stable with a minimum of 1 µF of output capacitance. Ceramic, tantalum or aluminum electrolytic capacitors can all be used for input and output. Overcurrent limit with current foldback provides short-circuit protection. A shutdown (SHDN) function allows the output to be enabled or disabled. When disabled, the MCP1802 draws only 0.01 µA of current (typical). The MCP1802 is available in a SOT-23-5 package. Package Types SOT-23-5 NC VOUT 5 1 VIN 4 2 3 VSS SHDN DS22053C-page 1 MCP1802 Functional Block Diagram MCP1802 +VIN VOUT VIN SHDN +VIN Shutdown Control Voltage Reference + Current Limiter Error Amplifier GND Typical Application Circuit MCP1802 VIN 1 VIN VOUT 5 3.3V @ 40 mA COUT mA 1 µF Ceramic SOT-23-5 9V Battery 2 GND 3 SHDN NC VOUT + CIN 4 1 µF Ceramic DS22053C-page 2  2010 Microchip Technology Inc. MCP1802 1.0 ELECTRICAL CHARACTERISTICS † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings † Input Voltage ................................................................. +12V Output Current (Continuous) ..................... PD/(VIN-VOUT)mA Output Current (Peak) ............................................... 500 mA Output Voltage ............................... (VSS-0.3V) to (VIN+0.3V) SHDN Voltage ..................................(VSS-0.3V) to (VIN+0.3V) Continuous Power Dissipation: 5-Pin SOT-23-5 .................................................... 250 mW ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 1.0V, Note 1, COUT = 1 µF (X7R), CIN = 1 µF (X7R), VSHDN = VIN, TA = +25°C Parameters Sym Min Typ Max Input Operating Voltage VIN Input Quiescent Current Iq Units Conditions 2.0 — 10.0 V — 25 50 µA IL = 0 mA Input / Output Characteristics ISHDN — 0.01 0.10 µA SHDN = 0V IOUT_mA 300 300 260 260 — — — — — — — — mA VR  2V, VIN = VR +1.0V 1.5V VR  2.0V, VIN=3.0V 1.0V VR  1.5V, VIN = VR +1.5V 0.9V VR  1.0V, VIN=2.5V Shutdown Current Maximum Output Current Note 1 ILIMIT — 380 — mA if VR  1.75V, then VIN = VR + 2.0V IOUT_SC — 50 — mA if VR  1.75V, then VIN = VR + 2.0V VOUT VR-2.0% VR VR+2.0% V VR-30 mV VR VR+30 mV TCVOUT — 100 — ppm/°C Line Regulation VOUT/ (VOUTXVIN) -0.2 ±0.01 +0.2 %/V (VR + 1V) VIN 10V, Note 1 VR  1.75V, IOUT = 30 mA VR  1.75V, IOUT = 10 mA Load Regulation VOUT/VOUT — — 15 — 50 100 mV IL = 1.0 mA to 100 mA, Note 4 IL = 1.0 mA to 300 mA, VDROPOUT — 60 90 mV — 200 250 IL = 30 mA, 3.1V VR  6.0V IL = 100 mA, 3.1V VR  6.0V — 80 120 IL = 30 mA, 2.0V VR  3.1V — 240 350 — 2.07 - VR 2.10 - VR IL = 100 mA, 2.0V VR < 3.1V IL = 30 mA,VR  2.0V Current Limiter Output Short Circuit Current Output Voltage Regulation VOUT Temperature Coefficient Dropout Voltage, Note 5 Power Supply Ripple Rejection Ratio 3: 4: 5: V IOUT = 30 mA, -40°C TA  +85°C, Note 3 — 2.23 - VR 2.33 - VR PSRR — 70 — dB f = 10 kHz, IL = 50 mA, VINAC = 1V pk-pk, CIN = 0 µF, if VR  1.5V, then VIN = 2.5V eN — 0.46 — μV/√Hz IOUT = 100 mA, f = 1 kHz, COUT = 1 μF (X7R Ceramic), VOUT = 2.5V Output Noise Note 1: 2: VR  1.45V, IOUT = 30 mA, Note 2 VR  1.45V, IOUT = 30 mA IL = 100 mA, VR < 2.0V The minimum VIN must meet two conditions: VIN2.0V and VIN (VR + 1.0V). VR is the nominal regulator output voltage. For example: VR = 1.8V, 2.5V, 3.0V, 3.3V, or 5.0V. The input voltage VIN = VR + 1.0V or ViIN = 2.0V (whichever is greater); IOUT = 100 µA. TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * Temperature), VOUT-HIGH = highest voltage measured over the temperature range. VOUT-LOW = lowest voltage measured over the temperature range. Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output voltage due to heating effects are determined using thermal regulation specification TCVOUT. Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its measured value with an applied input voltage of VR + 1.0V or 2.0V, whichever is greater.  2010 Microchip Technology Inc. DS22053C-page 3 MCP1802 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 1.0V, Note 1, COUT = 1 µF (X7R), CIN = 1 µF (X7R), VSHDN = VIN, TA = +25°C Parameters Sym Min Typ Max Units Conditions Logic High Input VSHDN-HIGH 1.6 — — V — Logic Low Input VSHDN-LOW — — 0.25 V — Shutdown Input Note 1: 2: 3: 4: 5: The minimum VIN must meet two conditions: VIN2.0V and VIN (VR + 1.0V). VR is the nominal regulator output voltage. For example: VR = 1.8V, 2.5V, 3.0V, 3.3V, or 5.0V. The input voltage VIN = VR + 1.0V or ViIN = 2.0V (whichever is greater); IOUT = 100 µA. TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * Temperature), VOUT-HIGH = highest voltage measured over the temperature range. VOUT-LOW = lowest voltage measured over the temperature range. Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output voltage due to heating effects are determined using thermal regulation specification TCVOUT. Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its measured value with an applied input voltage of VR + 1.0V or 2.0V, whichever is greater. TEMPERATURE SPECIFICATIONS Parameters Sym Min Typ Max Units Conditions Temperature Ranges Operating Temperature Range Storage Temperature Range TA -40 — +85 °C Tstg -55 — +125 °C JA JC — — 256 81 — — °C/W Thermal Package Resistance Thermal Resistance, SOT-23-5 DS22053C-page 4 EIA/JEDEC JESD51-7 FR-4 0.063 4-Layer Board  2010 Microchip Technology Inc. MCP1802 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated: VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA, TA = +25°C, VIN = VR + 1.0V, SOT-23-5. Note: Junction Temperature (TJ) is approximated by soaking the device under test to an ambient temperature equal to the desired junction temperature. The test time is small enough such that the rise in Junction temperature over the Ambient temperature is not significant. 80 VOUT = 0.9V IOUT = 0 µA 25.00 +25°C 24.00 +90°C 23.00 22.00 21.00 0°C VOUT = 0.9V VIN = 2.0V 70 GND Current (µA) Quiescent Current (µA) 26.00 60 50 40 30 20 10 -45°C 20.00 0 2 4 6 8 10 0 30 60 Input Voltage (V) FIGURE 2-1: Voltage. +90°C 27.00 26.00 25.00 -45°C +25°C 24.00 4 5 7 Ground Current vs Load 80 0°C 6 70 VOUT = 3.3V VIN = 4.3V 60 40 30 20 8 9 10 0 25 50 +25°C 29.00 30.00 VOUT = 6.0V IOUT = 0 µA +90°C 28.00 27.00 0°C -45°C FIGURE 2-5: Current. Quiescent Current (µA) Quiescent Current (µA) 31.00 75 100 125 150 Load Current (mA) Quiescent Current vs. Input 30.00 VOUT = 6.0V VIN = 7.0V 50 Input Voltage (V) FIGURE 2-2: Voltage. 150 90 GND Current (µA) Quiescent Current (µA) FIGURE 2-4: Current. VOUT = 3.3V IOUT = 0 µA 28.00 120 Load Current (mA) Quiescent Current vs. Input 29.00 90 26.00 25.00 28.00 Ground Current vs Load VOUT = 6.0V VIN = 7.0V IOUT = 0mA 26.00 24.00 VOUT = 0.9V VIN = 2.0V VOUT = 3.3V VIN = 4.3V 22.00 20.00 7 7.5 8 8.5 9 9.5 10 Input Voltage (V) FIGURE 2-3: Voltage. Quiescent Current vs. Input  2010 Microchip Technology Inc. -45 -22.5 0 22.5 45 67.5 90 Junction Temperature (°C) FIGURE 2-6: Quiescent Current vs. Junction Temperature. DS22053C-page 5 MCP1802 Note: Unless otherwise indicated: VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA, TA = +25°C, VIN = VR + 1.0V, SOT-23-5. VOUT = 0.9V ILOAD = 1 mA 0.920 0.915 -45°C 0.910 0°C +25°C 0.905 0.900 0.920 0°C 0.915 Output Voltage (V) Output Voltage (V) 0.925 0.910 0.905 +25 0.900 -45°C 0.895 +90°C 0.890 0.885 +90°C 0.895 0.880 2 3 4 5 6 7 8 9 0 10 25 50 Output Voltage vs. Input 3.34 Output Voltage (V) VOUT = 3.3V ILOAD = 1 mA 0°C 3.33 FIGURE 2-10: Current. 3.32 3.31 +25°C -45°C 3.30 3.29 3.28 100 125 150 +90°C Output Voltage vs. Load 3.34 3.33 Output Voltage (V) FIGURE 2-7: Voltage. 75 Load Current (mA) Input Voltage (V) 3.27 -45°C 3.32 VIN = 4.3V VOUT = 3.3V 0°C 3.31 3.30 +25°C 3.29 3.28 +90°C 3.27 3.26 3.26 3.25 4 5 6 7 8 9 0 10 25 Output Voltage vs. Input 6.06 VOUT = 6.0V ILOAD = 1 mA 6.04 0°C 6.02 +25°C 6.00 -45°C 5.98 +90°C 5.96 5.94 FIGURE 2-11: Current. 75 100 125 150 Output Voltage vs. Load 6.06 6.04 Output Voltage (V) FIGURE 2-8: Voltage. 50 Load Current (mA) Input Voltage (V) Output Voltage (V) VIN = 2.0V VOUT = 0.9V VIN = 7.0V VOUT = 6.0V +25°C 0°C 6.02 -45°C 6.00 5.98 +90°C 5.96 5.94 5.92 7 7.5 8 8.5 9 9.5 10 0 Input Voltage (V) FIGURE 2-9: Voltage. DS22053C-page 6 Output Voltage vs. Input 25 50 75 100 125 150 Load Current (mA) FIGURE 2-12: Current. Output Voltage vs. Load  2010 Microchip Technology Inc. MCP1802 Note: Unless otherwise indicated: VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA, TA = +25°C, VIN = VR + 1.0V, SOT-23-5. Dropout Voltage (V) 0.30 VOUT = 3.3V 0.25 0.20 +90°C 0.15 +25°C 0.10 -45°C 0.05 +0°C 0.00 0 25 50 75 100 125 150 Load Current (mA) FIGURE 2-13: Current. FIGURE 2-16: Dynamic Line Response. 160 0.30 VOUT = 6.0V Short Circuit Current (mA) Dropout Voltage (V) Dropout Voltage vs. Load 0.25 0.20 +90°C +25°C 0.15 0.10 -45°C 0.05 +0°C 0.00 0 25 50 75 100 125 VOUT = 3.3V ROUT < 0.1Ω 140 120 100 80 60 40 20 0 0 150 1 2 3 FIGURE 2-14: Current. Dropout Voltage vs. Load 4 5 6 7 8 9 10 Input Voltage (V) Load Current (mA) FIGURE 2-17: Input Voltage. Short Circuit Current vs. Load Regulation (%) -1.40 VOUT = 0.9V IOUT = 0.1 mA to 150 mA -1.50 -1.60 VIN = 10V VIN = 8V VIN = 6V VIN = 4V -1.70 -1.80 VIN = 2V -1.90 -45 -22.5 0 22.5 45 67.5 90 Temperature (°C) FIGURE 2-15: Dynamic Line Response.  2010 Microchip Technology Inc. FIGURE 2-18: Temperature. Load Regulation vs. DS22053C-page 7 MCP1802 Note: Unless otherwise indicated: VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA, TA = +25°C, VIN = VR + 1.0V, SOT-23-5. VOUT = 3.3V IOUT = 0.1 mA to 150 mA -0.10 -0.20 VIN = 8V VIN = 6V VIN = 10V -0.30 -0.40 VIN = 4.3V -0.50 0.020 Line Regulation (%/V) Load Regulation (%) 0.00 -0.60 0.015 VOUT = 3.3V VIN = 4.3V to 10V 150 mA 100 mA 0.010 10 mA 0.005 0.000 -0.005 1 mA -0.010 -45 -22.5 0 22.5 45 67.5 90 -45 -22.5 Temperature (°C) FIGURE 2-19: Temperature. 0.00 VIN = 8V VIN = 9V -0.20 22.5 45 67.5 90 Line Regulation vs. 0.020 Line Regulation (%/V) Load Regulation (%) FIGURE 2-22: Temperature. VOUT = 6.0V IOUT = 0.1 mA to 150 mA -0.10 0 Temperature (°C) Load Regulation vs. 0.10 VIN = 10V VIN = 7V -0.30 0.015 VOUT = 6.0V VIN = 7.0V to 10.0V 150 mA 100 mA 0.010 50 mA 0.005 0.000 -0.005 -0.010 1 mA 10 mA -0.015 -45 -22.5 0 22.5 45 67.5 90 -45 -22.5 Temperature (°C) FIGURE 2-20: Temperature. FIGURE 2-23: Temperature. VIN = 2.0 to 10.0V VOUT = 0.9V 150 mA 0.010 100 mA PSRR (dB) 0.015 50 mA 0.005 0.000 -0.005 1 mA 10 mA -0.010 -45 -22.5 0 22.5 45 67.5 Temperature (°C) FIGURE 2-21: Temperature. DS22053C-page 8 0 22.5 45 67.5 90 Temperature (°C) Load Regulation vs. 0.020 Line Regulation (%/V) 50 mA Line Regulation vs. 90 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 0.01 Line Regulation vs. VR=3.3V VIN=4.3V VINAC = 100 mV p-p CIN=0 μF IOUT=100 µA 0.1 FIGURE 2-24: 1 10 Frequency (KHz) 100 1000 PSRR vs. Frequency.  2010 Microchip Technology Inc. MCP1802 PSRR (dB) Note: Unless otherwise indicated: VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA, TA = +25°C, VIN = VR + 1.0V, SOT-23-5. 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 0.01 VR= 6.0V VIN= 7.0V VINAC = 100 mV p-p CIN= 0 μF IOUT= 100 µA 0.1 1 10 Frequency (KHz) 100 1000 FIGURE 2-25: PSRR vs Frequency. FIGURE 2-28: Dynamic Load Response. FIGURE 2-26: Power Up Timing. FIGURE 2-29: SHDN. Power Up Timing From Noise ( µV/Hz) 10 Dynamic Load Response.  2010 Microchip Technology Inc. IOUT = 100 mA 1 0.1 2.5V 0.01 0.001 0.01 FIGURE 2-27: 5.0V FIGURE 2-30: 0.1 1 10 Frequency (KHz) 100 1000 Noise Graph. DS22053C-page 9 MCP1802 NOTES: DS22053C-page 10  2010 Microchip Technology Inc. MCP1802 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Pin No. SOT-23-5 Name 1 VIN 2 GND 3 SHDN 3.1 4 NC 5 VOUT Function Unregulated Supply Voltage Ground Terminal Shutdown No connection Regulated Voltage Output Unregulated Input Voltage (VIN) Connect VIN to the input unregulated source voltage. Like all low dropout linear regulators, low source impedance is necessary for the stable operation of the LDO. The amount of capacitance required to ensure low source impedance will depend on the proximity of the input source capacitors or battery type. For most applications, 0.1 µF of capacitance will ensure stable operation of the LDO circuit. The type of capacitor used can be ceramic, tantalum or aluminum electrolytic. The low ESR characteristics of the ceramic will yield better noise and PSRR performance at high frequency. 3.2 Ground Terminal (GND) Regulator ground. Tie GND to the negative side of the output and the negative side of the input capacitor. Only the LDO bias current (25 µA typical) flows out of this pin; there is no high current. The LDO output regulation is referenced to this pin. Minimize voltage drops between this pin and the negative side of the load.  2010 Microchip Technology Inc. 3.3 Shutdown Input (SHDN) The SHDN input is used to turn the LDO output voltage on and off. When the SHDN input is at a logic-high level, the LDO output voltage is enabled. When the SHDN input is pulled to a logic-low level, the LDO output voltage is disabled and the LDO enters a low quiescent current shutdown state where the typical quiescent current is 0.01 µA. The SHDN pin does not have an internal pull-up or pull-down resistor. The the SHDN pin must be connected to either VIN or GND to prevent the device from becoming unstable. 3.4 Regulated Output Voltage (VOUT) Connect VOUT to the positive side of the load and the positive terminal of the output capacitor. The positive side of the output capacitor should be physically located as close to the LDO VOUT pin as is practical. The current flowing out of this pin is equal to the DC load current. DS22053C-page 11 MCP1802 NOTES: DS22053C-page 12  2010 Microchip Technology Inc. MCP1802 4.0 DETAILED DESCRIPTION 4.1 Output Regulation A portion of the LDO output voltage is fed back to the internal error amplifier and compared with the precision internal bandgap reference. The error amplifier output will adjust the amount of current that flows through the P-Channel pass transistor, thus regulating the output voltage to the desired value. Any changes in input voltage or output current will cause the error amplifier to respond and adjust the output voltage to the target voltage (refer to Figure 4-1). 4.2 Overcurrent The MCP1802 internal circuitry monitors the amount of current flowing through the P-Channel pass transistor. In the event that the load current reaches the current limiter level of 380 mA (typical), the current limiter circuit will operate and the output voltage will drop. As the output voltage drops, the internal current foldback circuit will further reduce the output voltage causing the output current to decrease. When the output is shorted, a typical output current of 50 mA flows. 4.3 Shutdown The SHDN input is used to turn the LDO output voltage on and off. When the SHDN input is at a logic-high level, the LDO output voltage is enabled. When the SHDN input is pulled to a logic-low level, the LDO output voltage is disabled and the LDO enters a low quiescent current shutdown state where the typical quiescent current is 0.01 µA. The SHDN pin does not have an internal pull-up or pull-down resistor. Therefore the SHDN pin must be pulled either high or low to prevent the device from becoming unstable. The internal device current will increase when the device is operational and current flows through the pull-up or pull-down resistor to the SHDN pin internal logic. The SHDN pin internal logic is equivalent to an inverter input.  2010 Microchip Technology Inc. 4.4 Output Capacitor The MCP1802 requires a minimum output capacitance of 1 µF for output voltage stability. Ceramic capacitors are recommended because of their size, cost and environmental robustness qualities. Aluminum-electrolytic and tantalum capacitors can be used on the LDO output as well. The output capacitor should be located as close to the LDO output as is practical. Ceramic materials X7R and X5R have low temperature coefficients and are well within the acceptable ESR range required. A typical 1 µF X7R 0805 capacitor has an ESR of 50 milli-ohms. Larger LDO output capacitors can be used with the MCP1802 to improve dynamic performance and power supply ripple rejection performance. Aluminum-electrolytic capacitors are not recommended for low temperature applications of  25°C. 4.5 Input Capacitor Low input source impedance is necessary for the LDO output to operate properly. When operating from batteries, or in applications with long lead length (> 10 inches) between the input source and the LDO, some input capacitance is recommended. A minimum of 0.1 µF to 4.7 µF is recommended for most applications. For applications that have output step load requirements, the input capacitance of the LDO is very important. The input capacitance provides the LDO with a good local low-impedance source to pull the transient currents from in order to respond quickly to the output load step. For good step response performance, the input capacitor should be of equivalent (or higher) value than the output capacitor. The capacitor should be placed as close to the input of the LDO as is practical. Larger input capacitors will also help reduce any high-frequency noise on the input and output of the LDO and reduce the effects of any inductance that exists between the input source voltage and the input capacitance of the LDO. DS22053C-page 13 MCP1802 MCP1802 +VIN VOUT VIN SHDN Shutdown Control +VIN Voltage Reference + Current Limiter Error Amplifier GND FIGURE 4-1: DS22053C-page 14 Block Diagram.  2010 Microchip Technology Inc. MCP1802 5.0 FUNCTIONAL DESCRIPTION The MCP1802 CMOS low dropout linear regulator is intended for applications that need the low current consumption while maintaining output voltage regulation. The operating continuous load range of the MCP1802 is from 0 mA to 300 mA. The input operating voltage range is from 2.0V to 10.0V, making it capable of operating from three or more alkaline cells or single and multiple Li-Ion cell batteries. 5.1 5.2 Output The maximum rated continuous output current for the MCP1802 is 300 mA. A minimum output capacitance of 1.0 µF is required for small signal stability in applications that have up to 300 mA output current capability. The capacitor type can be ceramic, tantalum or aluminum electrolytic. Input The input of the MCP1802 is connected to the source of the P-Channel PMOS pass transistor. As with all LDO circuits, a relatively low source impedance (10) is needed to prevent the input impedance from causing the LDO to become unstable. The size and type of the capacitor needed depends heavily on the input source type (battery, power supply) and the output current range of the application. For most applications a 0.1 µF ceramic capacitor will be sufficient to ensure circuit stability. Larger values can be used to improve circuit AC performance.  2010 Microchip Technology Inc. DS22053C-page 15 MCP1802 NOTES: DS22053C-page 16  2010 Microchip Technology Inc. MCP1802 6.0 APPLICATION CIRCUITS & ISSUES 6.1 The MCP1802 is most commonly used as a voltage regulator. Its low quiescent current and low dropout voltage make it ideal for many battery-powered applications. MCP1802 SHDN GND VOUT 1.8V IOUT 50 mA COUT 1 µF Ceramic FIGURE 6-1: 6.1.1 VIN VOUT VIN 2.4V to 5.0V CIN 1 µF Ceramic TJ(MAX) = Maximum continuous junction temperature PTOTAL = Total device power dissipation RJA = Thermal resistance from junction to ambient TAMAX = Maximum ambient temperature The maximum power dissipation capability for a package can be calculated given the junction-toambient thermal resistance and the maximum ambient temperature for the application. The following equation can be used to determine the package maximum internal power dissipation. EQUATION 6-3:  T J  MAX  – T A  MAX   P D  MAX  = --------------------------------------------------R JA Typical Application Circuit. APPLICATION INPUT CONDITIONS Package Type = Input Voltage Range = SOT-23-5 Where: PD(MAX) = Maximum device power dissipation TJ(MAX) = Maximum continuous junction temperature TA(MAX) = Maximum ambient temperature RJA = Thermal resistance from junction to ambient 2.4V to 5.0V VIN maximum = 5.0V VOUT typical = 1.8V IOUT = 6.2 T J  MAX  = P TOTAL  R JA + T AMAX Where: Typical Application NC EQUATION 6-2: 50 mA maximum Power Calculations 6.2.1 POWER DISSIPATION The internal power dissipation of the MCP1802 is a function of input voltage, output voltage and output current. The power dissipation, as a result of the quiescent current draw, is so low, it is insignificant (25.0 µA x VIN). The following equation can be used to calculate the internal power dissipation of the LDO. EQUATION 6-1: P LDO =  VIN  MAX   – V OUT  MIN    I OUT  MAX   Where: PLDO = LDO Pass device internal power dissipation VIN(MAX) = Maximum input voltage VOUT(MIN) = LDO minimum output voltage The maximum continuous operating temperature specified for the MCP1802 is +85°C. To estimate the internal junction temperature of the MCP1802, the total internal power dissipation is multiplied by the thermal resistance from junction to ambient (RJA). The thermal resistance from junction to ambient for the SOT-23-5 package is estimated at 256°C/W.  2010 Microchip Technology Inc. EQUATION 6-4: T J  RISE  = P D  MAX   R JA Where: TJ(RISE) = Rise in device junction temperature over the ambient temperature PTOTAL = Maximum device power dissipation RJA = Thermal resistance from junction to ambient EQUATION 6-5: T J = T J  RISE  + T A Where: TJ = Junction Temperature TJ(RISE) = Rise in device junction temperature over the ambient temperature TA = Ambient temperature DS22053C-page 17 MCP1802 6.3 Voltage Regulator Internal power dissipation, junction temperature rise, junction temperature and maximum power dissipation are calculated in the following example. The power dissipation, as a result of ground current, is small enough to be neglected. 6.3.1 Junction Temperature Estimate To estimate the internal junction temperature, the calculated temperature rise is added to the ambient or offset temperature. For this example, the worst-case junction temperature is estimated in the following table. TJ = TJRISE + TA(MAX) POWER DISSIPATION EXAMPLE Package Package Type = SOT-23-5 Input Voltage TJ = 81.42°C Maximum Package Power Dissipation at +25°C Ambient Temperature SOT-23-5 (256°C/Watt = RJA) PD(MAX) = (85°C - 25°C) / 256°C/W VIN = 2.4V to 5.0V PD(MAX) = 234 milli-Watts LDO Output Voltages and Currents VOUT = 1.8V IOUT = 50 mA Maximum Ambient Temperature TA(MAX) = +40°C Internal Power Dissipation Internal Power dissipation is the product of the LDO output current times the voltage across the LDO (VIN to VOUT). PLDO(MAX) = (VIN(MAX) - VOUT(MIN)) x IOUT(MAX) PLDO = (5.0V - (0.98 x 1.8V)) x 50 mA PLDO = 161.8 milli-Watts 6.4 Voltage Reference The MCP1802 can be used not only as a regulator, but also as a low quiescent current voltage reference. In many microcontroller applications, the initial accuracy of the reference can be calibrated using production test equipment or by using a ratio measurement. When the initial accuracy is calibrated, the thermal stability and line regulation tolerance are the only errors introduced by the MCP1802 LDO. The low cost, low quiescent current and small ceramic output capacitor are all advantages when using the MCP1802 as a voltage reference. Device Junction Temperature Rise The internal junction temperature rise is a function of internal power dissipation and the thermal resistance from junction to ambient for the application. The thermal resistance from junction to ambient (RJA) is derived from an EIA/JEDEC standard for measuring thermal resistance for small surface mount packages. The EIA/JEDEC specification is JESD51-7, “High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages”. The standard describes the test method and board specifications for measuring the thermal resistance from junction to ambient. The actual thermal resistance for a particular application can vary depending on many factors, such as copper area and thickness. Refer to AN792, “A Method to Determine How Much Power a SOT23 Can Dissipate in an Application”, (DS00792), for more information regarding this subject. TJ(RISE) = PTOTAL x RqJA TJRISE = 161.8 milli-Watts x 256.0°C/Watt TJRISE = 41.42°C DS22053C-page 18 Ratio Metric Reference 25 µA Bias CIN 1 µF PIC® Microcontroller MCP1802 VIN VOUT GND COUT 1 µF VREF ADO AD1 Bridge Sensor FIGURE 6-2: Using the MCP1802 as a Voltage Reference. 6.5 Pulsed Load Applications For some applications, there are pulsed load current events that may exceed the specified 300 mA maximum specification of the MCP1802. The internal current limit of the MCP1802 will prevent high peak load demands from causing non-recoverable damage. The 300 mA rating is a maximum average continuous rating. As long as the average current does not exceed 300 mA nor the max power dissipation of the packaged device, pulsed higher load currents can be applied to the MCP1802. The typical current limit for the MCP1802 is 380 mA (TA +25°C).  2010 Microchip Technology Inc. MCP1802 7.0 PACKAGING INFORMATION 7.1 Package Marking Information Example: 5-Lead SOT-23 Standard Options for SOT-23 XXNN Symbol Voltage * Symbol 9X_8# 0.9 9X_Z# 3.0 9X_B# 1.2 9B_2# 3.3 9X_K# 1.8 9B_M# 5.0 9X_T# 2.5 9B_Z# 6.0 * Custom output voltages available upon request. Contact your local Microchip sales office for more information. 1 Legend: XX...X Y YY WW NNN e3 * Note: 9XNN Voltage * 1 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.  2010 Microchip Technology Inc. DS22053C-page 19 MCP1802 /HDG3ODVWLF6PDOO2XWOLQH7UDQVLVWRU27>627@ 1RWH )RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJVSOHDVHVHHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQORFDWHGDW KWWSZZZPLFURFKLSFRPSDFNDJLQJ b N E E1 3 2 1 e e1 D A2 A c φ A1 L L1 8QLWV 'LPHQVLRQ/LPLWV 1XPEHURI3LQV 0,//,0(7(56 0,1 120 0$; 1  /HDG3LWFK H %6& 2XWVLGH/HDG3LWFK H 2YHUDOO+HLJKW $  ± 0ROGHG3DFNDJH7KLFNQHVV $  ±  6WDQGRII $  ±  2YHUDOO:LGWK (  ±  0ROGHG3DFNDJH:LGWK (  ±  2YHUDOO/HQJWK '  ±  %6&  )RRW/HQJWK /  ±  )RRWSULQW /  ±  )RRW$QJOH  ƒ ± ƒ /HDG7KLFNQHVV F  ±  /HDG:LGWK E  ±  1RWHV  'LPHQVLRQV'DQG(GRQRWLQFOXGHPROGIODVKRUSURWUXVLRQV0ROGIODVKRUSURWUXVLRQVVKDOOQRWH[FHHGPPSHUVLGH  'LPHQVLRQLQJDQGWROHUDQFLQJSHU$60(