MCP2562T-E/SN

MCP2561/2 High-Speed CAN Transceiver Features: Description: • Supports 1 Mb/s Operation • Implements ISO-11898-2 and ISO-11898-5  Standard Physical Layer Requirements • Very Low Standby Current (5 µA, typical) • VIO Supply Pin to Interface Directly to  CAN Controllers and Microcontrollers with  1.8V to 5.5V I/O • SPLIT Output Pin to Stabilize Common Mode in Biased Split Termination Schemes • CAN Bus Pins are Disconnected when Device is Unpowered: - An Unpowered Node or Brown-Out Event will Not Load the CAN Bus • Detection of Ground Fault: - Permanent Dominant Detection on TXD - Permanent Dominant Detection on Bus • Power-on Reset and Voltage Brown-Out Protection on VDD Pin • Protection Against Damage Due to Short-Circuit Conditions (Positive or Negative Battery Voltage) • Protection Against High-Voltage Transients in Automotive Environments • Automatic Thermal Shutdown Protection • Suitable for 12V and 24V Systems • Meets or exceeds stringent automotive design requirements including “Hardware Requirements for LIN, CAN and FlexRay Interfaces in Automotive Applications”, Version 1.3, May 2012 • High-Noise Immunity Due to Differential Bus Implementation • High Electrostatic Discharge (ESD) Protection on CANH and CANL, meeting the IEC61000-4-2 up to ±14 kV • Available in PDIP-8L, SOIC-8L and 3x3 DFN-8L • Temperature ranges: - Extended (E): -40°C to +125°C - High (H): -40°C to +150°C The MCP2561/2 is a Microchip Technology Inc. second generation high-speed CAN transceiver. It serves as an interface between a CAN protocol controller and the physical two-wire CAN bus. The device meets the automotive requirements for high-speed (up to 1 Mb/s), low quiescent current, electromagnetic compatibility (EMC) and electrostatic discharge (ESD). Package Types MCP2561 PDIP, SOIC TXD 1 8 STBY MCP2562 PDIP, SOIC TXD 1 8 STBY VSS 2 7 CANH VSS 2 7 CANH VDD 3 6 CANL VDD 3 6 CANL RXD 4 5 SPLIT RXD 4 5 VIO MCP2561 3x3 DFN* TXD 1 VSS 2 VDD 3 8 STBY EP 9 RXD 4 MCP2562 3x3 DFN* TXD 1 7 CANH VSS 2 6 CANL VDD 3 5 SPLIT RXD 4 8 STBY EP 9 7 CANH 6 CANL 5 VIO * Includes Exposed Thermal Pad (EP); see Table 1-2. MCP2561/2 Family Members Device Feature MCP2561 Split pin Common mode stabilization MCP2562 VIO pin Internal level shifter on digital I/O pins Note: Description For ordering information, see the “Product Identification System” section on page 27.  2013-2014 Microchip Technology Inc. DS20005167C-page 1 MCP2561/2 Block Diagram SPLIT(2) VDD/2 VIO(3) VDD Digital I/O Supply Thermal Protection POR UVLO VIO Permanent Dominant Detect TXD VIO STBY CANH Driver and Slope Control CANL Mode Control Wake-Up Filter CANH LP_RX(1) CANL Receiver RXD CANH HS_RX CANL VSS Note 1: There is only one receiver implemented. The receiver can operate in Low-Power or High-Speed mode. 2: Only MCP2561 has the SPLIT pin. 3: Only MCP2562 has the VIO pin. In MCP2561, the supply for the digital I/O is internally connected to VDD. DS20005167C-page 2  2013-2014 Microchip Technology Inc. MCP2561/2 1.0 DEVICE OVERVIEW 1.1.1 NORMAL MODE The MCP2561/2 is a high-speed CAN, fault-tolerant device that serves as the interface between a CAN protocol controller and the physical bus. The MCP2561/2 device provides differential transmit and receive capability for the CAN protocol controller, and is fully compatible with the ISO-11898-2 and ISO-11898-5 standards. It will operate at speeds of up to 1 Mb/s. Normal mode is selected by applying a low-level to the STBY pin. The driver block is operational and can drive the bus pins. The slopes of the output signals on CANH and CANL are optimized to produce minimal electromagnetic emissions (EME). Typically, each node in a CAN system must have a device to convert the digital signals generated by a CAN controller to signals suitable for transmission over the bus cabling (differential output). It also provides a buffer between the CAN controller and the high-voltage spikes that can be generated on the CAN bus by outside sources. The device may be placed in Standby mode by applying a high-level to the STBY pin. In Standby mode, the transmitter and the high-speed part of the receiver are switched off to minimize power consumption. The low-power receiver and the wake-up filter blocks are enabled in order to monitor the bus for activity. The receive pin (RXD) will show a delayed representation of the CAN bus, due to the wake-up filter. 1.1 Mode Control Block The high-speed differential receiver is active. 1.1.2 STANDBY MODE The CAN controller gets interrupted by a negative edge on the RXD pin (dominant state on the CAN bus). The CAN controller must put the MCP2561/2 back into Normal mode using the STBY pin, in order to enable high-speed data communication. The MCP2561/2 supports two modes of operation: • Normal • Standby These modes are summarized in Table 1-1. The CAN bus wake-up function requires both supply voltages, VDD and VIO, to be in valid range. TABLE 1-1: MODES OF OPERATION RXD Pin Mode STBY Pin LOW 1.2 Normal LOW Bus is dominant Bus is recessive Standby HIGH Wake-up request is detected No wake-up request detected Transmitter Function The CAN bus has two states: Dominant and Recessive. A Dominant state occurs when the differential voltage between CANH and CANL is greater than VDIFF(D)(I). A Recessive state occurs when the differential voltage is less than VDIFF(R)(I). The Dominant and Recessive states correspond to the Low and High state of the TXD input pin, respectively. However, a Dominant state initiated by another CAN node will override a Recessive state on the CAN bus. 1.3 HIGH Receiver Function In Normal mode, the RXD output pin reflects the differential bus voltage between CANH and CANL. The Low and High states of the RXD output pin correspond to the Dominant and Recessive states of the CAN bus, respectively.  2013-2014 Microchip Technology Inc. 1.4 Internal Protection CANH and CANL are protected against battery shortcircuits and electrical transients that can occur on the CAN bus. This feature prevents destruction of the transmitter output stage during such a Fault condition. The device is further protected from excessive current loading by thermal shutdown circuitry that disables the output drivers when the junction temperature exceeds a nominal limit of +175°C. All other parts of the chip remain operational, and the chip temperature is lowered due to the decreased power dissipation in the transmitter outputs. This protection is essential to protect against bus line short-circuit-induced damage. DS20005167C-page 3 MCP2561/2 1.5 Permanent Dominant Detection 1.6 The MCP2561/2 device prevents two conditions: Power-On Reset (POR) and  Undervoltage Detection The MCP2561/2 has undervoltage detection on both supply pins: VDD and VIO. Typical undervoltage thresholds are 1.2V for VIO and 4V for VDD. • Permanent dominant condition on TXD • Permanent dominant condition on the bus In Normal mode, if the MCP2561/2 detects an extended Low state on the TXD input, it will disable the CANH and CANL output drivers in order to prevent the corruption of data on the CAN bus. The drivers will remain disabled until TXD goes High. When the device is powered on, CANH and CANL remain in a high-impedance state until both VDD and VIO exceed their undervoltage levels. Once powered on, CANH and CANL will enter a high-impedance state if the voltage level at VDD drops below the undervoltage level, providing voltage brown-out protection during normal operation. In Standby mode, if the MCP2561/2 detects an extended dominant condition on the bus, it will set the RXD pin to Recessive state. This allows the attached controller to go to Low-Power mode until the dominant issue is corrected. RXD is latched High until a Recessive state is detected on the bus, and the wake-up function is enabled again. In Normal mode, the receiver output is forced to Recessive state during an undervoltage condition on VDD. In Standby mode, the low-power receiver is only enabled when both VDD and VIO supply voltages rise above their respective undervoltage thresholds. Once these threshold voltages are reached, the low-power receiver is no longer controlled by the POR comparator and remains operational down to about 2.5V on the VDD supply (MCP2561/2). The MCP2562 transfers data to the RXD pin down to 1.8V on the VIO supply. Both conditions have a time-out of 1.25 ms (typical). This implies a maximum bit time of 69.44 µs (14.4 kHz), allowing up to 18 consecutive dominant bits on the bus. 1.7 Pin Descriptions Table 1-2 describes the pinout. TABLE 1-2: MCP2561/2 PINOUT MCP2561 MCP2561 3x3 DFN PDIP, SOIC MCP2562 3x3 DFN MCP2562 PDIP, SOIC Symbol Pin Function 1 1 1 1 TXD Transmit Data Input 2 2 2 2 VSS Ground 3 3 3 3 VDD Supply Voltage 4 4 4 4 RXD Receive Data Output 5 5 — — SPLIT — — 5 5 VIO 6 6 6 6 CANL CAN Low-Level Voltage I/O 7 7 7 7 CANH CAN High-Level Voltage I/O 8 8 8 8 STBY Standby Mode Input 9 — 9 — EP DS20005167C-page 4 Common Mode Stabilization – MCP2561 only Digital I/O Supply Pin – MCP2562 only Exposed Thermal Pad  2013-2014 Microchip Technology Inc. MCP2561/2 1.7.1 TRANSMITTER DATA  INPUT PIN (TXD) The CAN transceiver drives the differential output pins CANH and CANL according to TXD. It is usually connected to the transmitter data output of the CAN controller device. When TXD is Low, CANH and CANL are in the Dominant state. When TXD is High, CANH and CANL are in the Recessive state, provided that another CAN node is not driving the CAN bus with a Dominant state. TXD is connected to an internal pull-up resistor (nominal 33 k) to VDD or VIO, in the MCP2561 or MCP2562, respectively. 1.7.2 GROUND SUPPLY PIN (VSS) Ground supply pin. 1.7.3 1.7.9 STANDBY MODE INPUT PIN (STBY) This pin selects between Normal or Standby mode. In Standby mode, the transmitter, high speed receiver and SPLIT are turned off, only the low power receiver and wake-up filter are active. STBY is connected to an internal MOS pull-up resistor to VDD or VIO, in the MCP2561 or MCP2562, respectively. The value of the MOS pull-up resistor depends on the supply voltage. Typical values are 660 k for 5V, 1.1 M for 3.3V and 4.4 M for 1.8V 1.7.10 EXPOSED THERMAL PAD (EP) It is recommended to connect this pad to VSS to enhance electromagnetic immunity and thermal resistance. SUPPLY VOLTAGE PIN (VDD) Positive supply voltage pin. Supplies transmitter and receiver, including the wake-up receiver. 1.7.4 RECEIVER DATA  OUTPUT PIN (RXD) RXD is a CMOS-compatible output that drives High or Low depending on the differential signals on the CANH and CANL pins, and is usually connected to the receiver data input of the CAN controller device. RXD is High when the CAN bus is Recessive, and Low in the Dominant state. RXD is supplied by VDD or VIO, in the MCP2561 or MCP2562, respectively. 1.7.5 SPLIT PIN (MCP2561 ONLY) Reference Voltage Output (defined as VDD/2). The pin is only active in Normal mode. In Standby mode, or when VDD is off, SPLIT floats. 1.7.6 VIO PIN (MCP2562 ONLY) Supply for digital I/O pins. In the MCP2561, the supply for the digital I/O (TXD, RXD and STBY) is internally connected to VDD. 1.7.7 CAN LOW PIN (CANL) The CANL output drives the Low side of the CAN differential bus. This pin is also tied internally to the receive input comparator. CANL disconnects from the bus when MCP2561/2 is not powered. 1.7.8 CAN HIGH PIN (CANH) The CANH output drives the high-side of the CAN differential bus. This pin is also tied internally to the receive input comparator. CANH disconnects from the bus when MCP2561/2 is not powered.  2013-2014 Microchip Technology Inc. DS20005167C-page 5 MCP2561/2 1.8 Typical Applications FIGURE 1-1: MCP2561 WITH SPLIT PIN VBAT 5V LDO 0.1 μF PIC® MCU CANRX RBX RXD STBY CANH CANH SPLIT 300: Optional(1) VSS CANL VSS 60: 4700 pF 60: CANL Optional resistor to allow communication during bus failure (CANL shorted to ground). FIGURE 1-2: VBAT MCP2562 WITH VIO PIN 5V LDO 1.8V LDO 0.1 μF VDD PIC® MCU VIO CANTX TXD CANRX RXD RBX VSS DS20005167C-page 6 0.1 μF STBY MCP2562 Note 1: VDD TXD MCP2561 VDD CANTX CANH VDD CANH Vss CANL 120: CANL  2013-2014 Microchip Technology Inc. MCP2561/2 2.0 ELECTRICAL CHARACTERISTICS 2.1 Terms and Definitions A number of terms are defined in ISO-11898 that are used to describe the electrical characteristics of a CAN transceiver device. These terms and definitions are summarized in this section. 2.1.1 BUS VOLTAGE VCANL and VCANH denote the voltages of the bus line wires CANL and CANH relative to ground of each individual CAN node. 2.1.2 COMMON MODE BUS VOLTAGE RANGE Boundary voltage levels of VCANL and VCANH with respect to ground, for which proper operation will occur, if up to the maximum number of CAN nodes are connected to the bus. 2.1.3 2.1.5 DIFFERENTIAL VOLTAGE, VDIFF  (OF CAN BUS) Differential voltage of the two-wire CAN bus, value VDIFF = VCANH – VCANL. 2.1.6 INTERNAL CAPACITANCE, CIN  (OF A CAN NODE) Capacitance seen between CANL (or CANH) and ground during the Recessive state, when the CAN node is disconnected from the bus (see Figure 2-1). 2.1.7 INTERNAL RESISTANCE, RIN  (OF A CAN NODE) Resistance seen between CANL (or CANH) and ground during the Recessive state, when the CAN node is disconnected from the bus (see Figure 2-1). FIGURE 2-1: PHYSICAL LAYER DEFINITIONS ECU DIFFERENTIAL INTERNAL CAPACITANCE, CDIFF  (OF A CAN NODE) RIN Capacitance seen between CANL and CANH during the Recessive state, when the CAN node is disconnected from the bus (see Figure 2-1). RIN CANL CANH CIN 2.1.4 DIFFERENTIAL INTERNAL RESISTANCE, RDIFF  (OF A CAN NODE) CDIFF RDIFF CIN GROUND Resistance seen between CANL and CANH during the Recessive state when the CAN node is disconnected from the bus (see Figure 2-1).  2013-2014 Microchip Technology Inc. DS20005167C-page 7 MCP2561/2 Absolute Maximum Ratings† VDD .............................................................................................................................................................................7.0V VIO ..............................................................................................................................................................................7.0V DC Voltage at TXD, RXD, STBY and VSS .............................................................................................-0.3V to VIO + 0.3V DC Voltage at CANH, CANL and SPLIT ...................................................................................................... -58V to +58V Transient Voltage on CANH, CANL (ISO-7637) (Figure 2-5) ................................................................... -150V to +100V Storage temperature ...............................................................................................................................-55°C to +150°C Operating ambient temperature ..............................................................................................................-40°C to +150°C Virtual Junction Temperature, TVJ (IEC60747-1) ....................................................................................-40°C to +190°C Soldering temperature of leads (10 seconds) .......................................................................................................+300°C ESD protection on CANH and CANL pins for MCP2561 (IEC 61000-4-2).............................................................±14 kV ESD protection on CANH and CANL pins for MCP2562 (IEC 61000-4-2)...............................................................±8 kV ESD protection on CANH and CANL pins (IEC 801; Human Body Model)..............................................................±8 kV ESD protection on all other pins (IEC 801; Human Body Model).............................................................................±4 kV ESD protection on all pins (IEC 801; Machine Model) ............................................................................................±300V ESD protection on all pins (IEC 801; Charge Device Model) ..................................................................................±750V † NOTICE: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. DS20005167C-page 8  2013-2014 Microchip Technology Inc. MCP2561/2 2.2 DC Characteristics Electrical Characteristics: Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;  VDD = 4.5V to 5.5V, VIO = 1.8V to 5.5V (Note 2), RL = 60; unless otherwise specified. Characteristic Sym. Min. Typ. Max. Voltage Range VDD 4.5 — 5.5 Supply Current IDD — 5 10 — 45 70 — 5 15 — 5 15 Units Conditions SUPPLY VDD Pin Standby Current IDDS mA Recessive; VTXD = VDD Dominant; VTXD = 0V µA MCP2561 MCP2562; Includes IIO High Level of the POR  Comparator VPORH 3.8 — 4.3 V Low Level of the POR  Comparator VPORL 3.4 — 4.0 V Hysteresis of POR  Comparator VPORD 0.3 — 0.8 V VIO 1.8 — 5.5 V IIO — 4 30 µA VIO Pin Digital Supply Voltage Range Supply Current on VIO — 85 500 IDDS — 0.3 1 µA (Note 1) VUVD(IO) — 1.2 — V (Note 1) Standby Current Undervoltage detection on VIO Recessive; VTXD = VIO Dominant; VTXD = 0V BUS LINE (CANH; CANL) TRANSMITTER CANH; CANL:  Recessive Bus Output Voltage VO(R) 2.0 0.5VDD 3.0 V VTXD = VDD; No load CANH; CANL:  Bus Output Voltage in Standby VO(S) -0.1 0.0 +0.1 V STBY = VTXD = VDD; No load Recessive Output Current IO(R) -5 — +5 mA VO(D) 2.75 3.50 4.50 V 0.50 1.50 2.25 VO(D)(M) -400 0 +400 mV VO(DIFF) 1.5 2.0 3.0 V -120 0 12 mV VTXD = VDD Figure 2-2, Figure 2-4 -500 0 50 mV VTXD = VDD,no load. Figure 2-2, Figure 2-4 CANH: Dominant  Output Voltage CANL: Dominant  Output Voltage Symmetry of Dominant  Output Voltage (VDD – VCANH – VCANL) Dominant: Differential  Output Voltage Recessive:  Differential Output Voltage Note 1: 2: 3: -24V < VCAN < +24V TXD = 0; RL = 50 to 65 RL = 50 to 65 VTXD = VSS (Note 1) VTXD = VSS; RL = 50 to 65 Figure 2-2, Figure 2-4 Characterized; not 100% tested. Only MCP2562 has VIO pin. For the MCP2561, VIO is internally connected to VDD. -12V to 12V is ensured by characterization, tested from -2V to 7V.  2013-2014 Microchip Technology Inc. DS20005167C-page 9 MCP2561/2 2.2 DC Characteristics (Continued) Electrical Characteristics: Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;  VDD = 4.5V to 5.5V, VIO = 1.8V to 5.5V (Note 2), RL = 60; unless otherwise specified. Characteristic CANH: Short Circuit  Output Current Sym. Min. Typ. Max. Units IO(SC) -120 -85 — mA VTXD = VSS; VCANH = 0V; CANL: floating -100 — — mA same as above, but VDD=5V, TAMB = +25°C (Note 1) — 75 +120 mA VTXD = VSS; VCANL = 18V; CANH: floating — — +100 mA same as above, but VDD=5V, TAMB = +25°C (Note 1) -1.0 — +0.5 V -1.0 — +0.4 0.9 — VDD 1.0 — VDD 0.5 0.7 0.9 0.4 — 1.15 CANL: Short Circuit  Output Current Conditions BUS LINE (CANH; CANL) RECEIVER Recessive Differential  Input Voltage Dominant Differential  Input Voltage Differential  Receiver Threshold VDIFF(R)(I) VDIFF(D)(I) VTH(DIFF) Normal Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) Standby Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) V Normal Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) Standby Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) V Normal Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) Standby Mode; -12V < V(CANH, CANL) < +12V; See Figure 2-6 (Note 3) Differential  Input Hysteresis VHYS(DIFF) 50 — 200 mV Normal mode, see Figure 2-6, (Note 1) Common Mode  Input Resistance RIN 10 — 30 k (Note 1) RIN(M) -1 0 +1 % VCANH = VCANL, (Note 1) Differential Input  Resistance RIN(DIFF) 10 — 100 k (Note 1) Common Mode  Input Capacitance CIN(CM) — — 20 pF VTXD = VDD; (Note 1) Differential  Input Capacitance CIN(DIFF) — — 10 ILI -5 — +5 Common Mode  Resistance Matching CANH, CANL:  Input Leakage Note 1: 2: 3: VTXD = VDD; (Note 1) µA VDD = VTXD = VSTBY = 0V. For MCP2562, VIO = 0V. VCANH = VCANL = 5 V. Characterized; not 100% tested. Only MCP2562 has VIO pin. For the MCP2561, VIO is internally connected to VDD. -12V to 12V is ensured by characterization, tested from -2V to 7V. DS20005167C-page 10  2013-2014 Microchip Technology Inc. MCP2561/2 2.2 DC Characteristics (Continued) Electrical Characteristics: Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;  VDD = 4.5V to 5.5V, VIO = 1.8V to 5.5V (Note 2), RL = 60; unless otherwise specified. Characteristic Sym. Min. Typ. Max. Units Conditions 0.5VDD 0.7VDD V Normal mode;  ISPLIT = -500 µA to +500 µA 0.45VDD 0.5VDD COMMON MODE STABILIZATION OUTPUT (SPLIT) Output Voltage Vo 0.3VDD 0.55VDD V Normal mode; RL  1 M Leakage Current IL -5 — +5 µA Standby mode;  VSPLIT = -24V to + 24V  (ISO 11898: -12V ~ +12V) High-Level Input Voltage VIH 0.7VIO — VIO + 0.3 V Low-Level Input Voltage VIL -0.3 — 0.3VIO V High-Level Input Current IIH -1 — +1 µA TXD: Low-Level Input Current IIL(TXD) -270 -150 -30 µA STBY: Low-Level Input Current IIL(STBY) -30 — -1 µA VOH VDD - 0.4 — — V VIO - 0.4 — — VOL — — 0.4 V IOL = 4 mA; typical 8 mA TJ(SD) 165 175 185 °C -12V < V(CANH, CANL) < +12V, (Note 1) TJ(HYST) 20 — 30 °C -12V < V(CANH, CANL) < +12V, (Note 1) DIGITAL INPUT PINS (TXD, STBY) RECEIVE DATA (RXD) OUTPUT High-Level Output Voltage Low-Level Output Voltage IOH = -2 mA (MCP2561); typical -4 mA IOH = -1 mA (MCP2562); typical -2 mA THERMAL SHUTDOWN Shutdown  Junction Temperature Shutdown  Temperature Hysteresis Note 1: 2: 3: Characterized; not 100% tested. Only MCP2562 has VIO pin. For the MCP2561, VIO is internally connected to VDD. -12V to 12V is ensured by characterization, tested from -2V to 7V.  2013-2014 Microchip Technology Inc. DS20005167C-page 11 MCP2561/2 FIGURE 2-2: PHYSICAL BIT REPRESENTATION AND SIMPLIFIED BIAS IMPLEMENTATION CANH, CANL, SPLIT Normal Mode Standby Mode CANH SPLIT SPLIT floating CANL Recessive Dominant Recessive Time VDD CANH VDD/2 Normal RXD Standby Mode CANL DS20005167C-page 12  2013-2014 Microchip Technology Inc. MCP2561/2 2.3 AC Characteristics Electrical Characteristics: Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;  VDD = 4.5V to 5.5V, VIO = 1.8V to 5.5V (Note 2), RL = 60; unless otherwise specified. Param. No. Sym. 1 tBIT Bit Time 2 fBIT Bit Frequency Characteristic Min. Typ. Max. Units 1 — 69.44 µs 14.4 — 1000 kHz 3 tTXD-BUSON — — 70 ns 4 tTXD-BUSOFF Delay TXD High to Bus Recessive — — 125 ns 5 tBUSON-RXD — — 70 ns 6 tBUSOFF-RXD Delay Bus Recessive to RXD — — 110 ns — — 125 ns — — 235 tFLTR(WAKE) Delay Bus Dominant to RXD  (Standby mode) 0.5 1 4 µs Standby mode Delay Standby  to Normal Mode 5 25 40 µs Negative edge on STBY 7 Delay TXD Low to Bus Dominant Conditions tTXD - RXD Delay Bus Dominant to RXD Propagation Delay TXD to RXD 8 9 10 tWAKE Negative edge on TXD Positive edge on TXD 11 tPDT Permanent Dominant Detect Time — 1.25 — ms TXD = 0V 12 tPDTR Permanent Dominant Timer Reset — 100 — ns The shortest recessive pulse on TXD or CAN bus to reset Permanent Dominant Timer FIGURE 2-3: TEST LOAD CONDITIONS Load Condition 1 Load Condition 2 VDD/2 RL CL Pin CL Pin RL = 464  CL = 50 pF FIGURE 2-4: VSS for all digital pins VSS TEST CIRCUIT FOR ELECTRICAL CHARACTERISTICS 0.1 µF VDD CANH TXD SPLIT CAN Transceiver RL 100 pF RXD 30 pF CANL GND STBY Note: On MCP2562, VIO is connected to VDD.  2013-2014 Microchip Technology Inc. DS20005167C-page 13 MCP2561/2 FIGURE 2-5: TEST CIRCUIT FOR AUTOMOTIVE TRANSIENTS CANH TXD SPLIT CAN Transceiver 1000 pF Transient Generator RL RXD CANL GND STBY 1000 pF Note: On MCP2562, VIO is connected to VDD. The wave forms of the applied transients shall be in accordance with ISO-7637, Part 1, test pulses 1, 2, 3a and 3b. FIGURE 2-6: HYSTERESIS OF THE RECEIVER RXD (receive data output voltage) VOH VDIFF (r)(i) VDIFF (d)(i) VOL VDIFF (h)(i) 0.5 DS20005167C-page 14 VDIFF (V) 0.9  2013-2014 Microchip Technology Inc. MCP2561/2 2.4 Timing Diagrams and Specifications FIGURE 2-7: TIMING DIAGRAM FOR AC CHARACTERISTICS VDD TXD (transmit data input voltage) 0V VDIFF (CANH, CANL differential voltage) RXD (receive data output voltage) 3 5 6 4 7 8 FIGURE 2-8: TIMING DIAGRAM FOR WAKE-UP FROM STANDBY VSTBY Input Voltage VDD 0V VDD/2 VCANH/VCANL 0 VTXD = VDD FIGURE 2-9: 10 PERMANENT DOMINANT TIMER RESET DETECT Minimum pulse width until CAN bus goes to dominant after the falling edge TXD VDIFF (VCANH-VCANL) Driver is off 11  2013-2014 Microchip Technology Inc. 12 DS20005167C-page 15 MCP2561/2 2.5 Thermal Specifications Parameter Symbol Min. Typ. Max. Units Specified Temperature Range TA -40 — +125 C -40 — +150 Operating Temperature Range TA -40 — +150 C Storage Temperature Range TA -65 — +155 C Thermal Resistance, 8L-DFN 3x3 JA — 56.7 — C/W Thermal Resistance, 8L-PDIP JA — 89.3 — C/W Thermal Resistance, 8L-SOIC JA — 149.5 — C/W Test Conditions Temperature Ranges Thermal Package Resistances DS20005167C-page 16  2013-2014 Microchip Technology Inc. MCP2561/2 3.0 PACKAGING INFORMATION 3.1 Package Marking Information 8-Lead DFN (3x3 mm) Example: Part Number Code MCP2561-E/MF DADR MCP2561T-E/MF DADR MCP2561-H/MF DADS MCP2561T-H/MF DADS MCP2562-E/MF DADU MCP2562T-E/MF DADU MCP2562-H/MF DADT MCP2562T-H/MF DADT 8-Lead PDIP (300 mil) Example: XXXXXXXX XXXXXNNN MCP2561 3 E/P e^^256 1307 Example: YYWW 8-Lead PDIP (300 mil) 8-Lead SOIC (150 mil) OR MCP2561 3 H/P e^^256 1307 Example: MCP2561E 3 SN e^^1246 256 NNN Legend: XX...X Y YY WW NNN e3 * Note: DADR 1326 256 OR MCP2561H 3 SN e^^1246 256 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator (e3) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.  2013-2014 Microchip Technology Inc. DS20005167C-page 17 MCP2561/2 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20005167C-page 18  2013-2014 Microchip Technology Inc. MCP2561/2 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2013-2014 Microchip Technology Inc. DS20005167C-page 19 MCP2561/2 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20005167C-page 20  2013-2014 Microchip Technology Inc. MCP2561/2           3 &' !&" &4# *!(!!& 4%&  &#& &&255***'  '54 N NOTE 1 E1 1 3 2 D E A2 A L A1 c e eB b1 b 6&! '! 9'&! 7"')  %! 7,8. 7 7 7: ; < &  & &  = =   ##4 4!!   -  1!& &   = =  "# &  "# >#& .  - -  ##4>#& .   #& 9 * 9#>#& :   *+ 1, -    !"#$%&" '  ()"&'"!&) &#*&&&#   +%&, & !& - '! !#.#  &"#' #%!  & "! ! #%!  & "! !! &$#/ !#  '! #&   .0 1,21!'!   &$& "! **& "&&  !       * ,