MIC502BN

MIC502 Fan Management IC General Description Features The MIC502 is a thermal and fan management IC that supports the features for NLX/ATX power supplies and other control applications. • • • • • • • • • Fan speed is determined by an external temperature sensor, typically a thermistor-resistor divider, and (optionally) a second signal, such as the NLX “FanC” signal. The MIC502 produces a low-frequency pulse-width modulated output for driving an external motor drive transistor. Low-frequency PWM speed control allows operation of standard brushless DC fans at low duty-cycle for reduced acoustic noise and permits the use of a very small power transistor. The PWM time base is determined by an external capacitor. An open-collector overtemperature fault output is asserted if the primary control input is driven above the normal control range. The MIC502 features a low-power sleep mode with a userdetermined threshold. Sleep mode completely turns off the fan and occurs when the system is asleep or off (both control inputs very low). A complete shutdown or reset can also be initiated by external circuitry as desired. Temperature-proportional fan speed control Low-cost, efficient PWM fan drive 4.5V to 13.2V IC supply range Controls any voltage fan Overtemperature detection with fault output Integrated fan startup timer Automatic user-specified sleep mode Supports low-cost NTC/PTC thermistors 8-pin DIP and SOIC packages Applications • • • • • • • • NLX and ATX power supplies Personal computers File servers Telecom and networking hardware Printers, copiers, and office equipment Instrumentation Uninterruptible power supplies Power amplifiers The MIC502 is available as 8-pin plastic DIP and SOIC packages in the –40°C to +85°C industrial temperature range. Datasheets and support documentation are available on Micrel’s web site at: www.micrel.com. Typical Application Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com October 6, 2014 Revision 3.0 Micrel, Inc. MIC502 Ordering Information Part Number Temperature Range Package Lead Finish MIC502YN –40° to +85°C 8-Pin Plastic DIP Pb-Free MIC502YM –40° to +85°C 8-Pin SOIC Pb-Free Pin Configuration 8-Pin SOIC (M) 8-Pin DIP (N) (Top View) Pin Description Pin Number Pin Name 1 VT1 Thermistor 1 (input): Analog input of approximately 30% to 70% of VDD produces active duty cycle of 0% to 100% at driver output (OUT). Connect to external thermistor network (or other temperature sensor). Pull low for shutdown. 2 CF PWM timing capacitor (external component): Positive terminal for the PWM triangle-wave generator timing capacitor. The recommended CF is 0.1µF for 30Hz PWM operation. 3 VSLP Sleep threshold (input): The voltage on this pin is compared to VT1 and VT2. When VT1 < VSLP and VT2 < VSLP the MIC502 enters sleep mode until VT1 or VT2 rises above VWAKE. (VWAKE = VSLP + VHYST). Grounding VSLP disables the sleep-mode function. 4 GND Ground 5 VT2 Thermistor 2 (input): Analog input of approximately 30% to 70% of VDD produces active duty cycle of 0% to 100% at driver output (OUT). Connect to motherboard fan control signal or second temperature sensor. 6 /OTF Overtemperature fault (output): Open-collector output (active-low). Indicates overtemperature fault condition (VT1 > VOT) when active. 7 OUT Driver output: Asymmetrical-drive active-high complimentary PWM output. Typically connect to base of external NPN motor control transistor. 8 VDD Power supply (input): IC supply input; may be independent of fan power supply. October 6, 2014 Pin Function 2 Revision 3.0 Micrel, Inc. MIC502 Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VDD) .................................................... +14V Output Sink Current (IOUT(sink)). .................................... 10mA Output Source Current (IOUT(source)) .............................. 25mA Input Voltage (any pin) ......................... –0.3V to VDD + 0.3V Junction Temperature (TJ) ....................................... +125°C Lead Temperature (soldering, 5s) .............................. 260°C Storage Temperature (Ts)......................... –65°C to +150°C (3) ESD Rating ................................................. ESD Sensitive Supply Voltage (VDD) .................................. +4.0V to +13.2V Sleep Voltage (VSLP).......................................... GND to VDD Temperature Range (TA) ............................. –40°C to +85°C Power Dissipation at +25°C SOIC .................................................................. 800mW DIP ..................................................................... 740mW Derating Factors SOIC .............................................................. 8.3mW/°C Plastic DIP ..................................................... 7.7mW/°C Electrical Characteristics(4) 4.5V ≤ VDD ≤ 13.2V ; TA = 25°C, bold values indicate –40°C≤ TA ≤ +85°C, unless noted. (5) Symbol Parameter Condition IDD Supply Current, Operating IDD(slp) Supply Current, Sleep Min. Typ. Max. Units VSLP = GND, /OTF, OUT = open, CF = 0.1µF, VT1 = VT2 = 0.7 VDD 1.5 mA VT1 = GND, VSLP, /OTF, OUT = open, CF = 0.1µF 500 µA Driver Output tR Output Rise Time, Note 6 IOH = 10mA 50 µs tF Output Fall Time, Note 6 IOL = 1mA 50 µs IOL Output Sink Current VOL = 0.5V 0.9 mA IOH Output Source Current 4.5V ≤ VDD ≤ 5.5V, VOH = 2.4V 10 mA 10.8V ≤ VDD ≤ 13.2V, VOH = 3.2V 10 mA IOS Sleep Mode Output Leakage VOUT = 0V 1 µA Thermistor and Sleep Inputs VPWM(max) 100% PWM Duty Cycle Input Voltage 67 70 73 %VDD VPWM(span) VPWM(max) – VPWM(min) 37 40 43 %VDD VHYST Sleep Comparator Hysteresis 8 11 14 %VDD VIL VT1 Shutdown Threshold 0.7 V VIH VT1 Startup Threshold VOT VT1 Overtemperature Fault Threshold IVT, IVSLP VT1, VT2, VSLP Input Current tRESET Reset Setup Time 1.1 74 Note 7 -2.5 Minimum time VT1 < VIL to guarantee reset. Note 6 30 V 77 80 %VDD 1 µA µs Notes: 1. Exceeding the absolute maximum ratings may damage the device. 2. The device is not guaranteed to function outside its operating ratings. 3. Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5kΩ in series with 100pF. 4. Specification for packaged product only. 5. Part is functional over this VDD range. However, it is characterized for operation at 4.5V ≤ VDD ≤ 5.5V and 10.8V ≤ VDD ≤ 13.2V ranges. These ranges correspond to a nominal VDD of 5V and 12V, respectively. 6. Guaranteed by design. 7. VOT is guaranteed by design to always be higher than VPWM(max). October 6, 2014 3 Revision 3.0 Micrel, Inc. MIC502 Electrical Characteristics(4) (Continued) 4.5V ≤ VDD ≤ 13.2V ; TA = 25°C, bold values indicate –40°C≤ TA ≤ +85°C, unless noted. (5) Symbol Parameter Condition Min. Typ. Max. Units 4.5V ≤ VDD ≤ 5.5V, CF = 0.1µF 24 27 30 Hz 10.8V ≤ VDD ≤ 13.2V, CF = 0.1µF 27 30 33 Hz Note 8 15 90 Hz Oscillator f Oscillator Frequency, Note 8 fMIN, fMAX Oscillator Frequency Range tSTARTUP Startup Interval 64/f s Overtemperature Fault Output VOL Active (Low) Output Voltage IOL = 2mA IOH Off-State Leakage V/OTF = VDD 0.3 1 V µA Note: 8. Logic time base and PWM frequency. For other values of CF, f(Hz) = 30Hz × (0.1µF ÷ C), where C is measured in µF. Timing Diagrams Figure 1. Typical System Behavior Note A. Output duty-cycle is initially determined by VT1 because it is greater than VT2. Note B. PWM duty-cycle follows VT1 as it increases. Note C. VT1 drops below VT2. VT2 now determines the output duty-cycle. Note D. The PWM duty-cycle follows VT2 as it increases. Note E. Both VT1 and VT2 decrease below VSLP, but above VIL. The device enters sleep mode. Note F. The PWM wakes up because one of the control inputs (VT1 in this case) has risen above VWAKE. The startup timer is triggered, forcing OUT high for 64 clock periods. (VWAKE = VSLP + VHYST. See the Electrical Characteristics section for details). Note G. Following the startup interval, the PWM duty-cycle is the higher of VT1 and VT2. October 6, 2014 4 Revision 3.0 Micrel, Inc. MIC502 Timing Diagrams (Continued) Figure 2. MIC502 Typical Power-Up System Behavior Note H. At power-on, the startup timer forces OUT on for 64 PWM cycles of the internal timebase (tPWM). This ensures that the fan will start from a dead stop. Note I. The PWM duty-cycle follows the higher of VT1 and VT2, in this case, VT1. Note J. The PWM duty-cycle follows VT1 as it increases. Note K. PWM duty-cycle is 100% (OUT constantly on) anytime VT1 > VPWM(max). Note L. /OTF is asserted anytime VT1 > VOT. The fan continues to run at 100% duty-cycle. Note M. /OTF is deasserted when VT1 falls below VOT; duty-cycle once again follows VT1. Note N. Duty-cycle follows VT1 until VT1 < VT2, at which time VT2 becomes the controlling input signal. Note that VT1 is below VSLP but above VIH; so normal operation continues. Both VT1 and VT2 must be below VSLP to active sleep mode. Note O. All functions cease when VT1 < VIL; this occurs regardless of the state of VT2. October 6, 2014 5 Revision 3.0 Micrel, Inc. MIC502 Typical Characteristics October 6, 2014 6 Revision 3.0 Micrel, Inc. MIC502 Typical Characteristics (Continued) October 6, 2014 7 Revision 3.0 Micrel, Inc. MIC502 Typical Characteristics (Continued) Functional Diagram October 6, 2014 8 Revision 3.0 Micrel, Inc. MIC502 Sleep Mode When VT1 and VT2 fall below VSLP, the system is deemed capable of operating without fan cooling and the MIC502 enters sleep mode and discontinues fan operation. The threshold where the MIC502 enters sleep mode is determined by VSLP. Connecting the VSLP pin to ground disables sleep mode. Functional Description Oscillator A capacitor connected to CF determines the frequency of the internal time base which drives the state-machine logic and determines the PWM frequency. This operating frequency will be typically 30Hz to 60Hz. (CF = 0.1µF for 30Hz.) Once in sleep mode, all device functions cease (/OTF inactive, PWM output off) unless VT1 or VT2 rise above VWAKE. (VWAKE = VSLP + VHYST). VHYST is a fixed amount of hysteresis added to the sleep comparator which prevents erratic operation around the VSLP operating point. The result is stable and predictable thermostatic action: whenever possible the fan is shut down to reduce energy consumption and acoustic noise, but will always be activated if the system temperature rises. Pulse-Width Modulation A triangle-wave generator and threshold detector comprise the internal pulse-width modulator (PWM). The PWM’s output duty-cycle is determined by the higher of VT1 or VT2. A typical voltage range of 30% to 70% of VDD applied to the VT1 and VT2 pins corresponds to 0% to 100% duty-cycle. Because at least one of the control voltage inputs is generally from a thermistor-resistor divider connected to VDD, the PWM output duty cycle will not be affected by changes in the supply voltage. If the device powers-up or exits its reset state, the fan will not start unless VT1 or VT2 rises above VWAKE. Driver Output OUT is a complementary push-pull digital output with asymmetric drive (approximately 10mA source, 1mA sink, see “Electrical Characteristics”). It is optimized for directly driving an NPN transistor switch in the fan’s groundreturn. See “Application Information” for circuit details. System Operation Power Up Shutdown/Reset Internal circuitry automatically performs a reset of the MIC502 when power is applied. The MIC502 may be shut down at anytime by forcing VT1 below its VIL threshold. This is typically accomplished by connecting the VT1 pin to open-drain or open-collector logic and results in an immediate and asynchronous shutdown of the MIC502. The OUT and /OTF pins will float while VT1 is below VIL. • A complete reset occurs when power is applied. • OUT is off (low) and /OTF is inactive (high/floating). • If VT1 < VIL, the MIC502 remains in shutdown. • The startup interval begins. OUT will be on (high) for 64 clock cycles (64 × tPWM). • Following the startup interval, normal operation begins. If VT1 then rises above VIH, a device reset occurs. Reset is equivalent to a power-up condition: the state of /OTF is cleared, a startup interval is triggered, and normal fan operation begins. Startup Interval Any time the fan is started from the off state (power-on or coming out of sleep mode or shutdown mode), the PWM output is automatically forced high for a startup interval of 64 × tPWM. Once the startup interval is complete, PWM operation will commence and the duty-cycle of the output will be determined by the higher of VT1 or VT2. Overtemperature Fault Output /OTF is an active-low, open-collector logic output. An over-temperature condition will cause /OTF to be asserted. An overtemperature condition is determined by VT1 exceeding the normal operating range of 30% to 70% of VDD by >7% of VDD. Note that VOT is guaranteed by design to always be higher than VPWM(max). Figure 3. Power-Up Behavior October 6, 2014 9 Revision 3.0 Micrel, Inc. MIC502 • Normal Operation Normal operation consists of the PWM operating to control the speed of the fan according to VT1 and VT2. Exceptions to this otherwise indefinite behavior can be caused by any of three conditions: VT1 exceeding VOT, an overtemperature condition; VT1 being pulled below VIL initiating a device shutdown and reset; or both VT1 and VT2 falling below VSLP, activating sleep mode. Each of these exceptions is treated as follows: Sleep: If VT1 and VT2 fall below VSLP, the device enters sleep mode. All internal functions cease unless VT1 or VT2 rise above VWAKE. (VWAKE = VSLP + VHYST). The /OTF output is unconditionally inactive (high/floating) and the PWM is disabled during sleep (OUT will float). Sleep Mode During normal operation, if VT1 and VT2 fall below VSLP, the device will go into sleep mode and fan operation will stop. The MIC502 will exit sleep mode when VT1 or VT2 rise above VSLP by the hysteresis voltage, VHYST. When this occurs, normal operation will resume. The resumption of normal operation upon exiting sleep is indistinguishable from a power-on reset. Figure 4. Normal System Behavior • Overtemperature: If the system temperature rises typically 7% above the 100% duty-cycle operating point, /OTF will be activated to indicate an overtemperature fault. (VT1 > VOT) Overtemperature detection is essentially independent of other operations. The PWM continues its normal behavior; with VT1 > VPWM(max), the output duty-cycle will be 100%. If VT1 falls below VOT, the overtemperature condition is cleared and /OTF is no longer asserted. It is assumed that in most systems, the /OTF output will initiate power supply shutdown. • Shutdown/Reset: If VT1 is driven below VIL an immediate, asynchronous shutdown occurs. While in shutdown mode, OUT is off (low), and /OTF is unconditionally inactive (high/floating). If VT1 subsequently rises above VIH, a device reset will occur. Reset is indistinguishable from a power-up condition. The state of /OTF is cleared, a startup interval is triggered, and normal fan operation begins. October 6, 2014 Figure 5. Sleep Mode Behavior 10 Revision 3.0 Micrel, Inc. MIC502 1. Selecting a temperature sensor assumed that the system will be in sleep mode rather than operate the fan at a very low duty cycle (VPWM(min)). It is October 6, 2014 Figure 6. Control Voltage vs. Fan Speed 11 Revision 3.0 Micrel, Inc. MIC502 Design Example The thermistor-resistor interface network is shown in the Typical Application drawing. The following example describes the design process: A thermistor datasheet specifies a thermistor that is a candidate for this design as having an R25 resistance of 100kΩ. The datasheet also supports calculation of resistance at arbitrary temperatures, and it was discovered the candidate thermistor has a resistance of 13.6k at +70°C (R70). Accuracy is more important at the higher temperature end of the operating range (+70°C) than the lower end because we wish the overtemperature fault output (/OTF) to be reasonably accurate—it may be critical to operating a power supply crowbar or other shutdown mechanism, for example. The lower temperature end of the range is less important because it simply establishes minimum fan speed, which is when less cooling is required. Referring to the Typical Application, the following approach can be used to design the required thermistor interface network: let VT = VDD × 33k (100k + 33k ) VT = 0.248VDD Recalling the earlier discussion that the desired VT for +25°C should be about 40% of VDD, the above value of 24.8% is far too low. This would produce a voltage that would stop the fan (recall from earlier that this occurs when VT is about 30% of VDD). To choose an appropriate value for R1, we need to learn what the parallel combination of RT1 and R1 should be at +25°C: again VDD × R2 VT = (R T1 || R1 + R2) 0.4 = (R T1 || R1 + R2) R2 0.4(RT1 || R1) + 0.4R2 = R2 0.4(RT1 || R1) = 0.6R2 R1 = ∞ and RT1 = 13.6k (at +70°C) RT1 || R1 = 1.5R2 = 1.5 × 33k = 49.5k and because VT = 0.7VDD (70% of VDD) RT1 = 100k because VT = VDD × R2 (R T1 || R1 + R2) 0.7 = R2 (R T1 + R2) and RT1 || R1 = 49.5k ≈ 50k let R1 = 100k While that solves the low temperature end of the range, there is a small effect on the other end of the scale. The new value of VT for +70°C is 0.734, or about 73% of VDD. This represents only a 3% shift from the design goal of 70% of VDD. In summary, R1 = 100k, and R2 = 33k. The candidate thermistor used in this design example is the RL2010-54.1K-138-D1, manufactured by Keystone Thermometrics. 0.7RT1 + 0.7R2 = R2 0.7RT1 = 0.3R2 and R2 = 2.33RT1 = 2.33 × 13.6k = 31.7k ≈ 33k Let’s continue by determining what the temperatureproportional voltage is at +25°C. The R25 resistance (100kΩ) of the chosen thermistor is probably on the high side of the range of potential thermistor resistances. The result is a moderately highimpedance network for connecting to the VT1 and/or VT2 input(s). Because these inputs can have up to 1µA of leakage current, care must be taken if the input network impedance becomes higher than the example. Leakage current and resistor accuracy could require consideration in such designs. Note that the VSLP input has this same leakage current specification. let R1 = ∞ and RT1 = 100k (at +25°C) from VT = VDD × R2 (R T1 + R2) October 6, 2014 12 Revision 3.0 Micrel, Inc. MIC502 Overtemperature Fault Output The /OTF output, pin 6, is an open-collector NPN output. It is compatible with CMOS and TTL logic and is intended for alerting a system about an overtemperature condition or triggering a power supply crowbar circuit. If VDD for the MIC502 is 5V the output should not be pulled to a higher voltage. This output can sink up to 2mA and remain compatible with the TTL logic-low level. Secondary Fan Control Input The above discussions also apply to the secondary fancontrol input, VT2, pin 5. It is possible that a second thermistor, mounted at another temperature-critical location outside the power supply, may be appropriate. There is also the possibility of accommodating the NLX “FanC” signal via this input. If a second thermistor is the desired solution, the VT2 input may be treated exactly like the VT1 input. The above discussions then apply directly. If, however, the NLX FanC signal is to be incorporated into the design then the operating voltage (VDD = 5V vs. VDD = 12V) becomes a concern. The FanC signal is derived from a 12V supply and is specified to swing at least to 10.5V. A minimum implementation of the FanC signal would provide the capability of asserting full-speed operation of the fan; this is the case when 10.5V ≤ FanC ≤ 12V. This FanC signal can be applied directly to the VT2 input of the MIC502, but only when its VDD is 12V. If this signal is required when the MIC502 VDD = 5V a resistor divider is necessary to reduce this input voltage so it does not exceed the MIC502 VDD voltage. A good number is 4V (80%VDD). Timing Capacitors vs. PWM Frequency The recommended CF is 0.1µF for operation at a PWM frequency of 30Hz. This frequency is factory trimmed within ±3Hz using a 0.1% accurate capacitor. If it is desired to operate at a different frequency, the new value for CF is calculated as follows: C= 3 , where C is in µF and f is in Hz f The composition, voltage rating, ESR, and other parameters of the capacitor are not critical. However, if tight control of frequency vs. temperature is an issue, the temperature coefficient may become a consideration. Because of input leakage considerations, the impedance of the resistive divider should be kept at ≤100kΩ. A series resistor of 120kΩ driven by the FanC signal and a 100kΩ shunt resistor to ground make a good divider for driving the VT2 input. Transistor and Base-Drive Resistor Selection The OUT motor-drive output, pin 7, is intended for driving a medium-power device, such as an NPN transistor. A rather ubiquitous transistor, the 2N2222A, is capable of switching up to about 400mA. It is also available as the PN2222A in a plastic TO-92 package. Because 400mA is about the maximum current for most popular computer power supply fans (with many drawing substantially less current) and because the MIC502 provides a minimum of 10mA output current, the PN2222A, with its minimum β of 40, is the chosen motor-drive transistor. Figure 7. Typical 5V VDD Application Circuit The design consists solely of choosing the value RBASE in Figure 7 and Figure 8. To minimize on-chip power dissipation in the MIC502, the value of RBASE should be determined by the power supply voltage. The Electrical Characteristics table specifies a minimum output current of 10mA. However, different output voltage drops (VDD – VOUT) exist for 5V vs.12V operation. The value RBASE should be as high as possible for a given required transistor base-drive current in order to reduce on-chip power dissipation. Figure 8. Typical 12V VDD Application Circuit Referring to the Typical Application and to the Electrical Characteristics table, the value for RBASE is calculated as follows. For VDD = 5V systems, IOH of OUT (pin 7) is guaranteed to be a minimum of 10mA with a VOH of 2.4V. RBASE then equals (2.4V – VBE) ÷ 10mA = 170Ω. For VDD = 12V systems, RBASE = (3.4 – 0.7) ÷ 0.01 = 250Ω. October 6, 2014 13 Revision 3.0 Micrel, Inc. MIC502 Package Information and Recommended Land Pattern(9) 8-Pin SOIC (M) Note: 9. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com. October 6, 2014 14 Revision 3.0 Micrel, Inc. MIC502 Package Information and Recommended Land Pattern(9) 8-Pin Plastic DIP (N) October 6, 2014 15 Revision 3.0 Micrel, Inc. MIC502 MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com Micrel, Inc. is a leading global manufacturer of IC solutions for the worldwide high performance linear and power, LAN, and timing & communications markets. The Company’s products include advanced mixed-signal, analog & power semiconductors; high-performance communication, clock management, MEMs-based clock oscillators & crystal-less clock generators, Ethernet switches, and physical layer transceiver ICs. Company customers include leading manufacturers of enterprise, consumer, industrial, mobile, telecommunications, automotive, and computer products. Corporation headquarters and state-of-the-art wafer fabrication facilities are located in San Jose, CA, with regional sales and support offices and advanced technology design centers situated throughout the Americas, Europe, and Asia. Additionally, the Company maintains an extensive network of distributors and reps worldwide. Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this datasheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2003 Micrel, Incorporated. October 6, 2014 16 Revision 3.0