MICRF213AYQS

MICRF213 3.3V, QwikRadio® 315MHz Receiver General Description Features ® The MICRF213 is a general purpose, 3.3V QwikRadio receiver that operates at 315MHz with a typical sensitivity of -110dBm. The MICRF213 functions as a super-heterodyne receiver for OOK and ASK modulation up to 7.2kbps. The down-conversion mixer also provides image rejection. All post-detection data filtering is provided on the MICRF213. Any one of four filter bandwidths may be selected externally by the user using binary steps (from 1.18kHz to 9.44kHz, Manchester Encoded). The user need only configure the device with a set of easily determined values, based upon data rate, code modulation format, and desired duty-cycle operation. Datasheets and support documentation are available on Micrel’s website at: www.micrel.com. • • • • • • • • -2 Up to –110dBm sensitivity, 1kbps and BER 10 Image rejection mixer Frequency from 300MHz to 350MHz Low current consumption: 3.9mA @ 315MHz, continuous on data rates to 7.2kbps (Manchester Encoded) Analog RSSI output No IF filter required Excellent selectivity and noise rejection Low external part count Typical Application 315MHz, 1kHz Baud Rate Example QwikRadio is a registered trademark of Micrel, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com August 19, 2015 Revision 2.0 Micrel, Inc. MICRF213 Ordering Information Part Number Temperature Range Package –40°C to +105°C 16-Pin QSOP MICRF213AYQS Pin Configuration RO1 1 16 RO2 GNDRF 2 15 NC ANT 3 14 RSSI GNDRF 4 13 CAGC VDD 5 12 CTH SQ 6 11 SEL1 SEL0 7 10 DO SHDN 8 9 GND 16-Pin QSOP (QS) (Top View) Pin Description 16-Pin QSOP Pin Name 1 RO1 2 GNDRF 3 ANT 4 GNDRF 5 VDD 6 SQ 7 SEL0 Logic control input with active internal pull-up. Used in conjunction with SEL1 to control the demodulator low pass filter bandwidth. (See filter table for SEL0 and SEL1 in application section) 8 SHDN Shutdown logic control input. Active internal pull-up. 9 GND Negative supply connection for all chip functions except RF input. 10 DO 11 SEL1 Logic control input with active internal pull-up. Used in conjunction with SEL0 to control the demodulator low pass filter bandwidth. (See filter table for SEL0 and SEL1 in application subsection) 12 CTH Demodulation threshold voltage integration capacitor connection. Tie an external capacitor across CTH pin and GND to set the settling time for the demodulation data slicing level. Values above 1nF are recommended and should be optimized for data rate and data profile. 13 CAGC AGC filter capacitor connection. CAGC capacitor, normally greater than 0.47uF, is connected from this pin to GND 14 RSSI Received signal strength indication output. Output is from a buffer with 200 ohms typical output impedance. 15 NC 16 RO2 August 19, 2015 Pin Function Reference resonator input connection to Colpitts oscillator stage. May also be driven by external reference signal of 1.5V p-p amplitude maximum. Negative supply connection associated with ANT RF input. RF signal input from antenna. Internally AC-coupled. It is recommended that a matching network with an inductor-to-RF ground is used to improve ESD protection. Negative supply connection associated with ANT RF input. Positive supply connection for all chip functions. Squelch control logic input with an active internal pull-up when not shut down. Demodulated data output. Not Connected (Connect to Ground) Reference resonator input connection to Colpitts oscillator stage, 7pF, in parallel with low resistance MOS switch-to-GND, during normal operation. Driven by startup excitation circuit during the internal startup control sequence. 2 Revision 2.0 Micrel, Inc. MICRF213 Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VDD) .................................................+5V Input Voltage ............................................................. +5V Junction Temperature ......................................... +150ºC Lead Temperature (soldering, 10sec.) .................. 260°C Storage Temperature (TS) .....................-65°C to +150°C Maximum Receiver Input Power ........................+10dBm (3) ESD Rating .................................................. 3KV HBM Supply voltage (VDD) .............................+3.0V to +3.6V Ambient Temperature (TA) ............... –40°C to +105°C Input Voltage (VIN) ...................................... 3.6V (Max) Maximum Input RF Power .............................. –20dBm Electrical Characteristics(4) Specifications apply for 3.0V < VDD < 3.6V, VSS = 0V, CAGC = 4.7µF, CTH = 0.47µF, fRX = 315MHz unless otherwise noted. Bold values indicate –40°C ­ TA ­ +105°C. 900bps data rate (Manchester encoded), reference oscillator frequency = 9.81563MHz. Symbol Parameter Condition Min IDD Operating Supply Current Continuous Operation, fRX = 315MHz ISHUT Shut down Current Typ Max Units 3.9 mA 0.33 µA RF/IF Section Image Rejection st 20 dB 0.86 MHz -110 dBm fRX = 315MHz 235 kHz fRX = 315MHz 32.5 – j235 Ω 1 IF Center Frequency fRX = 315MHz Receiver Sensitivity @ 1kbps fRX = 315MHz (matched to 50Ω) BER=10 IF Bandwidth Antenna Input Impedance Receive Modulation Duty Cycle AGC Attack / Decay Ratio AGC pin leakage current AGC Dynamic Range Note 5 -2 20 tATTACK / tDECAY 80 % 0.1 TA = 25ºC TA = +105ºC RFIN @ -50dBm RFIN @ -110dBm ±2 ±800 1.13 1.70 nA nA V V 9.81563 MHz 300 kΩ Reference Oscillator Reference Oscillator Frequency Reference Oscillator Input Impedance Reference Oscillator Input Range Reference Oscillator Source Current fRX = 315MHz Crystal Load Cap = 10pF 0.2 V(REFOSC) = 0V 1.5 3.5 Vp-p µA Notes: 1. Exceeding the absolute maximum rating may damage the device. 2. The device is not guaranteed to function outside of its operating rating. 3. Device is ESD sensitive. Use appropriate ESD precautions. Exceeding the absolute maximum rating may damage the device. 4. Sensitivity is defined as the average signal level measured at the input necessary to achieve 10-2 BER (bit error rate). The input signal is defined as a return-to-zero (RZ) waveform with 50% average duty cycle (Manchester encoded) at a data rate of 1kbps. 5. When data burst does not contain preamble, duty cycle is defined as total duty cycle, including any “quiet” time between data bursts. When data bursts contain preamble sufficient to charge the slice level on capacitor CTH, then duty cycle is the effective duty cycle of the burst alone. [For example, 100msec burst with 50% duty cycle, and 100msec “quiet” time between bursts. If burst includes preamble, duty cycle is Ton/(Ton+Toff) = 50%; without preamble, duty cycle is Ton/(Ton+ Toff + Tquiet) = 50msec/(200msec)=25%. Ton is the (Average number of 1’s/burst) x bit time, and Toff = Tburst -Ton.) August 19, 2015 3 Revision 2.0 Micrel, Inc. MICRF213 Electrical Characteristics(4) Specifications apply for 3.0V < VDD < 3.6V, VSS = 0V, CAGC = 4.7µF, CTH = 0.47µF, fRX = 315MHz unless otherwise noted. Bold values indicate –40°C ­ TA ­ +105°C. 900bps data rate (Manchester encoded), reference oscillator frequency = 9.81563MHz. Symbol Parameter Condition Min Typ Max Units Demodulator CTH Source Impedance CTH Leakage Current Demodulator Filter Bandwidth @ 315MHz (Programmable, see application section) FREFOSC = 9.81563MHz 165 kΩ TA = 25ºC TA = +105ºC SEL0=0, SEL1=0 ±2 ±800 1180 nA nA SEL0=1, SEL1=0 2360 SEL0=0, SEL1=1 4720 SEL0=1, SEL1=1 9400 Hz Digital / Control Functions DO pin output current As output source @ 0.8Vdd sink @ 0.2Vdd 260 600 µA 2 µsec V Output rise and fall times CI = 15pF, pin DO, 10-90% RSSI DC Output Voltage Range -110dBm 0.4 -50dBm 1.9 V RSSI response slope -110dBm to -50dBm 25 mV/dB 400 µA 200 Ω 0.3 Sec RSSI RSSI Output Current RSSI Output Impedance RSSI Response Time August 19, 2015 ±15 50% data duty cycle, input power to Antenna = 20dBm 4 Revision 2.0 Micrel, Inc. MICRF213 Typical Characteristics Sensitivity Graphs 4.5 DC Current vs. Frequency 0 Selectivity vs. Frequency Response -10 -20 -30 4.0 -40 -50 -60 3.5 -70 -80 3.0 280 -106 Sesitivity vs. BER 1.8 300 320 340 FREQUENCY (MHz) 360 -90 304 308 312 316 320 324 FREQUENCY (MHz) AGC Voltage vs. Input Power 1.7 -108 -110 1.6 1.5 1.4 -112 -114 1.3 1.2 1.1 -116 1.00E-04 1.00E-03 1.00E-02 1.00E-01 BER August 19, 2015 1 -150 -100 -50 INPUT POWER (dBm) 5 0 Revision 2.0 Micrel, Inc. MICRF213 Functional Diagram CAGC AGC IMAGE REJECT FILTER ANT RF Amp IF Amp Mixer VDD –f f Control Logic Mixer fLO VSS SEL SEL SQUELCH SHDN RSSI Detector RSSI OOK Demodulator Programmable Low Pass Filter IF Amp i DO DO Synthesizer Control Logic Control Logic Reference and Control Slicing Level CTH Reference Oscillator RO1 RO2 Crystal Figure 1. Simplified Block Diagram is set to 32 times the crystal reference frequency via a phase-locked loop synthesizer with a fully integrated loop filter. Functional Description Figure 1 shows the basic structure of the MICRF213. It is made of three sub-blocks: Image Rejection UHF Down-converter, the OOK Demodulator, and Reference and Control Logics. Outside the device, the MICRF213 requires only three components to operate; two capacitors (CTH, and CAGC) and the reference frequency device, usually a quartz crystal. An additional five components may be used to improve performance. These are: power supply decoupling capacitor, two components for the matching network and two components for the pre-selector band pass filter. Image Reject Filter and Band-Pass Filter The IF ports of the mixer produce quadrature down converted IF signals. These IF signals are low-pass filtered. This removes higher frequency products prior to the image reject filter where they are combined to reject the image frequencies. The IF signal then passes through a third order band pass filter. The IF center frequency is 0.86MHz. The IF BW is 235KHz @ 315MHz, this will vary with RF operating frequency. The IF BW can be calculated via direct scaling: Receiver Operation  Operating Freq (MHz)   315   BW IF = BW IF@315MHz ×  LNA The RF input signal is AC-coupled into the gate circuit of the grounded source LNA input stage. The LNA is a Cascoded NMOS. These filters are fully integrated inside the MICRF213. After filtering, four active gain controlled amplifier stages enhance the IF signal to proper level for demodulation. Mixers and Synthesizer The LO ports of the Mixers are driven by quadrature local oscillator outputs from the synthesizer block. The local oscillator signal from the synthesizer is placed on the low side of the desired RF signal. This allows suppression of the image frequency at twice the IF frequency below the wanted signal. The local oscillator August 19, 2015 OOK Demodulator The demodulator section is comprised of detector, programmable low pass filter, slicer, and AGC comparator. 6 Revision 2.0 Micrel, Inc. MICRF213 Detector and Programmable Low-Pass Filter The demodulation starts with the detector removing the carrier from the IF signal. Post detection, the signal becomes base band information. The programmable low-pass filter further enhances the base band information. There are four programmable low-pass filter BW settings: 1180Hz, 2360Hz, 4270Hz, 9400Hz for 315MHz operation. Low pass filter BW will vary with RF Operating Frequency. Filter BW values can be easily calculated by direct scaling. See the equation below for the filter BW calculation: 1.5µA current is then sourced into the external CAGC capacitor. When the output signal is greater than 750mV, a 15µA current sink discharges the CAGC capacitor. The voltage, developed on the CAGC capacitor, acts to adjust the gain of the mixer and the IF amplifier to compensate for RF input signal level variation. Reference Control There are two components in the Reference Control sub-block: 1) Reference Oscillator and, 2) Control Logic through parallel Inputs: SEL0, SEL1, SHDN.  Operating Freq (MHz)  BW Operating Freq = BW @315MHz ×   315   Reference Oscillator VBIAS It is very important to choose filter setting that best fits the intended data rate as this will minimize data distortion. Demod BW is set at 9700Hz @ 315MHz as default (assuming both SEL0 and SEL1 pins are floating). The low pass filter can be hardware set by external pins SEL0 and SEL1. SEL0 0 1 0 1 SEL1 0 0 1 1 M1 gm RO1 1 C0 Demod BW (@ 315MHz) 1180Hz 2360Hz 4270Hz 9400Hz - default Startup Circuit CC1 IBIAS CC2 M2 M3 RO2 C1 Table 1. Demodulation BW Selection M4 Slicer, Slicing Level and Squelch The signal, prior to slicer, is still linear demodulated AM. Data slicer converts this signal into digital “1”s and “0”s by comparing with the threshold voltage built up on the CTH capacitor. This threshold is determined by detecting the positive and negative peaks of the data signal and storing the mean value. Slicing threshold default is 50%. After the slicer, the signal becomes digital OOK data. During long periods of “0”s or no data period at all, threshold voltage on the CTH capacitor may be very low. Large random noise spikes during this time may cause erroneous “1”s at DO pin. Squelch pin when pull down low will suppress these errors. Normally on Figure 2. Reference Oscillator Circuit The reference oscillator in the MICRF213 (reference Figure 2) uses a basic Colpitts crystal oscillator configuration with a MOS transconductor to provide negative resistance. All capacitors shown in the figure are integrated inside MICRF213. R01 and R02 are external pins of MICRF213. The user only need connect the reference oscillation crystal. Reference oscillator crystal frequency can be calculated thus as: FREFOSC = FRF/(32 + 1.1/12) For 315MHz, FREFOSC = 9.81563 MHz. To operate the MICRF213 with minimum offset, crystal frequencies should be specified with 10pF loading capacitance. AGC Comparator The AGC comparator monitors the signal amplitude from the output of the programmable low-pass filter. When the output signal is less than 750mV threshold, August 19, 2015 R2 R1 7 Revision 2.0 Micrel, Inc. MICRF213 Application Information Figure 3. QR213HE1 Application Example, 315MHz The MICRF213 can be fully tested by using one of the many evaluation boards designed by Micrel and intended for use with this device. As an entry level, the QR213HE1 (reference Figure 3) offers a good start for most applications. It has a helical PCB antenna with its matching network, a band-pass-filter front-end as a pre-selector filter, matching network and the minimum components required to make the device work. The minimum components are a crystal, Cagc, and Cth capacitors. By removing the matching network of the helical PCB antenna (C9 and L3), a whip antenna (ANT2) or a RF connector (J2) can be used instead. Figure 3 shows the entire schematic for 315MHz. Other frequencies can be used and the values needed are listed in the tables below. Capacitor C9 and inductor L3 are the passive elements for the helical PCB matching network. It is recommended that a tight tolerance be used for these devices; such as 2% for the inductor and 0.1pF for the capacitor. PCB variations may require different values and optimization. Table 2 shows the matching elements for the device frequency range. For additional information, reference the: Small PCB Antennas for Micrel RF Products application note. Freq (MHz) 303.825 315 345 C9 (pF) 1.2 1.2 1.2 C9 and place the whip antenna in the hole provided in the PCB. Also, a RF signal can be injected there. L1 and C8 form the pass-band-filter front-end. Its purpose is to attenuate undesired outside band noise which reduces the receiver performance. It is calculated by the parallel resonance equation f = 1/(2*PI*(SQRT(L1*C8)). Table 3 shows the most used frequency values. Freq (MHz) 303.825 315 345 L1 (nH) 39 39 39 Table 3. Band-Pass-Filter Front-End Values There is no need for the band-pass-filter front-end for applications where it is proven the outside band noise does not cause a problem. The MICRF213 has image reject mixers which improve significantly the selectivity and rejection of outside band noise. Capacitor C3 and inductor L2 form the L-shape matching network. The capacitor provides additional attenuation for low frequency outside band noise and the inductor provides additional ESD protection for the antenna pin. Two ways can be used to find these values, which are matched close to 50Ω. One method is done by calculating the values using the equations below and another by using a Smith chart. The latter is made easier by using software that plots the values of the components C8 and L1, like WinSmith by Noble Publishing. To calculate the matching values, one needs to know L3 (nH) 82 75 62 Table 2. Matching Values for the Helical PCB Antenna To use another antenna, such as the whip kind, remove August 19, 2015 C8 (pF) 6.8 6.8 5.6 8 Revision 2.0 Micrel, Inc. MICRF213 the input impedance of the device. Table 4 shows the input impedance of the MICRF213 and the suggested matching values used for the most frequencies. Please keep in mind that these suggested values may be different if the layout is not exactly the same as the one depicted here. Freq (MHz) 303.825 315 345 C3 (pF) 1.8 1.8 1.8 L2 (nH) 72 68 56 Second, we plot the shunt inductor (68nH) and the series capacitor (1.8pF) for the desired input impedance (Figure 5). We can see the matching leading to the center of the Smith Chart or close to 50Ω. Z device (Ω) 34.6– j245.1 32.5 – j235 25.3 – j214 Table 4. Matching Values for the Most Used Frequencies For the frequency of 315MHz, the input impedance is Z = 32.5 – j235Ω, then the matching components are calculated by: Equivalent parallel = B = 1/Z = 0.577 + j4.175 msiemens Rp = 1 / Re (B); Xp = 1 / Im (B) Rp = 1.733 kΩ; Xp = 239.5 Ω Q = SQRT (Rp/50 + 1) Q = 5.972 Xm = Rp / Q Xm = 290.21 Ω Resonance Method For L-shape Matching Network Lc = Xp / (2.Pi.f); Lp = Xm / (2.Pi.f) L2 = (Lc.Lp) / (Lc + Lp); C3 = 1 / (2.Pi.f.Xm) L2 = 66.3nH C3 = 1.74pF Doing the same calculation example with the Smith Chart, it would appear as follows, First, we plot the input impedance of the device, (Z = 32.5 – j235)Ω @ 315MHz.(Figure 4). Figure 5. Plotting the Shunt Inductor and Series Capacitor Crystal Y1 or Y1A (SMT or leaded respectively) is the reference clock for all the device internal circuits. Desired crystal characteristics are: 10pF load capacitance, 30ppm, ESR < 50Ω and a -40ºC to +105ºC temperature range. Table 5 shows the crystal frequencies and one of Micrel’s approved crystal manufactures (www.hib.com.br). The oscillator of the MICRF213 is a Colpitts type. It is very sensitive to stray capacitance loads. Thus, very good care must be taken when laying out the printed circuit board. Avoid long traces and ground plane on Figure 4. Device’s Input Impedance, Z = 32.5 – j235 Ω August 19, 2015 9 Revision 2.0 Micrel, Inc. MICRF213 the top layer close to the REFOSC pins RO1 and RO2. When care is not taken in the layout, and crystals from other vendors are used, the oscillator may take longer times to start as well as the time to good data in the DO pin to show up. In some cases, if the stray capacitance is too high (>20pF), the oscillator may not start at all. The crystal frequency is calculated by REFOSC = RF Carrier/(32+(1.1/12)). The local oscillator is low side injection (32 × 9.81563MHz = 314.1MHz), that is, its frequency is below the RF carrier frequency and the image frequency is below the LO frequency. Refer to Figure 6. The product of the incoming RF signal and local oscillator signal will yield the IF frequency, which will then be demodulated by the detector of the device. Image Frequency according to Table 6. For example, if the pulse period is 140µsec, 50% duty cycle, then the pulse width will be 70µsec (PW = (140 µsec * 50%) / 100). So, a bandwidth of 9.286kHz would be necessary (0.65 / 70µsec). However, if this data stream had a pulse period with a 20% duty cycle, then the bandwidth required would be 23.2kHz (0.65 / 28µsec), which exceeds the maximum bandwidth of the demodulator circuit. If one tries to exceed the maximum bandwidth, the pulse would appear stretched or wider. Desired Signal SEL0 JP1 SEL1 JP2 Demod. BW (hertz) Shortest Pulse (usec) Maximum baud rate for 50% Duty Cycle (hertz) Short Short Open Short Short Open Open Open 1180 2360 4720 9400 551 275 138 69 908 1815 3631 7230 Table 6. JP1 and JP2 Setting, 315MHz Capacitors C6 and C4, Cth and Cagc capacitors respectively, provide the time base reference for the data pattern received. These capacitors are selected according to data profile, pulse duty cycle, dead time between two received data packets and if the data pattern has or not a preamble. See Figure 7 for an example of a data profile. Other frequencies will have different demodulator bandwidth limits, which are derived from the reference oscillator frequency. Table 7 and Table 8, below, show the limits for the other two most used frequencies. f (MHz) fLO Figure 6. Low Side Injection Local Oscillator REFOSC (MHz) 9.467411 9.81563 10.75045 Carrier (MHz) 303.825 315 345.0 HIB Part Number SA-9.467411-F-10-H-30-30-X SA-9.815630-F-10-H-30-30-X SA-10.750450-F-10-H-30-30-X Table 5. Crystal Frequency and Vendor Part Number JP1 and JP2 are the bandwidth selection for the demodulator bandwidth. To set it correctly, it is necessary to know the shortest pulse width of the encoded data sent in the transmitter. Reference the example of the data profile, in the Figure 7, below: SEL0 JP1 SEL1 JP2 Demod. BW (hertz) Shortest Pulse (usec) Short Open Short Open Short Short Open Open 1140 2280 4550 9100 570 285 143 71 PW1 PW2 Maximum baud rate for 50% Duty Cycle (hertz) 8770 1754 3500 7000 Table 7. JP1 and JP2 Setting, 303.825MHz Preamble Header 1 2 3 4 5 6 7 8 9 10 t1 t2 SEL0 JP1 SEL1 JP2 Demod. BW (hertz) Shortest Pulse (usec) Short Open Short Open Short Short Open Open 1290 2580 5170 10340 504 252 126 63 PW2 = Narrowest pulse width t1 & t2 = data period Figure 7. Example of a Data Profile PW2 is shorter than PW1, so PW2 should be used for the demodulator bandwidth calculation. The calculation is found by 0.65/shortest pulse width. After this value is found, the setting should be done August 19, 2015 Maximum baud rate for 50% Duty Cycle (Hertz) 992 1985 3977 7954 Table 8. JP1 and JP2 Setting, 345.0MHz 10 Revision 2.0 Micrel, Inc. MICRF213 For best results, the values should always be optimized for the data pattern used. As the baud rate increases, the capacitor values decrease. Table 9 shows suggested values for Manchester Encoded data at 50% duty cycle. SEL0 JP1 SEL1 JP2 Short Open Short Open Short Short Open Open Demod. BW (hertz) 1400 2800 5300 9700 Cth Cagc 100nF 47nF 22nF 10nF 4.7uF 2.2uF 1uF 0.47uF DO Pin Table 9. Suggested Cth and Cagc Values JP3 is a jumper used to configure the digital squelch function. When it is high, there is no squelch applied to the digital circuits and the DO (data out) pin yields a hash signal. When the pin is low, the DO pin activity is considerably reduced. It will have more or less than shown in the figure below depending upon the outside band noise. The penalty for using squelch is a delay in obtaining a good signal in the DO pin. That is, it takes longer for the data to show up. The delay is dependent upon many factors such as RF signal intensity, data profile, data rate, Cth and Cagc capacitor values, and outside band noise. See Figure 8 and 9. Figure 9. Data Out Pin with Squelch (SQ = 0) DO Pin Figure 8. Data Out Pin with No Squelch (SQ = 1) August 19, 2015 11 Other components used include: C5, which is a decoupling capacitor for the Vdd line; R4 reserved for future use and not needed for the evaluation board; R3 for the shutdown pin (SHDN = 0, device is operation), which can be removed if that pin is connected to a microcontroller or an external switch; and R1 and R2 which form a voltage divider for the AGC pin. One can force a voltage in this AGC pin to purposely decrease the device sensitivity. Special care is needed when doing this operation, as an external control of the AGC voltage may vary from lot to lot and may not work the same in several devices. Three other pins need to be discussed as well. They are the DO, RSSI, and shut down pins. The DO pin has a driving capability of 0.4mA. This is good enough for most of the logic families ICs in the market today. The RSSI pin provides a transfer function of the RF signal intensity vs. voltage. It is very useful to determine the signal to noise ratio of the RF link, crude range estimate from the transmitter source and AM demodulation, which requires a low Cagc capacitor value. The shut down pin (SHDN) is useful to save energy. Making its level close to Vdd (SHDN = 1), the device is then not in operation. Its DC current consumption is less than 1µA (do not forget to remove R3). When toggling from high to low, there will be a time required for the device to come to steady state mode, and a time for data to show up in the DO pin. This time will be dependent upon many things such as temperature, crystal used, and if the there is an external oscillator with faster startup time. Crystal vendors suggest that the data will show up in the DO pin around 1msec time, and 2msec over the temperature range of the device. See Figure 10. Revision 2.0 Micrel, Inc. MICRF213 3.3V MICRF2XX 10 ohm (Vdd) pin MICRF2XX Bias control & POR 4.7uF 2.2uF Test Mode Circuits Change the SHDN pin and Vdd pin connections to Test Bus (SHDN) pin (SHDN) pin 100K This device turns on, preventing POR from setting operating modes correctly To prevent the erroneous startup, a simple RC network is recommended. The 10Ω resistor and the 4.7µF capacitor provide a delay of about 200µs between the VDD and SHDN during the power up, thus ensuring the part to enter to shutdown stage before the part is actually turned on. The 2.2µF capacitor bootstraps the voltage on SHDN, ensuring that SHDN voltage leads the supply voltage on Vdd during the power up. This gives the POR circuit time to set internal register bits. The SHDN pin can be brought low to turn the chip on once the initialization is completed. The 2.2µF and 100kΩ network form a RC delay of about 200ms before the SHDN pin is brought to low again. The 100kΩ resistor discharges the SHDN pin to turn the chip on. Figure 10. Time-to-Good Data After Shut Down Cycle, Room Temperature Important Note A few customers have reported that some MICRF213 receivers do not start up correctly. When the issue occurs, DO either chatters or stays at low voltage level. An unusual operating current is observed and the part cannot receive or demodulate data even when a strong OOK signal is present. Micrel has confirmed that this is the symptom of incorrect power on reset (POR) of internal register bits. The MICRF213 is designed to start up in shutdown mode (SHDN pin must be in logic high during Vdd ramp up). When the SHDN pin is tied to GND, and if the supply is ramped up slowly, a “test bus pull down” circuit may be activated. Once the chip enters this mode, the POR does not have the chance to set register bits (and hence operating modes) correctly. The test bus pull down acts on the SHDN pin, and can be illustrated as the following diagram. Vdd pin SHDN pin The suggestion provided above will generally serve to prevent the startup issue from happening to the MICRF213 series ASK receiver. However, exact values of the RC network depend on the ramp rate of the supply voltage, and should be determined on a case-by-case basis. August 19, 2015 12 Revision 2.0 Micrel, Inc. MICRF213 PCB Considerations and Layout Figures 11 to 16 show some of the printed circuit layers for the QR211HE1 board. The MICRF213 shares the exact same board with different component values. Use the Gerber files provided (downloadable from Micrel Website: www.micrel.com) which have the remaining layers needed to fabricate this board. When copying or making one’s own boards, be sure and make the traces as short as possible. Long traces alter the matching network and the values suggested are no longer valid. Suggested Matching Values may vary due to PCB variations. A PCB trace 100 mills (2.5mm) long has about 1.1nH of inductance. Optimization should always be done with exhaustive range tests. Make individual ground connections to the ground plane with a via for each ground connection. Do not share vias with ground connections. Each ground connection = 1 via or more vias. Ground plane must be solid and possibly without interruptions. Avoid ground plane on top next to the matching elements. It normally adds additional stray capacitance which changes the matching. Do not use phenolic material, only FR4 or better materials. Phenolic material is conductive above 200MHz. The RF path should be as straight as possible avoiding loops and unnecessary turns. Separate ground and Vdd lines from other circuits (microcontroller, etc). Known sources of noise should be laid out as far as possible from the RF circuits. Avoid thick traces, the higher the frequency, the thinner the trace should be in order to minimize losses in the RF path. Figure 11. QR211/213HE1 Top Layer Figure 12. QR211/213HE1 Bottom Layer, Mirror Image August 19, 2015 13 Revision 2.0 Micrel, Inc. MICRF213 Figure 13. QR211/213HE1 Top Silkscreen Layer Figure 14. QR211/213HE1 Bottom Silkscreen Layer, Mirror Image Figure 15. QR211/213HE1 Dimensions August 19, 2015 14 Revision 2.0 Micrel, Inc. MICRF213 QR213HE1 Bill of Materials, 315MHz Item Part Number Manufacturer Description ANT1 ANT2 (1) C3 MuRata C4 Murata (1) Murata (1) Murata (1) C8 Murata (1) C9 Murata (1) (2) C5 C6 JP1,JP 2 1 1 (2) 0.1µF, 0402/0603 1 (2) 0.47µF, 0402/0603 1 6.8pF, 0402/0603 1 1.2pF, 0402/0603 1 short, 0402, 0Ω resistor 2 open, 0402, not placed 1 (np) not placed 1 JP3 J2 J3 L2 L3 Coilcraft (3) Coilcraft (3) / Murata (1) / Murata (1) / Murata (1) R1,R2 (2) R3 Y1 Vishay HCM49 (5) HIB (5) Y1A HC49 HIB U1 MICRF213AYQS Micrel Inc. (6) 1 230mm 20 AWG, rigid wire 4.7µF, 0603/0805 / Vishay (3) (np)50Ω Ant 1.8pF, 0402/0603 / Vishay Coilcraft 1 (2) / Vishay Vishay L1 Qty. Helical PCB Antenna Pattern CON6 1 / ACT1 (4) 39nH 5%, 0402/0603 1 / ACT1 (4) 68nH 5%, 0402/0603 1 / ACT1 (4) 75nH 2%, 0402/0603 1 (np) 0402, not placed 2 100kΩ, 0402 1 (np)9.81563MHz Crystal 1 9.81563MHz Crystal 1 ® 3.3V, QwikRadio 315MHz Receiver 1 Notes: 1. Murata: www.murata.com 2. Vishay: www.vishay.com 3. Coilcraft: www.coilcraft.com 4. ACT1: www.act1.com 5. HIB: www.hib.com.br 6. Micrel, Inc.: www.micrel.com August 19, 2015 15 Revision 2.0 Micrel, Inc. MICRF213 Package Information and Recommended Land Pattern(1) 16-Pin QSOP (QS) Note: 1. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com. August 19, 2015 16 Revision 2.0 Micrel, Inc. MICRF213 MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com Micrel, Inc. is a leading global manufacturer of IC solutions for the worldwide high performance linear and power, LAN, and timing & communications markets. The Company’s products include advanced mixed-signal, analog & power semiconductors; high-performance communication, clock management, MEMs-based clock oscillators & crystal-less clock generators, Ethernet switches, and physical layer transceiver ICs. Company customers include leading manufacturers of enterprise, consumer, industrial, mobile, telecommunications, automotive, and computer products. Corporation headquarters and state-of-the-art wafer fabrication facilities are located in San Jose, CA, with regional sales and support offices and advanced technology design centers situated throughout the Americas, Europe, and Asia. Additionally, the Company maintains an extensive network of distributors and reps worldwide. Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this datasheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2007 Micrel, Incorporated. August 19, 2015 17 Revision 2.0