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AD1857

AD1857

  • 厂商:

    AD(亚德诺)

  • 封装:

  • 描述:

    AD1857 - Stereo, Single Supply 16-, 18- and 20-Bit Sigma-Delta DACs - Analog Devices

  • 数据手册
  • 价格&库存
AD1857 数据手册
a Stereo, Single Supply 16-, 18- and 20-Bit Sigma-Delta DACs AD1857/AD1858 PRODUCT OVERVIEW FEATURES Low Cost, High Performance Stereo DACs 128 Times Oversampling Interpolation Filter Multibit Modulator with Triangular PDF Dither Discrete Time and Continuous Time Analog Reconstruction Filters Extremely Low Out-of-Band Energy Buffered Outputs with 2 k Output Load Drive 94 dB Dynamic Range, –90 dB THD+N Performance Digital De-emphasis and Mute 0.1 C Maximum Phase Linearity Deviation Continuously Variable Sample Rate Support Power-Down Mode 16-, 18- and 20-Bit I2S-Justified, Left-Justified Modes Offered on AD1857 Accepts 24-Bit Word 16-Bit Right-Justified and DSP Serial Port Modes Offered on AD1858 Single +5 V Supply 20-Pin SSOP Package APPLICATIONS Digital Cable TV and Direct Broadcast Satellite Set-Top Decoder Boxes Video Laser Disk, Video CD and CD-I Players High Definition Televisions, Digital Audio Broadcast Receivers CD, CD-R, DAT, DCC and MD Players Digital Audio Workstations, Computer Multimedia Products The AD1857/AD1858 are complete single-chip stereo digital audio playback components. They each comprise an advanced digital interpolation filter, a revolutionary “linearity-compensated” multibit sigma-delta (∑∆) modulator with dither, a jitter-tolerant DAC, switched capacitor and continuous time analog filters and analog output drive circuitry. Other features include digital de-emphasis processing and mute. The AD1857/AD1858 support continuously variable sample rates with essentially linear phase response, and support 50/15 µs digital de-emphasis intended for “Redbook” 44.1 kHz sample frequency playback from Compact Discs. The user must provide a master clock that is synchronous with the left/right clock at 256 or 384 times the intended sample frequency. The AD1857/AD1858 have a simple but very flexible serial data input port that allows for glueless interconnection to a variety of ADCs, DSP chips, AES/EBU receivers and sample rate converters. The AD1857 serial data input port can be configured in either 16-bit, 18-bit or 20-bit left-justified or I2S-justified modes. The AD1858 serial data input port can be configured in either 16-bit right-justified or DSP serial port compatible modes. The AD1857/AD1858 accept serial audio data in MSB first, twos-complement format. A power-down mode is offered to minimize power consumption when the device is inactive. The AD1857/AD1858 operate from a single +5 V power supply. They are fabricated on a single monolithic integrated circuit and housed in 20-pin SSOP packages for operation over the temperature range 0°C to +70°C. FUNCTIONAL BLOCK DIAGRAM DIGITAL SUPPLY 2 COMMON MODE CLOCK MODE CLOCK IN 16-/18-/20-BIT DIGITAL DATA INPUT 3 SERIAL DATA INTERFACE AD1857/AD1858 128x INTERPOLATION FILTER 128x INTERPOLATION FILTER VOLTAGE REFERENCE CLOCK CIRCUIT SERIAL MODE MUTE MULTIBIT Σ∆ MODULATOR DAC ANALOG FILTER OUTPUT BUFFER ANALOG OUTPUTS MUTE MULTIBIT Σ∆ MODULATOR DAC ANALOG FILTER OUTPUT BUFFER 4 DE-EMPHASIS MUTE POWER-DOWN/RESET ANALOG SUPPLY R EV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1997 AD1857/AD1858–SPECIFICATIONS TEST CONDITIONS UNLESS OTHERWISE NOTED Supply Voltages (AVDD, DVDD) Ambient Temperature Input Clock (FMCLK) Input Signal Input Sample Rate Measurement Bandwidth AD1857 Input Data Wordwidth AD1858 Input Data Wordwidth Load Capacitance Load Impedance Input Voltage HI (VIH) Input Voltage LO (VIL) +5.0 V 25°C 11.2896 MHz (256 × FS Mode) 1.0013 kHz –0.5 dB Full Scale 44.1 kHz 20 Hz to 20 kHz 18 Bits 16 Bits 100 pF 47 kΩ 2.4 V 0.8 V I2S-Justified Mode (Ref. Figure 7) for AD1857, Right-Justified Mode (Ref. Figure 8) for AD1858. Performance of the right and left channels are identical (exclusive of the Interchannel Gain Mismatch and Interchannel Phase Deviation specifications). Values in bold typeface are tested, all others are guaranteed, not tested. ANALOG PERFORMANCE Min Typ Max Units AD1857 Resolution AD1858 Resolution Dynamic Range (20 Hz to 20 kHz, –60 dB Input) No A-Weight Filter With A-Weight Filter Total Harmonic Distortion + Noise Analog Outputs Single-Ended Output Range (± Full Scale) Output Impedance at Each Output Pin Output Capacitance at Each Output Pin Out-of-Band Energy (0.5 × FS to 100 kHz) CMOUT DC Accuracy Gain Error Interchannel Gain Mismatch Gain Drift Interchannel Crosstalk (EIAJ method) Interchannel Phase Deviation Mute Attenuation De-emphasis Gain Error DIGITAL I/O Min 18 16 91 94 –90 0.003 2.8 3.0
AD1857 价格&库存

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