AD1864N-K

a FEATURES Dual Serial Input, Voltage Output DACs No External Components Required Operates at 8 Oversampling per Channel 5 V to 12 V Operation Cophased Outputs 115 dB Channel Separation 0.3% Interchannel Gain Matching 0.0017% THD+N APPLICATIONS Multichannel Audio Applications: Compact Disc Players Multivoice Keyboard Instruments DAT Players and Recorders Digital Mixing Consoles Multimedia Workstations PRODUCT DESCRIPTION –VS TRIM MSB I OUT AGND SJ RF VOUT +VL 1 2 REFERENCE 3 4 5 6 7 8 9 18-BIT LATCH 18-BIT D/A Complete Dual 18-Bit Audio DAC AD1864 DIP BLOCK DIAGRAMS AD1864 REFERENCE 22 MSB 21 I OUT 20 AGND 24 +VS 23 TRIM 19 SJ 18 R F – + – + 17 VOUT 16 –V L DL DR 10 LR 11 18-BIT D/A 18-BIT LATCH 15 14 LL 13 DGND CLK 12 The AD1864 is a complete dual 18-bit DAC offering excellent THD+N, while requiring no external components. Two complete signal channels are included. This results in cophased voltage or current output signals and eliminates the need for output demultiplexing circuitry. The monolithic AD1864 chip includes CMOS logic elements, bipolar and MOS linear elements and laser-trimmed thin-film resistor elements, all fabricated on Analog Devices BiMOS II process. The DACs on the AD1864 chip employ a partially-segmented architecture. The first four MSBs of each DAC are segmented into 15 elements. The 14 LSBs are produced using standard R-2R techniques. Segment and R-2R resistors are lasertrimmed to provide extremely low total harmonic distortion. This architecture minimizes errors at major code transitions resulting in low output glitch and eliminating the need for an external deglitcher. When used in the current output mode, the AD1864 provides two cophased ± 1 mA output signals. Each channel is equipped with a high performance output amplifier. These amplifiers achieve fast settling and high slew rate, producing ± 3 V signals at load currents up to 8 mA. Each output amplifier is short-circuit protected and can withstand indefinite short circuits to ground. The AD1864 was designed to balance two sets of opposing requirements, channel separation and DAC matching. High channel separation is the result of careful layout techniques. At the same time, both channels of the AD1864 have been designed to ensure matched gain and linearity as well as tracking over time and temperature. This assures optimum performance when used in stereo and multi-DAC per channel applications. A versatile digital interface allows the AD1864 to be directly connected to standard digital filter chips. This interface employs five signals: Data Left (DL), Data Right (DR), Latch Left (LL), Latch Right (LR) and Clock (CLK). DL and DR are the serial input pins for the left and right DAC input registers. Input data bits are clocked into the input register on the rising edge of CLK. A low going latch edge updates the respective DAC output. For systems using only a single latch signal, LL and LR may be connected together. For systems using only one DATA signal, DR and DL may be connected together. The AD1864 operates from ± 5 V to ± 12 V power supplies. The digital supplies, VL and –VL, can be separated from the analog supplies, VS and –VS, for reduced digital feedthrough. Separate analog and digital ground pins are also provided. The AD1864 typically dissipates only 225 mW, with a maximum power dissipation of 265 mW. The AD1864 is packaged in both a 24-pin plastic DIP and a 28-pin PLCC. Operation is guaranteed over the temperature range of –25°C to +70°C and over the voltage supply range of ± 4.75 V to ± 13.2 V. PRODUCT HIGHLIGHTS 1. 2. 3. 4. 5. 6. 7. The AD1864 is a complete dual 18-bit audio DAC. 108 dB signal-to-noise ratio for low noise operation. THD+N is typically 0.0017%. Interchannel gain and midscale matching. Output voltages and currents are cophased. Low glitch for improved sound quality. Both channels are 100% tested at 8 × FS. 8. Low Power—only 225 mW typ, 265 mW max. 9. Five-wire Interface for individual DAC control. R EV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1997 AD1864–SPECIFICATIONS unless otherwise noted) Min RESOLUTION DIGITAL INPUTS VIH VIL IIH, VIH = +VL IIL, VIL = 0.4 V Clock Input Frequency ACCURACY Gain Error Interchannel Gain Matching Midscale Error Interchannel Midscale Matching Gain Linearity Error (0 dB to –90 dB) DRIFT (0°C to +70°C) Gain Drift Midscale Drift TOTAL HARMONIC DISTORTION + NOISE* 0 dB, 990.5 Hz AD1864N, P AD1864N-J, P-J AD1864N-K —20 dB, 990.5 Hz AD1864N, P AD1864N-J, P-J AD1864N-K —60 dB, 990.5 Hz AD1864N, P AD1864N-J, P-J AD1864N-K CHANNEL SEPARATION* 0 dB, 990.5 Hz SIGNAL-TO-NOISE RATIO* (20 Hz to 30 kHz) N, N-J, N-K P, P-J D-RANGE* (WITH A-WEIGHT FILTER) –60 dB, 990.5 Hz AD1864N, P AD1864N-J, P-J AD1864N-K OUTPUT Voltage Output Configuration Output Range (± 3%) Output Impedance Load Current Short-Circuit Duration Current Output Configuration Bipolar Output Range (± 30%) Output Impedance (± 30%) POWER SUPPLY +VL and +VS –VL and –VS +I, (+VL and +VS = +5 V) –I, (–VL and –VS = –5 V) POWER DISSIPATION, ± VL = ± VS = ± 5 V TEMPERATURE RANGE Specification Operation Storage WARM-UP TIME NOTES (TA = +25 C, VL = VS = 5 V, FS = 352.8 kHz, without MSB adjustment Max Units Bits +VL 0.8 1.0 –10 V V µA µA MHz % of FSR % of FSR mV mV dB ppm of FSR/°C ppm of FSR/°C 0.006 0.004 0.0025 0.040 0.020 0.020 4.0 2.0 2.0 % % % % % % % % % dB dB dB dB dB dB Typ 18 2.0 12.7 0.4 0.3 4 5 80ns >30ns CLK >30ns The minimum clock rate of the AD1864 is at least 12.7 MHz. This clock rate allows data transfer rates of 2×, 4× , 8× and 16 × FS (where FS equals 44.1 kHz). The applications section of this data sheet contains additional guidelines for using the AD1864. >60ns >40ns >15ns >40ns LL/LR INTERNAL DAC REGISTER UPDATED WITH 18 MOST RECENT BITS >40ns >15ns >15ns DL/DR MSB 1st BIT 2nd BIT LSB (18th BIT) NEXT WORD BITS CLOCKED TOSHIFT REGISTER Figure 10. Timing Diagram REV. A –7– AD1864 –5V ANALOG SUPPLY +5V ANALOG SUPPLY 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SM5813AP/A 28 PT 27 BCKO 26 WCKO 25 DOL 24 DOR 23 VDD 22 VSS1 VSS2 21 C1 AD1864 1 –V S +VS 24 TRIM 23 MSB 22 I OUT 21 C2 LEFT CHANNEL OUTPUT RIGHT CHANNEL OUTPUT 2 TRIM 3 MSB 4 I OUT 5 AGND 6 SJ 7 RF 8 VOUT 9 +V L 10 DR 11 LR 12 CLK AGND 20 SJ 19 R F 18 VOUT 17 –VL 16 DL 15 LL 14 DGND 13 1 2 3 4 +VS 8 7 6 DG 20 19 18 OW18 17 OW20 16 15 –VS 5 AD712 OR NE5532 +5V DIGITAL SUPPLY –5V DIGITAL SUPPLY Figure 11. Complete 8 × FS 18-Bit CD Player 8-BIT CD PLAYER DESIGN Figure 11 illustrates an 18-bit CD player design incorporating an AD1864 D/A converter, an AD712 or NE5532 dual op amp and the SM5813 digital filter chip manufactured by NPC. In this design, the SM5813 filter transmits left and right digital data to both channels of the AD1864. The left and right latch signals, LL and LR, are both provided by the word clock signal (WCKO) of the digital filter. The digital filter supplies data at an 8 × FS oversample rate to each channel. The digital data is converted to analog output voltages by the output amplifiers on the AD1864. Note that no external components are required by the AD1864. Also, no deglitching circuitry is required. An AD712 or NE5532 dual op amp is used to provide the output antialias filters required for adequate image rejection. One 2-pole filter section is provided for each channel. An additional pole is created from the combination of the internal feedback resistors (RF) and the external capacitors C1 and C2. For example, the nominal 3 kΩ RF with a 360 pF capacitor for C1 and C2 will place a pole at approximately 147 kHz, effectively eliminating all high frequency noise components. Close matching of the ac characteristics of the amplifiers on the AD712 as well as their low distortion make it an ideal choice for the task. LOW distortion, superior channel separation, low power consumption and a low component count are all realized by this simple design. –8– REV. A AD1864 VOICE 1 OUTPUT +5V ANALOG SUPPLY –5V ANALOG SUPPLY VOICE 2 OUTPUT VOICE 3 OUTPUT VOICE 4 OUTPUT VOICE 5 OUTPUT VOICE 6 OUTPUT AD1864 1 –VS 2 TRIM +VS 24 TRIM 23 MSB 22 I OUT 21 AGND 20 SJ 19 R F 18 V OUT 17 –V L 16 DL 15 LL 14 DGND 13 2 AD1864 1 –VS TRIM +V 24 S TRIM 23 MSB 22 I OUT 21 AGND 20 SJ 19 R F 18 VOUT 17 –V L 16 DL 15 LL 14 DGND 13 2 AD1864 1 –VS TRIM +V S 24 TRIM 23 MSB 22 I OUT 21 AGND 20 SJ 19 R F 18 VOUT 17 –V L 16 DL 15 LL 14 DGND 13 VOICE 5 LOAD VOICE 4 LOAD VOICE 6 LOAD 3 MSB 4 I OUT ANALOG COMMON 5 AGND 6 SJ 7 RF 8 V OUT 9 +VL 10 DR VOICE 1 LOAD 11 LR 12 CLK VOICE 2 LOAD VOICE 3 LOAD DATA CLOCK 3 MSB 4 I OUT 5 AGND 6 SJ 7 RF 8 VOUT 9 +VL 10 DR 11 LR 12 CLK 3 MSB 4 I OUT 5 AGND 6 SJ 7 RF 8 VOUT 9 +VL 10 DR 11 LR 12 CLK DIGITAL COMMON –5V DIGITAL COMMON +5V DIGITAL COMMON Figure 12. Cascaded AD1864s in a Multichannel Keyboard Instrument MULTICHANNEL DIGITAL KEYBOARD DESIGN Figure 12 illustrates how to cascade AD1864s to add multiple voices to an electronic musical instrument. In this example, the data and clock signals are shared between all six DACs. As the data representing an output for a specific voice is loaded, the appropriate DAC is updated. For example, after the 18 bits representing the next output value for Voice #4 is clocked out on the data line, then “Voice 4 Load” is pulled low. This produces a new output for Voice 4. Furthermore, all voices can be returned to the same output by pulling all six load signals low. In this application, the advantages of choosing the AD1864 are clear. Its flexible digital interface allows the clock and data to be shared among all DACs. This reduces printed circuit board area requirements and also simplifies the actual layout of the board. The low power requirement of the AD1864 (typically 215 mW) is an advantage in a multiple DAC system where its power advantage is multiplied by the number of DACs used. The AD1864 requires no external components, simplifying the design, reducing the total number of components required and enhancing reliability. ADDITIONAL APPLICATIONS Figures 13 through 16 show connection diagrams for the AD1864 and a number of standard digital filter chips from Yamaha, NPC and Sony. Figure 13 shows the SM5814AP operating with pipelined data. Cophase operation is not available with the SM5814AP in 18-bit mode. Figures 14 through 16 are all examples of cophase operation. Each application operates at 8 × FS for each channel. The 2-pole Rauch low-pass filters shown in Figure 11 can be used with all of the applications shown in this data sheet. The AD711 single op amp can also be used in these applications in order to ensure maximum channel separation. REV. A –9– AD1864 –5V ANALOG SUPPLY +5V ANALOG SUPPLY AD1864 1 2 3 4 5 6 7 8 9 10 11 VSS SM5814AP (22-PIN DIP) 22 21 20 1 2 –V S TRIM +VS 24 TRIM 23 LPF MSB 22 I OUT 21 AGND 20 SJ 19 R F 18 V OUT 17 –V L 16 DL 15 LL 14 DGND 13 LPF LEFT CHANNEL OUTPUT RIGHT CHANNEL OUTPUT 3 MSB 4 I OUT 5 AGND SOMD1 19 SOMD2 18 VDD 17 BCKO 16 WDCO 15 DOR 14 DOL 13 DGL 12 6 SJ 7 RF 8 VOUT 9 +VL 10 DR 11 LR 12 CLK +5V DIGITAL SUPPLY –5V DIGITAL SUPPLY Figure 13. AD1864 with NPC SM5814AP Digital Filter –5V ANALOG SUPPLY +5V ANALOG SUPPLY AD1864 1 2 –VS TRIM +VS 24 TRIM 23 MSB 22 I OUT LPF 3 MSB 4 I OUT RIGHT CHANNEL OUTPUT 21 YM3434 1 SHL 2 3 4 V DD2 5 6 7 8 V DD1 SHR 16 16/18 15 ST 14 V SS 13 BCO 12 WCO 11 DRO 10 DLO 9 5 AGND 6 SJ 7 RF 8 VOUT 9 +VL 10 DR 11 LR 12 CLK AGND 20 SJ 19 R F 18 V OUT 17 –V L 16 DL 15 LL 14 DGND 13 LPF LEFT CHANNEL OUTPUT +5V DIGITAL SUPPLY –5V DIGITAL SUPPLY Figure 14. AD1864 with Yamaha YM3434 Digital Filter –10– REV. A AD1864 1 2 3 4 5 6 7 8 GND TEST TEST 40 TEST 39 TEST 38 TEST 37 36 –5V ANALOG SUPPLY +5V ANALOG SUPPLY AD1864 1 CXD1244S –VS +VS 24 TRIM 23 MSB 22 I OUT 21 AGND 20 SJ 19 R F 18 VOUT 17 –V L 16 DL 15 LL 14 DGND 13 LPF LEFT CHANNEL OUTPUT LPF RIGHT CHANNEL OUTPUT 35 34 2 TRIM 3 MSB 4 I OUT 5 AGND BCKO 33 XIN DATAL 32 GND 31 GND 30 DATAR 29 28 LE/WS 27 OUT 16/18 26 25 DPOL 24 23 16.9344 MHz 9 10 VDD 11 VDD 12 13 14 15 16 17 LFS 6 SJ 7 RF 8 VOUT 9 +VL 10 DR 11 LR 12 CLK 18 SONY/12S 19 20 TEST TEST 22 TEST 21 +5V DIGITAL SUPPLY –5V DIGITAL SUPPLY Figure 15. AD1864 with Sony CXD1244S Digital Filter –5V ANALOG SUPPLY +5V ANALOG SUPPLY AD1864 1 –VS 2 TRIM 3 MSB 4 I OUT +VS 24 TRIM 23 MSB 22 I OUT LPF RIGHT CHANNEL OUTPUT 21 SM5818AP (16-PIN DIP) 1 2 3 4 5 6 7 8 VSS VDD 16 BCKO 15 WDCO 14 OMOD2 13 5 AGND 6 SJ 7 RF 8 VOUT 9 +VL 10 DR 11 LR 12 CLK AGND 20 SJ 19 R F 18 V OUT 17 –V L 16 DL 15 LL 14 DGND 13 LPF LEFT CHANNEL OUTPUT DOR 12 DOL 11 10 OMOD1 9 +5V DIGITAL SUPPLY –5V DIGITAL SUPPLY Figure 16. AD1864 with NPC SM5818AP Digital Filter REV. A –11– AD1864 OTHER DIGITAL AUDIO COMPONENTS AVAILABLE FROM ANALOG DEVICES AD1856 16-BIT AUDIO DAC AD1860 18-BIT AUDIO DAC AD1862 20-BIT AUDIO DAC Complete, No External Components Required 0.0025% THD Low Cost 16-Pin DIP or SOIC Package Standard Pinout Complete, No External Components Required 0.002% THD+N 108 dB Signal-to-Noise Ratio 16-Pin DIP or SOIC Package Standard Pinout 120 dB Signal-to-Noise Ratio 0.0012% THD+N 105 dB D-Range Performance ± 1 dB Gain Linearity 16-Pin DIP OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 24-Pin Plastic DIP 28-Pin PLCC –12– REV. A PRINTED IN U.S.A. C1405c–1–6/97