Multiple Output, High Precision,
Dual-Tracking Reference
AD588
Data Sheet
FUNCTIONAL BLOCK DIAGRAM
Low drift: 1.5 ppm/°C
Low initial error: 1 mV
Pin programmable output
+10 V, +5 V, ±5 V tracking, −5 V, −10 V
Flexible output force and sense terminals
High impedance ground sense
16-lead SOIC package and 16-lead CERDIP
MIL-STD-883-compliant versions available
NOISE
REDUCTION
VHIGH
A3 IN
A3 OUT
SENSE
7
6
4
3
A3
A3 OUT
FORCE
14
A4 OUT
SENSE
15
A4 OUT
FORCE
A1
R4
R1
A4
R2
GENERAL DESCRIPTION
The AD588 represents a major advance in state-of-the-art
monolithic voltage references. Low initial error and low
temperature drift give the AD588 absolute accuracy performance
previously not available in monolithic form. The AD588 uses a
proprietary ion-implanted, buried Zener diode and laser-wafer
drift trimming of high stability thin film resistors to provide
outstanding performance.
R5
R6
R3
A2
5
GAIN
ADJ
9
10
GND
GND
SENSE SENSE
–IN
+IN
8
12
11
13
VLOW
BAL
ADJ
VCT
A4 IN
+VS
16
–VS
Figure 1.
PRODUCT HIGHLIGHTS
The low initial error allows the AD588 to be used as a system
reference in precision measurement applications requiring
12-bit absolute accuracy. In such systems, the AD588 can provide a
known voltage for system calibration in software. The low drift
also allows compensation for the drift of other components in a
system. Manual system calibration and the cost of periodic
recalibration can, therefore, be eliminated. Furthermore, the
mechanical instability of a trimming potentiometer and the
potential for improper calibration can be eliminated by using
the AD588 in conjunction with auto calibration software.
2.
The AD588 is available in seven versions. The AD588JQ and
AD588KQ are packaged in a 16-lead CERDIP and are specified
for 0°C to +70°C operation. The AD588AQ and AD588BQ are
packaged in a 16-lead CERDIP, and the AD588ARWZ is packaged
in a 16-lead SOIC, and they are specified for the −25°C to +85°C
industrial temperature range. The ceramic AD588TE and
AD588TQ grades are specified for the full military/aerospace
temperature range.
2
AD588
The AD588 includes the basic reference cell and three additional
amplifiers that provide pin programmable output ranges. The
amplifiers are laser trimmed for low offset and low drift to maintain
the accuracy of the reference. The amplifiers are configured to
allow Kelvin connections to the load and/or boosters for driving
long lines or high current loads, delivering the full accuracy of
the AD588 where it is required in the application circuit.
Rev. M
1
RB
00531-001
FEATURES
1.
3.
4.
The AD588 offers 12-bit absolute accuracy without any
user adjustments. Optional fine-trim connections are
provided for applications requiring higher precision. The
fine trimming does not alter the operating conditions of
the Zener or the buffer amplifiers, and so does not increase
the temperature drift.
Output noise of the AD588 is very low, typically 6 µV p-p.
A pin is provided for additional noise filtering using an
external capacitor.
A precision ±5 V tracking mode with Kelvin output
connections is available with no external components.
Tracking error is less than 1 mV, and a fine trim is available
for applications requiring exact symmetry between the
+5 V and −5 V outputs.
Pin strapping capability allows configuration of a wide
variety of outputs: ±5 V, +5 V, +10 V, −5 V, and −10 V dual
outputs or +5 V, −5 V, +10 V, and −10 V single outputs.
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AD588
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Temperature Performance......................................................... 10
General Description ......................................................................... 1
Kelvin Connections .................................................................... 11
Functional Block Diagram .............................................................. 1
Dynamic Performance ............................................................... 13
Product Highlights ........................................................................... 1
Using the AD588 with Converters ............................................... 15
Revision History ............................................................................... 2
AD7535 14-Bit Digital-to-Analog Converter ......................... 15
Specifications..................................................................................... 3
AD569 16-Bit Digital-to-Analog Converter ........................... 15
Absolute Maximum Ratings............................................................ 4
Substituting for Internal References ........................................ 16
ESD Caution .................................................................................. 4
AD574A 12-Bit Analog-to-Digital Converter ........................ 16
Pin Configuration and Function Descriptions ............................. 5
Resistance Temperature Detector (RTD) Excitation ............. 16
Theory of Operation ........................................................................ 6
Boosted Precision Current Source ........................................... 17
Applications Information ................................................................ 7
Bridge Driver Circuits ............................................................... 17
Calibration ..................................................................................... 7
Outline Dimensions ....................................................................... 19
Noise Performance and Reduction ............................................ 9
Ordering Guide .......................................................................... 19
Turn-On Time ............................................................................ 10
REVISION HISTORY
11/15—Rev. L to Rev. M
Changes to Figure 13 ...................................................................... 11
10/10—Rev. K to Rev. L
Changes to Amplifier A2 Plus and Minus Input Labels
in Figures ........................................................................ Throughout
9/10—Rev. J to Rev. K
Changes to Product Title ................................................................. 1
4/10—Rev. I to Rev. J
Changes to Calibration Section ...................................................... 8
11/09—Rev. H to Rev. I
Changes to Figure 40 and Figure 41 ............................................. 18
10/09—Rev. G to Rev. H
Changes to General Description Section ...................................... 1
6/06—Rev. F to Rev. G
Changes to Table 5 ............................................................................ 7
Updated Outline Dimensions ....................................................... 19
3/06—Rev. E to Rev. F
Replaced Figure 5 ............................................................................. 8
Updated Outline Dimensions ....................................................... 19
11/05—Rev. D to Rev. E
Updated Format .................................................................. Universal
Added SOIC Version .......................................................... Universal
Changes to Pin 14 in Figures ............................................ Universal
Changes to Pin 9 and Pin 10 in Figures ........................... Universal
Changes to Specifications Section ...................................................3
Added Table 3 ....................................................................................4
Added Pin Configuration and Function Descriptions Section ...5
Added Table 4 ....................................................................................5
Changes to Grade in Reference and in Figure 12 ....................... 11
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 19
2/03—Rev. C to Rev. D
Added KQ Model and Deleted SQ and TQ Models ...... Universal
Changes to General Description .....................................................1
Change to Product Highlights .........................................................1
Changes to Specifications .................................................................2
Changes to Ordering Guide .............................................................3
Updated Outline Dimensions ....................................................... 15
10/02—Rev. B to Rev. C
Changes to General Description .....................................................1
Changes to Specifications .................................................................2
Changes to Ordering Guide .............................................................3
Changes to Table 1.............................................................................5
Deleted Figure 10c .............................................................................7
Updated Outline Dimensions ....................................................... 15
Rev. M | Page 2 of 20
Data Sheet
AD588
SPECIFICATIONS
Typical at 25°C, 10 V output, VS = ±15 V, unless otherwise noted.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate
outgoing quality levels. All minimum and maximum specifications are guaranteed, although only those shown in boldface are tested on
all production units.
Table 1.
Parameter 1
OUTPUT VOLTAGE ERROR
+10 V, −10 V Outputs
+5 V, −5 V Outputs
±5 V TRACKING MODE
Symmetry Error
OUTPUT VOLTAGE DRIFT
0°C to 70°C (J, K, B)
−25°C to +85°C (A, B)
GAIN ADJ AND BAL ADJ 2
Trim Range
Input Resistance
LINE REGULATION
TMIN to TMAX 3
LOAD REGULATION
TMIN to TMAX
+10 V Output, 0 mA < IOUT < 10 mA
−10 V Output, −10 mA < IOUT < 0 mA
SUPPLY CURRENT
TMIN to TMAX
Power Dissipation
OUTPUT NOISE (Any Output)
0.1 Hz to 10 Hz
Spectral Density, 100 Hz
LONG-TERM STABILITY (at 25°C)
BUFFER AMPLIFIERS
Offset Voltage
Offset Voltage Drift
Bias Current
Open-Loop Gain
Output Current (A3, A4)
Common-Mode Rejection (A3, A4)
VCM = 1 V p-p
Short Circuit Current
TEMPERATURE RANGE
Specified Performance
J, K Grades
A, B Grades
AD588JQ/AD588AQ
Min
Typ
Max
±3
±3
±2
AD588BQ/AD588KQ
Min
Typ
Max
Min
−1
−1
−5
−5
±1.5
±0.75
±3
±3
±1.5
±3
±4
150
6
180
±2
±4
150
Unit
+5
+5
mV
mV
±1.5
mV
±3
±3
ppm/°C
ppm/°C
±4
150
mV
kΩ
±200
±200
±200
µV/V
±50
±50
±50
±50
±50
±50
µV/mA
µV/mA
10
300
mA
mW
6
180
10
300
6
180
10
300
6
100
15
6
100
15
6
100
15
µV p-p
nV/√Hz
ppm/1000 hr
100
1
20
110
10
1
20
110
100
1
20
110
µV
µV/°C
nA
dB
mA
−10
+10
−10
100
50
0
−25
+1
+1
AD588ARWZ
Typ
Max
+10
−10
100
50
70
+85
0
−25
+10
100
50
70
+85
−25
dB
mA
+85
°C
°C
Specifications tested using ±5 V configuration, unless otherwise indicated. See Figure 4 through Figure 6 for output configurations at +10 V, −10 V, +5 V, −5 V
and ±5 V.
Gain and balance adjustments guaranteed capable of trimming output voltage error and symmetry error to zero.
3
For ±10 V output, ±VS can be as low as ±12 V. See Table 3 for test conditions at various voltages.
1
2
Rev. M | Page 3 of 20
AD588
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
+VS to −VS
Power Dissipation (25°C)
Storage Temperature Range
Lead Temperature (Soldering 10 sec)
Package Thermal Resistance (θJA/θJC)
Output Protection
Rating
36 V
600 mW
−65°C to +150°C
300°C
90°C/25°C/W
All outputs safe if
shorted to ground
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Table 3. Test Conditions
Voltage
+10 V Output
−10 V Output
±5 V Output
Conditions
−VS = −15 V, +13.5 V ≤ +VS ≤ +18 V
−18 V ≤ −VS ≤ −13.5 V, +VS = +15 V
+VS = +18 V, −VS = −18 V
+VS = +10.8 V, −VS = −10.8 V
Rev. M | Page 4 of 20
Data Sheet
AD588
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
A3 OUT FORCE 1
16 –VS
+VS 2
15 A4 OUT FORCE
A3 OUT SENSE 3
A3 IN 4
14 A4 OUT SENSE
AD588
13 A4 IN
TOP VIEW
GAIN ADJ 5 (Not to Scale) 12 BAL ADJ
11 VCT
10 GND SENSE –IN
9
GND SENSE +IN
00531-002
VHIGH 6
NOISE 7
REDUCTION
VLOW 8
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
Mnemonic
A3 OUT FORCE
+VS
A3 OUT SENSE
A3 IN
GAIN ADJ
VHIGH
NOISE REDUCTION
8
9
10
11
12
13
14
15
16
VLOW
GND SENSE +IN
GND SENSE −IN
VCT
BAL ADJ
A4 IN
A4 OUT SENSE
A4 OUT FORCE
−VS
Description
Output from Buffering Amplifier 3 with Kelvin Force. Connect to Pin 3.
Positive Power Supply.
Output from Buffering Amplifier 3 with Kelvin Sense. Connect to Pin 1.
Positive Input to Amplifier 3. Connect to VHIGH, Pin 6.
Reference Gain Adjustment for Calibration. See the Calibration section.
Unbuffered Reference High Output.
Noise Filtering Pin. Connect external 1 µF capacitor to ground to reduce the output noise
(see the Noise Performance and Reduction section). Can be left open.
Unbuffered Reference Low Output.
Positive Input to the Ground Sense Amplifier.
Negative Input to the Ground Sense Amplifier.
Center Tap Voltage used for Calibration. See the Calibration section.
Reference Centering Adjustment for Calibration. See the Calibration section.
Positive Input to Amplifier 4. Connect to VLOW, Pin 8.
Output of Buffering Amplifier 4 with Kelvin Sense. Connect to Pin 15.
Output of Buffering Amplifier 4 with Kelvin Force. Connect to Pin 14.
Negative Power Supply.
Rev. M | Page 5 of 20
AD588
Data Sheet
THEORY OF OPERATION
The AD588 consists of a buried Zener diode reference,
amplifiers used to provide pin programmable output ranges,
and associated thin-film resistors, as shown in Figure 3. The
temperature compensation circuitry provides the device with a
temperature coefficient of 1.5 ppm/°C or less.
Ground sensing for the circuit is provided by Amplifier A2. The
noninverting input (Pin 9) senses the system ground, which is
transferred to the point on the circuit where the inverting input
(Pin 10) is connected. This can be Pin 6, Pin 8, or Pin 11. The
output of A2 drives Pin 8 to the appropriate voltage. Thus, if
Pin 10 is connected to Pin 8, the VLOW pin is the same voltage as
the system ground. Alternatively, if Pin 10 is connected to the
VCT pin, it is a ground; and Pin 6 and Pin 8 are +5 V and −5 V,
respectively.
Amplifier A1 performs several functions. A1 primarily acts to
amplify the Zener voltage from 6.5 V to the required 10 V output.
In addition, A1 provides for external adjustment of the 10 V output
through Pin 5, GAIN ADJ. Using the bias compensation resistor
between the Zener output and the noninverting input to A1, a
capacitor can be added at the NOISE REDUCTION pin (Pin 7)
to form a low-pass filter and reduce the noise contribution of the
Zener to the circuit. Two matched 10 kΩ nominal thin-film
resistors (R4 and R5) divide the 10 V output in half. Pin VCT
(Pin 11) provides access to the center of the voltage span and
BAL ADJ (Pin 12) can be used for fine adjustment of this
division.
Amplifier A3 and Amplifier A4 are internally compensated and
are used to buffer the voltages at Pin 6, Pin 8, and Pin 11, as well
as to provide a full Kelvin output. Thus, the AD588 has a full
Kelvin capability by providing the means to sense a system
ground and provide forced and sensed outputs referenced to
that ground.
Note that both positive and negative supplies are required for
operation of the AD588.
NOISE
REDUCTION
VHIGH
A3 IN
A3 OUT
SENSE
7
6
4
3
A3
1
A3 OUT
FORCE
14
A4 OUT
SENSE
15
A4 OUT
FORCE
RB
A1
R4
R1
A4
R2
R5
R6
R3
5
9
+VS
16
–VS
10
GND
GND
SENSE SENSE
+IN
–IN
8
12
11
13
VLOW
BAL
ADJ
VCT
A4 IN
Figure 3. AD588 Functional Block Diagram
Rev. M | Page 6 of 20
00531-003
A2
GAIN
ADJ
2
AD588
Data Sheet
AD588
APPLICATIONS INFORMATION
The AD588 can be configured to provide +10 V and –10 V
reference outputs, as shown in Figure 4 and Figure 6, respectively.
It can also be used to provide +5 V, −5 V, or a 5 V tracking
reference, as shown in Figure 5. Table 5 details the appropriate
pin connections for each output range. In each case, Pin 9 is
connected to system ground, and power is applied to Pin 2
and Pin 16.
The architecture of the AD588 provides ground sense and
uncommitted output buffer amplifiers that offer the user a great
deal of functional flexibility. The AD588 is specified and tested
in the configurations shown in Figure 6. The user can choose to
take advantage of the many other configuration options available
with the AD588. However, performance in these configurations
is not guaranteed to meet the extremely stringent data sheet
specifications.
As indicated in Table 5, a +5 V buffered output can be provided
using Amplifier A4 in the +10 V configuration (Figure 4). A
−5 V buffered output can be provided using Amplifier A3 in the
−10 V configuration (Figure 6). Specifications are not guaranteed
for the +5 V or −5 V outputs in these configurations. Performance
is similar to that specified for the +10 V or −10 V outputs.
As indicated in Table 5, unbuffered outputs are available at
Pin 6, Pin 8, and Pin 11. Loading of these unbuffered outputs
impairs circuit performance.
Amplifier A3 and Amplifier A4 can be used interchangeably.
However, the AD588 is tested (and the specifications are
guaranteed) with the amplifiers connected, as indicated in
Figure 4 and Table 5. When either A3 or A4 is unused, its
output force and sense pins should be connected or the input
tied to ground.
Two outputs of the same voltage can be obtained by connecting
both A3 and A4 to the appropriate unbuffered output on Pin 6,
Pin 8, or Pin 11. Performance in these dual-output configurations
typically meets data sheet specifications.
CALIBRATION
Generally, the AD588 meets the requirements of a precision
system without additional adjustment. Initial output voltage
error of 1 mV and output noise specs of 10 µV p-p allow for
accuracies of 12 bits to 16 bits. However, in applications where
an even greater level of accuracy is required, additional calibration may be called for. Provision for trimming has been made
through the use of the GAIN ADJ and BAL ADJ pins (Pin 5 and
Pin 12, respectively).
The AD588 provides a precision 10 V span with a center tap
(VCT) that is used with the buffer and ground sense amplifiers to
achieve the voltage output configurations in Table 5. GAIN ADJ
and BAL ADJ can be used in any of these configurations to trim
the magnitude of the span voltage and the position of the center
tap within the span. The gain adjust should be performed first.
Although the trims are not interactive within the device, the
gain trim moves the balance trim point as it changes the
magnitude of the span.
Table 5. Pin Connections
Range
+10 V
Connect
Pin 10 to Pin
8
−5 V or +5 V
11
−10 V
6
+5 V
−5 V
11
11
1
Unbuffered 1 Output on Pins
−10 V
−5 V 0 V +5 V +10 V
8
11
6
8
8
11
11
6
6
6
8
Buffered Output
Connections
11 to 13, 14 to 15,
6 to 4, and 3 to 1
8 to 13, 14 to 15,
6 to 4, and 3 to 1
8 to 13, 14 to 15,
11 to 4, and 3 to 1
6 to 4 and 3 to 1
8 to 13 and 14 to 15
Unbuffered outputs should not be loaded.
Rev. M | Page 7 of 20
−10 V
Buffered Output on Pins
−5 V 0 V +5 V +10 V
15
1
15
1
15
1
1
15
AD588
Data Sheet
39kΩ
Figure 5 shows gain and balance trims in a +5 V and −5 V
tracking configuration. A 100 kΩ, 20-turn potentiometer
is used for each trim. The potentiometer for gain trim is
connected between Pin 6 (VHIGH) and Pin 8 (VLOW) with the
wiper connected to Pin 5 (GAIN ADJ). The potentiometer is
adjusted to produce exactly 10 V between Pin 1 and Pin 15, the
amplifier outputs. The balance potentiometer, also connected
between Pin 6 and Pin 8 with the wiper to Pin 12 (BAL ADJ), is
then adjusted to center the span from +5 V to −5 V.
1µF
RB
A1
A3
+5V
A4
–5V
AD588
R4
R1
R2
Trimming in other configurations works in exactly the same
manner. When producing +10 V and +5 V, GAIN ADJ is used
to trim +10 V and BAL ADJ is used to trim +5 V. In the −10 V
and −5 V configuration, GAIN ADJ is again used to trim the
magnitude of the span, −10 V, while BAL ADJ is used to trim
the center tap, −5 V.
+15V
NOISE
REDUCTION
R5
+VS
+15V
R6
R3
0.1µF
SYSTEM
GROUND
A2
–VS
0.1µF
–15V
SYSTEM
GROUND
Trimming the AD588 introduces no additional errors over
temperature, so precision potentiometers are not required. For
single-output voltage ranges, or in cases when balance adjust is
not required, Pin 12 should be connected to Pin 11. If gain
adjust is not required, Pin 5 should be left floating.
100kΩ
20T
BALANCE
ADJUST
00531-005
100kΩ
20T
GAIN ADJUST
Figure 5. +5 V and −5 V Outputs
In single output configurations, GAIN ADJ is used to trim
outputs utilizing the full span (+10 V or −10 V), while BAL ADJ
is used to trim outputs using half the span (+5 V or −5 V).
0.1µF
Input impedance on both the GAIN ADJ and BAL ADJ pins is
approximately 150 kΩ. The GAIN ADJ trim network effectively
attenuates the 10 V across the trim potentiometer by a factor of
about 1500 to provide a trim range of −3.5 mV to +7.5 mV with
a resolution of approximately 550 μV/turn (20-turn potentiometer). The BAL ADJ trim network attenuates the trim voltage by
a factor of about 1400, providing a trim range of ±4.5 mV with
resolution of 450 μV/turn.
NOISE
REDUCTION
0.1µF
7
6
4
A3
A1
AD588
A4
R5
3
R6
+10V
1
A2
A1
5
14
R4
A4
R5
+VS 2
R6
AD588
A2
–VS 16
9
10
8
12
11
13
+15V
0.1µF
SYSTEM
GROUND
0.1µF
–15V
00531-004
5
SYSTEM
GROUND
–VS 16
10
8
12
11
13
SYSTEM
GROUND
+5V
15
9
Figure 4. +10 V Output
Rev. M | Page 8 of 20
+15V
0.1µF
SYSTEM
GROUND
0.1µF
–15V
00531-006
A3
R3
–10V
15
+VS 2
RB
R2
–5V
1
14
R4
R1
R3
R1
3
RB
R2
6
7
4
Figure 6. −10 V Output
Data Sheet
AD588
NOISE PERFORMANCE AND REDUCTION
The noise generated by the AD588 is typically less than 6 µV p-p
over the 0.1 Hz to 10 Hz band. Noise in a 1 MHz bandwidth is
approximately 600 µV p-p. The dominant source of this noise is
the buried Zener, which contributes approximately 100 nV/√Hz. In
comparison, the op amp’s contribution is negligible. Figure 7
shows the 0.1 Hz to 10 Hz noise of a typical AD588.
1µV
00531-007
If further noise reduction is desired, an optional capacitor, CN,
can be added between the NOISE REDUCTION pin and
ground, as shown in Figure 5.
This forms a low-pass filter with the 4 kΩ RB on the output of
the Zener cell. A 1 µF capacitor has a 3 dB point at 40 Hz and
reduces the high frequency noise (to 1 MHz) to about
200 µV p-p. Figure 8 shows the 1 MHz noise of a typical AD588
both with and without a 1 µF capacitor.
Note that a second capacitor is needed in order to implement
the noise reduction feature when using the AD588 in the −10 V
mode (Figure 6). The noise reduction capacitor is limited to
0.1 µF maximum in this mode.
Figure 7. 0.1 Hz to 10 Hz Noise (0.1 Hz to 10 Hz BPF
with Gain of 1000 Applied)
CN = 1mF
00531-008
NO CN
Figure 8. Effect of 1 µF Noise Reduction Capacitor on Broadband Noise
Rev. M | Page 9 of 20
AD588
Data Sheet
TURN-ON TIME
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified
error band is the turn-on settling time. Two components
normally associated with this are the time for active circuits to
settle and the time for thermal gradients on the chip to stabilize.
Figure 9 and Figure 10 show the turn-on characteristics of the
AD588. The settling is about 600 µs. Note the absence of any
thermal tails when the horizontal scale is expanded to 2 ms/cm
in Figure 10.
Output turn-on time is modified when an external noise
reduction capacitor is used. When present, this capacitor
presents an additional load to the internal Zener diode current
source, resulting in a somewhat longer turn-on time. In the case
of a 1 µF capacitor, the initial turn-on time is approximately
60 ms (see Figure 11).
Note that if the noise reduction feature is used in the ±5 V
configuration, a 39 kΩ resistor between Pin 6 and Pin 2 is
required for proper startup.
+VS
+VS
–VS
VOUT
00531-009
00531-011
VOUT
Figure 9. Electrical Turn-On
Figure 11. Turn-On with CN = 1 µF
TEMPERATURE PERFORMANCE
The AD588 is designed for precision reference applications where
temperature performance is critical. Extensive temperature testing
ensures that the device’s high level of performance is maintained
over the operating temperature range.
00531-010
VOUT
Figure 12 shows typical output temperature drift for the AD588BQ
and illustrates the test methodology. The box in Figure 12 is
bounded on the sides by the operating temperature extremes
and on top and bottom by the maximum and minimum output
voltages measured over the operating temperature range. The
slope of the diagonal drawn from the lower left corner of the
box determines the performance grade of the device.
Figure 10. Extended Time Scale Turn-On
SLOPE = T.C. =
VMAX – VMIN
(TMAX – TMIN) × 10 × 1–4
10.0013V – 10.00025V
10.002
(85°C – –25°C) × 10 × 10 –4
OUTPUT (Volts)
= 0.95ppm/°C
VMAX
10.001
VMIN
10.000
–35 –15 5 25 45 65 85
TEMPERATURE (°C)
VMIN
VMAX
00531-012
+VS
Figure 12. Typical AD588BQ Temperature Drift
Rev. M | Page 10 of 20
Data Sheet
AD588
–25°C TO +85°C
AD588K
1.05
AD588A
1.40 (TYP)
3.30
AD588B
1.05
3.30
I=0
R
V = 10V – RIL
R
IL
RLOAD
I=0
IL
+
10V
–
V = 10V
RLOAD
V = 10V – RIL
Figure 14. Advantage of Kelvin Connection
In some single-output applications, one amplifier can be
unused. In such cases, the unused amplifier should be
connected as a unity-gain follower (force and sense pin tied
together), and the input should be connected to ground.
An unused amplifier section can be used for other circuit
functions, as well. Figure 15 through Figure 19 show the typical
performance of A3 and A4.
Figure 13. Maximum Output Change—mV
0
100
KELVIN CONNECTIONS
The Kelvin connection of Figure 14 overcomes the problem by
including the wire resistance within the forcing loop of the
amplifier and sensing the load voltage. The amplifier corrects
for any errors in the load voltage. In the circuit shown, the
output of the amplifier would actually be at 10 V + VERROR, and
the voltage at the load would be the desired 10 V.
–30
80
GAIN
OPEN-LOOP GAIN (dB)
Force and sense connections, also referred to as Kelvin
connections, offer a convenient method of eliminating the
effects of voltage drops in circuit wires. As seen in Figure 14,
the load current and wire resistance produce an error
(VERROR = R × IL) at the load.
–60
60
–90
40
PHASE
20
–120
0
–150
–20
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
–180
10M
Figure 15. Open-Loop Frequency Response (A3, A4)
Rev. M | Page 11 of 20
PHASE (Degrees)
0°C TO +70°C
2.10
R
00531-015
AD588J
MAXIMUM OUTPUT CHANGE (mV)
00531-013
DEVICE
GRADE
The AD588 has three amplifiers that can be used to implement
Kelvin connections. Amplifier A2 is dedicated to the ground
force-sense function, while uncommitted Amplifier A3 and
Amplifier A4 are free for other force-sense chores.
00531-014
Each AD588 A and B grade unit is tested at −25°C, 0°C, +25°C,
+50°C, +70°C, and +85°C. This approach ensures that the
variations of output voltage that occur as the temperature
changes within the specified range is contained within a box
whose diagonal has a slope equal to the maximum specified
drift. The position of the box on the vertical scale changes from
device to device as initial error and the shape of the curve vary.
Maximum height of the box for the appropriate temperature
range is shown in Figure 13. Duplication of these results requires
a combination of high accuracy and stable temperature control
in a test system. Evaluation of the AD588 produces a curve
similar to that in Figure 12, but output readings may vary,
depending on the test methods and equipment utilized.
AD588
Data Sheet
110
110
VS = ±15V
VCM = 1V p-p +25°C
100
100
+SUPPLY
80
60
–SUPPLY
60
40
40
20
20
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
0
10
00531-016
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
00531-019
CMRR (dB)
80
Figure 19. Common-Mode Rejection vs. Frequency (A3, A4)
Figure 16. Power Supply Rejection vs. Frequency (A3, A4)
100
NOISE SPECTRAL DENSITY (nV/√Hz)
80
70
60
50
40
30
20
10
0
1
10
100
FREQUENCY (Hz)
1k
Figure 20. Input Noise Voltage Spectral Density
Figure 17. Unity-Gain Follower Pulse Response (Large Signal)
Figure 18. Unity-Gain Follower Pulse Response (Small Signal)
Rev. M | Page 12 of 20
10k
00531-020
00531-017
90
00531-018
POWER SUPPLY REJECTION (dB)
VS = ±15V WITH
1V p-p SINE WAVE
Data Sheet
AD588
The output buffer amplifiers (A3 and A4) are designed to
provide the AD588 with static and dynamic load regulation
superior to less complete references. Many analog-to-digital and
digital-to-analog converters present transient current loads to
the reference, and poor reference response can degrade converter
performance. Figure 21 and Figure 22 display the characteristics
of the AD588 output amplifier driving a 0 mA to 10 mA load.
In some applications, a varying load can be both resistive and
capacitive in nature or can be connected to the AD588 by a long
capacitive cable. Figure 25 and Figure 26 display the output
amplifier characteristics driving a 1000 pF, 0 mA to 10 mA load.
A3 OR A4
VOUT
CL
1000pF
10V
1kΩ
10V
0V
VL
A3 OR A4
Figure 25. Capacitive Load Transient Response Test Circuit
VOUT
IL
1kΩ
10V
0V
VL
00531-021
10V
00531-025
DYNAMIC PERFORMANCE
Figure 21. Transient Load Test Circuit
CL = 0
CL = 1000pF
VL
00531-026
VOUT
Figure 26. Output Response with Capacitive Load
Figure 22. Large-Scale Transient Response
Figure 23 and Figure 24 display the output amplifier
characteristics driving a 5 mA to 10 mA load, a common
situation found when the reference is shared among multiple
converters or is used to provide a bipolar offset current.
Figure 27 and Figure 28 display the crosstalk between output
amplifiers. The top trace shows the output of A4, dc-coupled
and offset by 10 V, while the output of A3 is subjected to a 0 mA
to 10 mA load current step. The transient at A4 settles in about
1 μs, and the load-induced offset is about 100 μV.
A4
+
10V
–
A3 OR A4
VOUT
A3
1kΩ
VL
10V
0V
VOUT
IL
VL
2kΩ
10V
0V
2kΩ
Figure 27. Load Crosstalk Test Circuit
00531-023
+
10V
–
+
10V
–
00531-027
00531-022
VL
Figure 23. Transient and Constant Load Test Circuit
VOUT
1mV/CM
VOUT
VOUT
200mV/CM
00531-028
VL
Figure 28. Load Crosstalk
00531-024
VL
Figure 24. Transient Response 5 mA to10 mA Load
Rev. M | Page 13 of 20
AD588
Data Sheet
Attempts to drive a large capacitive load (in excess of 1000 pF)
can result in ringing or oscillation, as shown in the step response
photo (Figure 29). This is due to the additional pole formed by
the load capacitance and the output impedance of the amplifier,
which consumes phase margin.
VIN
The recommended method of driving capacitive loads of this
magnitude is shown in Figure 30. The 150 Ω resistor isolates the
capacitive load from the output stage, while the 10 kΩ resistor
provides a dc feedback path and preserves the output accuracy.
The 1 µF capacitor provides a high frequency feedback loop.
The performance of this circuit is shown in Figure 31.
00531-031
VOUT
Figure 31. Output Amplifier Step Response Using Figure 30 Compensation
VIN
00531-029
VOUT
Figure 29. Output Amplifier Step Response, CL = 1 µF
10kΩ
1µF
150Ω
VOUT
CL
1µF
00531-030
+
VIN
–
Figure 30. Compensation for Capacitive Loads
Rev. M | Page 14 of 20
Data Sheet
AD588
USING THE AD588 WITH CONVERTERS
AD569 16-BIT DIGITAL-TO-ANALOG CONVERTER
The AD588 is an ideal reference for a wide variety of analog-todigital and digital-to-analog converters. Several representative
examples follow.
Another application that fully utilizes the capabilities of the AD588
is supplying a reference for the AD569, as shown in Figure 33.
Amplifier A2 senses system common and forces VCT to assume this
value, producing +5 V and −5 V at Pin 6 and Pin 8, respectively.
Amplifier A3 and Amplifier A4 buffer these voltages out to the
appropriate reference force-sense pins of the AD569. The full
Kelvin scheme eliminates the effect of the circuit traces or wires and
the wire bonds of the AD588 and AD569 themselves, which would
otherwise degrade system performance.
AD7535 14-BIT DIGITAL-TO-ANALOG CONVERTER
High resolution CMOS digital-to-analog converters require a
reference voltage of high precision to maintain rated accuracy.
The combination of the AD588 and AD7535 takes advantage of
the initial accuracy, drift, and full Kelvin output capability of the
AD588, as well as the resolution, monotonicity, and accuracy of the
AD7535 to produce a subsystem with outstanding characteristics
(see Figure 32).
VREFS
6
7
N.C.
VDD
28
26
1
14-BIT DAC
A3
1
+10V
VREF
RB
AD588
AGNDS
14
23
LDAC
24
CSLSB
22
CSMSB
25
WR
5
AGNDF
15
6
R5
2
+VS
16
–VS
R6
R3
MS
INPUT
REGISTER
LS
INPUT
REGISTER
A2
10
12
8
11
13
8
21
7
27
DB13
DB0
DGND
VSS
Figure 32. AD588/AD7535 Connections
+12V
–12V
16
6
4
VH
1
A3 + IN
A3
OUT
3
1
A3
A3 – IN
3
+5V
2
+VS
28
–VS
+VREF
FORCE
+VREF
SENSE
AD569
A1
12
10kΩ
11
10kΩ
A2 – IN
A2
A2 + IN
A4 – IN
AD588
A4
8
13
10
9
14
15
–5V
16
15
–VREF
SENSE
S
E
L
E
C
T
O
R
S
E
L
T
E
A
C
P
T
O
R
17
VOUT
–5V TO
+5V
–VREF
FORCE
A4 + IN
8 MSBs
8 LSBs
GND 18
LATCHES
13
14
12
9
7
4
19 22
24 27
DB15
DB0
Figure 33. High Accuracy ±5 V Tracking Reference for AD569
Rev. M | Page 15 of 20
8
23
HBE LBE
CS LDAC
00531-033
VL
A4
OUT
S
E
G
M
E
N
T
VCT
00531-032
R2
2
IOUT
AD7535
DAC REGISTER
A4
9
4
R4
R1
5
RFS
2
14
A1
3
3
4
AD588
Data Sheet
SUBSTITUTING FOR INTERNAL REFERENCES
RESISTANCE TEMPERATURE DETECTOR (RTD)
EXCITATION
Many converters include built-in references. Unfortunately,
such references are the major source of drift in these converters.
By using a more stable external reference like the AD588, drift
performance can be improved dramatically.
The RTD is a circuit element whose resistance is characterized
by a positive temperature coefficient. A measurement of
resistance indicates the measured temperature. Unfortunately, the
resistance of the wires leading to the RTD often adds error to this
measurement. The 4-wire ohms measurement overcomes this
problem. This method uses two wires to bring an excitation
current to the RTD and two additional wires to tap off the resulting
RTD voltage. If these additional two wires go to a high input
impedance measurement circuit, the effect of their resistance is
negligible. They therefore transmit the true RTD voltage.
AD574A 12-BIT ANALOG-TO-DIGITAL CONVERTER
The AD574A is specified for gain drift from 10 ppm/°C to
50 ppm/°C (depending on grade), using its on-chip reference.
The reference contributes typically 75% of this drift. Using an
AD588 as a reference source can improve the total drift by a
factor of 3 to 4.
Using this combination can result in apparent increases in
full-scale error due to the difference between the on-board
reference, by which the device is laser-trimmed, and the
external reference, with which the device is actually applied.
The on-board reference is specified to be 10 V ± 100 mV, while
the external reference is specified to be 10 V ± 1 mV. This may
result in up to 101 mV of apparent full-scale error beyond the
±25 mV specified AD574A gain error. External Resistor R2 and
Resistor R3 allow this error to be nulled. Their contribution to
full-scale drift is negligible.
I=0
R
R
IEXC
+
VOUT α RRTD
RTD
R
–
00531-034
R
I=0
Figure 34. 4-Wire Ohms Measurement
The high output drive capability allows the AD588 to drive up
to six converters in a multiconverter system. All converters have
gain errors that track to better than ±5 ppm/°C.
2
12√8
3
CS
STS 28
27
HIGH
BITS 24
4 AO
5 R/C
7
6
4
A3
RB
A1
AD588
R2
A4
R5
R3
500Ω
20 TURN
15
2
R6
A2
VIN
10V
+VS
6 CE
AD574A
10 REF IN
8 REF OUT
12 BIPP OFF
19
LOW
BITS 16
+5V 1
13 10VIN
+15V 7
14 20VIN
–15V 11
9 ANA COM
DIG 15
COM
16 –VS
10
8
12
11
13
00531-035
9
1
R2
61.9Ω
R3
5
R1
50Ω
14
R4
R1
23
MIDDLE
BITS 20
3
Figure 35. AD588/AD574A Connections
Rev. M | Page 16 of 20
Data Sheet
AD588
A practical consideration when using the 4-wire ohms technique
with an RTD is the self-heating effect that the excitation current
has on the temperature of the RTD. The designer must choose
the smallest practical excitation current that still gives the desired
resolution. RTD manufacturers usually specify the self-heating
effect of each of their models or types of RTDs.
7
6
4
RC
VISHAY S102C
OR SIMILAR
3
A3
1
RB
A1
AD588
A4
R2
1.0mA
0.01%
15
VOUT
100Ω
R3
A2
5
9
10
11
+VS
16
–VS
–
–15V
OR
GROUND
13
Figure 36. Precision Current Source for RTD
7
The Wheatstone bridge is a common transducer. In its simplest
form, a bridge consists of four two-terminal elements connected
to form a quadrilateral, a source of excitation connected along
one of the diagonals and a detector comprising the other diagonal.
6
4
3
VCC
A3
RB
220Ω
Q1
AD588
A1
14
R4
R1
R2
1
A4
R5
15
R6
R3
2
+VS
16
–VS
IL =
A2
5
9
10
8
12
13
11
LIMITED BY
Q1 AND RC
POWER
DISSIPATION
LOAD
Figure 37. Boosted Precision Current Source
R4
+
VIN
R3
–
–
EO
+
R2
00531-038
R1
Figure 38. Bridge Transducer Excitation—Unipolar Drive
V2
+
R4
–
+
–
R3
–
R1
EO
+
R2
00531-039
V1
Figure 39. Bridge Transducer Excitation—Bipolar Drive
Rev. M | Page 17 of 20
10V
RC
00531-037
Figure 39 shows the same bridge transducer, this time driven
from a pair of bipolar supplies. This configuration ideally
eliminates the common-mode voltage and relaxes the
restrictions on any processing elements that follow.
12
8
2
RTD = Ω K4515
0.24°C/mW SELF-HEATING
BRIDGE DRIVER CIRCUITS
Figure 38 shows a simple bridge driven from a unipolar excitation
supply. EO, a differential voltage, is proportional to the deviation
of the element from the initial bridge values. Unfortunately, this
bridge output voltage is riding on a common-mode voltage
equal to approximately VIN/2. Further processing of this signal
may necessarily be limited to high common-mode rejection
techniques, such as instrumentation or isolation amplifiers.
+
R5
R6
BOOSTED PRECISION CURRENT SOURCE
In the RTD current-source application, the load current is limited
to ±10 mA by the output drive capability of Amplifier A3. In the
event that more drive current is needed, a series-pass transistor
can be inserted inside the feedback loop to provide higher
current. Accuracy and drift performance are unaffected by the
pass transistor.
RC = 10kΩ
00531-036
Figure 36 shows an AD588 providing the precision excitation
current for a 100 Ω RTD. The small excitation current of 1 mA
dissipates a mere 0.1 mW of power in the RTD.
14
R4
R1
AD588
Data Sheet
+15V
As shown in Figure 40, the AD588 is an excellent choice for the
control element in a bipolar bridge driver scheme. Transistor Q1
and Transistor Q2 serve as series-pass elements to boost the
current drive capability to the 28 mA required by a typical
350 Ω bridge. A differential gain stage can still be required if the
bridge balance is not perfect. Such gain stages can be expensive.
220Ω
6
7
4
3
A3
1
–
RB
Additional common-mode voltage reduction is realized by
using the circuit illustrated in Figure 41. A1, the ground sense
amplifier, serves the supplies on the bridge to maintain a virtual
ground at one center tap. The voltage that appears on the opposite
center tap is now single-ended (referenced to ground) and can
be amplified by a less expensive circuit.
Q1 =
2N3904
+
EO
AD588
A1
14
R4
R1
A4
R2
15
220Ω
R5
Q2 =
2N3906
–15V
R6
R3
2
+VS
16
–VS
A2
5
10
8
12
11
13
00531-040
9
Figure 40. Bipolar Bridge Drive
+15V
220Ω
6
7
4
Q1 =
2N3904
3
A3
AD OP-07
1
RB
A1
AD588
14
R1
R4
R1
220Ω
A4
R2
15
R5
Q2 =
2N3906
+
VOUT
–
R2
–15V
R6
R3
2
+VS
16
–VS
A2
9
10
8
12
11
13
00531-041
5
Figure 41. Floating Bipolar Bridge Drive with Minimum CMV
Rev. M | Page 18 of 20
Data Sheet
AD588
OUTLINE DIMENSIONS
10.50 (0.4134)
10.10 (0.3976)
9
16
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
8
1.27 (0.0500)
BSC
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
0.51 (0.0201)
0.31 (0.0122)
0.75 (0.0295)
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
45°
8°
0°
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013- AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
032707-B
1
Figure 42. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
0.098 (2.49) MAX
0.005 (0.13) MIN
16
9
1
PIN 1
0.310 (7.87)
0.220 (5.59)
8
0.100 (2.54) BSC
0.320 (8.13)
0.290 (7.37)
0.840 (21.34) MAX
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MIN
SEATING
0.070 (1.78) PLANE
0.030 (0.76)
15°
0°
0.015 (0.38)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 43. 16-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-16)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model 1, 2
AD588ARWZ
AD588AQ
AD588BQ
AD588JQ
AD588KQ
Initial Error (mV)
5
3
1
3
1
Temperature
Coefficient 3
3 ppm/°C
3 ppm/°C
1.5 ppm/°C
3 ppm/°C
1.5 ppm/°C
Temperature
Range (°C)
−25 to +85
−25 to +85
−25 to +85
0 to 70
0 to 70
Package Description
16-Lead Standard Small Outline Package [SOIC-W]
16-Lead Ceramic Dual In-Line Package [CERDIP]
16-Lead Ceramic Dual In-Line Package [CERDIP]
16-Lead Ceramic Dual In-Line Package [CERDIP]
16-Lead Ceramic Dual In-Line Package [CERDIP]
Package
Option
RW-16
Q-16
Q-16
Q-16
Q-16
For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military Products Databook or current AD588/883B
data sheet.
Z = RoHS Compliant Part.
3
Temperature coefficient specified from 0°C to 70°C.
1
2
Rev. M | Page 19 of 20
AD588
Data Sheet
NOTES
©1986–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00531-0-11/15(M)
Rev. M | Page 20 of 20
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