AD8016ARP-REEL

a FEATURES xDSL Line Driver that Features Full ADSL CO (Central Office) Performance on 12 V Supplies Low Power Operation 5 V to 12 V Voltage Supply 12.5 mA/Amp (Typ) Total Supply Current Power-Reduced Keep-Alive Current of 4.5 mA/Amp High Output Voltage and Current Drive IOUT = 600 mA 40 V p-p Differential Output Voltage RL = 50 , VS = 12 V Low Single Tone Distortion –75 dBc @ 1 MHz SFDR, RL = 100 , VO = 2 V p-p MTPR = –75 dBc, 26 kHz to 1.1 MHz, ZLINE = 100 , PLINE = 20.4 dBm High Speed 78 MHz Bandwidth (–3 dB), G = +5 40 MHz Gain Flatness 1000 V/ s Slew Rates Low Power, High Output Current xDSL Line Driver AD8016 PIN CONFIGURATION 24-Lead Batwing 20-Lead PSOP3 (RB-24) (RP-20) +V1 VOUT1 VINN1 VINP1 NC NC NC PWDN0 DGND –V1 1 2 3 4 5 6 7 8 9 10 20 19 18 17 +V2 VOUT2 VINN2 VINP2 NC NC NC PWDN1 BIAS –V2 +V1 VOUT1 VINN1 VINP1 AGND AGND AGND AGND PWDN0 DGND –V1 NC 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 +V2 VOUT2 VINN2 VINP2 AGND AGND AGND AGND PWDN1 BIAS –V2 NC AD8016 16 15 14 13 12 11 AD8016 19 18 17 16 15 14 13 NC = NO CONNECT NC = NO CONNECT 28-Lead HTSSOP (RE-28) NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 NC NC NC NC PWDN1 BIAS –V2 –V1 DGND NC PWDN0 NC NC NC PRODUCT DESCRIPTION +VIN2 –VIN2 VOUT2 +V2 +V1 VOUT1 –VIN1 +VIN1 NC NC NC The AD8016 high output current dual amplifier is designed for the line drive interface in Digital Subscriber Line systems such as ADSL, HDSL2, and proprietary xDSL systems. The drivers are capable, in full-bias operation, of providing 24.4 dBm output power into low resistance loads, enough to power a 20.4 dBm line, including hybrid insertion loss. AD8016ARE 22 21 20 19 18 17 16 15 NC = NO CONNECT Figure 1. Multitone Power Ratio; VS = ± 12 V, 20.4 dBm Output Power into 100 Ω, Downstream 10dB/DIV –75dBc 549.3 550.3 551.3 552.3 553.3 554.3 555.3 556.3 557.3 558.3 559.3 FREQUENCY – kHz The AD8016 is available in a low cost 24-lead SOIC, a thermally enhanced 20-lead PSOP, and a 28-lead HTSSOP with an exposed leadframe (ePAD). Operating from ± 12 V supplies, the AD8016 requires only 1.5 W of total power dissipation (refer to the Power Dissipation section for details) while driving 20.4 dBm of power downstream using the xDSL hybrid in Figure 33a and Figure 33b. Two digital bits (PWDN0, PWDN1) allow the driver to be capable of full performance, an output “keep-alive state,” or two intermediate bias states. The “keep-alive” state biases the output transistors enough to provide a low impedance at the amplifier outputs for back termination. The low power dissipation, high output current, high output voltage swing, flexible power-down, and robust thermal packaging enable the AD8016 to be used as the Central Office (CO) terminal driver in ADSL, HDSL2, VDSL, and proprietary xDSL systems. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000 AD8016–SPECIFICATIONS T Parameter DYNAMIC PERFORMANCE –3 dB Bandwidth Bandwidth for 0.1 dB Flatness Large Signal Bandwidth Peaking Slew Rate Rise and Fall Time Settling Time Input Overdrive Recovery Time NOISE/DISTORTION PERFORMANCE Distortion, Single-Ended 2nd Harmonic 3rd Harmonic Multitone Power Ratio1 IMD IP3 Voltage Noise (RTI) Input Current Noise INPUT CHARACTERISTICS RTI Offset Voltage +Input Bias Current –Input Bias Current Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing Linear Output Current Short Circuit Current Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current (@ 25 C, VS = 12 V, RL = 100 , PWDN0, PWDN1 = (1, 1), TMIN = –40 C, MAX = +85 C, unless otherwise noted) Min Typ 380 78 38 90 0.1 1000 2 23 350 Max Unit MHz MHz MHz MHz dB V/µs ns ns ns Conditions G = +1, RF = 1.5 kΩ, VOUT = 0.2 V p-p G = +5, RF = 499 Ω, VOUT < 0.5 V p-p G = +5, RF = 499 Ω, VOUT = 0.2 V p-p VOUT = 4 V p-p VOUT = 0.2 V p-p < 50 MHz VOUT = 4 V p-p, G = +2 VOUT = 2 V p-p 0.1%, VOUT = 2 V p-p VOUT = 12.5 V p-p VOUT = 2 V p-p, G = +5, RF = 499 Ω fC = 1 MHz, RL = 100 Ω/25 Ω fC = 1 MHz, RL = 100 Ω/25 Ω 26 kHz to 1.1 MHz, ZLINE = 100 Ω, PLINE = 20.4 dBm 500 kHz, ∆f = 10 kHz, RL = 100 Ω/25 Ω 500 kHz, RL = 100 Ω/25 Ω f = 10 kHz f = 10 kHz 69 16 –75/–62 –88/–74 –77/–64 –93/–76 –75 –88/–85 43/41 2.6 18 1.0 4 400 2 64 +11 600 2000 80 ± 13 13.2 10 8 6 4.0 +85 dBc dBc dBc dBc dBm nV/√Hz pA√Hz mV µA µA kΩ pF V dB V mA mA pF V mA/Amp mA/Amp mA/Amp mA/Amp µs mA/Amp dB °C –84/–80 42/40 4.5 21 +3.0 +45 +75 –3.0 –45 –75 –10 58 Single-Ended, RL = 100 Ω G = 5, RL = 10 Ω, f1 = 100 kHz, –60 dBc SFDR –11 400 +10 ±3 PWDN1, PWDN0 = (1, 1) PWDN1, PWDN0 = (1, 0) PWDN1, PWDN0 = (0, 1) PWDN1, PWDN0 = (0, 0) To 95% of IQ 250 µA Out of Bias Pin ∆VS = ± 1 V 12.5 8 5 4 25 1.5 75 Recovery Time Shutdown Current Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE NOTES 1 See Figure 43, R20, R21 = 0 Ω, R1 = open. Specifications subject to change without notice. 63 –40 –2– REV. A SPECIFICATIONS Parameter DYNAMIC PERFORMANCE –3 dB Bandwidth Bandwidth for 0.1 dB Flatness Large Signal Bandwidth Peaking Slew Rate Rise and Fall Time Settling Time Input Overdrive Recovery Time (@ 25 C, VS = 6 V, RL = 100 , PWDN0, PWDN1 = (1, 1), TMIN = –40 C, TMAX = +85 C, unless otherwise noted) Conditions G = +1, RF = 1.5 kΩ, VOUT = 0.2 V p-p G = +5, RF = 499 Ω, VOUT < 0.5 V p-p G = +5, RF = 499 Ω, VOUT = 0.2 V p-p VOUT = 1 V rms VOUT = 0.2 V p-p < 50 MHz VOUT = 4 V p-p, G = +2 VOUT = 2 V p-p 0.1%, VOUT = 2 V p-p VOUT = 6.5 V p-p G = +5, VOUT = 2 V p-p, RF = 499 Ω fC = 1 MHz, RL = 100 Ω/25 Ω fC = 1 MHz, RL = 100 Ω/25 Ω 26 kHz to 138 kHz, ZLINE = 100 Ω, PLINE = 13 dBm 500 kHz, ∆f = 110 kHz, RL = 100 Ω/25 Ω 500 kHz f = 10 kHz f = 10 kHz Min Typ 320 71 15 80 0.7 300 2 39 350 Max AD8016 Unit MHz MHz MHz MHz dB V/µs ns ns ns 70 10 1.0 NOISE/DISTORTION PERFORMANCE Distortion, Single-Ended 2nd Harmonic 3rd Harmonic Multitone Power Ratio1 IMD IP3 Voltage Noise (RTI) Input Current Noise INPUT CHARACTERISTICS RTI Offset Voltage +Input Bias Current –Input Bias Current Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing Linear Output Current Short Circuit Current Capacitive Load Drive POWER SUPPLY Quiescent Current –73/61 –80/–68 –75/–63 –82/–70 –68 –88/–83 42/39 4 17 0.2 10 10 400 2 66 +5 420 830 50 8 6 4 3 23 1.0 80 9.7 6.9 5.0 4.1 2.0 +85 dBc dBc dBc dBc dBm nV/√Hz pA√Hz mV µA µA kΩ pF V dB V mA mA pF mA/Amp mA/Amp mA/Amp mA/Amp µs mA/Amp dB °C –87/–82 42/39 5 20 +3.0 +25 +30 –3.0 –25 –30 –4 60 Single-Ended, RL = 100 Ω G = 5, RL = 5 Ω, f = 100 kHz, –60 dBc SFDR RS = 10 Ω PWDN1, PWDN0 = (1, 1) PWDN1, PWDN0 = (1, 0) PWDN1, PWDN0 = (0, 1) PWDN1, PWDN0 = (0, 0) To 95% of IQ 250 µA Out of Bias Pin ∆VS = ± 1 V –5 300 +4 Recovery Time Shutdown Current Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE NOTES 1 See Figure 43, R20, R21 = 0 Ω, R1 = open. Specifications subject to change without notice. 63 –40 LOGIC INPUTS (CMOS-Compatible Logic) (PWDN0, PWDN1, V Parameter Logic “1” Voltage Logic “0” Voltage Min 2.2 0 CC = 12 V or Typ 6 V; Full Temperature Range) Max +VCC 0.8 Unit V V REV. A –3– AD8016 ABSOLUTE MAXIMUM RATINGS 1 MAXIMUM POWER DISSIPATION Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26.4 V Internal Power Dissipation PSOP3 Package2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 W Batwing Package3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 W EPAD Package4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 W Input Voltage (Common-Mode) . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . ± VS Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range . . . . . . . . . . . . . –65°C to +125°C Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device on a four-layer board with 10 inches 2 of 1 oz. copper at 85°C 20-lead PSOP3 package: θJA = 18°C/W. 3 Specification is for device on a four-layer board with 10 inches 2 of 1 oz. copper at 85°C 24-lead Batwing package: θJA = 28°C/W. 4 Specification is for device on a four-layer board with 9 inches 2 of 1 oz. copper at 85°C 28-lead (EPAD) package: θJA = 29°C/W. The maximum power that can be safely dissipated by the AD8016 is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated device is determined by the glass transition temperature of the plastic, approximately 150°C. Temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. The output stage of the AD8016 is designed for maximum load current capability. As a result, shorting the output to common can cause the AD8016 to source or sink 2000 mA. To ensure proper operation, it is necessary to observe the maximum power derating curves. Direct connection of the output to either power supply rail can destroy the device. 8 MAXIMUM POWER DISSIPATION – Watts 7 6 PSOP3 5 4 3 EPAD 2 1 0 BATWING 0 10 20 30 40 50 60 70 AMBIENT TEMPERATURE – C 80 90 Figure 2. Plot of Maximum Power Dissipation vs. Temperature for AD8016 for TJ = 125°C ORDERING GUIDE Model AD8016ARP AD8016ARP-Reel AD8016ARP-EVAL AD8016ARB AD8016ARB-Reel AD8016ARB-EVAL AD8016ARE AD8016ARE-Reel AD8016ARE-EVAL Temperature Range –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C Package Description 20-Lead PSOP3 20-Lead PSOP3 Evaluation Board 24-Lead Batwing 24-Lead Batwing Evaluation Board 28-Lead HTSSOP 28-Lead HTSSOP Evaluation Board Package Option RP-20 ARP-Reel ARP-EVAL RB-24 ARB-Reel ARB-EVAL RE-28 ARE-Reel ARE-EVAL CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8016 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE –4– REV. A Typical Performance Characteristics– AD8016 10 F 124 499 RL +VS VOUT +VIN 49.9 + 0.1 F +VO 499 VIN 49.9 +VS 0.1 F + 10 F 111 499 RL 0.1 F + 10 F –VS –VIN 49.9 –VS 0.1 F 10 F + –VO Figure 3. Single-Ended Test Circuit; G = +5 Figure 6. Differential Test Circuit; G = +10 VOUT = 100mV VOUT = 100mV VOLTS VOLTS VIN = 20mV VIN = 20mV TIME – 100ns/DIV TIME – 100ns/DIV Figure 4. 100 mV Step Response; G = +5, VS = ± 6 V, RL = 25 Ω, Single-Ended Figure 7. 100 mV Step Response; G = +5, VS = ± 12 V, RL = 25 Ω, Single-Ended VOUT = 5V VOUT = 4V VOLTS VIN = 800mV VOLTS VIN = 800mV TIME – 100ns/DIV TIME – 100ns/DIV Figure 5. 4 V Step Response; G = +5, VS = ± 6 V, RL = 25 Ω, Single-Ended Figure 8. 4 V Step Response; G = +5, VS = ± 12 V, RL = 25 Ω, Single-Ended REV. A –5– AD8016 –30 –40 –50 DISTORTION – dBc –60 –70 –80 PWDN 1,0 = (1,1) –90 –100 –110 0.01 RF = 499 G = +10 VO = 4V p-p (0,0) –30 (0,0) –40 –50 DISTORTION – dBc RF = 499 G = +10 VO = 4V p-p (0,1) (0,1) (1,0) –60 –70 (1,0) PWDN 1,0 = (1,1) –80 –90 –100 –110 0.01 0.1 1 FREQUENCY – MHz 10 20 0.1 1 FREQUENCY – MHz 10 20 Figure 9. Distortion vs. Frequency; Second Harmonic, VS = ± 12 V, RL = 50 Ω, Differential Figure 12. Distortion vs. Frequency; Third Harmonic, VS = ± 12 V, RL = 50 Ω, Differential –30 –40 –50 DISTORTION – dBc –60 –70 –80 –90 –100 –110 0.01 RF = 499 G = +10 VO = 4V p-p (0,0) (0,1) (1,0) DISTORTION – dBc –30 –40 –50 –60 –70 PWDN 1,0 = (1,1) –80 –90 –100 –110 0.01 RF = 499 G = +10 VO = 4V p-p (0,0) (0,1) (1,0) PWDN 1,0 = (1,1) 0.1 1 FREQUENCY – MHz 10 20 0.1 1 FREQUENCY – MHz 10 20 Figure 10. Distortion vs. Frequency; Second Harmonic, VS = ± 6 V, RL = 50 Ω, Different Figure 13. Distortion vs. Frequency; Third Harmonic, VS = ± 6 V, RL = 50 Ω, Differential –30 –35 –40 RF = 499 G = +5 –30 RF = 499 G = +5 (1,0) (0,0) –40 DISTORTION – dBc DISTORTION – dBc –45 –50 –55 (0,0) –60 –65 –70 –75 –80 0 100 200 300 400 500 600 PEAK OUTPUT CURRENT – mA 700 800 PWDN 1,0 = (1,1) (0,1) (1,0) –50 (0,1) –60 –70 –80 PWDN 1,0 = (1,1) –90 0 100 200 300 400 500 PEAK OUTPUT CURRENT – mA 600 700 Figure 11. Distortion vs. Peak Output Current; Second Harmonic, VS = ± 12 V, RL = 10 Ω, f = 100 kHz, Single-Ended Figure 14. Distortion vs. Peak Output Current, Third Harmonic; VS = ± 12 V, RL = 10 Ω, G = +5, f = 100 kHz, Single-Ended –6– REV. A AD8016 –30 –35 –40 RF = 499 G = +5 –30 –35 –40 DISTORTION – dBc –45 –50 (0,0) –55 –60 –65 –70 PWDN 1,0 = (1,1) 0 100 200 300 400 PEAK OUTPUT CURRENT – mA 500 600 –75 –80 0 100 200 300 400 PEAK OUTPUT CURRENT – mA 500 600 PWDN 1,0 = (1,1) (0,1) (1,0) DISTORTION – dBc –45 (0,0) –50 (0,1) –55 (1,0) –60 –65 –70 –75 –80 Figure 15. Distortion vs. Peak Output Current; Second Harmonic, VS = ± 6 V, RL = 5 Ω, f = 100 kHz, Single-Ended Figure 18. Distortion vs. Peak Output Current; Third Harmonic, VS = ± 6 V, G = +5, RL = 5 Ω, f = 100 kHz, Single-Ended –30 –30 –40 –50 –60 –70 –80 PWDN 1,0 = (1,1) –90 –100 0 5 10 15 20 25 30 DIFFERENTIAL OUTPUT – V p-p 35 40 (0,0) –40 –50 (0,0) (0,1) –60 (1,0) –70 –80 PWDN 1,0 = (1,1) –90 –100 0 5 10 15 20 25 30 DIFFERENTIAL OUTPUT – V p-p 35 40 DISTORTION – dBc (0,1) (1,0) Figure 16. Distortion vs. Output Voltage; Second Harmonic, VS = ± 12 V, G = +10, f = 1 MHz, RL = 50 Ω, Differential –30 Figure 19. Distortion vs. Output Voltage; Third Harmonic, VS = ± 12 V, G = +10, f = 1 MHz, RL = 50 Ω, Differential –30 DISTORTION – dBc –40 –40 (0,0) DISTORTION – dBc DISTORTION – dBc –50 –50 (0,1) –60 (1,0) –70 –60 (0,0) (0,1) –70 (1,0) –80 PWDN 1,0 = (1,1) –90 0 5 10 15 DIFFERENTIAL OUTPUT – V p-p 20 –80 PWDN 1,0 = (1,1) –90 0 15 10 5 DIFFERENTIAL OUTPUT – V p-p 20 Figure 17. Distortion vs. Output Voltage; Second Harmonic, VS = ± 6 V, G = +10, f = 1 MHz, RL = 50 Ω, Differential Figure 20. Distortion vs. Output Voltage, Third Harmonic, VS = ± 6 V, G = +10, f = 1 MHz, RL = 50 Ω, Differential REV. A –7– AD8016 3 6 NORMALIZED FREQUENCY RESPONSE – dB NORMALIZED FREQUENCY RESPONSE – dB 0 –3 –6 –9 –12 –15 –18 –21 –24 –27 1 10 FREQUENCY – MHz 100 500 0,0 VIN = 40mV p-p G = +5 RL = 100 1,1 1,0 0,1 3 0 1,1 –3 –6 –9 –12 0,1 –15 –18 –21 –24 1 0,0 VIN = 40mV p-p G = +5 RL = 100 1,0 10 FREQUENCY – MHz 100 500 Figure 21. Frequency Response; VS = ± 12 V, @ PWDN1, PWDN0 Codes Figure 24. Frequency Response; VS = ± 6 V, @ PWDN1, PWDN0 Codes 11 8 5 OUTPUT VOLTAGE – dBV G = +5 RL = 100 RF = 499 11 8 5 2 PSRR – dB G = +5 RL = 100 RF = 499 2 –1 –4 –7 –10 –13 –16 –19 1 10 FREQUENCY – MHz 100 500 –1 –4 –7 –10 –13 –16 –19 1 10 FREQUENCY – MHz 100 500 Figure 22. Output Voltage vs. Frequency; VS = ± 12 V Figure 25. PSRR vs. Frequency; VS = ± 6 V 20 10 0 –10 VIN = 2V rms RF = 602 –10 RF = 499 1,1 1,0 –30 +PSRR PSRR – dB –20 CMRR – dB –20 –30 –40 0,0 –50 –60 –70 –80 0.03 0.1 1 10 FREQUENCY – MHz 100 500 0,1 –40 –50 –PSRR –60 –70 –80 –90 0.01 0.1 1 10 FREQUENCY – MHz 100 500 Figure 23. CMRR vs. Frequency; VS = ± 12 V @ PWDN1, PWDN0 Codes Figure 26. PSRR vs. Frequency; VS = ± 12 V –8– REV. A AD8016 180 160 + INPUT CURRENT NOISE – pA/ Hz 90 80 INPUT VOLTAGE NOISE – nV/ Hz 1000000 100000 10000 360 320 280 140 120 100 80 60 40 20 0 10 +I NOISE VIN NOISE 70 60 50 40 30 20 10 0 10M TRANSIMPEDANCE – k 100 10 1 0.1 0.01 0 0.0001 TRANSIMPEDANCE 200 160 120 80 40 0 10000 100 100k 1k 10k FREQUENCY – MHz 1M 0.001 0.01 0.1 1 10 FREQUENCY – MHz 100 1000 Figure 27. Noise vs. Frequency Figure 30. Open-Loop Transimpedance and Phase vs. Frequency OUTPUT VOLTAGE ERROR – 2mV/DIV (0.1%/DIV) G = +2 RF = 1k VOUT = 2VSTEP RL = 100 +2mV (–0.1%) 0 –2mV (–0.1%) VIN VOUT VOUT –VIN OUTPUT VOLTAGE ERROR – 2mV/DIV (0.1%/DIV) G = +2 RF = 1k VOUT = 2VSTEP RL = 100 +2mV (–0.1%) 0 –2mV (–0.1%) VIN VOUT VOUT –VIN –5 0 5 10 15 20 25 TIME – ns 30 35 40 45 –5 0 5 10 15 20 25 TIME – ns 30 35 40 45 Figure 28. Settling Time 0.1%; VS = ± 12 V Figure 31. Settling Time 0.1%; VS = ± 6 V –20 –30 –40 CROSSTALK – dB –50 –60 –70 –80 –90 0.03 VOUT = 2V p-p RF = 499 G = +5 RL = 100 1000 100 OUTPUT IMPEDANCE – 0,0 10 0,1 1,0 1 1,1 0.1 0.1 1 10 FREQUENCY – MHz 100 500 0.01 0.03 0.1 1 10 FREQUENCY – MHz 100 500 Figure 29. Output Crosstalk vs. Frequency Figure 32. Output Impedance vs. Frequency @ PWDN1, PWDN0 Codes REV. A –9– PHASE – Degrees 1000 PHASE 240 AD8016 18 VIN = 2V/DIV VOUT = 5V/DIV VOUT 16 PWDN 1,0 = [1.1] 14 12 [1,0] IQ – mA 10 8 6 [0,0] 4 [0,1] 0V VIN 0V 2 0 100 200 300 400 500 TIME – ns 600 700 800 900 0 –100 0 50 100 IBIAS – A 150 200 a. Overload Recovery; VS = ± 12 V, G = +5, RL = 100 Ω Figure 35. IQ vs. IBIAS Pin Current; VS = ± 6 V 12 VIN = 2V/DIV VOUT = 5V/DIV +VOUT, VS = 8 +VOUT, VS = 12V VOUT OUTPUT SWING – Volts 0V 6V 4 0 0V VIN –4 –VOUT, VS = –8 –VOUT, VS = 12V 1k RLOAD – 10k 6V –100 0 100 200 300 400 500 TIME – ns 600 700 800 900 –12 10 100 b. Overload Recovery; VS = ± 12 V, G = +5, RL = 100 Ω Figure 33. Figure 36. Output Voltage vs. RLOAD 25 PWDN 1,0 = [1,1] 20 IQ – mA 15 [1,0] 10 [0,1] [0,0] 5 0 0 50 100 IBIAS – A 150 200 Figure 34. IQ vs. IBIAS Pin Current; VS = ± 12 V –10– REV. A AD8016 THEORY OF OPERATION FEEDBACK RESISTOR SELECTION The AD8016 is a current feedback amplifier with high (500 mA) output current capability. With a current feedback amplifier the current into the inverting input is the feedback signal and the open-loop behavior is that of a transimpedance, dVo/dIin or TZ. The open-loop transimpedance is analogous to the open-loop voltage gain of a voltage feedback amplifier. Figure 37 shows a simplified model of a current feedback amplifier. Since RIN is proportional to 1/gm, the equivalent voltage gain is just TZ × gm, where gm is the transconductance of the input stage. Basic analysis of the follower with gain circuit yields: VO VIN =G× TZ ( S ) TZ ( S ) + G × RIN + RF In current feedback amplifiers, selection of feedback and gain resistors will have an impact on the MTPR performance, bandwidth and gain flatness. Care should be exercised in the selection of these resistors so that optimum performance is achieved. The table below shows the recommended resistor values for use in a variety of gain settings. These values are suggested as a good starting point when designing for any application. Table I. Resistor Selection Guide Gain +1 –1 +2 +5 +10 RF ( ) 1k 500 650 750 1k RG ( ) ∞ 500 650 187 111 where: G =1+ RIN = 1 gm RF RG ≈ 25 Ω BIAS PIN AND PWDN FEATURES Recognizing that G × RIN