2.7 V, 800 μA, 80 MHz
Rail-to-Rail I/O Amplifiers
AD8031/AD8032
Data Sheet
APPLICATIONS
High speed, battery-operated systems
High component density systems
Portable test instruments
A/D buffers
Active filters
High speed, set-and-demand amplifiers
NC 1
NC
OUT1 1
–
7
+VS
–IN1 2
+IN 3
+
6
OUT
+IN1 3
5
NC
–VS 4
AD8031
NC = NO CONNECT
01056-001
8
–IN 2
–VS 2
8
+VS
7
OUT2
6
–IN2
5
+IN2
Figure 2. 8-Lead PDIP (N),
SOIC_N (R), and MSOP (RM)
AD8031
+
+ –
–VS 4
Figure 1. 8-Lead PDIP (N) and
SOIC_N (R)
VOUT 1
AD8032
– +
5
+VS
4
–IN
–
+IN 3
Figure 3. 5-Lead SOT-23 (RJ-5)
Operating on supplies from +2.7 V to +12 V and dual supplies
up to ±6 V, the AD8031/AD8032 are ideal for a wide range of
applications, from battery-operated systems with large bandwidth
requirements to high speed systems where component density
requires lower power dissipation. The AD8031/AD8032 are
available in 8-lead PDIP and 8-lead SOIC_N packages and
operate over the industrial temperature range of −40°C to
+85°C. The AD8031A is also available in the space-saving
5-lead SOT-23 package, and the AD8032A is available in an
8-lead MSOP package.
VIN = 4.85V p-p
VOUT = 4.65V p-p
G = +1
01056-005
1V/DIV
01056-004
2µs/DIV
2µs/DIV
Figure 4. Input VIN
Figure 5. Output VOUT
+5V
–
VIN
VOUT
+
1kΩ
1.7pF
+2.5V
01056-006
The products have true single-supply capability with rail-to-rail
input and output characteristics and are specified for +2.7 V, +5 V,
and ±5 V supplies. The input voltage range can extend to 500 mV
beyond each rail. The output voltage swings to within 20 mV of
each rail providing the maximum output dynamic range.
1V/DIV
GENERAL DESCRIPTION
The AD8031 (single) and AD8032 (dual) single-supply, voltage
feedback amplifiers feature high speed performance with
80 MHz of small signal bandwidth, 30 V/μs slew rate, and 125 ns
settling time. This performance is possible while consuming less
than 4.0 mW of power from a single 5 V supply. These features
increase the operation time of high speed, battery-powered
systems without compromising dynamic performance.
01056-002
CONNECTION DIAGRAMS
Low power
Supply current 800 μA/amplifier
Fully specified at +2.7 V, +5 V, and ±5 V supplies
High speed and fast settling on 5 V
80 MHz, −3 dB bandwidth (G = +1)
30 V/μs slew rate
125 ns settling time to 0.1%
Rail-to-rail input and output
No phase reversal with input 0.5 V beyond supplies
Input CMVR extends beyond rails by 200 mV
Output swing to within 20 mV of either rail
Low distortion
−62 dB @ 1 MHz, VO = 2 V p-p
−86 dB @ 100 kHz, VO = 4.6 V p-p
Output current: 15 mA
High grade option: VOS (maximum) = 1.5 mV
01056-003
FEATURES
Figure 6. Rail-to-Rail Performance at 100 kHz
The AD8031/AD8032 also offer excellent signal quality for only
800 μA of supply current per amplifier; THD is −62 dBc with a
2 V p-p, 1 MHz output signal, and –86 dBc for a 100 kHz,
4.6 V p-p signal on +5 V supply. The low distortion and fast
settling time make them ideal as buffers to single-supply ADCs.
Rev. G
Document Feedback
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700
©2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
AD8031/AD8032
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Theory of Operation ...................................................................... 13
Applications ....................................................................................... 1
Input Stage Operation................................................................ 13
General Description ......................................................................... 1
Overdriving the Input Stage...................................................... 13
Connection Diagrams ...................................................................... 1
Output Stage, Open-Loop Gain and Distortion vs. Clearance
from Power Supply ..................................................................... 14
Revision History ............................................................................... 2
Specifications..................................................................................... 3
+2.7 V Supply ................................................................................ 3
+5 V Supply ................................................................................... 4
±5 V Supply ................................................................................... 5
Absolute Maximum Ratings ............................................................ 6
Maximum Power Dissipation ..................................................... 6
ESD Caution .................................................................................. 6
Output Overdrive Recovery ...................................................... 14
Driving Capacitive Loads .......................................................... 15
Applications..................................................................................... 16
A 2 MHz Single-Supply, Biquad Band-Pass Filter ................. 16
High Performance, Single-Supply Line Driver........................... 16
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 20
Typical Performance Characteristics ............................................. 7
REVISION HISTORY
3/14—Rev. F to Rev. G
Changes to Second Paragraph of Theory of Operation Section ... 13
Changes to Ordering Guide .......................................................... 20
8/13—Rev. E to Rev. F
Changed Input Current Noise at f = 100 kHz from 2.4 pA/√Hz
to 0.4 pA/√Hz (Throughout) .......................................................... 3
6/13—Rev. D to Rev. E
Changes to DC Performance Parameter, Table 1 ......................... 3
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 20
11/08—Rev. C to Rev. D
Change to Table 3 Column Heading .............................................. 5
Change to Ordering Guide ............................................................ 20
7/06—Rev. B to Rev. C
Updated Format .................................................................. Universal
Updated Outline Dimensions ....................................................... 18
Change to Ordering Guide ............................................................ 20
9/99—Rev. A to Rev. B
Rev. G | Page 2 of 20
Data Sheet
AD8031/AD8032
SPECIFICATIONS
+2.7 V SUPPLY
@ TA = 25°C, VS = 2.7 V, RL = 1 kΩ to 1.35 V, RF = 2.5 kΩ, unless otherwise noted.
Table 1.
Parameter
DYNAMIC PERFORMANCE
–3 dB Small Signal Bandwidth
Slew Rate
Settling Time to 0.1%
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion
Input Voltage Noise
Input Current Noise
Crosstalk (AD8032 Only)
DC PERFORMANCE
Input Offset Voltage
Offset Drift
Input Bias Current
Input Offset Current
Open-Loop Gain
Conditions
G = +1, VO < 0.4 V p-p
G = −1, VO = 2 V step
G = −1, VO = 2 V step, CL = 10 pF
AD8031A/AD8032A
Min Typ
Max
AD8031B/AD8032B
Min Typ
Max
54
25
54
25
fC = 1 MHz, VO = 2 V p-p, G = +2
fC = 100 kHz, VO = 2 V p-p, G = +2
f = 1 kHz
f = 100 kHz
f = 1 kHz
f = 5 MHz
−62
−86
15
0.4
5
−60
VCM = VCC/2; VOUT = 1.35 V
TMIN to TMAX
VCM = VCC/2; VOUT = 1.35 V
VCM = VCC/2; VOUT = 1.35 V
TMIN to TMAX
±1
±6
10
0.45
VCM = VCC/2; VOUT = 0.35 V to 2.35 V
TMIN to TMAX
76
74
INPUT CHARACTERISTICS
Common-Mode Input Resistance
Differential Input Resistance
Input Capacitance
Input Voltage Range
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Differential Input Voltage
OUTPUT CHARACTERISTICS
Output Voltage Swing Low
Output Voltage Swing High
Output Voltage Swing Low
Output Voltage Swing High
Output Current
Short Circuit Current
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Power Supply Rejection Ratio
80
30
125
VCM = 0 V to 2.7 V
VCM = 0 V to 1.55 V
46
58
50
80
±6
±10
76
74
40
280
1.6
−0.5 to
+3.2
−0.2 to
+2.9
64
74
80
30
125
MHz
V/µs
ns
−62
−86
15
0.4
5
−60
dBc
dBc
nV/√Hz
pA/√Hz
pA/√Hz
dB
±0.5
±1.6
10
0.45
2
2.2
500
46
58
50
80
0.05
2.6
0.15
2.55
RL = 1 kΩ
Sourcing
Sinking
G = +2 (See Figure 46)
0.02
2.68
0.08
2.6
15
21
−34
15
2.7
VS− = 0 V to −1 V or
VS+ = +2.7 V to +3.7 V
Rev. G | Page 3 of 20
75
750
86
2
2.2
500
V
0.02
2.68
0.08
2.6
15
21
−34
15
2.7
75
750
86
mV
mV
µV/°C
µA
µA
nA
dB
dB
MΩ
kΩ
pF
V
3.4
0.05
2.6
0.15
2.55
12
1250
±1.5
±2.5
40
280
1.6
−0.5 to
+3.2
−0.2 to
+2.9
64
74
3.4
RL = 10 kΩ
Unit
dB
dB
V
V
V
V
V
mA
mA
mA
pF
12
1250
V
μA
dB
AD8031/AD8032
Data Sheet
+5 V SUPPLY
@ TA = 25°C, VS = 5 V, RL = 1 kΩ to 2.5 V, RF = 2.5 kΩ, unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth
Slew Rate
Settling Time to 0.1%
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion
Input Voltage Noise
Input Current Noise
Differential Gain
Differential Phase
Crosstalk (AD8032 Only)
DC PERFORMANCE
Input Offset Voltage
Offset Drift
Input Bias Current
Input Offset Current
Open-Loop Gain
Conditions
G = +1, VO < 0.4 V p-p
G = −1, VO = 2 V step
G = −1, VO = 2 V step, CL = 10 pF
AD8031A/AD8032A
Min Typ
Max
AD8031B/AD8032B
Min Typ
Max
54
27
54
27
fC = 1 MHz, VO = 2 V p-p, G = +2
fC = 100 kHz, VO = 2 V p-p, G = +2
f = 1 kHz
f = 100 kHz
f = 1 kHz
RL = 1 kΩ
RL = 1 kΩ
f = 5 MHz
−62
−86
15
0.4
5
0.17
0.11
−60
VCM = VCC/2; VOUT = 2.5 V
TMIN to TMAX
VCM = VCC/2; VOUT = 2.5 V
VCM = VCC/2; VOUT = 2.5 V
TMIN to TMAX
±1
±6
5
0.45
VCM = VCC/2; VOUT = 1.5 V to 3.5 V
TMIN to TMAX
76
74
INPUT CHARACTERISTICS
Common-Mode Input Resistance
Differential Input Resistance
Input Capacitance
Input Voltage Range
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Differential Input Voltage
OUTPUT CHARACTERISTICS
Output Voltage Swing Low
Output Voltage Swing High
Output Voltage Swing Low
Output Voltage Swing High
Output Current
Short Circuit Current
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Power Supply Rejection Ratio
80
32
125
VCM = 0 V to 5 V
VCM = 0 V to 3.8 V
56
66
50
82
±6
±10
76
74
40
280
1.6
−0.5 to
+5.5
−0.2 to
+5.2
70
80
80
32
125
MHz
V/µs
ns
−62
−86
15
0.4
5
0.17
0.11
−60
dBc
dBc
nV/√Hz
pA/√Hz
pA/√Hz
%
Degrees
dB
±0.5
±1.6
5
0.45
1.2
2.0
350
56
66
50
82
0.05
4.95
0.2
4.8
RL = 1 kΩ
Sourcing
Sinking
G = +2 (See Figure 46)
0.02
4.98
0.1
4.9
15
28
−46
15
2.7
VS− = 0 V to −1 V or
VS+ = +5 V to +6 V
Rev. G | Page 4 of 20
75
800
86
1.2
2.0
250
V
0.02
4.98
0.1
4.9
15
28
−46
15
2.7
75
800
86
mV
mV
µV/°C
µA
µA
nA
dB
dB
MΩ
kΩ
pF
V
3.4
0.05
4.95
0.2
4.8
12
1400
±1.5
±2.5
40
280
1.6
−0.5 to
+5.5
−0.2 to
+5.2
70
80
3.4
RL = 10 kΩ
Unit
dB
dB
V
V
V
V
V
mA
mA
mA
pF
12
1400
V
µA
dB
Data Sheet
AD8031/AD8032
±5 V SUPPLY
@ TA = 25°C, VS = ±5 V, RL = 1 kΩ to 0 V, RF = 2.5 kΩ, unless otherwise noted.
Table 3.
Parameter
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth
Slew Rate
Settling Time to 0.1%
DISTORTION/NOISE PERFORMANCE
Total Harmonic Distortion
Input Voltage Noise
Input Current Noise
Differential Gain
Differential Phase
Crosstalk (AD8032 Only)
DC PERFORMANCE
Input Offset Voltage
Offset Drift
Input Bias Current
Input Offset Current
Open-Loop Gain
Conditions
G = +1, VO < 0.4 V p-p
G = −1, VO = 2 V step
G = −1, VO = 2 V step, CL = 10 pF
AD8031A/AD8032A
Min
Typ
Max
AD8031B/AD8032B
Min
Typ
Max
54
30
54
30
fC = 1 MHz, VO = 2 V p-p, G = +2
fC = 100 kHz, VO = 2 V p-p, G = +2
f = 1 kHz
f = 100 kHz
f = 1 kHz
RL = 1 kΩ
RL = 1 kΩ
f = 5 MHz
−62
−86
15
0.4
5
0.15
0.15
−60
VCM = 0 V; VOUT = 0 V
TMIN to TMAX
VCM = 0 V; VOUT = 0 V
VCM = 0 V; VOUT = 0 V
TMIN to TMAX
±1
±6
5
0.45
VCM = 0 V; VOUT = ±2 V
TMIN to TMAX
76
74
INPUT CHARACTERISTICS
Common-Mode Input Resistance
Differential Input Resistance
Input Capacitance
Input Voltage Range
Input Common-Mode Voltage Range
Common-Mode Rejection Ratio
Differential/Input Voltage
OUTPUT CHARACTERISTICS
Output Voltage Swing Low
Output Voltage Swing High
Output Voltage Swing Low
Output Voltage Swing High
Output Current
Short Circuit Current
Capacitive Load Drive
POWER SUPPLY
Operating Range
Quiescent Current per Amplifier
Power Supply Rejection Ratio
80
35
125
VCM = −5 V to +5 V
VCM = −5 V to +3.5 V
60
66
50
80
±6
±10
76
74
40
280
1.6
−5.5 to
+5.5
−5.2 to
+5.2
80
90
80
35
125
MHz
V/µs
ns
−62
−86
15
0.4
5
0.15
0.15
−60
dBc
dBc
nV/√Hz
pA/√Hz
pA/√Hz
%
Degrees
dB
±0.5
±1.6
5
0.45
1.2
2.0
350
60
66
50
80
−4.94
+4.94
−4.7
+4.7
RL = 1 kΩ
Sourcing
Sinking
G = +2 (See Figure 46)
−4.98
+4.98
−4.85
+4.75
15
35
−50
15
±1.35
VS− = −5 V to −6 V or
VS+ = +5 V to +6 V
Rev. G | Page 5 of 20
76
900
86
1.2
2.0
250
V
−4.98
+4.98
−4.85
+4.75
15
35
−50
15
±1.35
76
900
86
mV
mV
µV/°C
µA
µA
nA
dB
dB
MΩ
kΩ
pF
V
3.4
−4.94
+4.94
−4.7
+4.7
±6
1600
±1.5
±2.5
40
280
1.6
−5.5 to
+5.5
−5.2 to
+5.2
80
90
3.4
RL = 10 kΩ
Unit
dB
dB
V
V
V
V
V
mA
mA
mA
pF
±6
1600
V
µA
dB
AD8031/AD8032
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 4.
1
1.3 W
0.8 W
0.6 W
0.5 W
±VS ± 0.5 V
±3.4 V
Observe Power
Derating Curves
−65°C to +125°C
300°C
Specification is for the device in free air:
8-Lead PDIP: θJA = 90°C/W.
8-Lead SOIC_N: θJA = 155°C/W.
8-Lead MSOP: θJA = 200°C/W.
5-Lead SOT-23: θJA = 240°C/W.
The maximum power that can be safely dissipated by the
AD8031/AD8032 is limited by the associated rise in junction
temperature. The maximum safe junction temperature for
plastic encapsulated devices is determined by the glass
transition temperature of the plastic, approximately 150°C.
Exceeding this limit temporarily can cause a shift in parametric
performance due to a change in the stresses exerted on the die
by the package. Exceeding a junction temperature of 175°C for
an extended period can result in device failure.
While the AD8031/AD8032 are internally short-circuit
protected, this may not be sufficient to guarantee that the
maximum junction temperature (150°C) is not exceeded under
all conditions. To ensure proper operation, it is necessary to
observe the maximum power derating curves shown in Figure 7.
2.0
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
8-LEAD PDIP
TJ = +150°C
1.5
8-LEAD SOIC
1.0
0.5
8-LEAD MSOP
5-LEAD SOT-23
0
–50 –40 –30 –20 –10 0 10 20 30 40 50 60
AMBIENT TEMPERATURE (°C)
70
80
Figure 7. Maximum Power Dissipation vs. Temperature
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. G | Page 6 of 20
90
01056-007
Storage Temperature Range (N, R, RM, RJ)
Lead Temperature (Soldering 10 sec)
MAXIMUM POWER DISSIPATION
Rating
12.6 V
MAXIMUM POWER DISSIPATION (W)
Parameter
Supply Voltage
Internal Power Dissipation 1
8-Lead PDIP (N)
8-Lead SOIC_N (R)
8-Lead MSOP (RM)
5-Lead SOT-23 (RJ)
Input Voltage (Common Mode)
Differential Input Voltage
Output Short-Circuit Duration
Data Sheet
AD8031/AD8032
TYPICAL PERFORMANCE CHARACTERISTICS
800
90
80
600
INPUT BIAS CURRENT (nA)
60
50
40
30
20
400
200
VS = 2.7V
0
VS = 10V
VS = 5V
–200
–400
–600
10
–5
–4
–3
–2
–1
0
1
VOS (mV)
2
3
4
–800
01056-008
0
5
0
Figure 8. Typical VOS Distribution @ VS = 5 V
1
2
3
4
5
6
7
8
COMMON-MODE VOLTAGE (V)
9
10
01056-011
NUMBER OF PARTS IN BIN
N = 250
70
Figure 11. Input Bias Current vs. Common-Mode Voltage
2.5
0
VS = 5V
–0.1
OFFSET VOLTAGE (mV)
2.1
VS = +5V
1.9
VS = ±5V
1.7
–0.2
–0.3
–0.4
0
10 20 30 40 50
TEMPERATURE (°C)
60
70
80
90
–0.6
0
Figure 9. Input Offset Voltage vs. Temperature
1.0
1.5 2.0 2.5 3.0 3.5 4.0
COMMON-MODE VOLTAGE (V)
4.5
5.0
Figure 12. VOS vs. Common-Mode Voltage
1.00
1000
SUPPLY CURRENT/AMPLIFIER (µA)
0.95
VS = 5V
0.90
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
–40 –30 –20 –10
0
10 20 30 40 50
TEMPERATURE (°C)
60
70
80
90
01056-010
INPUT BIAS (µA)
0.5
01056-012
1.5
–40 –30 –20 –10
01056-009
–0.5
±IS, VS = ±5V
950
900
850
+IS, VS = +5V
800
750
+IS, VS = +2.7V
700
650
600
–40 –30 –20 –10
0
10 20 30 40 50
TEMPERATURE (°C)
60
70
Figure 13. Supply Current vs. Temperature
Figure 10. Input Bias Current vs. Temperature
Rev. G | Page 7 of 20
80
90
01056-013
OFFSET VOLTAGE (mV)
2.3
AD8031/AD8032
1.2
VCC = 2.7V
VCC
1.0
DIFFERENCE FROM VEE (V)
–0.5
VCC = 5V
VCC
–1.5
VCC = 10V
VOUT
VIN
RLOAD
–2.0
VEE
–2.5
100
VOUT
VIN
0.8
RLOAD
VEE
VCC
2
0.6
VCC = 5V
0.4
0.2
VCC
2
10k
1k
RLOAD (Ω)
VCC = 2.7V
0
100
10k
1k
RLOAD (Ω)
Figure 14. +Output Saturation Voltage vs. RLOAD @ +85°C
0
VCC = 10V
01056-017
–1.0
01056-014
DIFFERENCE FROM VCC (V)
0
Data Sheet
Figure 17. −Output Saturation Voltage vs. RLOAD @ +85°C
1.2
VCC = 2.7V
DIFFERENCE FROM VEE (V)
–0.5
VCC = 5V
VCC
VCC = 10V
VOUT
VIN
RLOAD
–2.0
VEE
1k
10k
VCC = 5V
0.4
1k
10k
Figure 18. −Output Saturation Voltage vs. RLOAD @ +25°C
1.2
VCC
1.0
DIFFERENCE FROM VEE (V)
–0.5
VCC = 5V
VCC
–1.5
VCC = 10V
VOUT
VIN
RLOAD
–2.0
VEE
VOUT
VIN
0.8
RLOAD
VEE
VCC
2
0.6
VCC = 5V
0.4
0.2
2
1k
RLOAD (Ω)
VCC = 10V
VCC
10k
0
100
01056-016
DIFFERENCE FROM VCC (V)
VCC
2
RLOAD (Ω)
VCC = 2.7V
–2.5
100
0.6
VCC = 2.7V
0
100
Figure 15. +Output Saturation Voltage vs. RLOAD @ +25°C
–1.0
VEE
0.2
RLOAD (Ω)
0
0.8
RLOAD
VCC
2
–2.5
100
VOUT
VIN
01056-018
–1.5
VCC = 10V
VCC = 2.7V
1k
10k
RLOAD (Ω)
Figure 16. +Output Saturation Voltage vs. RLOAD @ −40°C
Figure 19. −Output Saturation Voltage vs. RLOAD @ −40°C
Rev. G | Page 8 of 20
01056-019
–1.0
01056-015
DIFFERENCE FROM VCC (V)
VCC
1.0
Data Sheet
AD8031/AD8032
110
VS = 5V
500mV
100
INPUT BIAS CURRENT (mA)
105
–AOL
90
+AOL
85
80
75
100
90
10
0
VS = 5V
–10
10
0%
70
65
0
2k
4k
6k
8k
10k
RLOAD (Ω)
–1.5
4.5
6.5
Figure 23. Differential Input Overvoltage I-V Characteristics
86
0.05
DIFF GAIN (%)
VS = 5V
RL = 1kΩ
84
–AOL
82
0
–0.05
–0.10
–0.15
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
80
76
–40 –30 –20 –10
0
10 20 30 40 50
TEMPERATURE (°C)
60
70
80
90
01056-021
78
0.05
0
–0.05
–0.10
1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH 9TH 10TH 11TH
Figure 24. Differential Gain and Phase @ VS = ±5 V; RL = 1 kΩ
Figure 21. Open Loop Gain vs. (AOL) Temperature
110
100
VS = 5V
90
RLOAD = 1kΩ
80
70
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VOUT (V)
4.5
5.0
VOLTAGE NOISE
10
10
3
1
CURRENT NOISE
1
0.3
10
01056-022
60
100
30
0.1
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 25. Input Voltage Noise vs. Frequency
Figure 22. Open-Loop Gain (AOL) vs. VOUT
Rev. G | Page 9 of 20
10M
INPUT CURRENT NOISE (pA/ Hz)
VS = 5V
INPUT VOLTAGE NOISE (nV/ Hz)
RLOAD = 10kΩ
100
50
0.10
01056-024
+AOL
DIFF PHASE (Degrees)
GAIN (dB)
2.5
INPUT VOLTAGE (V)
Figure 20. Open-Loop Gain (AOL) vs. RLOAD
AOL (dB)
0.5
01056-023
500mV
01056-020
60
01056-025
GAIN (dB)
95
1V
AD8031/AD8032
Data Sheet
5
20
1
10
0
0
–1
–2
–5
0.1
1
10
100
FREQUENCY (MHz)
PHASE
–20
–135
–180
–225
0.3
01056-026
–4
–10
–90
10
FREQUENCY (MHz)
100
Figure 29. Open-Loop Frequency Response
Figure 26. Unity Gain, −3 dB Bandwidth
–20
2
+85°C
1
0
–40°C
+25°C
–1
–2
VS
2kΩ
–3
VOUT
VIN
50Ω
0.1
1
10
100
FREQUENCY (MHz)
–60
2V p-p
VS = 2.7V
–70
4.8V p-p
VS = 5V
10k
100k
1M
10M
Figure 30. Total Harmonic Distortion vs. Frequency; G = +1
TOTAL HARMONIC DISTORTION (dBc)
VS = +5V
RL + CL
TO 2.5V
0
VS = ±5V
–1
–2
G = +1
CL = 5pF
RL = 1kΩ
–6
–7
1M
10M
FREQUENCY (Hz)
100M
–30
–40
–50
G = +2
VS = 5V
VCC
RL = 1kΩ TO
2
4.8V p-p
–60
1V p-p
–70
4.6V p-p
–80
4V p-p
–90
–100
1k
01056-028
–8
100k
2.5V p-p
VS = 2.7V
–20
VS = +2.7V
RL + CL TO 1.35V
1
–5
1.3V p-p
VS = 2.7V
–50
FUNDAMENTAL FREQUENCY (Hz)
2
–4
VCC
2
–40
–80
1k
Figure 27. Closed-Loop Gain vs. Temperature
–3
G = +1, RL = 2kΩ TO
10k
100k
1M
10M
FUNDAMENTAL FREQUENCY (Hz)
Figure 28. Closed-Loop Gain vs. Supply Voltage
Figure 31. Total Harmonic Distortion vs. Frequency; G +2
Rev. G | Page 10 of 20
01056-031
–5
01056-027
–4
–30
01056-030
VS = 5V
VIN = –16dBm
TOTAL HARMONIC DISTORTION (dBc)
3
NORMALIZED GAIN (dB)
1
01056-029
PHASE (Degrees)
2
–3
CLOSED-LOOP GAIN (dB)
30
GAIN
OPEN-LOOP GAIN (dB)
3
NORMALIZED GAIN (dB)
40
VS = 5V
G = +1
RL = 1kΩ
4
Data Sheet
AD8031/AD8032
0
10
OUTPUT (V p-p)
8
6
VS = +5V
4
VS = +2.7V
0
1k
10k
100k
1M
10M
FREQUENCY (Hz)
–60
–80
–100
–120
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 32. Large Signal Response
100M
Figure 35. PSRR vs. Frequency
RBT = 50Ω
100
50
VS = 5V
–40
01056-032
2
–20
01056-035
POWER SUPPLY REJECTION RATIO (dB)
VS = ±5V
VS = 5V
RL = 10kΩ TO 2.5V
VIN = 6V p-p
G = +1
5.5
1V/DIV
3.5
1
2.5
1.5
RBT = 0Ω
0.1
1
10
0.5
VOUT
100 200
FREQUENCY (MHz)
–0.5
10µs/DIV
Figure 33. ROUT vs. Frequency
01056-036
RBT
0.1
01056-033
ROUT (Ω)
4.5
10
Figure 36. Output Voltage
VS = 5V
INPUT
–20
5.5
VS = 5V
G = +1
INPUT = 650mV
BEYOND RAILS
4.5
1V/DIV
–40
3.5
2.5
–60
1.5
–80
–0.5
–100
100
1k
10k
100k
1M
FREQUENCY (Hz)
10M
10µs/DIV
Figure 37. Output Voltage Phase Reversal Behavior
Figure 34. CMRR vs. Frequency
Rev. G | Page 11 of 20
01056-037
0.5
01056-034
COMMON-MODE REJECTION RATIO (dB)
0
AD8031/AD8032
Data Sheet
G = +1
RF = 0Ω
RL = 2kΩ TO 2.5V
CL = 5pF TO 2.5V
VS = 5V
RL TO
+2.5V
2.56
500mV/DIV
20mV/DIV
2.54
2.52
2.50
2.48
2.46
VS = +5V
RL = 1kΩ
G = –1
10µs/DIV
50ns/DIV
Figure 41. 100 mV Step Response
Figure 38. Output Swing
CROSSTALK(dB)
2.9
200mV/DIV
–50
G = +2
RF = RG = 2.5kΩ
RL = 2kΩ
CL = 5pF
VS = 5V
3.1
01056-041
01056-038
0
2.44
2.7
2.5
–60
–70
–90
–100
2.3
VS = ±2.5V
VIN = +10dBm
–80
2.5kΩ
2.5kΩ
2.5kΩ
2.1
VOUT
VIN
1.9
2.5kΩ
1kΩ
50Ω
50Ω
01056-039
TRANSMITTER
50ns/DIV
.1
00.1
Figure 42. Crosstalk vs. Frequency
VS = 2.7V
RL = 1kΩ
G = –1
1.85
1.35
RL TO
1.35V
0.35
RL TO GND
10µs/DIV
01056-040
500mV/DIV
2.35
0.85
RECEIVER
10
10
FREQUENCY (MHz)
Figure 39. 1 V Step Response
2.85
1
Figure 40. Output Swing
Rev. G | Page 12 of 20
00 200
1100
01056-042
RL TO GND
Data Sheet
AD8031/AD8032
THEORY OF OPERATION
Switching to the NPN pair as the common-mode voltage is
driven beyond 1 V within the positive supply allows the amplifier
to provide useful operation for signals at either end of the
supply voltage range and eliminates the possibility of phase
reversal for input signals up to 500 mV beyond either power
supply. Offset voltage also changes to reflect the offset of the
input pair in control. The transition region is small, approximately
180 mV. These sudden changes in the dc parameters of the
input stage can produce glitches that adversely affect distortion.
The AD8031/AD8032 are single and dual versions of high
speed, low power, voltage feedback amplifiers featuring an
innovative architecture that maximizes the dynamic range
capability on the inputs and outputs. The linear input commonmode range exceeds either supply voltage by 200 mV, and the
amplifiers show no phase reversal up to 500 mV beyond supply.
The output swings to within 20 mV of either supply when
driving a light load; 300 mV when driving up to 5 mA.
Fabricated on Analog Devices, Inc. eXtra Fast Complementary
Bipolar (XFCB) process, the amplifier provides an impressive
80 MHz bandwidth when used as a follower and a 30 V/µs slew
rate at only 800 µA supply current. Careful design allows the
amplifier to operate with a supply voltage as low as 2.7 V.
OVERDRIVING THE INPUT STAGE
Sustained input differential voltages greater than 3.4 V should
be avoided as the input transistors can be damaged. Input clamp
diodes are recommended if the possibility of this condition
exists.
INPUT STAGE OPERATION
The voltages at the collectors of the input pairs are set to
200 mV from the power supply rails. This allows the amplifier
to remain in linear operation for input voltages up to 500 mV
beyond the supply voltages. Driving the input common-mode
voltage beyond that point will forward bias the collector junction of
the input transistor, resulting in phase reversal. Sustaining this
condition for any length of time should be avoided because it is
easy to exceed the maximum allowed input differential voltage
when the amplifier is in phase reversal.
A simplified schematic of the input stage appears in Figure 43.
For common-mode voltages up to 1.1 V within the positive
supply (0 V to 3.9 V on a single 5 V supply), tail current I2
flows through the PNP differential pair, Q13 and Q17. Q5 is cut
off; no bias current is routed to the parallel NPN differential
pair, Q2 and Q3. As the common-mode voltage is driven within
1.1 V of the positive supply, Q5 turns on and routes the tail
current away from the PNP pair and to the NPN pair. During
this transition region, the input current of the amplifier changes
magnitude and direction. Reusing the same tail current ensures
that the input stage has the same transconductance, which
determines the gain and bandwidth of the amplifier, in both
regions of operation.
VCC
R1
2kΩ
I2
90µA
Q9
I3
25µA
R2
2kΩ
1.1V
VIN
Q3
R6
850Ω
Q5
VIP
Q13
R7
850Ω
R8
850Ω
Q2
R9
850Ω
1
Q6
Q10
1
Q8
Q7
4
Q17
OUTPUT STAGE,
COMMON-MODE
FEEDBACK
Q14
Q11
4
1
I1
5µA
VEE
Q18
4
I4
25µA
Q4
Q15
R3
2kΩ
Figure 43. Simplified Schematic of AD8031 Input Stage
Rev. G | Page 13 of 20
Q16
4
1
R4
2kΩ
01056-043
R5
50kΩ
AD8031/AD8032
Data Sheet
OUTPUT STAGE, OPEN-LOOP GAIN AND
DISTORTION vs. CLEARANCE FROM POWER
SUPPLY
The AD8031 features a rail-to-rail output stage. The output
transistors operate as common-emitter amplifiers, providing the
output drive current as well as a large portion of the amplifier’s
open-loop gain.
I1
25µA
I2
25µA
Q51
Q42
Q47
DIFFERENTIAL
DRIVE
FROM
INPUT STAGE
Q37
C9
5pF
Q68
+
Q20
Q27
Q21
VOUT
C5
1.5pF
Q48
+
Q43
OUTPUT OVERDRIVE RECOVERY
Q49
I4
25µA
Q44
01056-044
I5
25µA
Q50
The distortion performance of the AD8031/AD8032 amplifiers
differs from conventional amplifiers. Typically, the distortion
performance of the amplifier degrades as the output voltage
amplitude increases.
Used as a unity gain follower, the output of the AD8031/
AD8032 exhibits more distortion in the peak output voltage
region around VCC − 0.7 V. This unusual distortion characteristic is
caused by the input stage architecture and is discussed in detail
in the Input Stage Operation section,
Q38
R29
300Ω
The open-loop gain of the AD8031 decreases approximately
linearly with load resistance and depends on the output voltage.
Open-loop gain stays constant to within 250 mV of the positive
power supply, 150 mV of the negative power supply, and then
decreases as the output transistors are driven further into
saturation.
Figure 44. Output Stage Simplified Schematic
The output voltage limit depends on how much current the
output transistors are required to source or sink. For applications
with low drive requirements (for instance, a unity gain follower
driving another amplifier input), the AD8031 typically swings
within 20 mV of either voltage supply. As the required current
load increases, the saturation output voltage increases linearly as
Output overdrive of an amplifier occurs when the amplifier
attempts to drive the output voltage to a level outside its normal
range. After the overdrive condition is removed, the amplifier
must recover to normal operation in a reasonable amount of
time. As shown in Figure 45, the AD8031/AD8032 recover
within 100 ns from negative overdrive and within 80 ns from
positive overdrive.
RF = RG = 2kΩ
RG
RF
VOUT
VIN
ILOAD × RC
50Ω
RL
where:
ILOAD is the required load current.
For the AD8031, the collector resistances for both output
transistors are typically 25 Ω. As the current load exceeds the
rated output current of 15 mA, the amount of base drive current
required to drive the output transistor into saturation reaches its
limit, and the amplifier’s output swing rapidly decreases.
Rev. G | Page 14 of 20
1V
VS = ±2.5V
VIN = ±2.5V
RL = 1kΩ TO GND
Figure 45. Overdrive Recovery
100ns
01056-045
RC is the output transistor collector resistance.
Data Sheet
AD8031/AD8032
1000
The capacitive load drive of the AD8031/AD8032 can be
increased by adding a low valued resistor in series with the
capacitive load. Introducing a series resistor tends to isolate the
capacitive load from the feedback loop, thereby diminishing its
influence. Figure 46 shows the effects of a series resistor on the
capacitive drive for varying voltage gains. As the closed-loop
gain is increased, the larger phase margin allows for larger
capacitive loads with less overshoot. Adding a series resistor at
lower closed-loop gains accomplishes the same effect. For large
capacitive loads, the frequency response of the amplifier is
dominated by the roll-off of the series resistor and capacitive load.
Rev. G | Page 15 of 20
CAPACITIVE LOAD (pF)
Capacitive loads interact with an op amp’s output impedance to
create an extra delay in the feedback path. This reduces circuit
stability and can cause unwanted ringing and oscillation. A
given value of capacitance causes much less ringing when the
amplifier is used with a higher noise gain.
RS = 5Ω
VS = 5V
200mV STEP
WITH 30% OVERSHOOT
RS = 0Ω
100
RS = 20Ω
RS = 20Ω
10
RG
RF
RS
RS = 0Ω, 5Ω
VOUT
CL
1
0
1
2
3
4
CLOSED-LOOP GAIN (V/V)
Figure 46. Capacitive Load Drive vs. Closed-Loop Gain
5
01056-046
DRIVING CAPACITIVE LOADS
AD8031/AD8032
Data Sheet
APPLICATIONS
A 2 MHz SINGLE-SUPPLY, BIQUAD BAND-PASS
FILTER
0
Figure 47 shows a circuit for a single-supply, biquad band-pass
filter with a center frequency of 2 MHz. A 2.5 V bias level is
easily created by connecting the noninverting inputs of all three
op amps to a resistor divider consisting of two 1 kΩ resistors
connected between 5 V and ground. This bias point is also
decoupled to ground with a 0.1 µF capacitor. The frequency
response of the filter is shown in Figure 48.
R6
1kΩ
GAIN (dB)
–20
–30
–40
–50
10k
100k
100M
HIGH PERFORMANCE, SINGLE-SUPPLY LINE DRIVER
Even though the AD8031/AD8032 swing close to both rails, the
AD8031 has optimum distortion performance when the signal
has a common-mode level half way between the supplies and
when there is about 500 mV of headroom to each rail. If low
distortion is required in single-supply applications for signals
that swing close to ground, an emitter-follower circuit can be
used at the op amp output.
5V
10µF
R2
2kΩ
R4
2kΩ
5V
0.1µF
R1
3kΩ
C2
50pF
0.1µF
R3
2kΩ
1kΩ
3
VIN
R5
2kΩ
7
6
49.9Ω
2
4
AD8031
1/2
AD8032
1/2
AD8032
2.49kΩ
2N3904
AD8031
2.49kΩ
49.9Ω
1kΩ
VOUT
Figure 47. A 2 MHz, Biquad Band-Pass Filter Using AD8031/AD8032
01056-047
200Ω
VOUT
49.9Ω
01056-049
5V
0.1µF
0.1µF
10M
Figure 48. Frequency Response of 2 MHz Band-Pass Filter
C1
50pF
VIN
1M
FREQUENCY (Hz)
01056-048
To maintain an accurate center frequency, it is essential that the
op amp have sufficient loop gain at 2 MHz. This requires the
choice of an op amp with a significantly higher unity gain,
crossover frequency. The unity gain, crossover frequency of the
AD8031/AD8032 is 40 MHz. Multiplying the open-loop gain by
the feedback factors of the individual op amp circuits yields the
loop gain for each gain stage. From the feedback networks of
the individual op amp circuits, it can be seen that each op amp
has a loop gain of at least 21 dB. This level is high enough to
ensure that the center frequency of the filter is not affected by
the op amp’s bandwidth. If, for example, an op amp with a gain
bandwidth product of 10 MHz was chosen in this application,
the resulting center frequency would shift by 20% to 1.6 MHz.
–10
Figure 49. Low Distortion Line Driver for Single-Supply, Ground Referenced Signals
Figure 49 shows the AD8031 configured as a single-supply, gainof-2 line driver. With the output driving a back-terminated
50 Ω line, the overall gain from VIN to VOUT is unity. In addition
to minimizing reflections, the 50 Ω back termination resistor
protects the transistor from damage if the cable is short circuited.
The emitter follower, which is inside the feedback loop, ensures
that the output voltage from the AD8031 stays about 700 mV
above ground. Using this circuit, low distortion is attainable
even when the output signal swings to within 50 mV of ground.
The circuit was tested at 500 kHz and 2 MHz.
Rev. G | Page 16 of 20
Data Sheet
AD8031/AD8032
Figure 50 and Figure 51 show the output signal swing and
frequency spectrum at 500 kHz. At this frequency, the output
signal (at VOUT), which has a peak-to-peak swing of 1.95 V
(50 mV to 2 V), has a THD of −68 dB (SFDR = −77 dB).
100
90
This circuit could also be used to drive the analog input of a
single-supply, high speed ADC whose input voltage range is
referenced to ground (for example, 0 V to 2 V or 0 V to 4 V). In
this case, a back termination resistor is not necessary (assuming
a short physical distance from transistor to ADC); therefore, the
emitter of the external transistor would be connected directly to
the ADC input. The available output voltage swing of the circuit
would therefore be doubled.
2V
1.5V
100
90
10
0.5V
1µs
01056-050
0%
50mV
Figure 50. Output Signal Swing of Low Distortion Line Driver at 500 kHz
10
0.2V
200ns
VERTICAL SCALE (10dB/DIV)
50mV
01056-052
0%
+9dBm
Figure 52. Output Signal Swing of Low Distortion Line Driver at 2 MHz
Figure 51. THD of Low Distortion Line Driver at 500 kHz
Figure 52 and Figure 53 show the output signal swing and
frequency spectrum at 2 MHz. As expected, there is some
degradation in signal quality at the higher frequency. When the
output signal has a peak-to-peak swing of 1.45 V (swinging
from 50 mV to 1.5 V), the THD is −55 dB (SFDR = −60 dB).
Rev. G | Page 17 of 20
START 0Hz
STOP 20MHz
Figure 53. THD of Low Distortion Line Driver at 2 MHz
01056-053
STOP 5MHz
01056-051
START 0Hz
VERTICAL SCALE (10dB/DIV)
+7dBm
AD8031/AD8032
Data Sheet
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
1
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.060 (1.52)
MAX
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
070606-A
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 54. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body (N-8)
Dimensions shown in inches and (millimeters)
5.00 (0.1968)
4.80 (0.1890)
1
5
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
6.20 (0.2441)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 55. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
Rev. G | Page 18 of 20
012407-A
8
4.00 (0.1574)
3.80 (0.1497)
Data Sheet
AD8031/AD8032
3.00
2.90
2.80
5
1.70
1.60
1.50
1
4
2
3.00
2.80
2.60
3
0.95 BSC
1.90
BSC
1.30
1.15
0.90
0.20 MAX
0.08 MIN
0.15 MAX
0.05 MIN
10°
5°
0°
SEATING
PLANE
0.50 MAX
0.35 MIN
0.60
BSC
0.55
0.45
0.35
11-01-2010-A
1.45 MAX
0.95 MIN
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 56. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
3.20
3.00
2.80
8
3.20
3.00
2.80
1
5.15
4.90
4.65
5
4
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.40
0.25
6°
0°
0.23
0.09
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 57. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. G | Page 19 of 20
0.80
0.55
0.40
10-07-2009-B
0.15
0.05
COPLANARITY
0.10
AD8031/AD8032
Data Sheet
ORDERING GUIDE
Model 1
AD8031ANZ
AD8031AR
AD8031ARZ
AD8031ARZ-REEL
AD8031ARZ-REEL7
AD8031ART-R2
AD8031ART-REEL7
AD8031ARTZ-R2
AD8031ARTZ-REEL
AD8031ARTZ-REEL7
AD8031BNZ
AD8031BR
AD8031BRZ
AD8031BRZ-REEL
AD8031BRZ-REEL7
AD8031AR-EBZ
AD8031ART-EBZ
AD8032ANZ
AD8032AR
AD8032AR-REEL7
AD8032ARZ
AD8032ARZ-REEL
AD8032ARZ-REEL7
AD8032ARM
AD8032ARM-REEL
AD8032ARM-REEL7
AD8032ARMZ
AD8032ARMZ-REEL
AD8032ARMZ-REEL7
AD8032BNZ
AD8032BR
AD8032BR-REEL7
AD8032BRZ
AD8032BRZ-REEL
AD8032BRZ-REEL7
AD8032ACHIPS
AD8032AR-EBZ
AD8032ARM-EBZ
1
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package Description
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N, 7" Tape and Reel
5-Lead SOT-23
5-Lead SOT-23, 7" Tape and Reel
5-Lead SOT-23
5-Lead SOT-23, 13" Tape and Reel
5-Lead SOT-23, 7" Tape and Reel
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N, 7" Tape and Reel
8-Lead SOIC Evaluation Board
5-Lead SOT-23 Evaluation Board
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N, 7" Tape and Reel
8-Lead SOIC_N
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N, 7" Tape and Reel
8-Lead MSOP
8-Lead MSOP, 13" Tape and Reel
8-Lead MSOP, 7" Tape and Reel
8-Lead MSOP
8-Lead MSOP, 13" Tape and Reel
8-Lead MSOP, 7" Tape and Reel
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N, 7" Tape and Reel
8-Lead SOIC_N
8-Lead SOIC_N, 13" Tape and Reel
8-Lead SOIC_N, 7" Tape and Reel
Die
8-Lead SOIC Evaluation Board
8-Lead MSOP Evaluation Board
Z = RoHS Compliant Part, # denotes lead-free product may be top or bottom marked.
©2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D01056-0-3/14(G)
Rev. G | Page 20 of 20
Package Option
N-8
R-8
R-8
R-8
R-8
RJ-5
RJ-5
RJ-5
RJ-5
RJ-5
N-8
R-8
R-8
R-8
R-8
N-8
R-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
N-8
R-8
R-8
R-8
R-8
R-8
Branding
H0A
H0A
H04
H04
H04
H9A
H9A
H9A
H9A#
H9A#
H9A#
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