AD8099ARDZ

Ultralow Distortion, High Speed, 0.95 nV/√Hz Voltage Noise Op Amp AD8099 Data Sheet FEATURES CONNECTION DIAGRAMS AD8099 Ultralow noise: 0.95 nV/√Hz, 2.6 pA/√Hz Ultralow distortion 2nd harmonic RL = 1 kΩ , G = +2 −92 dB at 10 MHz 3rd harmonic RL = 1 kΩ , G = +2 −105 dB at 10 MHz High speed Gain bandwidth product (GBWP): 3.8 GHz −3 dB bandwidth 700 MHz (G = +2) 550 MHz (G = +10) Slew rate 475 V/µs (G = +2) 1350 V/µs (G = +10) New pinout Custom external compensation, gain range –1, +2 to +10 Supply current: 15 mA Offset voltage: 0.5 mV max Wide supply voltage range: 5 V to 12 V GENERAL DESCRIPTION The AD8099 is an ultralow noise (0.95 nV/√Hz) and distortion (–92 dBc at 10 MHz) voltage feedback op amp, the combination of which makes it ideal for 16- and 18-bit systems. The AD8099 features a new, highly linear, low noise input stage that increases the full power bandwidth (FPBW) at low gains with high slew rates. The Analog Devices, Inc., proprietary next generation extra fast complimentary bipolar (XFCB) process enables such high performance amplifiers with relatively low power. The AD8099 features external compensation, which lets the user set the gain bandwidth product. External compensation allows gains from +2 to +10 with minimal trade-off in bandwidth. The AD8099 also features an extremely high slew rate of 1350 V/µs, giving the designer flexibility to use the entire dynamic range without trading off bandwidth or distortion. The AD8099 settles to 0.1% in 18 ns and recovers from overdrive in 50 ns. Rev. E 8 +VS 6 CC +IN 4 5 –VS 04511-0-001 7 VOUT –IN 3 NOTES 1. SOLDER THE EXPOSED PADDLE TO THE GROUND PLANE. Figure 1. 8-Lead LFCSP (CP-8-13) AD8099 FEEDBACK 1 8 DISABLE –IN 2 7 +VS +IN 3 6 VOUT –VS 4 5 CC NOTES 1. SOLDER THE EXPOSED PADDLE TO THE GROUND PLANE. 04511-0-002 TOP VIEW (Not to Scale) Figure 2. 8-Lead SOIC-EP (RD-8-1) The AD8099 drives 100 Ω loads at breakthrough performance levels with only 15 mA of supply current. With the wide supply voltage range (5 V to 12 V), low offset voltage (0.1 mV typ), wide bandwidth (700 MHz for G = +2), and a GBWP up to 3.8 GHz, the AD8099 is designed to work in a wide variety of applications. The AD8099 is available in a 3 mm × 3 mm lead frame chip scale package (LFCSP) with a new pinout that is specifically optimized for high performance, high speed amplifiers. The new LFCSP and pinout enable the breakthrough performance that previously was not achievable with amplifiers. The AD8099 is rated to work over the extended industrial temperature range, −40°C to +125°C. –40 G = +2 V = 2V p-p –50 VOUT S = ±5V RL = 1kΩ –60 –70 –80 –90 –100 –110 –120 –130 0.1 SOLID LINE – SECOND HARMONIC DOTTED LINE – THIRD HARMONIC 1.0 FREQUENCY (MHz) 10.0 04511-A-013 Preamplifiers Receivers Instrumentation Filters Intermediate frequency (IF) and baseband amplifiers Analog-to-digital drivers Digital-to-analog converter (DAC) buffers Optical electronics DISABLE 1 FEEDDBACK 2 HARMONIC DISTORTION (dBc) APPLICATIONS TOP VIEW (Not to Scale) Figure 3. Harmonic Distortion vs. Frequency and Gain (SOIC) Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2003–2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD8099 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Using the AD8099 ...................................................................... 16 Applications ....................................................................................... 1 Circuit Components .................................................................. 16 General Description ......................................................................... 1 Recommended Values ............................................................... 17 Connection Diagrams ...................................................................... 1 Circuit Configurations .............................................................. 17 Revision History ............................................................................... 2 Performance vs. Component Values........................................ 19 Specifications..................................................................................... 3 Total Output Noise Calculations and Design ......................... 21 Specifications with ±5 V Supply ................................................. 3 Input Bias Current and DC Offset ........................................... 21 Specifications with +5 V Supply ................................................. 4 DISABLE Pin and Input Bias Cancellation............................. 21 Absolute Maximum Ratings ............................................................ 5 16-Bit ADC Driver ..................................................................... 22 Maximum Power Dissipation ..................................................... 5 Circuit Considerations .............................................................. 23 ESD Caution .................................................................................. 5 Design Tools and Technical Support ....................................... 23 Typical Performance Characteristics ............................................. 6 Outline Dimensions ....................................................................... 24 Theory of Operation ...................................................................... 15 Ordering Guide .......................................................................... 24 Applications Information .............................................................. 16 REVISION HISTORY 7/2016—Rev. D to Rev. E Changed CP-8-2 to CP-8-13 ........................................ Throughout Changes to Figure 1 and Figure 2 ................................................... 1 Changes to Figure 67 ...................................................................... 19 Added Figure 68 to Figure 70; Renumbered Sequentially ........ 19 Changes to Figure 71 ...................................................................... 20 Added Figure 72 and Figure 73..................................................... 20 Changes to PCB Layout Section ................................................... 23 Updated Outline Dimensions ....................................................... 24 Changes to Ordering Guide ......................................................... 24 8/2013—Rev. C to Rev. D Changes to Figure 42 Caption....................................................... 12 Changes to Figure 49 ...................................................................... 13 Changes to Ordering Guide .......................................................... 25 1/2013—Rev. B to Rev. C Added EPAD Note to Figure 1 and Figure 2 ................................. 1 Changes to PCB Layout Section and Design Tools and Technical Support Section ............................................................. 23 Deleted Figure 72, Figure 73, Evaluation Boards Section, and Table 7 ....................................................................................... 24 Updated Outline Dimensions ....................................................... 25 Changes to Ordering Guide .......................................................... 26 6/2004—Rev. A to Rev. B Change to General Description Section .........................................1 Changes to Maximum Power Dissipation Section........................5 Changes to Applications Section ................................................. 16 Changes to Table 7.......................................................................... 24 Changes to Ordering Guide .......................................................... 26 1/2004—Rev. 0 to Rev. A Inserted Figure 3 ................................................................................1 Changes to Specifications Section ...................................................3 Inserted Figure 22 to Figure 34........................................................8 Inserted Figure 51 to Figure 55..................................................... 14 Changes to Theory of Operation Section.................................... 16 Changes to Circuit Components Section .................................... 17 Changes to Table 4.......................................................................... 18 Changes to Figure 60...................................................................... 18 Changes to Total Output Noise Calculations and Design Section ................................................................................ 21 Changes to Figure 60...................................................................... 22 Changes to Figure 62...................................................................... 23 Changes to 16-Bit ADC Driver Section ...................................... 23 Changes to Table 6.......................................................................... 23 Additions to PCB Layout Section................................................. 23 11/2003—Revision 0: Initial Version Rev. E | Page 2 of 26 Data Sheet AD8099 SPECIFICATIONS SPECIFICATIONS WITH ±5 V SUPPLY TA = 25°C, G = +2, RL = 1 kΩ to ground, unless otherwise noted. Refer to Figure 60 through Figure 66 for component values and gain configurations. Table 1. Parameter DYNAMIC PERFORMANCE −3 dB Bandwidth Bandwidth for 0.1 dB Flatness (SOIC/LFCSP) Slew Rate Settling Time to 0.1% NOISE/DISTORTION PERFORMANCE Harmonic Distortion (dBc) HD2/HD3 Input Voltage Noise Input Current Noise Test Conditions/Comments Min Typ G = +5, VOUT = 0.2 V p-p G = +5, VOUT = 2 V p-p G = +2, VOUT = 0.2 V p-p G = +10, VOUT = 6 V Step G = +2, VOUT = 2 V Step G = +2, VOUT = 2 V Step 450 205 510 235 34/25 1350 470 18 MHz MHz MHz V/µs V/µs ns −102/−111 −84/−92 0.95 2.6 5.2 dBc dBc nV/√Hz pA/√Hz pA/√Hz 1120 435 fC = 500 kHz, VOUT = 2 V p-p, G = +10 fC = 10 MHz, VOUT = 2 V p-p, G = +10 f = 100 kHz f = 100 kHz, DISABLE pin floating f = 100 kHz, DISABLE pin = +VS DC PERFORMANCE Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Bias Current Drift Input Bias Offset Current Open-Loop Gain INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio DISABLE PIN DISABLE Input Voltage Turn-Off Time Turn-On Time Enable Pin Leakage Current DISABLE Pin Leakage Current OUTPUT CHARACTERISTICS Output Overdrive Recovery Time (Rise/Fall) Output Voltage Swing Short-Circuit Current Off Isolation POWER SUPPLY Operating Range Quiescent Current Quiescent Current (Disabled) Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio 98 4 10 2 −3.7 to +3.7 105 kΩ MΩ pF V dB