Low Power, High Output Current,
Dual-Port ADSL/ADSL2+ Line Driver
AD8396
B
SO
ADSL/ADSL2+ CO line drivers
13 VOPA
14 VCC
INPA 1
12 VONA
INNA 2
AD8396
11 DGND
DGND 3
TOP
VIEW
10 VOPB
VONB
VEE 8
PD_B 7
INNB 5
VCOM-B 6
TE
9
07022-001
INPB 4
Figure 1.
LE
APPLICATIONS
16 VCOM-A
PIN CONFIGURATION
2 differential DSL channels comprised of current feedback,
high output current amplifiers
Integrated feedback and gain resistors
Integrated biasing network
Ideal for use as ADSL/ADSL2+ dual-channel Central Office
(CO) line drivers
Low power consumption
Dual-supply operation from ±6 V to ±12 V
Single-supply operation from 12 V to 24 V
10.8 mA quiescent supply current in full power mode
1.4 mA quiescent supply current in shutdown mode
Less than 700 mW internal power dissipation while driving
20.4 dBm line power, 1:1 transformer
High output voltage and current drive
43.4 V p-p differential output voltage
Low distortion
−66 dBc typical MTPR @ 20.4 dBm, 26 kHz to 2.2 MHz
High speed: 170 V/μs differential slew rate
15 PD_A
FEATURES
VCC
INPA
VOPA
VCC
4kΩ
AV = 13
VCOM-A
4kΩ
VEE
VONA
INNA
The AD8396 is comprised of four high output current, low
power consumption operational amplifiers. It is particularly
well suited for the CO driver interface in digital subscriber line
systems, such as ADSL and ADSL2+. The driver can deliver
20.4 dBm to a line while compensating for losses due to hybrid
insertion and back-termination resistors.
VEE
07022-002
GENERAL DESCRIPTION
Figure 2. Channel A Internal Schematics
O
The low power consumption, high output current, high output
voltage swing, and robust thermal packaging enable the AD8396 to
be used as the CO line driver in ADSL and other xDSL systems.
The AD8396 is available in a 4 mm × 4 mm 16-lead LFCSP.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2007–2009 Analog Devices, Inc. All rights reserved.
AD8396
TABLE OF CONTENTS
Typical Performance Characteristics ..............................................6
Applications ....................................................................................... 1
Theory of Operation .........................................................................8
General Description ......................................................................... 1
Applications Information .................................................................9
Pin Configuration ............................................................................. 1
Supplies, Grounding, and Layout ................................................9
Revision History ............................................................................... 2
Power Management ......................................................................9
Specifications..................................................................................... 3
Typical ADSL/ADSL2+ Application ...........................................9
Absolute Maximum Ratings............................................................ 4
Multitone Power Ratio (MTPR) ..................................................9
Thermal Resistance ...................................................................... 4
Lightning and AC Power Fault ................................................. 10
Maximum Power Dissipation ..................................................... 4
Outline Dimensions ....................................................................... 11
ESD Caution .................................................................................. 4
Ordering Guide .......................................................................... 11
Pin Configuration and Function Descriptions ............................. 5
REVISION HISTORY
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8/09—Revision C: Initial Version
TE
Features .............................................................................................. 1
Rev. C | Page 2 of 12
AD8396
SPECIFICATIONS
(VCC − VEE) = 24 V, RL = 100 Ω, GDIFF = 13 (fixed), PD = (0), T = 25°C, typical DSL application circuit, unless otherwise noted.
Table 1.
12.8
8
8
170
13
Max
Unit
Test Conditions/Comments
VOUT = 0.1 V p-p, differential
VOUT = 2 V p-p, differential
VOUT = 4 V p-p, differential
13.2
MHz
MHz
V/μs
V/V
dBc
dBc
dBc
fC = 2 MHz, VOUT = 2 V p-p, differential
fC = 2 MHz, VOUT = 2 V p-p, differential
26 kHz to 2.2 MHz, ZLINE = 100 Ω, differential
load
f = 10 kHz
−90
−62
−66
140
−15
−15
−30
−5
42.6
21.3
−100
nV/√Hz
−0.7
+0.3
+0.1
−1.5
8
1
+15
+15
+30
+5
mV
mV
mV
μA
kΩ
pF
Single-ended
Differential
Differential
43.4
21.7
44
22
+100
V p-p
V p-p
μA
ΔVOUT, RL = 100 Ω
ΔVOUT, RL = 50 Ω
PD = (1)
±12
24
V
V
10.8
1.4
+0.2
13.0
3.0
+10
0.8
−47
+1
−80
−80
+100
+100
−60
−60
mA
mA
mV
V
V
μA
μA
dB
dB
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B
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RTO Offset Voltage @ PD = (1)
Input Bias Current
Input Resistance
Input Capacitance
OUTPUT CHARACTERISTICS
Differential Output Voltage Swing
Single-Ended Output Voltage Swing
Output Leakage Current
POWER SUPPLY
Operating Range, Dual Supply
Operating Range, Single Supply
Total Quiescent Current
PD = (0)
PD = (1) Shutdown State
Common-Mode Voltage
PD = (0) Threshold
PD = (1) Threshold
PD = (0) Input Current
PD = (1) Input Current
+Power Supply Rejection Ratio
−Power Supply Rejection Ratio
Typ
TE
Differential Output Noise
INPUT CHARACTERISTICS
RTO Offset Voltage
Min
LE
Parameter
DYNAMIC PERFORMANCE
−3 dB Small-Signal Bandwidth
−3 dB Large-Signal Bandwidth
Slew Rate
Differential Gain
NOISE/DISTORTION PERFORMANCE
Second Harmonic Distortion
Third Harmonic Distortion
Multitone Input Power Ratio (MTPR)
±6
12
9.0
0
−10
1.6
−100
−100
Rev. C | Page 3 of 12
Differential
Differential
VCM
(0) = 0 V
(1) = 5 V
(0) = 0 V
(1) = 5 V
ΔVOS, DM (RTI)/ΔVCC, ΔVCC = ±1 V, differential
ΔVOS, DM (RTI)/ΔVEE, ΔVEE = ±1 V, differential
AD8396
ABSOLUTE MAXIMUM RATINGS
Rating
26.4 V
See Figure 3
−65°C to +150°C
−40°C to +85°C
300°C
150°C
3.5
TJ = 150°C
2.5
2.0
1.5
TE
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
3.0
1.0
0.5
0
–25
–15
–5
5
15
25
35
45
55
07022-003
Parameter
Supply Voltage, VCC − VEE
Power Dissipation
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Junction Temperature
Figure 3 shows the maximum power dissipation in the package
vs. the ambient temperature for the 16-lead LFCSP on a JEDEC
standard 4-layer board. θJA values are approximations.
MAXIMUM POWER DISSIPATION (W)
Table 2.
65
75
85
AMBIENT TEMPERATURE (°C)
THERMAL RESISTANCE
Figure 3. Maximum Power Dissipation vs.
Ambient Temperature for a 4-Layer Board
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θJA is specified in still air with exposed pad soldered to 4-layer
JEDEC test board. θJC is specified at the exposed pad.
MAXIMUM POWER DISSIPATION
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS). Assuming that the load RL is referenced
to midsupply, the total drive power is VS/2 × IOUT, part of which
is dissipated in the package and part in the load (VOUT × IOUT).
The maximum safe power dissipation for the AD8396 is limited
by its junction temperature on the die.
RMS output voltages should be considered. If RL is referenced to
VEE, as in single-supply operation, the total power is VS × IOUT.
The maximum safe junction temperature of plastic encapsulated
devices, as determined by the glass transition temperature of the
plastic, is 150°C. Exceeding this limit can temporarily cause a shift
in the parametric performance due to a change in the stresses
exerted on the die by the package. Exceeding this limit for an
extended period can result in device failure.
In single supply with RL to VEE, worst case is VOUT = VS/2.
Table 3.
θJA
56
θJC
9.1
Unit
°C/W
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Package Type
16-Lead LFCSP
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more copper in direct contact with the package leads
from PCB traces, through-holes, ground, and power planes
reduces θJA.
ESD CAUTION
Rev. C | Page 4 of 12
AD8396
13 VOPA
14 VCC
16 VCOM-A
15 PD_A
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
INPA 1
12 VONA
INNA 2
AD8396
11 DGND
DGND 3
TOP
VIEW
10 VOPB
VONB
TE
VEE 8
PD_B 7
INNB 5
VCOM-B 6
9
NOTE
THE EXPOSED PAD IS NOT CONNECTED INTERNALLY.
FOR INCREASED RELIABILITY OF THE SOLDER JOINTS
AND MAXIMUM THERMAL CAPABILITY IT IS RECOMMENDED
THAT THE PAD BE SOLDERED TO THE GROUND PLANE.
07022-004
INPB 4
Table 4. Pin Function Descriptions
Description
Port A Input P
Port A Input N
Ground
Port B Input P
Port B Input N
Port B Bias
Port B Shutdown
Negative Power Supply
Port B Output N
Port B Output P
Port A Output N
Port A Output P
Positive Power Supply
Port A Shutdown
Port A Bias
No Connection
B
SO
Mnemonic
INPA
INNA
DGND
INPB
INNB
VCOM-B
PD_B
VEE
VONB
VOPB
VONA
VOPA
VCC
PD_A
VCOM-A
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Pin No.
1
2
3, 11
4
5
6
7
8
9
10
12
13
14
15
16
Exposed Pad
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Figure 4. Pin Configuration
Rev. C | Page 5 of 12
AD8396
TYPICAL PERFORMANCE CHARACTERISTICS
2
–30
1
–40
–50
–1
–2
CROSSTALK (dB)
NORMALIZED GAIN (dB)
0
0.1V p-p
–3
–4
–5
2V p-p
–60
–70
–80
–6
1
–100
0.01
100
10
FREQUENCY (MHz)
Figure 8. Crosstalk vs. Frequency, Typical ADSL/ADSL2+ Application Circuit,
VOUT = 2 V p-p, RL = 100 Ω
45
LE
PD PULSE
5
35
1.5
4
30
1.0
3
VPD (V)
25
20
15
10
07022-006
5
B
SO
OUTPUT SWING (V p-p)
2.0
6
40
0
10
20
30
40
50
60
70
80
90
100
2
0.5
OUTPUT
–0.5
0
–1.0
–1
–1.5
–2
0
2
4
6
8
900
O
800
10
12
14
16
18
–2.0
20
TIME (μs)
Figure 9. Power-Down/Power-Up Transition
Figure 6. DC Differential Output Swing vs. Load
1000
0
1
LOAD (Ω)
160
140
120
NOISE (nV/ Hz)
700
600
500
400
100
80
60
300
40
200
0
10
20
07022-007
100
12
14
16
18
20
0
0.01
22
07022-010
INTERNAL POWER CONSUMPTION (mW)
10
1
FREQUENCY (MHz)
Figure 5. Differential Gain vs. Frequency, RL = 100 Ω
0
0.1
VOUT (V)
0.1
0.1
1
FREQUENCY (MHz)
OUTPUT POWER (dBm)
Figure 7. Internal Power Consumption vs. Output Power,
Typical ADSL/ADSL2+ Application Circuit, 100 Ω Resistive Load Only
Figure 10. Differential Output Noise vs. Frequency,
Typical ADSL/ADSL2+ Application Circuit
Rev. C | Page 6 of 12
10
07022-009
0
07022-008
TE
–8
–90
07022-005
–7
AD8396
20
–40
VS = ±12V
–50
VS = ±10V
FEEDTHROUGH (dB)
10
5
0
–5
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
–80
–90
–110
0.1
2.0
1
TE
0
–70
–100
07022-011
–10
–60
07022-012
AMPLITUDE (V)
15
FREQUENCY (MHz)
TIME (μs)
Figure 12. Feedthrough vs. Frequency,
Typical ADSL/ADSL2+ Application Circuit,
VOUT = 2 V p-p, RL = 100 Ω
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Figure 11. Output Overdrive Recovery, Typical ADSL/ADSL2+
Application Circuit, VOUT = 3.3 VRMS, CF = 5.47, RL = 100 Ω
Rev. C | Page 7 of 12
10
AD8396
THEORY OF OPERATION
The AD8396 is a current feedback amplifier with high output
current capability. With a current feedback amplifier, the
current into the inverting input is the feedback signal, and the
open-loop behavior is that of a transimpedance, dVO/dIIN or TZ.
The open-loop transimpedance is analogous to the open-loop
voltage gain of a voltage feedback amplifier. Figure 13 shows a
simplified model of a current feedback amplifier. Because RIN is
proportional to 1/gm, the equivalent voltage gain is TZ × gm,
where gm is the transconductance of the input stage. Basic
analysis of the follower with the gain circuit yields
Because G × RIN