AD841JNZ

Wideband, Unity-Gain Stable, Fast Settling Op Amp AD841 Data Sheet CONNECTION DIAGRAMS AC performance Unity-gain bandwidth: 40 MHz Fast settling time: 110 ns to 0.01% Slew rate: 300 V/µs Full power bandwidth: 4.7 MHz for 20 V p-p into a 500 Ω load DC performance Input offset voltage: 1 mV maximum Input voltage noise: 15 nV/√Hz typical Open-loop gain: 45 V/mV into a 1 kΩ load Output current: 50 mA minimum Supply current: 12 mA maximum NC 1 14 NC AD841 NC 2 BALANCE 13 NC 12 BALANCE 3 –INPUT 4 11 +VS +INPUT 5 10 OUTPUT –VS 6 TOP VIEW (Not to Scale) NC 7 9 NC 8 NC 11340-001 FEATURES NOTES 1. NC = NO CONNECT. NC OFFSET NULL 3 2 1 20 19 NC 4 18 NC –INPUT 5 17 +VS NC 6 16 NC +INPUT 7 15 OUTPUT NC 8 14 NC NC NC 10 11 12 13 NC 9 NC AD841 –VS High speed signal conditioning Video and pulse amplifiers Data acquisition systems Line drivers Active filters Available in 14-pin plastic PDIP, 14-pin hermetic CERDIP, and 20-pin LCC packages Chips and MIL-STD-883B parts available NOTES 1. NC = NO CONNECT. 11340-002 APPLICATIONS NC NC OFFSET NULL Figure 1. PDIP (N-14) Package and CERDIP (Q-14) Package Figure 2. LCC (E-20-1) Package GENERAL DESCRIPTION The AD841 is a member of the Analog Devices, Inc., family of wide bandwidth operational amplifiers. This high speed/high precision family includes the AD842, which is stable at a gain of two or greater and has 100 mA minimum output current drive. These devices are fabricated using Analog Devices’ junction isolated complementary bipolar (CB) process. This process permits a combination of dc precision and wideband ac performance previously unobtainable in a monolithic op amp. In addition to its 40 MHz unity-gain bandwidth product, the AD841 offers extremely fast settling characteristics, typically settling to within 0.01% of final value in 110 ns for a 10 V step. Unlike many high frequency amplifiers, the AD841 requires no external compensation. It remains stable over its full operating temperature range. It also offers a low quiescent current of 12 mA maximum, a minimum output current drive capability of 50 mA, a low input voltage noise of 15 nV/√Hz, and low input offset voltage of 1 mV maximum. The 300 V/µs slew rate of the AD841, along with its 40 MHz gain bandwidth, ensures excellent performance in video and pulse amplifier applications. This amplifier is well suited for Rev. C use in high frequency signal conditioning circuits and wide bandwidth active filters. The extremely rapid settling time of the AD841 makes it the preferred choice for data acquisition applications that require 12-bit accuracy. The AD841 is also appropriate for other applications such as high speed DAC and ADC buffer amplifiers and other wide bandwidth circuitry. PRODUCT HIGHLIGHTS 1. 2. 3. 4. The high slew rate and fast settling time of the AD841 make it ideal for DAC and ADC buffers, and all types of video instrumentation circuitry. The AD841 is a precision amplifier. It offers accuracy to 0.01% or better and wide bandwidth performance previously available only in hybrids. The AD841’s thermally balanced layout and the speed of the CB process allow the AD841 to settle to 0.01% in 110 ns without the long tails that occur with other fast op amps. Laser wafer trimming reduces the input offset voltage to 1 mV maximum on the K grade, thus eliminating the need for external offset nulling in many applications. Offset null pins are provided for additional versatility. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD841 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 10 Applications ....................................................................................... 1 Offset Nulling ............................................................................. 10 Connection Diagrams ...................................................................... 1 Input Considerations ................................................................. 10 General Description ......................................................................... 1 AD841 Settling Time ................................................................. 10 Product Highlights ........................................................................... 1 Grounding and Bypassing ......................................................... 11 Revision History ............................................................................... 2 Capacitive Load Driving Ability............................................... 11 Specifications..................................................................................... 3 Terminated Line Driver ............................................................. 12 Absolute Maximum Ratings ............................................................ 5 Overdrive Recovery ................................................................... 12 Thermal Characteristics .............................................................. 5 Outline Dimensions ....................................................................... 13 ESD Caution .................................................................................. 5 Ordering Guide .......................................................................... 14 Typical Performance Characteristics ............................................. 6 REVISION HISTORY 2/13—Rev. B to Rev. C Removed TO-8 Package..................................................... Universal Changed Input Voltage Noise 13 nV/√Hz to 15 nV/√Hz and Changes to General Description Section ...................................... 1 Changes to Endnote 1, Table 1 ........................................................ 4 Added Operating Temperature Range, Table 2 ............................ 5 Deleted Using a Heat Sink Section ............................................... 11 Updated Outline Dimensions ....................................................... 13 Added Ordering Guide .................................................................. 14 11/88—Rev. A to Rev. B Rev. C | Page 2 of 16 Data Sheet AD841 SPECIFICATIONS TA = 25°C and ±15 V dc, unless otherwise noted. All minimum and maximum specifications are guaranteed. Table 1. Parameter INPUT OFFSET VOLTAGE 2 Test Conditions/ Comments TMIN − TMAX Offset Drift INPUT BIAS CURRENT TMIN – TMAX Input Offset Current INPUT CHARACTERISTICS Input Resistance Input Capacitance INPUT VOLTAGE RANGE Common Mode Common-Mode Rejection INPUT VOLTAGE NOISE Wideband Noise OPEN-LOOP GAIN OUTPUT CHARACTERISTICS Voltage Current OUTPUT RESISTANCE FREQUENCY RESPONSE Unity Gain Bandwidth Full Power Bandwidth 3 Rise Time 4 Overshoot4 Slew Rate4 Settling Time 10 V Step OVERDRIVE RECOVERY DIFFERENTIAL GAIN Differential Phase POWER SUPPLY Rated Performance Operating Range Quiescent Current Power Supply Rejection Ratio TMIN − TMAX Differential mode AD841J Min Typ Max 0.8 2.0 5.0 35 3.5 8 10 0.1 0.4 0.5 AD841K Min Typ Max 0.5 1.0 3.3 35 3.5 5 6 0.1 0.2 0.3 200 2 VCM = ±10 V TMIN – TMAX f = 1 kHz 10 Hz to 10 MHz VOUT = ±10 V RLOAD ≥ 500 Ω TMIN − TMAX RLOAD ≥ 500 Ω TMIN − TMAX VOUT = ±10 V Open loop VOUT = 90 mV p-p VOUT = 20 V p-p RLOAD ≥ 500 Ω AV = −1 AV = −1 AV = −1 AV = −1 to 0.1% to 0.01% −Overdrive +Overdrive f = 4.4 MHz f = 4.4 MHz ±10 86 80 200 2 12 100 ±10 103 100 15 47 25 12 200 45 25 20 Unit mV mV µV/°C µA µA µA µA 200 2 kΩ pF 12 110 V dB dB nV/√Hz µV rms 15 47 45 25 12 45 V/mV V/mV 5 5 5 V mA Ω 40 40 40 MHz 4.7 10 10 300 MHz ns % V/µs 90 110 200 700 0.03 0.022 ns ns ns ns % Degree 4.7 10 10 300 3.1 200 90 110 200 700 0.03 0.022 11 ±10 50 4.7 10 10 300 3.1 200 00 110 200 700 0.03 0.022 ±15 86 80 ±10 86 80 ±10 50 ±5 TMIN − TMAX VS = ±5 V to ±18 V TMIN − TMAX 12 109 15 47 ±10 50 3.1 Min AD841S 1 Typ Max 0.5 2.0 5.5 35 3.5 8 12 0.1 0.4 0.6 ±15 ±18 12 14 100 Rev. C | Page 3 of 16 ±5 11 90 86 100 ±15 ±18 12 14 ±5 11 86 80 100 ±18 12 16 V V mA mA dB dB AD841 Parameter TEMPERATURE RANGE Rated Performance 5 Data Sheet Test Conditions/ Comments AD841J Min Typ Max AD841K Min Typ Max Min AD841S 1 Typ Max 0 0 −55 +125 70 Standard military drawing available: 5962-89641012A – (SE/883B). Input offset voltage specifications are guaranteed after 5 minutes at TA = 25°C. Full power bandwidth = slew rate/2 π VPEAK. 4 Refer to Figure 22 to Figure 24. 5 S grade TMIN – TMAX specifications are tested with automatic test equipment at TA = −55°C and TA = +125°C. 1 2 3 Rev. C | Page 4 of 16 70 Unit °C Data Sheet AD841 ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS Table 2. Parameter Supply Voltage (VS) Internal Power Dissipation1 PDIP (N-14) CERDIP (Q-14) Input Voltage Differential Input Voltage Storage Temperature Range Q-14 N-14 Operating Temperature Range AD841J/AD841K AD841S Junction Temperature Lead Temperature Range (Soldering 60 sec) 1 Table 3. Rating ±18 V Package Type 14-Lead CERDIP 14-Lead PDIP 20-Lead LCC 1.5 W 1.3 W ±VS ±6 V θJC 35 30 35 θJA 110 100 150 θSA 38 ESD CAUTION −65°C to +150°C −65°C to +125°C 0°C to 70°C −55°C to +125°C +175°C +300°C Maximum internal power dissipation is specified so that TJ does not exceed 175°C at an ambient temperature of 25°C. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 0.099 (2.5) BALANCE +VS BALANCE –VIN 0.067 (1.7) OUTPUT –VS SUBSTRATE CONNECTED TO +VS Figure 3. Metalization Photograph Contact factory for latest dimensions Dimensions shown in inches and (millimeters) Rev. C | Page 5 of 16 11340-003 +VIN Unit °C/W °C/W °C/W AD841 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C and VS = ±15 V, unless otherwise noted. 15 VIN 10 5 0 0 5 10 15 20 SUPPLY VOLTAGE (±V) 10 8 6 4 0 15 20 Figure 7. Quiescent Current vs. Supply Voltage 6 15 VOUT 10 0 0 5 10 15 20 SUPPLY VOLTAGE (±V) 4 3 –60 11340-005 5 5 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) Figure 5. Output Voltage Swing vs. Supply Voltage 11340-008 INPUT BIAS CURRENT (µA) 20 Figure 8. Input Bias Current vs. Temperature 30 100 OUTPUT IMPEDANCE (Ω) 25 ±15V SUPPLIES 20 15 10 10 1 0.1 5 100 1k LOAD RESISTANCE (Ω) 10k 0.01 10k 11340-006 0 10 100k 1M 10M FREQUENCY (Hz) Figure 6. Output Voltage Swing vs. Load Resistance Figure 9. Output Impedance vs. Frequency Rev. C | Page 6 of 16 100M 11340-009 OUTPUT VOLTAGE SWING (V) 10 SUPPLY VOLTAGE (±V) Figure 4. Input Common-Mode Range vs. Supply Voltage OUTPUT VOLTAGE SWING (V p-p) 5 11340-007 QUIESCENT CURRENT (mA) 12 11340-004 INPUT COMMON-MODE RANGE (V) 20 Data Sheet AD841 15 100 100 80 80 60 60 40 40 20 20 0 0 12 11 10 9 PHASE MARGIN (Degrees) 13 OPEN-LOOP GAIN (dB) QUIESCENT CURRENT (mA) 14 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 500Ω LOAD –20 100 1k 100k 1M 10M –20 100M FREQUENCY (Hz) Figure 10. Quiescent Current vs. Temperature Figure 13. Open-Loop Gain and Phase Margin vs. Frequency 140 98 130 120 OPEN-LOOP GAIN (dB) SHORT-CIRCUIT CURRENT LIMIT (mA) 10k 11340-013 7 –60 11340-010 8 110 +OUTPUT CURRENT 100 90 –OUTPUT CURRENT 96 94 92 80 70 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 11340-011 –40 90 0 15 20 Figure 14. Open-Loop Gain vs. Supply Voltage 120 45 40 –40 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) 140 +SUPPLY 80 60 –SUPPLY 40 20 0 100 11340-012 35 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 15. Power Supply Rejection vs. Frequency Figure 12. Gain Bandwidth Product vs. Temperature Rev. C | Page 7 of 16 100M 11340-015 POWER SUPPLY REJECTION (dB) 50 GAIN BANDWIDTH (MHz) 10 SUPPLY VOLTAGE (±V) Figure 11. Short-Circuit Current Limit vs. Temperature 30 –60 5 11340-014 500Ω LOAD 60 –60 AD841 Data Sheet –70 VS = ±15V VCM = 1V p-p TA = 25°C 3V rms RL = 1kΩ –80 HARMONIC DISTORTION (dB) 100 80 60 40 –90 SECOND HARMONIC –100 –110 THIRD HARMONIC 20 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) –130 100 500 450 SLEW RATE (V/µs) 20 15 10 5 400 350 300 250 10M 100M FREQUENCY (Hz) 200 –60 11340-017 0 1M –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) Figure 17. Large Signal Frequency Response 11340-020 OUTPUT VOLTAGE (V p-p) 100k Figure 19. Harmonic Distortion vs. Frequency VS = ±15V RL = 1kΩ TA = 25°C 25 10k FREQUENCY (Hz) Figure 16. Common-Mode Rejection vs. Frequency 30 1k 11340-019 –120 11340-016 COMMON-MODE REJECTION (dB) 120 Figure 20. Slew Rate vs. Temperature 30 10 6 INPUT VOLTAGE (nV/ Hz) 25 4 2 0.1% 0.01% 0.1% 0.01% 0 –2 –4 20 15 10 –6 30 40 50 60 70 80 90 100 SETTLING TIME (ns) 110 5 10 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 18. Output Swing and Error vs. Settling Time Figure 21. Input Voltage Noise Spectral Density Rev. C | Page 8 of 16 10M 11340-021 –8 –10 11340-018 OUTPUT SWING FROM 0 TO ±V 8 Data Sheet AD841 RIN 1kΩ 4 – 5 + 6 0.1µF 2.2µF 4 11 AD841 VOUT 10 HP3314A FUNCTION GENERATOR OR EQUIVALENT 499Ω 0.1µF RIN VIN 100Ω – 11 AD841 5 + 6 49.9Ω 2.2µF –VS VOUT 10 0.1µF 499Ω 2.2µF –VS Figure 25. Unity-Gain Buffer Amplifier Configuration (PDIP Pinout) Figure 22. Inverting Amplifier Configuration (PDIP Pinout) 2V +VS 2.2µF 49.9Ω RB 499Ω RB 120Ω 0.1µF 11340-022 HP3314A FUNCTION GENERATOR OR EQUIVALENT +VS 11340-025 RF 1kΩ 50ns 2V 100 100 90 90 11340-026 10 0% 11340-023 10 0% 50ns Figure 23. Inverter Large Signal Pulse Response 50mV Figure 26. Buffer Large Signal Pulse Response 50ns 50mV 100 100 90 90 10 0% 11340-027 11340-024 10 0% 50ns Figure 24. Inverter Small Signal Pulse Response Figure 27. Buffer Small Signal Pulse Response Rev. C | Page 9 of 16 AD841 Data Sheet THEORY OF OPERATION OFFSET NULLING 10mV The input offset voltage of the AD841 is very low for a high speed op amp, but if additional nulling is required, the circuit shown in Figure 28 can be used. 5V 20ns 100 90 +VS OUTPUT ERROR: 0.02%/DIV 100Ω 100Ω – 12 10 11 5 AD841 10 6 0.1µF + OUTPUT: 5V/DIV 0% OUTPUT RL 11340-029 INPUT 2.2µF Figure 29. AD841 0.01% Settling Time 11340-028 –VS Figure 28. Offset Nulling (PDIP Pinout) TEK 7A13 INPUT CONSIDERATIONS An input resistor (RIN in Figure 25) is recommended in circuits where the input to the AD841 is subjected to transient or continuous overload voltages exceeding the ±6 V maximum differential limit. This resistor provides protection for the input transistors by limiting the maximum current that can be forced into the input. For high performance circuits it is recommended that a resistor (RB in Figure 22 and Figure 25) be used to reduce bias current errors by matching the impedance at each input. The output voltage error caused by the offset current is more than an order of magnitude less than the error present if the bias current error is not removed. ERROR AMP (×10) HP6263 DDD5109 FLAT-TOP PULSE GENERATOR • • • • Propagation delay through the amplifier Slewing time to approach the final output value The time of recovery from the overload associated with slewing Linear settling to within the specified error band 1kΩ 1kΩ 1kΩ +15V 50Ω 4 5 – 0.1µF 11 AD841 10 6 0.1µF + 499Ω Figure 29 and Figure 31 show the settling performance of the AD841 in the test circuit shown in Figure 30. This definition encompasses the major components, which comprise settling time. They include 1kΩ 2.2µF AD841 SETTLING TIME Settling time is defined as the interval of time from the application of an ideal step function input until the closed-loop amplifier output has entered and remains within a specified error band. TEK 7A18 FET PROBE TEK P6201 499Ω 2.2µF –15V Figure 30. Settling Time Test Circuit Measurement of the 0.01% settling in 110 ns was accomplished by amplifying the error signal from a false summing junction with a very high speed proprietary hybrid error amplifier specially designed to enable testing of small settling errors. The device under test was driving a 500 Ω load. The input to the error amp is clamped to avoid possible problems associated with the overdrive recovery of the oscilloscope input amplifier. The error amp gains the error from the false summing junction by 10, and it contains a gain vernier to fine trim the gain. Expressed in these terms, the measurement of settling time is obviously a challenge and needs to be done accurately to assure the user that the amplifier is worth consideration for the application. Rev. C | Page 10 of 16 11340-030 4 TEK 7603 OSCILLOSCOPE 3 Data Sheet AD841 Figure 31 shows the long-term stability of the settling characteristics of the AD841 output after a 10 V step. There is no evidence of settling tails after the initial transient recovery time. The use of a junction isolated process, together with careful layout, avoids these problems by minimizing the effects of transistor isolation capacitance discharge and thermally induced shifts in circuit operating points. These problems do not occur even under high output current conditions. 100 CAPACITIVE LOAD DRIVING ABILITY Like all wideband amplifiers, the AD841 is sensitive to capacitive loading. The AD841 is designed to drive capacitive loads of up to 20 pF without degradation of its rated performance. Capacitive loads of greater than 20 pF will decrease the dynamic performance of the part although instability should not occur unless the load exceeds 100 pF (for a unity-gain follower). A resistor in series with the output can be used to decouple larger capacitive loads. Figure 32 shows a typical configuration for driving a large capacitive load. The 51 Ω output resistor effectively isolates the high frequency feedback from the load and stabilizes the circuit. Low frequency feedback is returned to the amplifier summing junction via the low-pass filter formed by the 51 Ω resistor and the load capacitance, CL. OUTPUT ERROR: 0.02%/DIV 90 OUTPUT: 5V/DIV 1kΩ 10 15pF 0% 0.1µF 2.2µF INPUT 1kΩ 4 – Figure 31. AD841 Settling Demonstrating No Settling Tails 11 AD841 GROUNDING AND BYPASSING In designing practical circuits with the AD841, the user must remember that whenever high frequencies are involved, some special precautions are in order. Circuits must be built with short interconnect leads. Large ground planes should be used whenever possible to provide a low resistance, low inductance circuit path, as well as minimizing the effects of high frequency coupling. Avoid sockets because the increased interlead capacitance can degrade bandwidth. Feedback resistors should be of low enough value to assure that the time constant formed with the circuit capacitances will not limit the amplifier performance. Resistor values of less than 5 kΩ are recommended. If a larger resistor must be used, a small (