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AD8614ART

AD8614ART

  • 厂商:

    AD(亚德诺)

  • 封装:

  • 描述:

    AD8614ART - Single and Quad 18 V Operational Amplifiers - Analog Devices

  • 数据手册
  • 价格&库存
AD8614ART 数据手册
a FEATURES Unity Gain Bandwidth: 5.5 MHz Low Voltage Offset: 1.0 mV Slew Rate: 7.5 V/ s Single-Supply Operation: 5 V to 18 V High Output Current: 70 mA Low Supply Current: 800 A/Amplifier Stable with Large Capacitive Loads Rail-to-Rail Inputs and Outputs APPLICATIONS LCD Gamma and VCOM Drivers Modems Portable Instrumentation Direct Access Arrangement Single and Quad +18 V Operational Amplifiers AD8614/AD8644 PIN CONFIGURATIONS 5-Lead SOT-23 (RT Suffix) OUT A 1 V 2 5 V+ AD8614 4 IN +IN 3 14-Lead TSSOP (RU Suffix) OUT A IN A IN A V IN B IN B OUT B 1 14 OUT D IN D IN D V IN C IN C OUT C 7 8 GENERAL DESCRIPTION AD8644 The AD8614 (single) and AD8644 (quad) are single-supply, 5.5 MHz bandwidth, rail-to-rail amplifiers optimized for LCD monitor applications. They are processed using Analog Devices high voltage, high speed, complementary bipolar process—HV XFCB. This proprietary process includes trench isolated transistors that lower internal parasitic capacitance which improves gain bandwidth, phase margin and capacitive load drive. The low supply current of 800 µA (typ) per amplifier is critical for portable or densely packed designs. In addition, the rail-to-rail output swing provides greater dynamic range and control than standard video amplifiers provide. These products operate from supplies of 5 V to as high as 18 V. The unique combination of an output drive of 70 mA, high slew rates, and high capacitive drive capability makes the AD8614/AD8644 an ideal choice for LCD applications. The AD8614 and AD8644 are specified over the temperature range of –20°C to +85°C. They are available in 5-lead SOT-23, 14-lead TSSOP and 14-lead SOIC surface mount packages in tape and reel. 14-Lead Narrow Body SO (R Suffix) OUT A 1 –IN A 2 +IN A 3 V+ 4 +IN B 5 –IN B 6 OUT B 7 14 13 12 OUT D –IN D +IN D V– +IN C –IN C OUT C AD8644 11 10 9 8 R EV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 AD8614/AD8644–SPECIFICATIONS ELECTRICAL CHARACTERISTICS (5 V ≤ V ≤ 18 V, V S CM = VS/2, TA = 25 C unless otherwise noted) Min Typ 1.0 80 5 0 60 10 75 150 Max 2.5 3 400 500 100 200 VS Unit mV mV nA nA nA nA V dB V/mV V mV mA mA dB mA mA V/µs MHz Degrees µs nV/√Hz nV/√Hz pA/√Hz Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Voltage Gain OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Short Circuit Current POWER SUPPLY PSRR Supply Current / Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin Settling Time NOISE PERFORMANCE Voltage Noise Density Current Noise Density NOTE All typical values are for VS = 18 V. Specifications subject to change without notice. Symbol VOS IB IOS CMRR AVO VOH VOL ISC Conditions –20°C ≤ TA ≤ +85°C –20°C ≤ TA ≤ +85°C –20°C ≤ TA ≤ +85°C VCM = 0 V to V S VOUT = 0.5 V to VS –0.5 V, RL = 10 kΩ ILOAD = 10 mA ILOAD = 10 mA –20°C ≤ TA ≤ +85°C VS = ± 2.25 V to ± 9.25 V –20°C ≤ TA ≤ +85°C CL = 200 pF 0.01%, 10 V Step f = 1 kHz f = 10 kHz f = 10 kHz VS –0.15 65 35 70 30 80 110 0.8 150 PSRR Isy 1.1 1.5 SR GBP Φo tS en en in 7.5 5.5 65 3 12 11 1 ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to VS Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Operating Temperature Range . . . . . . . . . . . –20°C to +85°C Junction Temperature Range . . . . . . . . . . . . –65°C to +150°C Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Type 5-Lead SOT-23 (RT) 14-Lead TSSOP (RU) 14-Lead SOIC (R) 1 JA JC Unit °C/W °C/W °C/W 230 180 120 140 35 56 NOTE 1 θ JA is specified for worst-case conditions, i.e., θ JA is specified for device soldered onto a circuit board for surface mount packages. ORDERING GUIDE Model Temperature Range Package Description Package Option AD8614ART1 –20°C to +85° C AD8644ARU2 –20°C to +85° C AD8644AR2 –20°C to +85° C NOTES 1 Available in 3,000 or 10,000 piece reels. 2 Available in 2,500 piece reels only. 5-Lead SOT-23 RT-5 14-Lead TSSOP RU-14 14-Lead SOIC R-14 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8614/AD8644 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE – 2– REV. 0 Typical Performance Characteristics – AD8614/AD8644 50 SMALL SIGNAL OVERSHOOT – % V 45 40 35 30 25 20 15 10 5 0 VS = 18V RL = 2k TA = 25 C 12 80 8 0.1% 0.01% 40 GAIN – dB 20 0 5V VS 18V RL = 1M CL = 40pF TA = 25 C 90 135 180 PHASE SHIFT – Degrees 60 45 OUTPUT SWING FROM 0 TO 4 0 4 +OS OS 0.1% 0.01% 8 10 100 1k CAPACITANCE – pF 10k 12 0 0.5 1.0 1.5 2.0 2.5 SETTLING TIME – s 3.0 3.5 1k 10k 100k 1M 10M FREQUENCY – Hz 100M Figure 1. Small Signal Overshoot vs. Load Capacitance Figure 2. Settling Time Figure 3. Open-Loop Gain and Phase vs. Frequency 7.5 6.5 5.5 VOLTAGE – 1V/Div 4.5 3.5 2.5 1.5 0.5 0.5 1.5 2.5 29 VS = 5V RL = 2k CL = 200pF AV = 1 TA = 25 C 25 21 VOLTAGE – 4V/Div 17 13 9 5 1 3 7 11 TIME – 1 s/Div TIME – 1 s/Div TIME – 500ns/Div VS = 18V RL = 2k CL = 200pF AV = 1 TA = 25 C VOLTAGE – 50mV/Div VS 2 VS = 5V VS RL = 2k CL = 200pF AV = 1 TA = 25 C 18V Figure 4. Large Signal Transient Response Figure 5. Large Signal Transient Response Figure 6. Small Signal Transient Response 10k SUPPLY CURRENT/AMPLIFIER – A 5V VS 18V TA = 25 C OUTPUT VOLTAGE – mV 1k 1,000 900 800 700 600 500 400 300 200 100 0 0 1 23 45 678 SUPPLY VOLTAGE – Volts 9 10 TA = 25 C INPUT BIAS CURRENT – nA 400 300 VS = 200 100 0 100 200 300 400 2.5 1.5 0.5 0.5 1.5 COMMON-MODE VOLTAGE – Volts 2.5 2.5V 100 SINK 10 SOURCE 1 0.001 0.01 0.1 1 10 LOAD CURRENT – mA 100 Figure 7. Output Voltage to Supply Rail vs. Load Current Figure 8. Supply Current vs. Supply Voltage Figure 9. Input Bias Current vs. Common-Mode Voltage REV. 0 –3– AD8614/AD8644 400 300 INPUT BIAS CURRENT – nA VS = 200 100 0 100 200 300 400 9 75 3 101 3 5 7 COMMON-MODE VOLTAGE – Volts 9 9V QUANTITY – Amplifiers 180 SUPPLY CURRENT/AMPLIFIER – mA 160 140 120 100 80 60 40 20 0 2 1.5 1 0.5 0 0.5 1 1.5 INPUT OFFSET VOLTAGE – mV 2 2.5V VS TA = 25 C 9V 1.0 VS = 18V 0.9 0.8 0.7 VS = 5V 0.6 0.5 35 15 5 25 45 TEMPERATURE – C 65 85 Figure 10. Input Bias Current vs. Common-Mode Voltage Figure 11. Input Offset Voltage Distribution Figure 12. Supply Current vs. Temperature 6 20 18 300 5V VS 18V TA = 25 C 240 VS = 18V AVCL = 1 RL = 2k TA = 25 C 5 OUTPUT SWING – V p-p OUTPUT SWING – V p-p IMPEDANCE – 4 VS = 5V AVCL = 1 RL = 2k TA = 25 C 16 14 12 10 8 6 4 2 180 3 120 2 1 0 100 60 AV = 100 1k 10k 100k FREQUENCY – Hz 1M 10M AV = 10 AV = 1 1k 10k 100k FREQUENCY – Hz 1M 10M 0 100 0 1k 10k 100k 1M FREQUENCY – Hz 10M Figure 13. Maximum Output Swing vs. Frequency Figure 14. Maximum Output Swing vs. Frequency Figure 15. Closed-Loop Output Impedance vs. Frequency 140 120 100 80 60 40 20 0 100 POWER-SUPPLY REJECTION – dB COMMON-MODE REJECTION – dB 5V VS 18V TA = 25 C 40 5V VS 18V TA = 25 C 100 VS = 18V TA = 25 C 80 GAIN – dB 20 60 PSRR+ 40 PSRR 20 0 1k 10k 100k 1M 10M FREQUENCY – Hz 100M 1k 10k 100k FREQUENCY – Hz 1M 10M 0 100 1k 10k 100k FREQUENCY – Hz 1M 10M Figure 16. Closed-Loop Gain vs. Frequency Figure 17. Common-Mode Rejection vs. Frequency Figure 18. Power-Supply Rejection vs. Frequency –4– REV. 0 AD8614/AD8644 9 VOLTAGE NOISE DENSITY – nV Hz 8 7 SLEW RATE – V/ s 6 SR 5 4 3 2 1 0 0 AV = 1 RL = 2k CL = 200pF TA = 25 C 2 4 6 8 10 12 14 16 18 SUPPLY VOLTAGE – V 20 SR+ 100 VOLTAGE NOISE DENSITY – nV Hz VS = 5V TA = 25 C 100 VS = 18V TA = 25 C 10 10 1 10 100 1k FREQUENCY – Hz 10k 1 10 100 1k FREQUENCY – Hz 10k Figure 19. Slew Rate vs. Supply Voltage Figure 20. Voltage Noise Density vs. Frequency Figure 21. Voltage Noise Density vs. Frequency APPLICATIONS SECTION Theory of Operation The AD8614/AD8644 are processed using Analog Devices’ high voltage, high speed, complementary bipolar process—HV XFCB. This process includes trench isolated transistors that lower parasitic capacitance. Figure 22 shows a simplified schematic of the AD8614/AD8644. The input stage is rail-to-rail, consisting of two complementary differential pairs, one NPN pair and one PNP pair. The input stage is protected against avalanche breakdown by two back-to-back diodes. Each input has a 1.5 kΩ resistor that limits input current during over-voltage events and furnishes phase reversal protection if the inputs are exceeded. The two differential pairs are connected to a double-folded cascode. This is the stage in the amplifier with the most gain. The double folded cascode differentially feeds the output stage circuitry. Two complementary common emitter transistors are used as the output stage. This allows the output to swing to within 125 mV from each rail with a 10 mA load. The gain of the output stage, and thus the open loop gain of the op amp, depends on the load resistance. VCC The AD8614/AD8644 have no built-in short circuit protection. The short circuit limit is a function of high current roll-off of the output stage transistors and the voltage drop over the resistor shown on the schematic at the output stage. The voltage over this resistor is clamped to one diode during short circuit voltage events. Output Short-Circuit Protection To achieve a wide bandwidth and high slew rate, the output of the AD8614/AD8644 is not short-circuit protected. Shorting the output directly to ground or to a supply rail may destroy the device. The typical maximum safe output current is 70 mA. In applications where some output current protection is needed, but not at the expense of reduced output voltage headroom, a low value resistor in series with the output can be used. This is shown in Figure 23. The resistor is connected within the feedback loop of the amplifier so that if VOUT is shorted to ground and VIN swings up to 18 V, the output current will not exceed 70 mA. For 18 V single supply applications, resistors less than 261 Ω are not recommended. 1.5k 1.5k + VCC VCC VOUT VEE Figure 22. Simplified Schematic REV. 0 –5– AD8614/AD8644 18V The power dissipated by the device can be calculated as: PDISS = ILOAD × (VS – VOUT) where: ILOAD is the AD86x4 output load current; VOUT VIN 261 AD86x4 VS is the AD86x4 supply voltage; and VOUT is the AD86x4 output voltage. Figure 24 provides a convenient way to see if the device is being overheated. The maximum safe power dissipation can be found graphically, based on the package type and the ambient temperature around the package. By using the previous equation, it is a simple matter to see if PDISS exceeds the device’s power derating curve. To ensure proper operation, it is important to observe the recommended derating curves shown in Figure 24. 1.5 MAXIMUM POWER DISSIPATION – Watts Figure 23. Output Short-Circuit Protection Input Overvoltage Protection As with any semiconductor device, whenever the condition exists for the input to exceed either supply voltage, attention needs to be paid to the input overvoltage characteristic. As an overvoltage occurs, the amplifier could be damaged, depending on the voltage level and the magnitude of the fault current. When the input voltage exceeds either supply by more than 0.6 V, internal pin junctions energize, allowing current to flow from the input to the supplies. Observing Figure 22, the AD8614/AD8644 has 1.5 kΩ resistors in series with each input, which helps limit the current. This input current is not inherently damaging to the device as long as it is limited to 5 mA or less. If the voltage is large enough to cause more than 5 mA of current to flow, an external series resistor should be added. The size of this resistor is calculated by dividing the maximum overvoltage by 5 mA and subtracting the internal 1.5 kΩ resistor. For example, if the input voltage could reach 100 V, the external resistor should be (100 V/5 mA) – 1.5 kΩ = 18.5 kΩ. This resistance should be placed in series with either or both inputs if they are subjected to the overvoltages. For more information on general overvoltage characteristics of amplifiers refer to the 1993 System Applications Guide, available from the Analog Devices Literature Center. Output Phase Reversal 14-LEAD SOIC PACKAGE JA = 120 C/W 1.0 14-LEAD TSSOP PACKAGE JA = 180 C/W 0.5 5-LEAD SOT-23 PACKAGE JA = 230 C/W 0 –35 –15 5 25 45 AMBIENT TEMPERATURE – C 65 85 Figure 24. Maximum Power Dissipation vs. Temperature for 5-Lead and 14-Lead Package Types Unused Amplifiers The AD8614/AD8644 is immune to phase reversal as long as the input voltage is limited to within the supply rails. Although the device’s output will not change phase, large currents due to input overvoltage could result, damaging the device. In applications where the possibility of an input voltage exceeding the supply voltage exists, overvoltage protection should be used, as described in the previous section. Power Dissipation It is recommended that any unused amplifiers in the quad package be configured as a unity gain follower with a 1 kΩ feedback resistor connected from the inverting input to the output, and the noninverting input tied to the ground plane. Capacitive Load Drive The maximum power that can be safely dissipated by the AD8614/AD8644 is limited by the associated rise in junction temperature. The maximum safe junction temperature is 150°C, and should not be exceeded or device performance could suffer. If this maximum is momentarily exceeded, proper circuit operation will be restored as soon as the die temperature is reduced. Leaving the device in an “overheated” condition for an extended period can result in permanent damage to the device. To calculate the internal junction temperature of the AD86x4, the following formula can be used: TJ = PDISS × θJA + TA where: TJ = AD86x4 junction temperature; PDISS = AD86x4 power dissipation; θJA = AD86x4 package thermal resistance, junction-toambient; and TA = Ambient temperature of the circuit. The AD8614/AD8644 exhibits excellent capacitive load driving capabilities. Although the device is stable with large capacitive loads, there is a decrease in amplifier bandwidth as the capacitive load increases. When driving heavy capacitive loads directly from the AD8614/ AD8644 output, a snubber network can be used to improve the transient response. This network consists of a series R-C connected from the amplifier’s output to ground, placing it in parallel with the capacitive load. The configuration is shown in Figure 25. Although this network will not increase the bandwidth of the amplifier, it will significantly reduce the amount of overshoot. 5V AD86x4 VIN RX CX CL VOUT Figure 25. Snubber Network Compensation for Capacitive Loads –6– REV. 0 AD8614/AD8644 The optimum values for the snubber network should be determined empirically based on the size of the capacitive load. Table I shows a few sample snubber network values for a given load capacitance. Table I. Snubber Networks for Large Capacitive Loads LEFTOUT 35 5V VDD VDD 28 2 U1-A 4 3 5 5V 10 1 R1 2k C1 100 F R3 20 Load Capacitance (CL) 0.47 nF 4.7 nF 47 nF Direct Access Arrangement Snubber Network (RS, CS) 300 Ω, 0.1 µF 30 Ω, 1 µF 5 Ω, 1 µF AD1881 (AC'97) 6 RIGHTOUT 36 VSS 8 NOTE: ADDITIONAL PINS OMITTED FOR CLARITY 7 U1-B 9 C2 100 F R2 2k R4 20 Figure 26 shows a schematic for a 5 V single supply transmit/receive telephone line interface for 600 Ω transmission systems. It allows full duplex transmission of signals on a transformer-coupled 600 Ω line. Amplifier A1 provides gain that can be adjusted to meet the modem output drive requirements. Both A1 and A2 are configured to apply the largest possible differential signal to the transformer. The largest signal available on a single 5 V supply is approximately 4.0 V p-p into a 600 Ω transmission system. Amplifier A3 is configured as a difference amplifier to extract the receive information from the transmission line for amplification by A4. A3 also prevents the transmit signal from interfering with the receive signal. The gain of A4 can be adjusted in the same manner as A1’s to meet the modem’s input signal requirements. Standard resistor values permit the use of SIP (Single In-Line Package) format resistor arrays. Couple this with the AD8644 14-lead SOIC or TSSOP package and this circuit can offer a compact solution. P1 Tx GAIN ADJUST TO TELEPHONE LINE 1:1 ZO 600 T1 MIDCOM 671-8005 6.2V 6.2V R6 10k 6 7 A2 5 10 F R9 10k 2 R11 10k R12 10k 3 A3 1 R10 10k R13 10k R14 14.3k 6 A1, A2 = 1/2 AD8644 A3, A4 = 1/2 AD8644 5 A4 R5 10k U1 = AD8644 Figure 27. A PC-99 Compliant Headphone/Line Out Amplifier If gain is required from the output amplifier, four additional resistors should be added as shown in Figure 28. The gain of the AD8644 can be set as: AV = 5V VDD VDD 38 LEFTOUT 35 R5 10k 2 U1-A 4 3 5V 10 1 R1 2k C1 100 F R3 20 R6 20k R6 R5 R2 9.09k 2 A1 3 R1 10k C1 0.1 F TRANSMIT TxA VREF 27 5 R3 360 2k 1 5V DC R7 10k R8 10k AD1881 (AC97) R5 10k RIGHTOUT 36 VSS 7 6 C2 100 F U1-B 8 R6 20k 9 R2 2k R4 20 U1 = AD8644 R6 R5 = +6dB WITH VALUES SHOWN P2 Rx GAIN ADJUST 2k 7 RECEIVE RxA NOTE: ADDITIONAL PINS OMITTED FOR CLARITY AV = C2 0.1 F Figure 28. A PC-99-Compliant Headphone/Speaker Amplifier with Gain Figure 26. A Single-Supply Direct Access Arrangement for Modems A One-Chip Headphone/Microphone Preamplifier Solution Input coupling capacitors are not required for either circuit as the reference voltage is supplied from the AD1881. R4 and R5 help protect the AD8644 output in case the output jack or headphone wires are accidentally shorted to ground. The output coupling capacitors C1 and C2 block dc current from the headphones and create a high-pass filter with a corner frequency of: f −3dB = 1 2πC1(R4 + RL ) Because of its high output current performance, the AD8644 makes an excellent amplifier for driving an audio output jack in a computer application. Figure 27 shows how the AD8644 can be interfaced with an ac codec to drive headphones or speakers Where RL is the resistance of the headphones. REV. 0 –7– AD8614/AD8644 The remaining two amplifiers can be used as low voltage microphone preamplifiers. A single AD8614 can be used as a stand-alone microphone preamplifier. Figure 29 shows this implementation. SPICE Model Availability AV = 20dB 1k MIC 1 IN 21 2.2k 1F MIC 1 10k AV = +20dB AD1881 (AC'97) 5V 2.2k 1k 1F MIC 2 IN 22 MIC 2 VREF 27 Figure 29. Microphone Preamplifier OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 5-Lead SOT-23 (RT Suffix) 0.1181 (3.00) 0.1102 (2.80) 0.0669 (1.70) 0.0590 (1.50) PIN 1 5 1 2 4 3 0.1181 (3.00) 0.1024 (2.60) 0.0374 (0.95) BSC 0.0748 (1.90) BSC 0.0512 (1.30) 0.0354 (0.90) 0.0059 (0.15) 0.0019 (0.05) 0.0197 (0.50) 0.0138 (0.35) 0.0571 (1.45) 0.0374 (0.95) SEATING PLANE 10 0 0.0079 (0.20) 0.0031 (0.08) 0.0217 (0.55) 0.0138 (0.35) 14-Lead TSSOP (RU Suffix) 0.201 (5.10) 0.193 (4.90) 14 8 14 1 14-Lead Narrow SOIC (R Suffix) 0.3444 (8.75) 0.3367 (8.55) 8 7 0.177 (4.50) 0.169 (4.30) 0.256 (6.50) 0.246 (6.25) 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.0098 (0.25) 0.0040 (0.10) 1 7 0.0688 (1.75) 0.0532 (1.35) 0.0196 (0.50) x 45 0.0099 (0.25) PIN 1 0.006 (0.15) 0.002 (0.05) 0.0433 (1.10) MAX 0.0256 (0.65) BSC 0.0118 (0.30) 0.0075 (0.19) 0.0079 (0.20) 0.0035 (0.090) 0.0500 SEATING (1.27) PLANE BSC 8 0 0.028 (0.70) 0.020 (0.50) 0.0192 (0.49) 0.0138 (0.35) 0.0099 (0.25) 0.0075 (0.19) 8 0 0.0500 (1.27) 0.0160 (0.41) SEATING PLANE – 8– REV. 0 PRINTED IN U.S.A. C3735–8–10/99 10k 5V The SPICE model for the AD8614/AD8644 amplifier is available and can be downloaded from the Analog Devices’ web site at http://www.analog.com. The macro-model accurately simulates a number of AD8614/AD8644 parameters, including offset voltage, input common-mode range, and rail-to-rail output swing. The output voltage versus output current characteristic of the macro-model is identical to the actual AD8614/AD8644 performance, which is a critical feature with a rail-to-rail amplifier model. The model also accurately simulates many ac effects, such as gain bandwidth product, phase margin, input voltage noise, CMRR and PSRR versus frequency, and transient response. Its high degree of model accuracy makes the AD8614/AD8644 macro-model one of the most reliable and true-to-life models available for any amplifier.
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