1.6 Ω On Resistance,
15 V iCMOS SPST Switch
ADG1517
FEATURES
FUNCTIONAL BLOCK DIAGRAM
1.6 Ω on resistance
0.4 Ω on resistance flatness
Up to 250 mA continuous current
Fully specified at 15 V
No VL supply required
3 V logic-compatible inputs
Rail-to-rail operation
8-lead 3 mm × 2 mm LFCSP package
ADG1517
D
S
NOTES
1. SWITCH SHOWN FOR A LOGIC 1 INPUT.
APPLICATIONS
07793-001
IN
Figure 1.
Audio signal routing
Video signal routing
Battery-powered systems
Communication systems
Data acquisition systems
Relay replacement
GENERAL DESCRIPTION
The ADG1517 is a single-pole/single-throw (SPST) switch.
Figure 1 shows that with a logic input of 1, the switch of the
ADG1517 is closed. The switch conducts equally well in both
directions when on and has an input signal range that extends
to the supplies. In the off condition, signal levels up to the
supplies are blocked.
The on resistance profile is very flat over the full analog input
range, ensuring excellent linearity and low distortion when
switching audio signals. iCMOS construction ensures ultralow
power dissipation, making the part ideally suited for portable
and battery-powered instruments.
The iCMOS™ (industrial CMOS) modular manufacturing process
combines high voltage CMOS (complementary metal-oxide
semiconductor) and bipolar technologies. It enables the development of a wide range of high performance analog ICs in a footprint
that no other generation of high voltage parts has been able to
achieve. Unlike analog ICs using conventional CMOS processes,
iCMOS components can tolerate high supply voltages while
providing increased performance, dramatically lower power
consumption, and reduced package size.
1.
2.
3.
4.
PRODUCT HIGHLIGHTS
1.85 Ω maximum on resistance at 25°C.
Minimum distortion.
3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V.
No VL logic power supply required.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
ADG1517
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................4
Applications ....................................................................................... 1
Thermal Resistance .......................................................................4
Functional Block Diagram .............................................................. 1
ESD Caution...................................................................................4
General Description ......................................................................... 1
Pin Configuration and Function Descriptions..............................5
Product Highlights ........................................................................... 1
Typical Performance Characteristics ..............................................6
Revision History ............................................................................... 2
Test Circuits ........................................................................................8
Specifications..................................................................................... 3
Terminology .................................................................................... 10
Single Supply ................................................................................. 3
Outline Dimensions ....................................................................... 11
Continuous Current, S or D ........................................................ 3
Ordering Guide .......................................................................... 11
REVISION HISTORY
10/08—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADG1517
SPECIFICATIONS
SINGLE SUPPLY
VDD = 15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage, IS (Off)
25°C
1.6
1.85
0.4
0.5
−40°C to +85°C
−40°C to +125°C
Unit
Test Conditions/Comments
0 V to VDD
V
Ω typ
Ω max
Ω typ
Ω max
VS = 0 V to 10 V, IS = −10 mA; see Figure 13
VDD = 13.5 V
VS = 0 V to 10 V, IS = −10 mA
2.4
2.75
0.6
0.7
±10
nA typ
Drain Off Leakage, ID (Off)
±10
nA typ
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
±10
nA typ
2.0
0.8
0.001
±0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tON
tOFF
Charge Injection
Off Isolation
Total Harmonic Distortion + Noise
(THD + N)
−3 dB Bandwidth
Insertion Loss
CS (Off)
CD (Off)
CD, CS (On)
POWER REQUIREMENTS
IDD
4
135
175
115
155
70
−60
0.04
220
250
190
220
65
−0.16
68
68
185
0.001
75
145
5/16.5
VDD
1
ns typ
ns max
ns typ
ns max
pC typ
dB typ
% typ
MHz typ
dB typ
pF typ
pF typ
pF typ
1.0
IDD
V min
V max
μA typ
μA max
pF typ
μA typ
μA max
μA typ
μA max
V min/max
VDD = 16.5 V
VS = 1 V, VD = 10 V; or VS = 10 V,
VD = 1 V; see Figure 14
VS = 1 V, VD = 10 V; or VS = 10 V,
VD = 1 V; see Figure 14
VS = VD = 1 V or 10 V, see Figure 15
VIN = VGND or VDD
RL = 300 Ω, CL = 35 pF
VS = 10 V; see Figure 19
RL = 300 Ω, CL = 35 pF
VS = 10 V; see Figure 19
VS = 8 V, RS = 0 Ω, CL = 1 nF; see Figure 20
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 16
RL = 110 Ω, 7.5 V p-p, f = 20 Hz to 20 kHz;
see Figure 18
RL = 50 Ω, CL = 5 pF; see Figure 17
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 17
f = 1 MHz; VS = 7.5 V
f = 1 MHz; VS = 7.5 V
f = 1 MHz; VS = 7.5 V
VDD = 16.5 V
Digital inputs = 0 V or VDD
Digital inputs = 5 V
GND = 0 V
Guaranteed by design, not subject to production test.
CONTINUOUS CURRENT, S OR D
Table 2.
Parameter
CONTINUOUS CURRENT, S or D1, 2
1
2
25°C
250
85°C
150
125°C
100
Guaranteed by design, not subject to production test.
Data based on θJA data shown in Table 4.
Rev. 0 | Page 3 of 12
Unit
mA max
Test Conditions/Comments
VDD = 13.5 V, GND = 0 V
ADG1517
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
THERMAL RESISTANCE
Table 3.
θJA is specified for a 4-layer board and with the exposed pad
soldered to the board.
Parameter
VDD to GND
Analog Inputs1
Digital Inputs1
Peak Current, S or D
Operating Temperature Range
Industrial
Storage Temperature Range
Junction Temperature
Reflow Soldering Peak
Temperature, Pb Free
1
Rating
−0.3 V to +25 V
GND − 0.3 V to VDD + 0.3 V or
30 mA, whichever occurs first
GND − 0.3 V to VDD + 0.3 V or
30 mA, whichever occurs first
Data in Table 2 + 10% (pulsed
at 1 ms, 10% duty cycle max)
Table 4. Thermal Resistance
Package Type
8-Lead LFCSP (CP-8-4)
ESD CAUTION
−40°C to +125°C
−65°C to +150°C
150°C
260°C
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 4 of 12
θJA
50.8
Unit
°C/W
ADG1517
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
S 1
8 D
NC 2
ADG1517
GND 3
TOP VIEW
(Not to Scale)
VDD 4
7 GND
6 IN
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD TIED TO GND.
07793-002
5 NC
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
Mnemonic
S
NC
GND
VDD
NC
IN
Description
Source Terminal. Can be an input or output.
No Connect.
Ground (0 V) Reference. Both GND pins must be connected to GND potential.
Most Positive Power Supply Potential.
No Connect.
Logic Control Input.
7
8
9 (EPAD)
GND
D
Exposed Paddle (EPAD)
Ground (0 V) Reference. Both GND pins must be connected to GND potential.
Drain Terminal. Can be an input or output.
The exposed paddle should be tied to GND.
Table 6. Truth Table
ADG1517 IN Pin
1
0
Switch Condition
On
Off
Rev. 0 | Page 5 of 12
ADG1517
TYPICAL PERFORMANCE CHARACTERISTICS
4.5
160
GND = 0V
TA = 25°C
4.0
VDD = 5V
120
3.0
100
VDD = 8V
IDD (µA)
2.5
2.0
80
60
1.5
0.5
0
2
4
6
8
10
12
40
= 12V
= 13.5V
= 14V
= 15V
= 16.5V
14
16
VD OR VS (V)
20
0
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
LOGIC, IN (V)
07793-006
VDD
VDD
VDD
VDD
VDD
1.0
07793-003
ON RESISTANCE (Ω)
3.5
0
GND = 0V
VDD = 15V
TA = 25°C
140
Figure 6. IDD vs. Logic Level
Figure 3. On Resistance as a Function of VD or VS for Single Supply
250
3.0
200
CHARGE INJECTION (pC)
150
2.0
1.5
1.0
TA = –40°C
TA = +25°C
TA = +70°C
TA = +85°C
TA = +125°C
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
VD OR VS (V)
0
–50
–100
DRAIN TO SOURCE
–150
VDD = 15V
GND = 0V
TA = 25°C
–200
–250
0
6
8
10
12
14
16
Figure 7. Charge Injection vs. Source Voltage
200
20
GND = 0V
VDD = 15V
VBIAS = 1V/10V
18
16
180
15V SS tON
160
14
140
12
ID, IS (ON) +, +
ID, IS (ON) –, –
ID (OFF) –, +
IS (OFF) +, –
ID (OFF) +, –
IS (OFF) –, +
10
8
6
TIME (ns)
LEAKAGE (nA)
4
VS (V)
Figure 4. On Resistance as a Function of VD or VS for Different Temperatures,
Single Supply
100
80
2
40
0
20
20
40
60
80
TEMPERATURE (°C)
100
120
0
–40
07793-005
0
15V SS tOFF
120
60
4
–2
2
–20
0
20
40
60
80
TEMPERATURE (°C)
Figure 5. Leakage Currents as a Function of Temperature, Single Supply
Rev. 0 | Page 6 of 12
Figure 8. tON/tOFF Times vs. Temperature
100
120
07793-007
0
GND = 0V
VDD = 15V
50
07793-021
0.5
SOURCE TO DRAIN
100
07793-004
ON RESISTANCE (Ω)
2.5
ADG1517
0
VS = 7.5V p-p
0.040
0.035
–30
0.030
–40
THD+N (%)
OFF ISOLATION (dB)
–20
0.045
GND = 0V
VDD = 15V
TA = 25°C
–50
–60
–70
VS = 5V p-p
0.025
0.020
0.015
VS = 2.5V p-p
–80
0.010
–90
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
0
10
07793-008
–110
VDD = 15V
GND = 0V
LOAD = 110Ω
0.005
–100
100
1k
10k
100k
FREQUENCY (Hz)
Figure 9. Off Isolation vs. Frequency
07793-022
–10
Figure 11. THD + N vs. Frequency
0
–10
–2
VDD = 15V
GND = 0V
TA = 25°C
V p-p = 0.62V
ACPSRR (dB)
–30
–3
–4
NO DECOUPLING
CAPACITORS
–50
DECOUPLING
CAPACITORS
ON SUPPLIES
–70
–5
–90
GND = 0V
VDD = 15V
TA = 25°C
–7
10k
100k
1M
10M
FREQUENCY (Hz)
100M
Figure 10. On Response vs. Frequency
–110
100
1k
10k
100k
FREQUENCY (Hz)
Figure 12. ACPSRR vs. Frequency
Rev. 0 | Page 7 of 12
1M
10M
07793-011
–6
07793-009
INSERTION LOSS (dB)
–1
ADG1517
TEST CIRCUITS
VDD
0.1µF
NETWORK
ANALYZER
VDD
S
VS
D
VIN
RL
50Ω
GND
D
VOUT
IDS
07793-013
VS
OFF ISOLATION = 20 log
Figure 13. On Resistance
VOUT
VS
07793-018
V
S
50Ω
50Ω
IN
Figure 16. Off Isolation
VDD
0.1µF
NETWORK
ANALYZER
VDD
S
50Ω
IN
VS
D
A
S
D
VIN
ID (OFF)
A
GND
VD
07793-014
VS
RL
50Ω
INSERTION LOSS = 20 log
Figure 14. Off Resistance
VOUT
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
07793-019
IS (OFF)
Figure 17. Bandwidth
VDD
0.1µF
AUDIO PRECISION
VDD
RS
S
IN
ID (ON)
D
NC = NO CONNECT
A
VD
VIN
GND
RL
110Ω
Figure 18. THD + Noise
Figure 15. On Leakage
Rev. 0 | Page 8 of 12
VOUT
07793-020
S
07793-015
NC
VS
V p-p
D
ADG1517
VDD
0.1µF
VDD
VOUT
D
VIN
VS
CL
35pF
RL
300Ω
IN
ADG1517
50%
50%
90%
VOUT
90%
GND
tON
tOFF
07793-016
S
Figure 19. Switching Times
VDD
VDD
VS
S
D
VOUT
CL
1nF
IN
GND
VIN
ADG1517
VOUT
QINJ = CL × ΔVOUT
Figure 20. Charge Injection
Rev. 0 | Page 9 of 12
ΔVOUT
07793-017
RS
ADG1517
TERMINOLOGY
The on switch capacitance, measured with reference to ground.
IDD
The positive supply current.
CIN
The digital input capacitance.
VD (VS)
The analog voltage on Terminal D and Terminal S.
tON
Delay time between the 50% and 90% points of the digital input
and switch on condition.
RON
The ohmic resistance between D and S.
RFLAT(ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
tOFF
Delay time between the 50% and 90% points of the digital input
and switch off condition.
IS (Off)
The source leakage current with the switch off.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
ID (Off)
The drain leakage current with the switch off.
Off Isolation
A measure of unwanted signal coupling through an off switch.
ID, IS (On)
The channel leakage current with the switch on.
Bandwidth
The frequency at which the output is attenuated by 3 dB.
VINL
The maximum input voltage for Logic 0.
On Response
The frequency response of the on switch.
VINH
The minimum input voltage for Logic 1.
Insertion Loss
The loss due to the on resistance of the switch.
IINL (IINH)
The input current of the digital input.
THD + N
The ratio of the harmonic amplitude plus noise of the signal to
the fundamental.
CS (Off)
The off switch source capacitance, measured with reference to
ground.
CD (Off)
The off switch drain capacitance, measured with reference to
ground.
CD, CS (On)
ACPSRR (AC Power Supply Rejection Ratio)
Measures the ability of a part to avoid coupling noise and spurious
signals that appear on the supply voltage pin to the output of the
switch. The dc voltage on the device is modulated by a sine wave of
0.62 V p-p. The ratio of the amplitude of signal on the output to
the amplitude of the modulation is the ACPSRR.
Rev. 0 | Page 10 of 12
ADG1517
OUTLINE DIMENSIONS
1.75
1.65
1.50
2.00 BSC
5
3.00 BSC
8
1.90
1.80
1.65
EXPOSED
PAD
0.20 MIN
4
INDEX
AREA
TOP VIEW
0.80
0.75
0.70
0.15 REF
SIDE VIEW
0.30
0.25
0.20
0.50
COPLANARITY
0.08
0.05 MAX
0.02 NOM
1
PIN 1
INDICATOR
BOTTOM VIEW
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
081806-A
SEATING
PLANE
0.50
0.40
0.30
Figure 21. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD]
3 mm × 2 mm Body, Very Very Thin, Dual Lead
(CP-8-4)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADG1517BCPZ-REEL71
1
Temperature Range
−40°C to +125°C
Package Description
8-Lead Lead Frame Chip Scale Package (LFCSP_WD)
Z = RoHS Compliant Part.
Rev. 0 | Page 11 of 12
Package Option
CP-8-4
Branding
1E
ADG1517
NOTES
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07793-0-10/08(0)
Rev. 0 | Page 12 of 12
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