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ADM6316BX32ARJZ-R7

ADM6316BX32ARJZ-R7

  • 厂商:

    AD(亚德诺)

  • 封装:

    SC74A

  • 描述:

    IC SUPERVISOR 1 CHANNEL SOT23

  • 数据手册
  • 价格&库存
ADM6316BX32ARJZ-R7 数据手册
Supervisory Circuits with Watchdog and Manual Reset in 5-Lead SOT-23 ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 FEATURES FUNCTIONAL BLOCK DIAGRAMS 26 reset threshold options 2.5 V to 5 V in 100 mV increments 4 reset timeout options 1 ms, 20 ms, 140 ms, and 1120 ms (minimum) 4 watchdog timeout options 6.3 ms, 102 ms, 1600 ms, and 25.6 sec (typical) Manual reset input Reset output stages Push-pull active low Open-drain active low Push-pull active high Low power consumption: 5 µA Guaranteed reset output valid to VCC = 1 V Power supply glitch immunity Specified over industrial temperature range 5-lead SOT-23 package ADM6316 VCC VCC RESET GENERATOR VREF MR RESET DEBOUNCE GND 04533-001 WATCHDOG DETECTOR WDI Figure 1. ADM6320 VCC RESET GENERATOR VREF APPLICATIONS Microprocessor systems Computers Controllers Intelligent instruments Portable equipment MR RESET DEBOUNCE WATCHDOG DETECTOR GND 04533-028 Data Sheet WDI Figure 2. GENERAL DESCRIPTION The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ ADM6321/ADM6322 are supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. As well as providing power-on reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within a preset timeout period. A reset signal can also be asserted by an external push button through a manual reset input. The seven devices feature different combinations of watchdog input, manual reset input, and output stage configuration, as shown in Table 1. Each device is available in a choice of 26 reset threshold options ranging from 2.5 V to 5 V in 100 mV increments. There are also four reset timeout options of 1 ms, 20 ms, 140 ms, and 1120 ms (minimum) and four watchdog timeout options of 6.3 ms, 102 ms, 1600 ms, and 25.6 sec (typical). Not all device options are released for sale as standard models. See the Ordering Guide for details. The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ ADM6321/ADM6322 are available in 5-lead SOT-23 packages and typically consume only 3 µA, making them suitable for use in low power portable applications. Table 1. Selection Table Output Stage Part No. ADM6316 ADM6317 ADM6318 ADM6319 ADM6320 ADM6321 ADM6322 Rev. I Watchdog Yes Yes Yes No Yes Yes No Manual Reset Yes Yes No Yes Yes No Yes RESET Push-pull No Push-pull Push-pull Open-drain Open-drain Open-drain RESET No Push-pull Push-pull Push-pull No Push-pull Push-pull Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2004–2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Open-Drain RESET Output ........................................................9 Applications ....................................................................................... 1 Manual Reset Input .......................................................................9 Functional Block Diagrams ............................................................. 1 Watchdog Input .............................................................................9 General Description ......................................................................... 1 Applications Information .............................................................. 10 Revision History ............................................................................... 2 Watchdog Input Current ........................................................... 10 Specifications..................................................................................... 3 Negative Going VCC Transients................................................. 10 Absolute Maximum Ratings............................................................ 5 Ensuring Reset Valid to VCC = 0 V ........................................... 10 ESD Caution .................................................................................. 5 Watchdog Software Considerations ......................................... 10 Pin Configurations and Function Descriptions ........................... 6 Device Model Options ................................................................... 11 Typical Performance Characteristics ............................................. 7 Outline Dimensions ....................................................................... 13 Circuit Description ........................................................................... 9 Ordering Guide .......................................................................... 13 Reset Output ................................................................................. 9 REVISION HISTORY 3/2018—Rev. H to Rev. I Changes to General Description Section ...................................... 1 Added Note 1, Table 2 ...................................................................... 3 Changed Model Options Section to Device Model Options Section .............................................................................................. 11 Changes to Device Model Options Section and Table 5 ........... 11 Deleted Table 8; Renumbered Sequentially ................................ 12 Changes to Ordering Guide .......................................................... 13 1/2007—Rev. A to Rev. B Changes to Functional Block Diagram...........................................1 Changes to Figure 18...................................................................... 10 12/2015—Rev. G to Rev. H Added Endnote 1 and Endnote 2, Table 2 ..................................... 3 Change to Model Options Section Title ...................................... 11 Added Endnote 1, Table 5 ............................................................. 11 Changes to Table 8 .......................................................................... 12 Changes to Ordering Guide .......................................................... 14 5/2006—Rev. 0 to Rev. A Updated Format .................................................................. Universal Changes to Functional Block Diagram...........................................1 Changes to Table 8.......................................................................... 12 Changes to Figure 22...................................................................... 13 Changes to Ordering Guide .......................................................... 13 1/2015—Rev. F to Rev. G Changes to Table 8 .......................................................................... 12 10/2004—Revision 0: Initial Version 4/2007—Rev. B to Rev. C Added Figure 2...................................................................................1 Changes to Figure 23...................................................................... 13 Changes to Ordering Guide .......................................................... 13 5/2013—Rev. E to Rev. F Changes to Table 8 .......................................................................... 12 Changes to Ordering Guide .......................................................... 13 10/2010—Rev. D to Rev. E Changes to Table 8 .......................................................................... 12 Updated Outline Dimensions ....................................................... 13 8/2008—Rev. C to Rev. D Change to Figure 18 ......................................................................... 9 Rev. I | Page 2 of 14 Data Sheet ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 SPECIFICATIONS VCC = full operating range, TA = TMIN to TMAX, unless otherwise noted. Table 2. Parameter SUPPLY VCC Operating Voltage Range Supply Current RESET THRESHOLD VOLTAGE 1 RESET THRESHOLD TEMPERATURE COEFFICIENT RESET THRESHOLD HYSTERESIS RESET TIMEOUT PERIOD1 ADM63xxA 2 ADM63xxB2 ADM63xxC2 ADM63xxD2 VCC TO RESET DELAY PUSH-PULL OUTPUT (ADM6316, ADM6317, ADM6318, ADM6319, ADM6321, ADM6322) RESET Output Voltage Min Typ 1 VTH − 1.5% VTH − 2.5% 10 5 VTH VTH 40 Max Unit Test Conditions/Comments 5.5 20 12 VTH + 1.5% VTH + 2.5% V µA µA V V ppm/°C VCC = 5.5 V VCC = 3.6 V TA = 25°C TA = −40°C to +85°C 3 1 20 140 1120 1.4 28 200 1600 40 mV 2 40 280 2240 0.3 0.3 0.3 0.4 0.8 × VCC VCC − 1.5 5 RESET Rise Time RESET Output Voltage 25 Open-Drain Reset Output Leakage Current WATCHDOG INPUT (ADM6316, ADM6317, ADM6318, ADM6320, ADM6321) Watchdog Timeout Period1 ADM63xxxW 3 ADM63xxxX3 ADM63xxxY3 ADM63xxxZ3 WDI Pulse Width WDI Input Threshold WDI Input Current 4.3 71 1.12 17.9 50 0.3 × VCC −20 6.3 102 1.6 25.6 120 −15 V V V V V V ns 0.3 0.4 V V V V V 0.3 0.3 0.3 0.4 1 V V V V µA 9.3 153 2.4 38.4 ms ms sec sec ns V µA µA 0.8 × VCC 0.8 × VCC VCC − 1.5 OPEN-DRAIN OUTPUT (ADM6320, ADM6321, ADM6322) RESET Output Voltage ms ms ms ms µs 0.7 × VCC 160 Rev. I | Page 3 of 14 VCC falling at 1 mV/µs VCC ≥ 1.0 V, ISINK = 50 µA VCC ≥ 1.2 V, ISINK = 100 µA VCC ≥ 2.7 V, ISINK = 1.2 mA VCC ≥ 4.5 V, ISINK = 3.2 mA VCC ≥ 2.7 V, ISOURCE = 500 µA VCC ≥ 4.5 V, ISOURCE = 800 µA From 10% to 90% VCC, CL = 5 pF, VCC = 3.3 V VCC ≥ 2.7 V, ISINK = 1.2 mA VCC ≥ 4.5 V, ISINK = 3.2 mA VCC ≥ 1.8 V, ISOURCE = 150 µA VCC ≥ 2.7 V, ISOURCE = 500 µA VCC ≥ 4.5 V, ISOURCE = 800 µA VCC ≥ 1.0 V, ISINK = 50 µA VCC ≥ 1.2 V, ISINK = 100 µA VCC ≥ 2.7 V, ISINK = 1.2 mA VCC ≥ 4.5 V, ISINK = 3.2 mA VIL = 0.3 × VCC, VIH = 0.7 × VCC VWDI = VCC, time average VWDI = 0, time average ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 Parameter MANUAL RESET INPUT (ADM6316, ADM6317, ADM6319, ADM6320, ADM6322) MR Input Threshold MR Input Pulse Width MR Glitch Rejection MR Pull-Up Resistance MR to Reset Delay Min Typ 0.8 0.3 × VCC 1 35 100 52 230 Data Sheet Max Unit Test Conditions/Comments 2.0 0.7 × VCC V V µs ns kΩ ns VTH > 4.0 V VTH < 4.0 V 75 Not all device options are released for sale as standard models. See the Ordering Guide for full details. Complete the model code by replacing xx with a device generic number. 3 Complete the model code by replacing xxx with a device generic number and code for the reset timeout period. 1 2 Rev. I | Page 4 of 14 VCC = 5 V Data Sheet ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 3. Parameter VCC RESET (ADM6320, ADM6321, ADM6322) All Other Pins Output Current (RESET, RESET) Operating Temperature Range Storage Temperature Range θJA Thermal Impedance, SOT-23 Lead Temperature Soldering (10 sec) Vapor Phase (60 sec) Infrared (15 sec) Rating −0.3 V to +6 V −0.3 V to +6 V −0.3 V to (VCC + 0.3 V) 20 mA −40°C to +85°C −65°C to +125°C 270°C/W Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. ESD CAUTION 300°C 215°C 220°C Rev. I | Page 5 of 14 ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 Data Sheet 5 GND 2 TOP VIEW (Not to Scale) MR 3 RESET 1 VCC 4 WDI RESET 1 VCC ADM6317 TOP VIEW (Not to Scale) MR 3 GND 2 4 WDI VCC 4 WDI Figure 5. ADM6318/ADM6321 Pin Configuration 04533-003 GND 2 5 5 TOP VIEW (Not to Scale) RESET 3 Figure 3. ADM6316/ADM6320 Pin Configuration RESET 1 ADM6318/ ADM6321 RESET 3 Figure 4. ADM6317 Pin Configuration ADM6319/ ADM6322 5 VCC 4 MR TOP VIEW (Not to Scale) 04533-005 GND 2 ADM6316/ ADM6320 04533-002 RESET 1 04533-004 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 6. ADM6319/ADM6322 Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 3 4 5 Mnemonic RESET (ADM6316/ADM6318/ADM6319/ ADM6320/ADM6321/ADM6322) RESET (ADM6317) GND (all models) MR (ADM6316/ADM6317/ADM6320) RESET (ADM6318/ADM6319/ADM6321/ADM6322) WDI (ADM6316/ADM6317/ADM6318/ ADM6320/ADM6321) MR (ADM6319/ADM6322) VCC (all models) Description Active Low Reset Output. Asserted whenever VCC is below the reset threshold, VTH. Push-Pull Output Stage for the ADM6316/ADM6318/ADM6319. Open-Drain Output Stage for the ADM6320/ADM6321/ADM6322. Active High Push-Pull Reset Output. Ground. Manual Reset Input. This is an active low input that when forced low for at least 1 µs, generates a reset. It features a 52 kΩ internal pull-up. Active High Push-Pull Reset Output. Watchdog Input. Generates a reset if the logic level on the pin remains low or high for the duration of the watchdog timeout. The timer is cleared if a logic transition occurs on this pin or if a reset is generated. Leave this pin floating to disable the watchdog timer. Manual Reset Input. Power Supply Voltage Being Monitored. Rev. I | Page 6 of 14 Data Sheet ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 TYPICAL PERFORMANCE CHARACTERISTICS 10.0 100 9.5 90 9.0 VCC TO RESET DELAY (µs) 80 VCC = 5V 8.0 7.0 6.5 6.0 VCC = 3V 5.5 5.0 4.5 VCC = 1.5V 3.5 –40 –20 0 20 40 TEMPERATURE (°C) 60 80 30 20 –20 0 20 40 TEMPERATURE (°C) 60 80 0 0.5 1.0 1.5 2.0 2.5 3.0 VCC (V) 3.5 4.0 4.5 5.0 5.5 320 300 280 260 240 220 200 180 160 140 120 100 –40 –20 0 20 40 TEMPERATURE (°C) 60 80 04533-010 MANUAL RESET TO RESET DELAY (ns) 340 04533-007 ICC (µA) 40 Figure 10. VCC Falling to Reset Propagation Delay vs. Temperature Figure 11. Manual Reset to Reset Propagation Delay vs. Temperature (ADM6316/ADM6317/ADM6319/ADM6320/ADM6322) Figure 8. Supply Current vs. Supply Voltage 1.05 1.20 1.04 1.15 NORMALIZED RESET TIMEOUT 1.03 1.02 1.01 1.00 0.99 0.98 0.97 1.10 1.05 1.00 0.95 0.90 0.85 0.96 0.95 –40 –20 0 20 40 TEMPERATURE (°C) 60 80 0.80 –40 04533-008 NORMALIZED RESET THRESHOLD 50 0 –40 Figure 7. Supply Current vs. Temperature (ADM6316/ADM6317/ADM6318/ADM6320/ADM6321) 80 75 70 65 60 55 50 45 40 35 30 25 20 15 10 5 0 60 10 04533-006 4.0 70 –20 0 20 40 TEMPERATURE (°C) 60 80 Figure 12. Normalized Reset Timeout Period vs. Temperature Figure 9. Normalized Reset Threshold vs. Temperature Rev. I | Page 7 of 14 04533-011 ICC (µA) 7.5 04533-009 8.5 ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 190 180 MR MINIMUM PULSE WIDTH (ns) 1.15 1.10 1.05 1.00 0.95 –20 0 20 40 TEMPERATURE (°C) 60 80 140 130 120 0 TEMPERATURE (°C) 50 Figure 15. Manual Reset Minimum Pulse Width vs. Temperature (ADM6316/ADM6317/ADM6319/ADM6320/ADM6322) 3.8 RESET OCCURS ABOVE CURVE 3.6 140 MINIMUM PULSE WIDTH (ns) 120 VTH = 4.63V 80 60 40 NEGATIVE PULSE 3.2 3.0 2.8 2.6 2.4 POSITIVE PULSE 1000 2.0 –40 Figure 14. Maximum VCC Transient Duration vs. Reset Threshold Overdrive 10 TEMPERATURE (°C) 60 04533-015 100 OVERDRIVE VOLTAGE (mV) 3.4 2.2 VTH = 2.93V 04533-013 MAXIMUM TRANSIENT DURATION (µs) 160 0 10 150 100 –50 Figure 13. Normalized Watchdog Timeout Period vs. Temperature (ADM6316/ADM6317/ADM6318/ADM6320/ADM6321) 20 160 04533-014 0.90 –40 100 170 110 04533-012 NORMALIZED WATCHDOG TIMEOUT 1.20 Data Sheet Figure 16. Watchdog Input Minimum Pulse Width vs. Temperature (ADM6316/ADM6317/ADM6318/ADM6320/ADM6321) Rev. I | Page 8 of 14 Data Sheet ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 CIRCUIT DESCRIPTION RESET OUTPUT The ADM6316 features an active low push-pull reset output, while the ADM6317/ADM6321/ADM6322 have active high push-pull reset outputs. The ADM6318/ADM6319 feature dual active low and active high push-pull reset outputs. For active low and active high outputs, the reset signal is guaranteed to be logic low and logic high, respectively, for VCC down to 1 V. The reset output is asserted when VCC is below the reset threshold (VTH), when MR is driven low, or when WDI is not serviced within the watchdog timeout period (tWD). Reset remains asserted for the duration of the reset active timeout period (tRP) after VCC rises above the reset threshold, after MR transitions from low to high, or after the watchdog timer times out. Figure 17 illustrates the behavior of the reset outputs. VCC VCC VTH VTH 1V 0V MANUAL RESET INPUT The ADM6316/ADM6317/ADM6319/ADM6320/ADM6322 feature a manual reset input (MR), which when driven low, asserts the reset output. When MR transitions from low to high, reset remains asserted for the duration of the reset active timeout period before deasserting. The MR input has a 52 kΩ, internal pull-up so that the input is always high when unconnected. An external push-button switch can be connected between MR and ground so that the user can generate a reset. Debounce circuitry for this purpose is integrated on chip. Noise immunity is provided on the MR input, and fast, negative going transients of up to 100 ns (typical) are ignored. A 0.1 μF capacitor between MR and ground provides additional noise immunity. WATCHDOG INPUT The ADM6316/ADM6317/ADM6318/ADM6320/ADM6321 feature a watchdog timer that monitors microprocessor activity. A timer circuit is cleared with every low-to-high or high-to-low logic transition on the watchdog input pin (WDI), which detects pulses as short as 50 ns. If the timer counts through the preset watchdog timeout period (tWD), reset is asserted. The microprocessor is required to toggle the WDI pin to avoid being reset. Failure of the microprocessor to toggle WDI within the timeout period, therefore, indicates a code execution error, and the reset pulse generated restarts the microprocessor in a known state. As well as logic transitions on WDI, the watchdog timer is also cleared by a reset assertion due to an undervoltage condition on VCC or due to MR being pulled low. When reset is asserted, the watchdog timer is cleared and does not begin counting again until reset deasserts. The watchdog timer can be disabled by leaving WDI floating or by three-stating the WDI driver. VCC VCC tRP tRD 0V RESET RESET VCC 1V 0V tRP tRD 1V 0V VCC 0V 04533-019 RESET VCC WDI VTH tRP tWD VCC 0V Figure 17. Reset Timing Diagram Figure 18. Watchdog Timing Diagram OPEN-DRAIN RESET OUTPUT The ADM6320/ADM6321/ADM6322 have an active low, opendrain reset output. This output structure requires an external pull-up resistor to connect the reset output to a voltage rail no higher than 6 V. The resistor must comply with the microprocessor’s logic low and logic high voltage level requirements while supplying input current and leakage paths on the RESET line. A 10 kΩ resistor is adequate in most situations. Rev. I | Page 9 of 14 tRP 04533-022 The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ ADM6321/ADM6322 provide microprocessor supply voltage supervision by controlling the reset input of the microprocessor. Code execution errors are avoided during power-up, power-down, and brownout conditions by asserting a reset signal when the supply voltage is below a preset threshold and by allowing supply voltage stabilization with a fixed timeout reset pulse after the supply voltage rises above the threshold. In addition, problems with microprocessor code execution can be monitored and corrected with a watchdog timer (ADM6316/ADM6317/ ADM6318/ADM6320/ADM6321). If the user detects a problem with the system’s operation, a manual reset input is available (ADM6316/ADM6317/ADM6319/ADM6320/ADM6322) to reset the microprocessor, for example, by means of an external push button. ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 Data Sheet APPLICATIONS INFORMATION WATCHDOG INPUT CURRENT WATCHDOG SOFTWARE CONSIDERATIONS To minimize watchdog input current (and minimize overall power consumption), leave WDI low for the majority of the watchdog timeout period. When driven high, WDI can draw as much as 160 µA. Pulsing WDI low-to-high-to-low at a low duty cycle reduces the effect of the large input current. When WDI is unconnected, a window comparator disconnects the watchdog timer from the reset output circuitry so that reset is not asserted when the watchdog timer times out. In implementing the microprocessor’s watchdog strobe code, quickly switching WDI low to high and then high to low (minimizing WDI high time) is desirable for current consumption reasons. However, a more effective way of using the watchdog function can be considered. NEGATIVE GOING VCC TRANSIENTS To avoid unnecessary resets caused by fast power supply transients, the ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ ADM6321/ADM6322 are equipped with glitch rejection circuitry. The typical performance characteristic in Figure 14 plots VCC transient duration vs. the transient magnitude. The curves show combinations of transient magnitude and duration for which a reset is not generated for 4.63 V and 2.93 V reset threshold parts. For example, with the 2.93 V threshold, a transient that goes 100 mV below the threshold and lasts 8 µs typically does not cause a reset, but if the transient is any larger in magnitude or duration, a reset is generated. An optional 0.1 µF bypass capacitor mounted close to VCC provides additional glitch rejection. A low-to-high-to-low WDI pulse within a given subroutine prevents the watchdog from timing out. However, if the subroutine becomes stuck in an infinite loop, the watchdog cannot detect this because the subroutine continues to toggle WDI. A more effective coding scheme for detecting this error involves using a slightly longer watchdog timeout. In the program that calls the subroutine, WDI is set high. The subroutine sets WDI low when it is called. If the program executes without error, WDI is toggled high and low with every loop of the program. If the subroutine enters an infinite loop, WDI is kept low, the watchdog times out, and the microprocessor is reset (see Figure 20). ENSURING RESET VALID TO VCC = 0 V ADM6316/ ADM6318/ ADM6319 ADM6317/ ADM6318/ ADM6319/ ADM6321/ ADM6322 RESET INFINITE LOOP: WATCHDOG TIMES OUT SUBROUTINE 04533-021 SET WDI LOW RETURN Figure 20. Watchdog Flow Diagram VCC RESET 100kΩ ADM6316 MR WDI RESET MICROPROCESSOR I/O RESET 04533-018 100kΩ RESET Figure 19. Ensuring Reset Valid to VCC = 0 V Rev. I | Page 10 of 14 04533-020 VCC SET WDI HIGH PROGRAM CODE Both active low and active high reset outputs are guaranteed to be valid for VCC as low as 1 V. However, by using an external resistor with push-pull configured reset outputs, valid outputs for VCC as low as 0 V are possible. For an active low reset output, a resistor connected between RESET and ground pulls the output low when it is unable to sink current. For the active high case, a resistor connected between RESET and VCC pulls the output high when it is unable to source current. A large resistance, such as 100 kΩ, must be used so that it does not overload the reset output when VCC is above 1 V. VCC START Figure 21. Typical Application Circuit Data Sheet ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 DEVICE MODEL OPTIONS The Watchdog Timers page on the ADI website also shows a list of standard models. Contact a sales representative for information on nonstandard models and be aware that samples and production units have very long lead times. The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ ADM6321/ADM6322 include many device options, however, not all options are released for sale. Released options called standard models and are listed in the Ordering Guide. Table 5. Reset Voltage Threshold Options Reset Threshold Number 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 Min 4.925 4.827 4.728 4.630 4.561 4.433 4.314 4.236 4.137 4.039 3.940 3.842 3.743 3.645 3.546 3.448 3.349 3.251 3.152 3.034 2.955 2.886 2.758 2.660 2.591 2.463 TA = +25°C Typ 5.000 4.900 4.800 4.700 4.630 4.500 4.390 4.300 4.200 4.100 4.00 3.900 3.800 3.700 3.600 3.500 3.400 3.300 3.200 3.080 3.000 2.930 2.800 2.700 2.630 2.500 Max 5.075 4.974 4.872 4.771 4.699 4.568 4.446 4.365 4.263 4.162 4.060 3.959 3.857 3.756 3.654 3.553 3.451 3.350 3.248 3.126 3.045 2.974 2.842 2.741 2.669 2.538 Min 4.875 4.778 4.680 4.583 4.514 4.388 4.270 4.193 4.095 3.998 3.900 3.803 3.705 3.608 3.510 3.413 3.315 3.218 3.120 3.003 2.925 2.857 2.730 2.633 2.564 2.438 TA = −40°C to +85°C Max 5.125 5.023 4.920 4.818 4.746 4.613 4.490 4.408 4.305 4.203 4.100 3.998 3.895 3.793 3.690 3.588 3.485 3.383 3.280 3.157 3.075 3.000 2.870 2.768 2.696 2.563 Table 6. Reset Timeout Options Suffix A B C D Min 1 20 140 1.12 Typ 1.6 30 200 1.60 Max 2 40 280 2.24 Unit ms ms ms sec Typ 6.3 102 1.6 25.6 Max 9.3 153 2.24 38.4 Unit ms ms sec sec Table 7. Watchdog Timer Options Suffix W X Y Z Min 4.3 71 1.12 17.9 Rev. I | Page 11 of 14 Unit V V V V V V V V V V V V V V V V V V V V V V V V V V ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 Data Sheet ADM63 _ _ _ _ARJ_-_ ORDERING QUANTITY RL7: 3000 PIECE REEL R7: 3000 PIECE REEL RoHS COMPLIANT GENERIC NUMBER (16 TO 22) Z: RoHS COMPLIANT PACKAGE CODE RJ: 5-LEAD SOT-23 WATCHDOG TIMEOUT PERIOD W: 6.3ms (TYP) X: 102ms (TYP) Y: 1.6sec (TYP) Z: 25.6sec (TYP) TEMPERATURE RANGE A: –40°C TO +85°C RESET THRESHOLD NUMBER (25 TO 50) Figure 22. Ordering Code Structure (Modified Diagram) Rev. I | Page 12 of 14 04533-024 RESET TIMEOUT PERIOD A: 1ms (MIN) B: 20ms (MIN) C: 140ms (MIN) D: 1120ms (MIN) Data Sheet ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 OUTLINE DIMENSIONS 3.00 2.90 2.80 1.70 1.60 1.50 5 1 4 2 3.00 2.80 2.60 3 0.95 BSC 1.90 BSC 1.45 MAX 0.95 MIN 0.15 MAX 0.05 MIN 0.50 MAX 0.35 MIN 0.20 MAX 0.08 MIN 10° 5° 0° SEATING PLANE 0.60 BSC 0.55 0.45 0.35 11-01-2010-A 1.30 1.15 0.90 COMPLIANT TO JEDEC STANDARDS MO-178-AA Figure 23. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters ORDERING GUIDE Model1, 2, 3 ADM6316AY27ARJZ-R7 ADM6316AY29ARJZ-R7 ADM6316AZ29ARJZ-R7 ADM6316BX30ARJZ-R7 ADM6316BX46ARJZ-R7 ADM6316CW25ARJZ-R7 ADM6316CY26ARJZ-R7 ADM6316CY29ARJZ-R7 ADM6316CY46ARJZ-R7 ADM6316DZ26ARJ-RL7 ADM6316DZ26ARJZ-R7 ADM6316DZ31ARJZ-R7 ADM6317CY29ARJZ-R7 ADM6318BX49ARJZ-R7 ADM6318CY29ARJZ-R7 ADM6318CY46ARJ-RL7 ADM6318CY46ARJZ-R7 ADM6318CZ28ARJZ-R7 ADM6319B25ARJZ-R7 ADM6319B31ARJZ-RL7 ADM6319C29ARJZ-RL7 ADM6319C46ARJZ-RL7 ADM6320BX33ARJZ-R7 ADM6320BX45ARJZ-R7 ADM6320CX29ARJZ-R7 ADM6320CY29ARJ-RL7 ADM6320CY29ARJZ-R7 Reset Voltage Threshold (V) 2.7 2.93 2.93 3 4.63 2.5 2.63 2.93 4.63 2.63 2.63 3.08 2.93 4.9 2.93 4.63 4.63 2.8 2.5 3.08 2.93 4.63 3.3 4.5 2.93 2.93 2.93 Minimum Reset Timeout (ms) 1 1 1 20 20 140 140 140 140 1120 1120 1120 140 20 140 140 140 140 20 20 140 140 20 20 140 140 140 Typical Watchdog Timeout (sec)4 1.6 1.6 25.6 0.102 0.102 0.0063 1.6 1.6 1.6 25.6 25.6 25.6 1.6 0.102 1.6 1.6 1.6 25.6 N/A N/A N/A N/A 0.102 0.102 0.102 1.6 1.6 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Rev. I | Page 13 of 14 Package Description 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 Package Option RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 Ordering Quantity 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 Marking Code M7Q M7Q M7Q M7Q M7Q M7Q M7Q M7Q M7Q N00 M7Q M7Q M9N M4Q M4Q N02 M4Q M4Q N0S N0S N0S N0S N0T N0T N0T N04 N0T ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 Model1, 2, 3 ADM6320CY31ARJZ-R7 ADM6320CY46ARJZ-R7 ADM6320CZ27ARJZ-R7 ADM6320CZ29ARJ-RL7 ADM6320CZ29ARJZ-R7 ADM6321AX29ARJZ-R7 ADM6321AY30ARJZ-R7 ADM6321AY31ARJZ-R7 ADM6321AY43ARJZ-R7 ADM6321BZ25ARJZ-R7 ADM6321CY46ARJZ-R7 ADM6322C29ARJZ-R7 ADM6322C46ARJZ-RL7 Reset Voltage Threshold (V) 3.08 4.63 2.7 2.93 2.93 2.93 3 3.08 4.3 2.5 4.63 2.93 4.63 Minimum Reset Timeout (ms) 140 140 140 140 140 1 1 1 1 20 140 140 140 Typical Watchdog Timeout (sec)4 1.6 1.6 25.6 25.6 25.6 0.102 1.6 1.6 1.6 25.6 1.6 N/A N/A Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C 1 Package Description 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 Package Option RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 RJ-5 Data Sheet Ordering Quantity 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 3,000 Marking Code N0T N0T N0T N04 N0T M8L M8L M8L M8L M8L M8L M8J M8J Z = RoHS Compliant Part. The ADM6316/ADM6317/ADM6318/ADM6319/ADM6320/ADM6321/ADM6322 include many device options, however, not all options are released for sale. Released options called standard models and are listed in the Ordering Guide. The Watchdog Timers page on the ADI website also shows a list of standard models. Contact a sales representative for information on nonstandard models and be aware that samples and production units have very long lead times. 3 If ordering nonstandard models, complete the ordering code (see Figure 22) by inserting the reset voltage threshold, reset timeout, and watchdog timer (ADM6316/ADM6317/ADM6318/ADM6320/ADM6321) suffixes from Table 5 to Table 7. No watchdog timeout is available for ADM6319/ADM6322. 4 N/A means not applicable. 2 ©2004–2018 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D04533-0-3/18(I) Rev. I | Page 14 of 14
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