ADM706AN

Low Cost Microprocessor Supervisory Circuits ADM705/ADM706/ADM707/ADM708 FEATURES Guaranteed RESET valid with VCC = 1 V 190 μA quiescent current Precision supply voltage monitor 4.65 V (ADM705/ADM707) 4.40 V (ADM706/ADM708) 200 ms reset pulse width Debounced TTL/CMOS manual reset input (MR) Independent watchdog timer (ADM705/ADM706) 1.60 sec timeout (ADM705/ADM706) Active high reset output (ADM707/ADM708) Voltage monitor for power-fail or low battery warning Superior upgrade for MAX705 to MAX708 WATCHDOG INPUT (WDI) FUNCTIONAL BLOCK DIAGRAMS WATCHDOG TRANSITION DETECTOR VCC 250μ A MR VCC 4.65V* POWER-FAIL INPUT (PFI) 1.25V WATCHDOG TIMER WATCHDOG OUTPUT (WDO) RESET AND WATCHDOG TIMEBASE RESET GENERATOR RESET ADM705/ ADM706 POWER-FAIL OUTPUT (PFO) 00088-001 00088-002 * VOLTAGE REFERENCE = 4.65V (ADM705), 4.40V (ADM706) APPLICATIONS Microprocessor systems Computers Controllers Intelligent instruments Critical microprocessor supply monitoring VCC Figure 1. ADM705/ADM706 250μ A MR VCC 4.65V* POWER-FAIL INPUT (PFI) 1.25V RESET GENERATOR RESET RESET ADM707/ ADM708 POWER-FAIL OUTPUT (PFO) * VOLTAGE REFERENCE = 4.65V (ADM707), 4.40V (ADM708) Figure 2. ADM707/ADM708 GENERAL DESCRIPTION The ADM705/ADM706/ADM707/ADM708 microprocessor supervisory circuits are suitable for monitoring 5 V power supplies/batteries and can also monitor microprocessor activity. The ADM705/ADM706 provide power-supply monitoring circuitry that generate a reset output during power-up, powerdown, and brownout conditions. The reset output remains operational with VCC as low as 1 V. Independent watchdog monitoring circuitry is also provided. This is activated if the watchdog input has not been toggled within 1.60 seconds. In addition, there is a 1.25 V threshold detector to warn of power-failures, to detect low battery conditions, or to monitor an additional power supply. An active low, debounced manual reset input (MR) is also included. The ADM705 and ADM706 are identical except for the reset threshold monitor levels, which are 4.65 V and 4.40 V, respectively. The ADM707 and ADM708 provide a similar functionality to the ADM705 and ADM706 and only differ in that a watchdog timer function is not available. Instead, an active high reset output (RESET) is available as well as the active low reset output (RESET). The ADM707 and ADM708 are identical except for the reset threshold monitor levels, which are 4.65 V and 4.40 V, respectively. All parts are available in narrow 8-lead PDIP and 8-lead SOIC packages. Rev. G Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. ADM705/ADM706/ADM707/ADM708 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagrams ............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 ESD Caution .................................................................................. 4 Pin Configurations and Function Descriptions ........................... 5 Typical Performance Characteristics ............................................. 6 Circuit Information .......................................................................... 8 Power-Fail RESET Output ...........................................................8 Manual Reset..................................................................................8 Watchdog Timer (ADM705/ADM706) .....................................8 Power-Fail Comparator ................................................................8 Valid RESET Below 1 V VCC ........................................................9 Applications Information .............................................................. 10 Monitoring Additional Supply Levels...................................... 10 Microprocessor with Bidirectional RESET ............................. 10 Outline Dimensions ....................................................................... 11 Ordering Guide .......................................................................... 12 REVISION HISTORY 3/08—Rev. F to Rev. G Changes to Applications .................................................................. 1 Changes to Table 2 ............................................................................ 4 Changes to Figure 9 .......................................................................... 6 Changes to Figure 10, Figure 11, and Figure 12 ........................... 7 Changes to Figure 14 ........................................................................ 8 Changes to Ordering Guide .......................................................... 12 2/07—Rev. E to Rev. F Updated Format .................................................................. Universal Changes to Watchdog Timeout Period .......................................... 3 Replaced Pin Configurations and Function Descriptions Section ................................................................................................ 5 7/06—Rev. D to Rev. E Added RM-8 (MSOP) Package ......................................... Universal Changes to Table 2 ............................................................................ 4 Updated Outline Dimensions ....................................................... 12 Changes to Ordering Guide .......................................................... 12 11/05—Rev. C to Rev. D Updated Format .................................................................. Universal Deleted Figure 2 .................................................................................4 Updated Outline Dimensions ....................................................... 11 Changes to Ordering Guide .......................................................... 12 8/02—Rev. B to Rev. C Removed RM-8 (μSOIC) Package .................................... Universal Updated N-8 and R-8 Packages .......................................................8 Rev. G | Page 2 of 12 ADM705/ADM706/ADM707/ADM708 SPECIFICATIONS VCC = 4.75 V to 5.5 V, TA = TMIN to TMAX, unless otherwise noted. Table 1. Parameter POWER SUPPLY Min 1.0 Typ Max 5.5 250 4.75 4.50 280 0.4 0.3 0.3 Unit V μA V V mV ms V V V V V V sec ns Test Conditions/Comments VCC Operating Voltage Range Supply Current LOGIC OUTPUT 190 4.5 4.25 160 VCC − 1.5 4.65 4.40 40 200 Reset Threshold Reset Threshold Hysteresis RESET PULSE WIDTH RESET OUTPUT VOLTAGE ADM705/ADM707 ADM706/ADM708 RESET OUTPUT VOLTAGE WATCHDOG TIMEOUT PERIOD (tWD) WDI Pulse Width (tWP) WATCHDOG INPUT VCC − 1.5 1.00 50 1.60 0.4 2.25 ISOURCE = 800 μA ISINK = 3.2 mA VCC = 1 V, ISINK = 50 μA VCC = 1.2 V, ISINK = 100 μA ADM707/ADM708, ISOURCE = 800 μA ADM707/ADM708, ISINK = 1.2 mA VIL = 0.4 V, VIH = VCC × 0.8, WDI = VCC WDI Input Threshold Logic Low Logic High WDI Input Current WDO OUTPUT VOLTAGE MANUAL RESET INPUT 0.8 3.5 −150 VCC − 1.5 50 −50 150 0.4 MR Pull-Up Current MR Pulse Width MR INPUT THRESHOLD 100 150 250 600 V V μA μA V V μA ns V V ns V nA V V WDI = 0 V WDI = 0 V ISOURCE = 800 μA ISINK = 1.2 mA MR = 0 V Logic Low Logic High MR TO RESET OUTPUT DELAY POWER-FAIL INPUT PFI Input Threshold PFI Input Current PFO OUTPUT VOLTAGE 0.8 2.0 250 1.2 −25 VCC − 1.5 1.25 +0.01 1.3 +25 0.4 ISOURCE = 800 μA ISINK = 3.2 mA Rev. G | Page 3 of 12 ADM705/ADM706/ADM707/ADM708 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 2. Parameter VCC All Other Inputs Input Current VCC GND Digital Output Current Power Dissipation, N-8 PDIP θJA Thermal Impedance Power Dissipation, R-8 SOIC θJA Thermal Impedance Power Dissipation, RM-8 MSOP θJA Thermal Impedance Operating Temperature Range Industrial (Version A) Lead Temperature (Soldering, 10 sec) Vapor Phase (60 sec) Infrared (15 sec) Storage Temperature Range ESD Rating Rating −0.3 V to +6 V −0.3 V to VCC + 0.3 V 20 mA 20 mA 20 mA 727 mW 135°C/W 470 mW 110°C/W 900 mW 206°C/W −40°C to +85°C 300°C 215°C 220°C −65°C to +150°C >4.5 kV Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION Rev. G | Page 4 of 12 ADM705/ADM706/ADM707/ADM708 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS MR 1 VCC 2 GND 3 ADM705/ ADM706 8 WDO MR 1 VCC 2 GND 3 00088-003 7 RESET ADM707/ ADM708 8 7 RESET RESET RESET RESET MR 00088-004 1 2 3 4 ADM708 8 7 NC PFO VCC NC = NO CONNECT NC = NO CONNECT Figure 3. ADM705/ADM706 PDIP/SOIC Pin Configuration Figure 4. ADM707/ADM708 PDIP/SOIC Pin Configuration Figure 5. ADM708 MSOP Pin Configuration Table 3. Pin Function Descriptions ADM705/ ADM706 (PDIP, SOIC) 1 Pin Number ADM707/ ADM708 (PDIP, SOIC) 1 Mnemonic MR ADM708 (MSOP) 3 VCC GND PFI 2 3 4 2 3 4 4 5 6 PFO WDI 5 6 5 N/A 7 N/A NC RESET N/A 7 6 7 8 1 WDO 8 N/A N/A RESET N/A 8 2 Description Manual Reset Input. When this pin is taken below 0.8 V, a reset is generated. MR can be driven from TTL, CMOS logic, or from a manual reset switch as it is internally debounced. An internal 250 μA pull-up current holds the input high when floating. 5 V Power Supply Input. 0 V Ground Reference for All Signals. Power-Fail Input. PFI is the noninverting input to the power-fail comparator. When PFI is less than 1.25 V, PFO goes low. If unused, PFI should be connected to GND or VCC. Power-Fail Output. PFO is the output from the power-fail comparator. It goes low when PFI is less than 1.25 V. Watchdog Input. WDI is a three-level input. If WDI remains either high or low for longer than the watchdog timeout period, the watchdog output (WDO) goes low. The timer resets with each transition at the WDI input. Either a highto-low or a low-to-high transition clears the counter. The internal timer is also cleared whenever reset is asserted. The watchdog timer is disabled when WDI is left floating or connected to a three-state buffer. No Connect. Logic Output. RESET goes low for 200 ms when triggered. It can be triggered either by VCC being below the reset threshold or by a low signal on the manual reset input (MR). RESET remains low whenever VCC is below the reset threshold (4.65 V in ADM705/ADM707, 4.40 V in ADM706/ADM708). It remains low for 200 ms after VCC goes above the reset threshold or MR goes from low to high. A watchdog timeout does not trigger RESET unless WDO is connected to MR. Watchdog Output. WDO remains low until the watchdog timer is cleared. WDO also goes low during low line conditions. Whenever VCC is below the reset threshold, WDO goes low if the internal WDO remains low. As soon as VCC goes above the reset threshold, WDO goes high. Logic Output. RESET is an active high output suitable for systems that use active high reset logic. It is the inverse of RESET. Rev. G | Page 5 of 12 00088-005 6 WDI TOP VIEW PFI 4 (Not to Scale) 5 PFO 6 NC TOP VIEW PFI 4 (Not to Scale) 5 PFO 6 PFI TOP VIEW (Not to Scale) 5 GND ADM705/ADM706/ADM707/ADM708 TYPICAL PERFORMANCE CHARACTERISTICS VCC = 5V TA = 25°C A1 VCC 100 90 4.50V 1.3V PFI 1.2V 5V PFO 0% RESET 1V 1V 500msH O 00088-012 500ns/DIV Figure 6. RESET Output Voltage vs. Supply Voltage Figure 8. PFI Comparator Assertion Response Time VCC = 5V TA = 25°C A1 VCC RESET 100 90 4.50V 1.3V PFI 1.2V 4.4V PFO 10 0% 00088-013 1V 1V 500msH O 500ns/DIV Figure 7. ADM707/ADM708 RESET Output Voltage vs. Supply Voltage Figure 9. PFI Comparator Deassertion Response Time Rev. G | Page 6 of 12 00088-015 0V 00088-014 10 0V ADM705/ADM706/ADM707/ADM708 5V RESET RESET TA = 25°C 5V VCC 4V 5V VCC = VRT TA = 25°C 5V RESET 0V 0V 00088-016 00088-018 0V 2μs/DIV 100ns/DIV Figure 10. RESET, RESET Assertion Figure 12. ADM705/ADM707 RESET Response Time 5V RESET RESET 5V VCC = VRT TA = 25°C 0V 0V 00088-017 100ns/DIV Figure 11. RESET, RESET Deassertion Rev. G | Page 7 of 12 ADM705/ADM706/ADM707/ADM708 CIRCUIT INFORMATION POWER-FAIL RESET OUTPUT RESET is an active low output that provides a reset signal to the microprocessor whenever the VCC input is below the reset threshold. An internal timer holds RESET low for 200 ms after the voltage on VCC rises above the threshold. This functions as a power-on reset signal for the microprocessor. It allows time for both the power supply and the microprocessor to stabilize after power-up. The RESET output is guaranteed to remain valid (low) with VCC as low as 1 V. This ensures that the microprocessor is held in a stable shutdown condition as the power supply voltage ramps up. In addition to RESET, an active high RESET output is also available on the ADM707/ADM708. This is the complement of RESET and is useful for processors requiring an active high reset signal. When VCC falls below the reset threshold, WDO is forced low whether or not the watchdog timer has timed out. Normally, this generates an interrupt, but it is overridden by RESET going low. The watchdog monitor can be deactivated by floating the watchdog input (WDI). The WDO can then be used as a low line output, because it goes low only when VCC falls below the reset threshold. tWP WDI tWD tWD tWD WDO tRS Figure 14. Watchdog Timing MANUAL RESET The manual reset input (MR) allows other reset sources, such as a manual reset switch, to generate a processor reset. The input is effectively debounced by the timeout period (200 ms typical). The MR input is TTL-/CMOS-compatible, so it can also be driven by any logic reset output. VCC VRT VRT POWER-FAIL COMPARATOR The power-fail comparator is an independent comparator that can be used to monitor the input power supply. The comparator’s inverting input is internally connected to a 1.25 V reference voltage. The noninverting input is available at the PFI input. This input can be used to monitor the input power supply via a resistive divider network. When the voltage on the PFI input drops below 1.25 V, the comparator output (PFO) goes low, indicating a power failure. For early warning of power failure, the comparator can be used to monitor the preregulator input simply by choosing an appropriate resistive divider network. The PFO output can be used to interrupt the processor so that a shutdown procedure is implemented before power is lost. 00088-007 tRS RESET tRS MR MR EXTERNALLY DRIVEN LOW WDO INPUT POWER R1 1.25V POWER-FAIL PFI INPUT PFO POWER-FAIL OUTPUT 00088-009 Figure 13. RESET, MR, and WDO Timing WATCHDOG TIMER (ADM705/ADM706) The watchdog timer circuit can be used to monitor the activity of the microprocessor to check that it is not stalled in an indefinite loop. An output line on the processor is used to toggle the watchdog input (WDI) line. If this line is not toggled within the timeout period (1.60 sec), then the watchdog output (WDO) goes low. The WDO can be connected to a nonmaskable interrupt (NMI) on the processor; therefore, if the watchdog timer times out, an interrupt is generated. The interrupt service routine should then be used to rectify the problem. If a RESET signal is required when a timeout occurs, the WDO should be connected to the manual reset input (MR). The watchdog timer is cleared by either a high-to-low or a lowto-high transition on WDI. It is also cleared by RESET going low; therefore, the watchdog timeout period begins after RESET goes high. R2 ADM705/ADM706/ ADM707/ADM708 Figure 15. Power-Fail Comparator Rev. G | Page 8 of 12 00088-008 RESET RESET EXTERNALLY TRIGGERED BY MR ADM705/ADM706/ADM707/ADM708 Adding Hysteresis to the Power-Fail Comparator For increased noise immunity, hysteresis can be added to the power-fail comparator. Because the comparator circuit is noninverting, hysteresis can be added simply by connecting a resistor between the PFO output and the PFI input, as shown in Figure 16. 7V TO 15V INPUT POWER R1 1.25V PFI R2 ADP3367 5V VALID RESET BELOW 1 V VCC The ADM705/ADM706/ADM707/ADM708 are guaranteed to provide a valid reset level with VCC as low as 1 V (see the Typical Performance Characteristics section). As VCC drops below 1 V, the internal transistor does not have sufficient drive to hold the voltage RESET at 0 V. A pull-down resistor can be connected externally, as shown in Figure 17, to hold the line low if required. ADM705/ADM706/ ADM707/ADM708 VCC – + PFO TO MICROPROCESSOR NMI RESET 00088-011 ADM705/ADM706/ ADM707/ADM708 R3 GND R1 Figure 17. RESET Valid Below 1 V 5V PFO 0V VL VIN VH Figure 16. Adding Hysteresis to the Power-Fail Comparator When PFO is low, Resistor R3 sinks current from the summing junction at the PFI pin. When PFO is high, Resistor R3 sources current into the PFI summing junction. This results in differing trip levels for the comparator. Further noise immunity can be achieved by connecting a capacitor between PFI and GND. The equations used to calculate the hysteresis are as follows: R2 + R3 ⎞ ⎤ ⎡ VH = 1.25⎢1 + ⎛ ⎜ ⎟R1⎥ ⎣ ⎝ R2 × R3 ⎠ ⎦ ⎛ 1.25 VCC − 1.25 ⎞ − VL = 1.25 + R1⎜ ⎟ R3 ⎝ R2 ⎠ R1 + R2 ⎞ V MID = 1.25⎛ ⎜ ⎟ ⎝ R2 ⎠ Rev. G | Page 9 of 12 00088-010 0V ADM705/ADM706/ADM707/ADM708 APPLICATIONS INFORMATION A typical application circuit is shown in Figure 18. The unregulated dc input supply is monitored using PFI via the resistive divider network. Resistor R1 and Resistor R2 should be selected so that when the supply voltage drops below the desired level (such as 8 V), the voltage on PFI drops below the 1.25 V threshold, thereby generating an interrupt to the microprocessor. Monitoring the preregulator input provides additional time to execute an orderly shutdown procedure before power is lost. 7V TO 15V INPUT POWER R1 1.25V PFI R2 ADP3367 5V MONITORING ADDITIONAL SUPPLY LEVELS It is possible to use the power-fail comparator to monitor a second supply as shown in Figure 20. The two sensing resistors, R1 and R2, are selected so that the voltage on PFI drops below 1.25 V at the minimum acceptable input supply. PFO can be connected to MR so that a reset is generated when the supply drops out of tolerance. In this case, if either supply drops out of tolerance, a reset is generated. VX 5V VCC VCC – + PFO RESET MICROPROCESSOR 00088-020 RESET R1 RESET MICROPROCESSOR ADM705/ ADM706 PFI MR GND PFO Figure 18. Typical Application Circuit Microprocessor activity is monitored using WDI. This is driven using an output line from the processor. The software routines should toggle this line at least once every 1.60 seconds. If a problem occurs and this line is not toggled, WDO goes low and a nonmaskable interrupt is generated. This interrupt routine can be used to clear the problem. If, in the event of inactivity on the WDI line, a system reset is required, WDO should be connected to MR, as shown in Figure 19. RESET RESET MICROPROCESSOR I/O LINE 00088-021 Figure 20. Monitoring 5 V and an Additional Supply, VX MICROPROCESSOR WITH BIDIRECTIONAL RESET To prevent contention for microprocessors with a bidirectional reset line, a current limiting resistor should be inserted between the ADM70x RESET output pin and the microprocessor RESET pin. This limits the current to a safe level if there are conflicting output reset levels. A suitable resistor value is 4.7 kΩ. If the reset output is required for other uses, it should be buffered, as shown in Figure 21. 5V BUFFERED RESET ADM705/ ADM706 WDI MR WDO GND VCC ADM70x RESET GND MICROPROCESSOR 00088-023 RESET GND Figure 19. RESET From WDO Figure 21. Bidirectional Input/Output RESET Rev. G | Page 10 of 12 00088-022 ADM705/ADM706/ ADM707/ADM708 R2 ADM705/ADM706/ADM707/ADM708 OUTLINE DIMENSIONS 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 8 1 5 4 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) PIN 1 0.100 (2.54) BSC 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 0.060 (1.52) MAX 0.015 (0.38) MIN 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) GAUGE PLANE SEATING PLANE 0.430 (10.92) MAX 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.005 (0.13) MIN COMPLIANT TO JEDEC STANDARDS MS-001-BA CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 22. 8-Lead Plastic Dual-in-Line Package [PDIP] Narrow Body (N-8) Dimensions shown in inches and (millimeters) 5.00 (0.1968) 4.80 (0.1890) 8 5 3.20 3.00 2.80 4.00 (0.1574) 3.80 (0.1497) 1 6.20 (0.2440) 3.20 3.00 2.80 8 5 4 5.80 (0.2284) 1 5.15 4.90 4.65 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 1.75 (0.0688) 1.35 (0.0532) 0.50 (0.0196) × 45° 0.25 (0.0099) 4 PIN 1 0.65 BSC 0.95 0.85 0.75 0.15 0.00 0.38 0.22 SEATING PLANE 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) 1.10 MAX 8° 0° 0.80 0.60 0.40 COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 0.23 0.08 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 23. 8-Lead Standard Small Outline Package [SOIC_N] (R-8) Dimensions shown in millimeters and (inches) Figure 24. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. G | Page 11 of 12 ADM705/ADM706/ADM707/ADM708 ORDERING GUIDE Model ADM705AN ADM705ANZ 1 ADM705AR ADM705AR–REEL ADM705AR–REEL7 ADM705ARZ1 ADM705ARZ–REEL1 ADM705ARZ–REEL71 ADM706AN ADM706ANZ1 ADM706AR ADM706AR-REEL ADM706AR-REEL7 ADM706ARZ1 ADM706ARZ-REEL1 ADM706ARZ-REEL71 ADM707AN ADM707ANZ1 ADM707AR ADM707AR-REEL ADM707ARZ1 ADM707ARZ-REEL1 ADM708AN ADM708ANZ1 ADM708AR ADM708AR-REEL ADM708ARZ1 ADM708ARZ-REEL1 ADM708ARM ADM708ARM-REEL ADM708ARMZ1 ADM708ARMZ-REEL1 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 8-Lead Plastic Dual-in-Line Package [PDIP] 8-Lead Plastic Dual-in-Line Package [PDIP] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Plastic Dual-in-Line Package [PDIP] 8-Lead Plastic Dual-in-Line Package [PDIP] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Plastic Dual-in-Line Package [PDIP] 8-Lead Plastic Dual-in-Line Package [PDIP] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Plastic Dual-in-Line Package [PDIP] 8-Lead Plastic Dual-in-Line Package [PDIP] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] Package Option N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8 N-8 N-8 R-8 R-8 R-8 R-8 R-8 R-8 N-8 N-8 R-8 R-8 R-8 R-8 N-8 N-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 Branding AD70, M8 AD70, M8 M8F M8F Z = RoHS Compliant Part. ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00088-0-3/08(G) Rev. G | Page 12 of 12