ADP5090-2-EVALZ

ADP5090-2-EVALZ User Guide UG-782 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluation Board for the ADP5090 Demonstration Platform for Energy Harvesting In addition, there is an on-board, low dropout (LDO) regulator that powers loads at lower voltage rails than the 3.5 V stored in the supercapacitor. The Alta Devices PV cell is a light harvesting gallium arsenide-based cell. The PV cell is optimized for indoor environments, where lux levels are typically 200 lux to 1000 lux. FEATURES Plug and play energy harvesting platform Compatible with Analog Devices, Inc., wireless sensor network (WSN) platform Solar panel harvester included RoHS compliant The ADP5090 is an ultra low power, synchronous, boost dc-to-dc regulator. The ADP5090 runs from input voltages of 0.38 V to 3.3 V and provides a high efficiency solution with an integrated power switch, synchronous rectifier, and battery management. The demo platform provides an easy way to evaluate the device. GENERAL DESCRIPTION The ADP5090 demonstration platform is a plug and play evaluation board (ADP5090-2-EVALZ) for energy harvesting. The demonstration platform includes the photovoltaic (PV) panel and all of the power management to enable devices to be powered using energy harvesting. It is based on the Alta Devices™ PV cell, or the IXYS™ Corporation PV cell, and the ADP5090 energy harvesting power management IC. Full details about the ADP5090 devices are available in the ADP5090 data sheet and must be consulted when using the ADP5090-2-EVALZ evaluation board. The demo platform system also plugs directly into the Analog Devices WSN demo platform. The ADP5090 demonstration platform converts light energy to electrical energy. The PV panel converts the light to 0.8 V electrical energy. The ADP5090 boosts the input voltage from 0.8 V to 3.5 V and stores the energy in a supercapacitor. This user guide describes how to set up the ADP5090-2EVALZ board and how to use it for powering loads. SYSTEM BLOCK DIAGRAM SOLAR PV PANEL ENERGY HARVESTING POWER MANAGEMENT OUTPUT CONNECTOR ENERGY STORAGE SUPERCAP BACKUP BATTERY Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. A | Page 1 of 9 12830-001 ADP5090 UG-782 ADP5090-2-EVALZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Power Management of the Output (LDO) .................................4 General Description ......................................................................... 1 J4 Output Connector ....................................................................5 System Block Diagram ..................................................................... 1 Evaluation Board Schematic and Artwork.....................................6 Revision History ............................................................................... 2 Bill Of Materials .................................................................................8 Demonstration Board Quick Start Guide ..................................... 3 Evaluation Board Hardware ............................................................ 4 REVISION HISTORY 9/2019—Rev. 0 to Rev. A Changes to General Description .................................................... 1 Changes to Demonstration Board Quick Start Guide Section, Figure 2, and Figure 3....................................................................... 3 Deleted Evaluation Board Layout Section..................................... 4 Changes to Power Management of the Output (LDO) Section and Table 1 ......................................................................................... 4 Changes to Figure 9 .......................................................................... 5 Changed Evaluation Board Schematic Section to Evaluation Board Schematic and Artwork Section ......................................... 6 Moved Evaluation Board Schematic and Artwork Section and Figure 10; Renumbered Sequentially ..............................................6 Changes to Figure 10.........................................................................6 Moved Figure 11 and Figure 12 .......................................................7 Changes to Figure 11.........................................................................7 Changes to Table 3.............................................................................8 1/2015—Revision 0: Initial Version Rev. A | Page 2 of 9 ADP5090-2-EVALZ User Guide UG-782 DEMONSTRATION BOARD QUICK START GUIDE This section explains how to connect the solar panel to the evaluation board and how to configure the evaluation board to start up and run. 2. 1. 3. 4. 12830-003 Connect the 10-pin connector on the solar panel to the J3 10-pin connector on the ADP5090-2-EVALZ as shown in Figure 2. Connect the J2_1 and J2_2, J2_9 and J2_10, and J2_11 and J2_12 jumper pairs together on the ADP5090-2-EVALZ board, as shown in Figure 3. Place the system in a bright environment. Monitor the voltage on the supercapacitor using the TP3 (BATT) and TP5 (GND) test points (see Figure 3). The output is available on J4_1 on the ADP5090-2-EVALZ board. 12830-002 Figure 3. Jumper Setup Figure 2. ADP5090-2-EVALZ Board Hardware Rev. A | Page 3 of 9 UG-782 ADP5090-2-EVALZ User Guide J2 EVALUATION BOARD HARDWARE Figure 6. Jumper Position on Demonstration Board for Setting 3 J2 A low dropout (ADP161) is included on the demo board (the ADP5090-2-EVALZ evaluation board). This regulator chooses different output voltages. Table 1 shows the jumper connections and the corresponding output voltage on the ADP5090-2EVALZ evaluation board. See the Evaluation Board Schematic and Artwork section for more details. Set the output of the demo board corresponding to each Table 1 setting as shown in Figure 4 to Figure 8. 12830-010 POWER MANAGEMENT OF THE OUTPUT (LDO) 12830-011 J2 Figure 7. Jumper Position on Demonstration Board for Setting 4 12830-008 J2 Figure 4. Jumper Position on Demonstration Board for Setting 1 12830-012 J2 12830-009 Figure 8. Jumper Position on Demonstration Board for Setting 5 Figure 5. Jumper Position on Demonstration Board for Setting 2 Table 1. Power Management of Sensor Nodes Setting 1 2 3 4 5 VOUT Pin (V) 3.5 V (LDO bypassed) 2V 2.4 V 3V 3.3 V Jumper Position J2_13 and J2_14 (see Figure 4) J2_1 and J2_2, J2_9 and J2_10, and J2_11 and J2_12 (see Figure 5) J2_1 and J2_2, J2_7 and J2_8, and J2_11 and J2_12 (see Figure 6) J2_1 and J2_2, J2_5 and J2_6, and J2_11 and J2_12 (see Figure 7) J2_1 and J2_2, J2_3 and J2_4, and J2_11 and J2_12 (see Figure 8) Rev. A | Page 4 of 9 ADP5090-2-EVALZ User Guide UG-782 J4 OUTPUT CONNECTOR The J4 output connector (see Figure 9) connects the demo board to the load. As well as providing power, the connector also has other interface connections that allow more interaction between the demo board and the host microcontroller unit (MCU) on the load. The connector is directly compatible with the Analog Devices WSN demo boards. Table 2 shows the pinout of the J4 output connector and provides a brief description of the pin functions. Table 2. J4 Output Connector Pin No. 1 Mnemonic VOUT 2 3 4 5 PGOOD GND DIS_SW BATT 6 7 8 EN BACK_UP NC BACK_UP A detailed description of each J4 output connector pin is as follows: • • • Description Output voltage supply from the demo board to the load PGOOD output signal from the ADP5090 Ground DIS_SW input signal to the ADP5090 Supercapacitor voltage (for battery monitoring) Enable LDO Backup voltage (for battery monitoring) No connect • • BATT • R17 NC 1 3 5 7 OUTPUT R20 NC R22 1M J4 2 4 6 8 PGOOD DIS_SW R19 0 R23 NC R21 NC • EN 12830-013 R16 NC Figure 9. J4 Output Connector • Rev. A | Page 5 of 9 The VOUT pin (Pin 1) is the output voltage that the demo board delivers to the load. The ADP5090 has a programmable PGOOD signal. When the PGOOD threshold is reached, the ADP5090 sets the PGOOD pin (Pin 2) high. The pin is connected to the host MCU GPIO input. See the ADP5090 data sheet for more information on this function. The GND pin (Pin 3) is the ground connection for the ADP5090. Connect the DIS_SW pin (Pin 4) to the host MCU GPIO output. If the host MCU requires the ADP5090 to temporarily halt the switching regulator function, set this pin high. See the ADP5090 data sheet for more detailed information on this function. Connect the BATT pin (Pin 5) to the analog input of the host MCU to monitor the voltage on the supercapacitor of the ADP5090 demo board (ADP5090-2-EVALZ). Populating Resistor R17 and Resistor R21 creates a resistor divider for cases where the MCU analog input range is lower than the supercapacitor voltage. The EN pin (Pin 6) is the enable control signal for the ADP161 LDO regulator on the ADP5090 demo board (ADP5090-2-EVALZ). Connect this pin to the host MCU GPIO output to enable or disable the ADP161. Connect the BACK_UP pin (Pin 7) to the analog input of the host MCU to monitor the voltage on the supercapacitor of the ADP5090 demo board (ADP5090-2-EVALZ). Populating Resistor R16 and Resistor R20 creates a resistor divider for cases where the MCU analog input range is lower than the supercapacitor voltage. The NC pin (Pin 8) is the no connect pin. Do not use this pin. UG-782 ADP5090-2-EVALZ User Guide EVALUATION BOARD SCHEMATIC AND ARTWORK J1 2 1 TP1 PGOOD DIS_SW J2 SW R3 1.4M R8 4.7 BATT R9 3.3k U2 ADP161 B_CHRG 1 9 1 VIN 2 L1 22uH R4 1.02M 2 C4 C3 SUPERCAP TP4 VOUT VOUT C5 GND 3 EN ADJ EN 4 R14 1M 1 BACK_UP C6 10nF 5 1uF/10V 5 10 TP3 BATT 1 MINOP TP2 BAT 11 R1 2M 4.7uF/10V B1 12 PGND BAT C2 0.1uF 1 14 13 PGOOD DIS_SW 15 SETPG SYS AGND C1 BACK_UP 1uF/10V R13 20k BACK_UP TERM VIN 4 U1 ADP5090 R2 2.32M 2 4 6 8 10 12 14 1 3 5 7 9 11 13 VOUT 8 R12 4.7M 7 R11 4.99M CBP 3 BATT J3 1 TP6 GND R18 18M C8 B_CHRG 4.7uF/10V 0.1uF TP5 GND C7 1 2 3 4 5 6 7 8 9 10 R16 NC Figure 10. ADP5090-2-EVALZ Evaluation Board R20 NC R21 NC R22 1M J4 1 3 5 7 2 4 6 8 OUTPUT INPUT Rev. A | Page 6 of 9 R17 NC PGOOD R23 NC DIS_SW R19 0 EN 12830-004 R15 4.7M 1 R10 4.02M MPPT 2 SETSD 6 1 REF 17 R7 4.7M 16 R6 4.99M EXP R5 5.9M PGOOD 1 DIS_SW UG-782 12830-005 ADP5090-2-EVALZ User Guide 12830-006 Figure 11. ADP5090-2-EVALZ Evaluation Board Top Assembly Figure 12. ADP5090-2-EVALZ Evaluation Board Bottom Assembly Rev. A | Page 7 of 9 UG-782 ADP5090-2-EVALZ User Guide BILL OF MATERIALS Table 3. Bill of Materials Quantity 1 2 2 1 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 3 1 1 1 1 2 5 1 1 1 1 1 1 2 1 1 Reference B1 C1, C7 C2, C8 C3 C4, C5 C6 J1 J2 J3 J4 J5 J6 J7 J8 J9 L1 R1 R2 R3 R4 R5 R6, R11 R7, R12, R15 R8 R9 R10 R13 R14, R22 R16, R17, R20, R21, R23 R18 R19 TP1 TP2 TP3 TP4 TP5, TP6 U1 U2 Description CR2032 holder 0.1 µF capacitors, C0603 4.7 µF, 10 V capacitors, C0603 Supercapacitor, 12 × 12 1 µF,10 V capacitors, C0603 10 nF capacitor, C0603 DIS_SW jumper, SIP2 VOUT jumper, SIP14_dual INPUT jumper, SIP10_BtoB OUTPUT jumper, SIP8_2rows INPUT1 jumper, PV_INPUT GND jumper, SIP3 OUTPUT jumper, SIP10 VIN jumper, SIP3 INPUT2 jumper, PV_INPUT 22 µH inductor, 3 × 3 2 MΩ resistor, R0603 2.32 MΩ resistor, R0603 1.4 MΩ resistor, R0603 1.02 MΩ resistor, R0603 5.9 MΩ resistor, R0603 4.99 MΩ resistors, R0603 4.7 MΩ resistors, R0603 4.7 Ω resistor, R0805 3.3 kΩ resistor, R0603 4.02 MΩ resistor, R0603 20 kΩ resistor, R0603 1 MΩ resistors, R0603 NC (no connect) resistors, R0603 18 MΩ resistor, R0603 0 Ω resistor, R0603 PGOOD test point, SIP1 BAT test point, SIP1 BATT test point, SIP1 VOUT test points, SIP1 GND test points, SIP1 ADP5090 16-lead LFCSP ADP161 5-lead SOT-23 Rev. A | Page 8 of 9 Part Number BC2032-F1 GRM188R71H104KA93 GRM21BR61A475KA73 PB-5R0H104-R GRM185R61A105KE36 GRM188R71H103KA01 61304011121 61001421121 61301011021 61300821021 Not applicable 61304011121 613010143121 61304011121 Not Applicable EPL3015-223ML, 744025220 CRCW06032M00FKEA CRCW06032M320FKEA CRCW06031M40FKEA CRCW06031M02FKEA CRCW06035M90FKEA CRCW06034M99FKEA CRCW06034M70FKEA CRCW08054R70JNEAIF CRCW06033K3FKEA CRCW06034M02FKEA CRCW060320K0FKEA CRCW06031M00FKEA Not Applicable RK73B1JTTD186J CRCW06030000FKEA 61304011121 61304011121 61304011121 61304011121 61304011121 ADP5090ACPZ-1-R7 ADP161AUJZ-R7 Vendor Memory Protection Devices Murata Murata Cooper Bussmann Murata Murata Würth Elektronik Würth Elektronik Würth Elektronik Würth Elektronik Alta Devices Würth Elektronik Würth Elektronik Würth Elektronik Alta Devices Coilcraft®, Würth Elektronik Vishay Dale Vishay Dale Vishay Dale Vishay Dale Vishay Dale Vishay Dale Vishay Dale Vishay Dale Vishay Dale Vishay Dale Vishay Dale Vishay Dale Not Applicable KOA Vishay Dale Würth Elektronik Würth Elektronik Würth Elektronik Würth Elektronik Würth Elektronik Analog Devices Analog Devices ADP5090-2-EVALZ User Guide UG-782 NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. 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Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2015–2019 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG12830-0-9/19(A) Rev. A | Page 9 of 9