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ADP8870DBCB-EVALZ

ADP8870DBCB-EVALZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    -

  • 描述:

    BOARD DAUGHTER ADP8870 WLCSP

  • 数据手册
  • 价格&库存
ADP8870DBCB-EVALZ 数据手册
Charge-Pump, Parallel Backlight Driver with Image Content PWM Input ADP8870 Data Sheet FEATURES APPLICATIONS Charge pump with automatic gain selection of 1×, 1.5×, and 2× for maximum efficiency Two high accuracy (±5%) phototransistor inputs for automated ambient light sensing (ALS) 5 programmable ambient light-sensing zones for optimal backlight power savings Independent ALS control of D7, for automated response of keypad lighting to ambient light levels PWM input can be used for content adaptive brightness control (CABC) of any, or all, of the LEDs PWM input scales the LED output current 7 independent, programmable LED drivers 6 drivers capable of 30 mA (maximum) 1 driver capable of 60 mA (maximum) Programmable maximum current limit (128 levels) Standby mode for 2 kHz TSD TSD(HYS) IOUTLKG Max 5.5 0.5 VIN = 2.5 V VIN = 5.5 V fPWM(MAX) tPWM(MIN) Min fSCL tHIGH tLOW 0.6 1.3 kHz μs μs tSU, DAT tSU, STA tSU, STO 100 0.6 0.6 ns μs μs Rev. C | Page 4 of 57 Data Sheet ADP8870 Parameter Hold Time Data Start/Repeated Start Bus-Free Time (Stop and Start Conditions) Rise Time (SCL and SDA) Fall Time (SCL and SDA) Pulse Width of Suppressed Spike Capacitive Load Per Bus Line Symbol Test Conditions/Comments Min Typ Max Unit tHD, DAT tHD, STA tBUF 0 0.6 1.3 0.9 μs μs μs tR tF tSP 20 + 0.1 CB 20 + 0.1 CB 0 300 300 50 ns ns ns 400 pF CB 1 Matching is calculated by dividing the difference between the maximum and minimum current from the sum of the maximum and minimum. VIL is a function of the VIN voltage. See Figure 19 in the Typical Performance Characteristics section for typical values over operating ranges. 3 VIH is a function of the VIN voltage. See Figure 19 in the Typical Performance Characteristics section for typical values over operating ranges. 2 Timing Diagram SDA tLOW tR tF tSU, DAT tF tHD, STA tSP tBUF tR SCL S tHD, DAT tHIGH tSU, STA Sr P S 08829-002 S = START CONDITION Sr = REPEATED START CONDITION P = STOP CONDITION tSU, STO Figure 2. I2C Interface Timing Diagram Rev. C | Page 5 of 57 ADP8870 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter VIN, VOUT to GND D1, D2, D3, D4, D5, D6, and D7 to GND CMP_IN to GND nINT, nRST, SCL, and SDA to GND Output Short-Circuit Duration Operating Ambient Temperature Range1 Operating Junction Temperature Range1 Storage Temperature Range Soldering Conditions ESD (Electrostatic Discharge) Human Body Model (HBM) Charged Device Model (CDM) 1 Rating −0.3 V to +6 V −0.3 V to +6 V −0.3 V to +6 V −0.3 V to +6 V Indefinite −40°C to +85°C −40°C to +125°C −65°C to +150°C JEDEC J-STD-020 ±2.0 kV ±1.5 kV θJA (junction to air) is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. The θJA, θJB (junction to board), and θJC (junction to case) are determined according to JESD51-9 on a 4-layer printed circuit board (PCB) with natural convection cooling. For the LFCSP package, the exposed pad must be soldered to GND. Table 3. Thermal Resistance1 Package Type WLCSP LFCSP 1 N/A means not applicable. ESD CAUTION The maximum operating junction temperature (TJ(MAX)) supersedes the maximum operating ambient temperature (TA(MAX)). See the Maximum Temperature Ranges section for more information. θJA 48 49.5 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all voltages are referenced to GND. MAXIMUM TEMPERATURE RANGES The maximum operating junction temperature (TJ(MAX)) supersedes the maximum operating ambient temperature (TA(MAX)). Therefore, in situations where the ADP8870 is exposed to poor thermal resistance and a high power dissipation (PD), the maximum ambient temperature may need to be derated. In these cases, the ambient temperature maximum can be calculated with the following equation: TA(MAX) = TJ(MAX) − (θJA × PD(MAX)). Rev. C | Page 6 of 57 θJB 9 N/A θJC N/A 5.3 Unit °C/W °C/W Data Sheet ADP8870 17 D6 BALL A1 INDICATOR 16 D7 18 CMP_IN 19 D5 20 D4 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 1 2 3 4 C1+ VOUT VIN GND C2+ C2– D7 D6 C1– SDA CMP_IN D5 PWM nINT D1 D4 nRST SCL D2 D3 A D3 1 15 GND D2 2 14 VIN ADP8870 D1 3 13 VOUT TOP VIEW (Not to Scale) SCL 4 B C 12 C2+ nRST 5 11 C1+ C2– 10 08829-003 NOTES 1. CONNECT THE EXPOSED PADDLE TO GND. E TOP VIEW (BALL SIDE DOWN) Not to Scale Figure 3. LFCSP Pin Configuration 08829-004 C1– 9 PWM 8 SDA 7 nINT 6 D Figure 4. WLCSP Pin Configuration Table 4. Pin Function Descriptions Pin No. LFCSP WLCSP 14 A3 3 D3 2 E3 1 E4 20 D4 19 C4 17 B4 Mnemonic VIN D1 D2 D3 D4 D5 D6 16 18 B3 C3 D7 CMP_IN 13 11 9 12 10 15 8 6 A2 A1 C1 B1 B2 A4 D1 D2 VOUT C1+ C1− C2+ C2− GND PWM nINT 5 E1 nRST 7 4 EP C2 E2 SDA SCL EP Description Input Voltage (2.5 V to 5.5 V). LED Sink 1. LED Sink 2. LED Sink 3. LED Sink 4. LED Sink 5. LED Sink 6 and optional comparator input for second phototransistor. When this pin is used as a second phototransistor input, a capacitor (0.1 μF recommended) must be connected from this pin to ground. LED Sink 7. Comparator Input for Phototransistor. When this pin is used, a capacitor (0.1 μF recommended) must be connected from this pin to ground. Charge-Pump Output. Charge-Pump C1+. Charge-Pump C1−. Charge-Pump C2+. Charge-Pump C2−. Ground. PWM Input for LED Dimming. Processor Interrupt (Active Low). Requires an external pull-up resistor. If this pin is not used, it can be left floating. Hardware Reset (Active Low). This bit resets the device to the default conditions. If this pin is not used, it must be tied above VIH(MAX). I2C Serial Data. Requires an external pull-up resistor. I2C Clock. Requires an external pull-up resistor. Exposed Paddle. The exposed paddle must be connected to GND. Rev. C | Page 7 of 57 ADP8870 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.6 V, SCL = 2.7 V, SDA = 2.7 V, nRST = 2.7 V, VD1:D7 = 0.4 V, CIN = 1 μF, C1 = 1 μF, C2 = 1 μF, COUT = 1 μF, TA= 25°C, unless otherwise noted. 1.6 100 IOUT = 0mA SCL = SDA = 0V 1.4 10 1.2 1 IQ (µA) 0.8 0.1 +25°C –40°C +85°C +105°C 0.2 0 2.5 3.0 3.5 4.0 VIN (V) 4.5 5.0 +25°C –40°C +85°C +105°C 0.01 5.5 0.001 2.5 08829-034 0.4 3.0 Figure 5. Typical Operating Current, G = 1× 4.0 VIN (V) 4.5 5.0 5.5 Figure 8. Typical Standby IQ 5.0 35 IOUT = 0mA 34 4.0 VD1:D7 = 0.4V LED CURRENT (mA) 33 IQ (mA) 3.0 2.0 +25°C –40°C +85°C +105°C 3.0 3.5 4.0 VIN (V) 4.5 5.0 32 31 30 29 28 +25°C –40°C +85°C +105°C 27 26 5.5 25 2.5 08829-035 1.0 0 2.5 3.5 08829-037 0.6 3.0 Figure 6. Typical Operating Current, G = 1.5× 3.5 4.0 VIN (V) 4.5 5.0 5.5 08829-038 IQ (mA) 1.0 Figure 9. Typical Diode Current vs. VIN 5.0 5.0 IOUT = 0mA ID1:D7 = 30mA +25°C –40°C +85°C +105°C 4.5 4.0 4.0 MATCHING (%) 3.5 IQ (mA) 3.0 2.0 3.5 4.0 VIN (V) 4.5 5.0 Figure 7. Typical Operating Current, G = 2× 0.5 5.5 0 0.2 0.4 0.6 0.8 1.0 1.2 VHR (V) 1.4 1.6 1.8 2.0 08829-039 3.0 2.0 1.0 08829-036 0 2.5 2.5 1.5 +25°C –40°C +85°C +105°C 1.0 3.0 Figure 10. Typical Diode Matching vs. Current Sink Headroom Voltage (VHR) Rev. C | Page 8 of 57 Data Sheet ADP8870 35 30 32kHz 200Hz 5kHz 60kHz IOUT SET TO 30mA (CODE 0x7F) 30 25 25 ILED (mA) IOUT SET TO 18.23mA (CODE 0x63) +25°C –40°C +85°C +105°C +25°C –40°C +85°C +105°C 15 10 5 0 0 0.2 0.4 0.6 0.8 1.0 1.2 VHR (V) 1.4 1.6 1.8 15 10 5 2.0 0 0 Figure 11. Typical Diode Current vs. Current Sink Headroom Voltage (VHR) 20 40 60 DUTY CYCLE (%) 80 100 08829-043 20 08829-040 IOUT (mA) 20 Figure 14. PWM Current Scaling Across PWM Frequency 2.0 1.0 VD1:D7 = 0.4V 0.9 1.5 IOUT = 100mA 0.8 0.7 0.5 ROUT (1×) (Ω) 0 –0.5 0.6 0.5 0.4 0.3 –1.0 –1.5 0.1 –20 0 20 40 60 TEMPERATURE (°C) 80 100 0 2.5 08829-041 –2.0 –40 3.5 4.0 4.5 5.0 VIN (V) Figure 15. Typical ROUT (G = 1×) vs. VIN Figure 12. Typical Change In Diode Current vs. Temperature 6 30 IOUT = 100mA +25°C –40°C +85°C +105°C 25 5 ROUT (1.5×) (Ω) 20 15 4 3 10 2 5 1 0 0 20 40 60 DUTY CYCLE (%) 80 100 0 2.5 08829-042 ILED (mA) 3.0 08829-044 +25°C –40°C +85°C +105°C 0.2 +25°C –40°C +85°C +105°C 2.6 2.7 2.8 2.9 VIN (V) 3.0 Figure 16. Typical ROUT (G = 1.5×) vs. VIN Figure 13. PWM Current Scaling Across Temperature Rev. C | Page 9 of 57 3.1 3.2 08829-045 IOUT DEVIATION (%) 1.0 ADP8870 Data Sheet 1.20 6 IOUT = 100mA IOUT = 100mA 1.18 5 1.16 1.14 IALS (mA) 3 2 1.12 1.10 1.08 1.06 +25°C –40°C +85°C +105°C 0 2.20 2.25 2.30 2.35 2.40 2.45 2.50 VIN (V) 2.55 2.60 2.65 +25°C –40°C +85°C +105°C 1.04 1.02 2.70 1.00 2.5 08829-046 1 Figure 17. Typical ROUT (G = 2×) vs. VIN 3.0 3.5 4.0 VIN (V) 4.5 5.0 5.5 08829-049 ROUT (2×) (Ω) 4 Figure 20. Typical ALS Current (IALS) 20 90 VOUT = 80% OF VIN 18 80 16 70 EFFICIENCY (%) 12 10 8 6 +25°C –40°C +85°C +105°C 2 0 2.5 3.0 3.5 4.0 VIN (V) 4.5 5.0 50 40 VF = 4.1V VF = 3.5V VF = 3.2V 30 20 10 5.5 0 2.5 08829-047 4 60 Figure 18. Typical Output Soft Start Current (ISS) 3.0 3.5 4.0 VIN (V) 4.5 5.0 5.5 08829-050 ISS (mA) 14 Figure 21. Typical Efficiency (Seven LEDs, 30 mA per LED) 1.4 90 1.2 80 70 EFFICIENCY (%) 0.8 VIL, +25°C VIH, +25°C VIL, –40°C VIH,–40°C VIL,+85°C VIH,+85°C VIL,+105°C VIH,+105°C 0.4 0.2 0 2.5 3.0 3.5 4.0 VIN (V) 4.5 5.0 60 50 40 30 VF = 3.6V VF = 3.2V 20 10 5.5 0 2.5 Figure 19. Typical I2C Thresholds (VIH and VIL) 3.0 3.5 4.0 VIN (V) 4.5 5.0 Figure 22. Typical Efficiency (Seven LEDs, 18 mA per LED) Rev. C | Page 10 of 57 5.5 08829-051 0.6 08829-048 THRESHOLD (V) 1.0 Data Sheet ADP8870 T CIN = 1µF, COUT = 1µF, C1 = 1µF, C2 = 1µF VIN = 3.6V IOUT = 120mA T CIN = 1µF, COUT = 1µF, C1 = 1µF, C2 = 1µF VIN = 2.5V IOUT = 120mA VIN (AC-COUPLED) 50mV/DIV 1 1 VOUT (AC-COUPLED) 50mV/DIV VIN (AC-COUPLED) 50mV/DIV VOUT (AC-COUPLED) 50mV/DIV 2 2 IIN (AC-COUPLED) 10mA/DIV IIN (AC-COUPLED) 10mA/DIV 3 08829-054 1µs/DIV 08829-052 3 1µs/DIV Figure 25. Typical Operating Waveforms, G = 2× Figure 23. Typical Operating Waveforms, G = 1× T CIN = 10µF, COUT = 1µF, C1 = 1µF, C2 = 1µF VIN = 3.6V VOUT (1V/DIV) T CIN = 1µF, COUT = 1µF, C1 = 1µF, C2 = 1µF VIN = 3.0V IOUT = 120mA 1 VIN (AC-COUPLED) 50mV/DIV VOUT (AC-COUPLED) 50mV/DIV 2 IIN (10mA/DIV) 2 IOUT (10mA/DIV) IIN (AC-COUPLED) 10mA/DIV 08829-053 1µs/DIV 100µs/DIV Figure 26. Typical Start-Up Waveforms Figure 24. Typical Operating Waveforms, G = 1.5× Rev. C | Page 11 of 57 08829-055 3 4 3 ADP8870 Data Sheet THEORY OF OPERATION The ADP8870 combines a programmable backlight LED chargepump driver with automatic phototransistor brightness control (LED current) and a PWM input to control the scale of the output current. This combination allows significant power savings because it automatically changes the current intensity based on the sensed ambient lighting levels and the display image content. It performs this function automatically and, therefore, removes the need for a processor to monitor the phototransistor. The light intensity thresholds are fully programmable via the I2C interface. A second phototransistor input, with dedicated comparators, improves the ambient light detection abilities for various operating conditions. The ADP8870 allows up to seven LEDs to be independently driven up to 30 mA (typical). The seventh LED can be driven an additional 30 mA, for a maximum of up to 60 mA (typical). All LEDs can be individually programmed or combined into a group to operate backlight LEDs. A full suite of safety features, including short-circuit, overvoltage, and overtemperature protection with input-to-output isolation, allow for a robust and safe design. The integrated soft start limits inrush currents at startup, restart attempts, and gain transitions. VDD_ALS OPTIONAL PHOTOSENSOR D1 ID1 D2 ID2 D3 ID3 D4 ID4 D5 ID5 D6 ID6 D7 CMP_IN GAIN SELECT LOGIC ID7 VIN CIN VBAT VIN VIN CHARGEPUMP LOGIC VREF VOUT IREF COUT EN STNDBY CLK NOISE FILTER nRST ISS SOFT START UVLO VDDIO VIN PHOTOSENSOR CONVERSION C1+ 50µs RESET LIGHT SENSOR LOGIC CHARGE PUMP (1×, 1.5×, 2×) STNDBY C1 1µF C1– C2+ C2 1µF SCL I2C LOGIC C2– SDA LED OUTPUT CURRENT nINT PWM FILTER SCALE ID1 ID2 ID3 ID4 ID5 ID6 ID7 PWM Figure 27. Detailed Block Diagram Rev. C | Page 12 of 57 GND 08829-005 ILED CONTROL Data Sheet ADP8870 POWER STAGE the capacitors are charged from VIN in series and are discharged to VOUT in parallel. For G = 2×, the capacitors are charged from VIN in parallel and are discharged to VOUT in parallel. In certain fault modes, the switches are opened and the output is physically isolated from the input. Because typical white LEDs require up to 4 V to drive them, some form of boosting is required over the typical variation in battery voltage. The ADP8870 accomplishes this with a high efficiency charge pump capable of producing a maximum IOUT of 240 mA over the entire input voltage range (2.5 V to 5.5 V). Charge pumps use the basic principle that a capacitor stores charge based on the voltage applied to it, as shown in the following equation: Q=C×V Automatic Gain Selection Each LED that is driven requires a current source. The voltage on this current source must be greater than a minimum headroom voltage (225 mV typical) to maintain accurate current regulation. The gain is automatically selected based on the minimum voltage (VDx) at all of the current sources. At startup, the device is placed into G = 1× mode and the output charges to VIN. If any VDx level is less than the required headroom (200 mV), then the gain is increased to the next step (G = 1.5 ×). A 100 μs delay is allowed for the output to stabilize prior to the next gain switching decision. If there remains insufficient current sink headroom, then the gain is increased again to 2×. Conversely, to optimize efficiency, it is not desirable for the output voltage to be too high. Therefore, the gain reduces when the headroom voltage is great enough. This point (labeled VD(MAX) in Figure 28) is internally calculated to ensure that the lower gain still results in ample headroom for all the current sinks. The entire cycle is illustrated in Figure 28. (1) By charging the capacitors in different configurations, the charge, and hence the gain, can be optimized to deliver the voltage required to power the LEDs. Because a fixed charging and discharging combination must be used, only certain multiples of gain are available. The ADP8870 is capable of automatically optimizing the gain (G) from 1×, 1.5×, and 2×. These gains are accomplished with two capacitors and an internal switching network. In G = 1× mode, the switches are configured to pass VIN directly to VOUT. In this mode, several switches are connected in parallel to minimize the resistive drop from input to output. In G = 1.5× and G = 2× modes, the switches alternatively charge from the battery and discharge into the output. For G = 1.5×, EXIT STBY STBY START-UP: CHARGE VIN TO VOUT 0 1 EXIT STARTUP VOU T > VOUT(START) 0 WAIT 100µs (TYP) G=1 VD1:D7(MIN) < VHR(UP) 1 G = 1.5 1 WAIT 100µs (TYP) VD1:D7(MIN) < VHR(UP) 0 0 VD1:D7(MIN) > VD(MAX) 1 0 1 WAIT 100µs (TYP) VD1:D7(MIN) < VD(MAX) NOTES 1. VD(MAX) IS THE CALCULATED TRANSITION POINT AT WHICH GAIN IS REDUCED. Figure 28. State Diagram for Automatic Gain Selection Rev. C | Page 13 of 57 08829-006 G=2 ADP8870 Data Sheet low for more than 100 μs (maximum). When standby is exited, a soft start sequence is performed. Note that the gain selection criteria apply only to active current sources. If a current source has been deactivated through an I2C command (that is, if only five LEDs are used for an application), the voltages on these current sources are ignored. Shutdown Mode Shutdown mode disables all circuitry, including the I2C receivers. Shutdown occurs when VIN is below the undervoltage thresholds. When VIN rises above VIN(START) (2.02 V typical), all registers are reset and the part is placed into standby mode. Soft Start Feature At startup (either from UVLO activation or fault/standby recovery), the output is first charged by ISS (7.0 mA typical) until it reaches about 92% of VIN. This soft start feature reduces the inrush current that is otherwise present when the output capacitance is initially charged to VIN. When this point is reached, the controller enters 1× mode. If the output voltage is not sufficient, then the automatic gain selection determines the optimal point as described in the Automatic Gain Selection section. Reset Mode In reset mode, all registers are set to their default values and the part is placed into standby. There are two ways to reset the part: power-on reset (POR) and the nRST pin. POR is activated anytime that the part exits shutdown mode. After a POR sequence is complete, the part automatically enters standby mode. OPERATING MODES After startup, the part can be reset by pulling the nRST pin low. As long as the nRST pin is low, the part is held in a standby state but no I2C commands are acknowledged (all registers are kept at their default values). After releasing the nRST pin, all registers remain at their default values, and the part remains in standby; however, the part does accept I2C commands. There are four different operating modes: active, standby, shutdown, and reset. Active Mode In active mode, all circuits are powered up and in a fully operational state. This mode is entered when nSTBY (in Register MDCR) is set to 1. The nRST pin has a 50 μs (typical) noise filter to prevent inadvertent activation of the reset function. The nRST pin must be held low for this entire time to activate a reset. Standby Mode Standby mode disables all circuitry except the I2C receivers. Current consumption is reduced to less than 1 μA. This mode is entered when nSTBY is set to 0 or when the nRST pin is held The operating modes function according to the timing shown in Figure 29. SHUTDOWN VIN nRST MUST BE HIGH FOR 20µs (MAXIMUM) BEFORE SENDING I2C COMMANDS VIN CROSSES ~2.05V AND TRIGGERS A POWER-ON RESET ~100µs DELAY BETWEEN POWER-UP AND WHEN I 2 C COMMANDS CAN BE RECEIVED nSTBY BIT nSTBY IN REGISTER MDCR IS SET HIGH BY THE USER nRST IS LOW, WHICH FORCES nSTBY LOW AND RESETS ALL I 2 C REGISTERS 25µs TO 100µs NOISE FILTER nRST VIN ~9.5mA CHARGES VOUT TO VIN LEVEL SOFT START 1.5× 2× 1× GAIN CHANGES ONLY OCCUR WHEN NECESSARY, BUT HAVE A MINIMUM TIME BEFORE CHANGING 10µs 100µs Figure 29. Typical Timing Diagram Rev. C | Page 14 of 57 SOFT START 08829-007 VOUT Data Sheet ADP8870 IMAGE CONTENT CONTROL LIGHT SENSOR Modern LCD display drivers often output the white intensity of the displayed image in the form of a PWM signal. When the white content of the displayed image is very small, the LCD driver generates a PWM duty cycle that is large. The ADP8870 takes advantage of this feature by incorporating a PWM input pin that scales the backlight intensity. When the PWM signal is at 100% duty cycle, the backlight current functions at its programmed value. However, when the PWM duty cycle drops, the ADP8870 automatically scales the output LED current down. PWM IMAGE CONTENT ON/OFF DIMMING CONTROL MAX CURRENT BIAS DAC I2C BOOST 1µF 100% LCD DISPLAY 08829-009 ILED PWM DUTY 100% 08829-008 IMAGE CONTENT Figure 31. Functional Overview of the PWM Image Content Control, Ambient Light Sensor, and Charge Pump LED CURRENT IMAGE CONTENT Figure 30. Output Current Response to PWM Input Duty Cycle DIMMING PROFILE FADE-OUT FADE-IN OUTDOOR OFFICE DARK SENSOR TRIP POINT OFFICE 08829-010 The LEDs that respond to the PWM input can be selected in the PWMLED register (Register 0x06). This image content works naturally with the automatic ambient light sensing and the three gains of the charge pump (see Figure 31). Figure 32. Example LED Output Current with the Effects of the Image Content PWM and Ambient Light Sensing Rev. C | Page 15 of 57 ADP8870 Data Sheet BACKLIGHT OPERATING LEVELS registers previously listed in the Image Content Control section. The 7-bit resolution allows the user to set the backlight to one of 128 different levels between 0 mA and 30 mA. The ADP8870 implements a square law algorithm to achieve a nonlinear relationship between input code and backlight current. The backlight current (in milliamperes) is determined by the following equation: Backlight brightness control can operate in five distinct levels: daylight (Level 1), bright (Level 2), office (Level 3), indoor (Level 4), and dark (Level 5). The BLV bits in Register 0x04 control the specific level in which the backlight operates. These bits can be changed manually, or if in automatic mode (that is, when CMP_AUTOEN is set high in Register 0x01), by the ambient light sensor (see the D7 Ambient Light-Sensing Control section).  Full − Scale Current Backlight Current (mA) =  Code ×  127  By default, the backlight operates at daylight level (BLV = 000), where the maximum brightness is set using Register 0x0A (BLMX1). A daylight dim setting can also be set using Register 0x0B (BLDM1). Similarly, when operating at the bright, office, indoor, or dark level, the corresponding register is used (Register 0x0C to Register 0x13). Figure 34 shows the backlight current level vs. input code. The backlight maximum and dim current settings are determined by a 7-bit code programmed by the user into the BRIGHT (LEVEL 2) INDOOR (LEVEL 4) OFFICE (LEVEL 3) DARK (LEVEL 5) BACKLIGHT CURRENT DAYLIGHT MAX BRIGHT MAX OFFICE MAX INDOOR MAX DARK MAX DAYLIGHT DIM BRIGHT DIM OFFICE DIM INDOOR DIM 08829-011 DARK DIM 0 BACKLIGHT OPERATING LEVELS Figure 33. Backlight Operating Level 30 20 15 10 5 0 32 64 SINK CODE 96 Figure 34. Backlight Current vs. Sink Code Rev. C | Page 16 of 57 128 08829-012 BACKLIGHT CURRENT (mA) 25 0 2 where: Code is the input code programmed by the user. Full-Scale Current is the maximum sink current allowed per LED (typically 30 mA). BACKLIGHT MAXIMUM AND DIM SETTINGS 30mA DAYLIGHT (LEVEL 1)     (2) Data Sheet ADP8870 AUTOMATED FADE-IN AND FADE-OUT BACKLIGHT TURN ON/TURN OFF/DIM The LED drivers are easily configured for automated fade-in and fade-out. Sixteen fade-in and fade-out rates can be selected via the I2C interface. Fade-in and fade-out rates range from 0.1 sec to 5.5 sec (per full-scale current, either 30 mA or 60 mA). The BLOFF_INT bit (Register 0x02) can be used to flag the interrupt pin when an automated backlight fade-out occurs (see the Interrupts section). With the device in active mode (nSTBY = 1), the backlight can be turned on using the BL_EN bit in Register 0x01. Before turning on the backlight, the user chooses which level (daylight, bright, office, indoor, or dark) in which to operate and ensures that maximum and dim settings are programmed for that level. The backlight turns on when BL_EN = 1. The backlight turns off when BL_EN = 0. BACKLIGHT CURRENT Table 5. Available Fade-In and Fade-Out Times Fade Rate (sec) 0.1 (disabled) 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.5 4.0 4.5 5.0 5.5 MAXIMUM BL_EN = 1 08829-014 Code 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 BL_EN = 0 Figure 36. Backlight Turn On/Turn Off While the backlight is on (BL_EN = 1), the user can make it change to a dim setting by programming DIM_EN = 1 in Register 0x01. If DIM_EN = 0, then the backlight reverts to its maximum setting. BACKLIGHT CURRENT The fade profile is based on the transfer law selected (square, Cubic 10, or Cubic 11) and the delta between the actual current and the target current. Smaller changes in current reduce the fade time. For square law fades, the fade time is given by MAXIMUM (3) Fade Time = Fade Rate × (Code/127) DIM The Cubic 10 and Cubic 11 laws also use the square backlight currents in Equation 3; however, the time between each step is varied to produce a steeper slope at higher currents and a shallower slope at lighter currents (see Figure 35). 30 20 SQUARE 10 CUBIC 11 CUBIC 10 0 0 0.25 0.50 0.75 1.00 UNIT FADE TIME DIM_EN = 0 BL_EN = 0 The maximum and dim settings can be set between 0 mA and 30 mA; therefore, it is possible to program a dim setting that is greater than a maximum setting. For normal expected operation, ensure that the dim setting is programmed to be less than the maximum setting. 15 5 DIM_EN = 1 Figure 37. Backlight Turn On/Dim/Turn Off 08829-013 CURRENT (mA) 25 BL_EN = 1 08829-015 where the Fade Rate is as shown in Table 5. Figure 35. Comparison of the Dimming Transfers Laws Rev. C | Page 17 of 57 ADP8870 Data Sheet Reasserting BL_EN at any point during the off timer countdown causes the timer to reset and resume counting. The backlight can be turned off at any point during the off timer countdown by clearing BL_EN. AUTOMATIC DIM AND TURN OFF TIMERS The user can program the backlight to dim automatically by using the DIMT timer in Register 0x08. The dim timer has 127 settings, ranging from 1 sec to 127 sec. Program the dim timer before turning on the backlight. If BL_EN = 1, the backlight turns on to its maximum setting and the dim timer starts counting. When the dim timer expires, the internal state machine sets DIM_EN = 1, and the backlight enters its dim setting. BACKLIGHT CURRENT DIM TIMER RUNNING The dim timer and off timer can be used together for sequential maximum-to-dim-to-off functionality. With both the dim and off timers programmed, if BL_EN is asserted, the backlight turns on to its maximum setting. When the dim timer expires, the backlight changes to its dim setting. When the off timer expires, the backlight turns off. DIM TIMER RUNNING BACKLIGHT CURRENT MAXIMUM DIM TIMER RUNNING MAXIMUM DIM OFF TIMER RUNNING DIM_EN = 0 DIM_EN = 1 BL_EN = 0 OR BL_EN = 1 08829-016 BL_EN = 1 DIM_EN = 1 SET BY USER SET BY INTERNAL STATE MACHINE BL_EN = 1 If the user clears the DIM_EN bit (or reasserts the BL_EN bit), the backlight reverts to its maximum setting and the dim timer begins counting again. When the dim timer expires, the internal state machine again sets DIM_EN = 1, and the backlight enters its dim setting. Reasserting BL_EN at any point during the dim timer countdown causes the timer to reset and resume counting. The backlight can be turned off at any point during the dim timer countdown by clearing BL_EN. The user can also program the backlight to turn off automatically by using the OFFT timer in Register 0x07. The off timer has 127 settings, ranging from 1 sec to 127 sec. Program the off timer before turning on the backlight. If BL_EN = 1, the backlight turns on to its maximum setting and the off timer starts counting. When the off timer expires, the internal state machine clears the BL_EN bit, and the backlight turns off. BACKLIGHT CURRENT DIM_EN = 1 BL_EN = 0 SET BY USER SET BY INTERNAL STATE MACHINE Figure 38. Dim Timer 08829-018 DIM Figure 40. Dim Timer and Off Timer Used Together FADE OVERRIDE A fade override feature (FOVR in Register CFGR (Address 0x04)) enables the host to override the preprogrammed fade-in or fade-out settings. If FOVR is set and the backlight is enabled in the middle of a fade-out process, the backlight instantly (within approximately 100 ms) returns to its prefade brightness level. Alternatively, if the backlight is fading in, reasserting BL_EN overrides the programmed fade-in time and the backlight instantly goes to its final fade value. This is useful for situations where a key is pressed during a fade sequence. Alternatively, if FOVR is cleared and the backlight is enabled in the middle of a fade process, the backlight fades in from where it was interrupted (that is, it does not go down to 0 and then come back on). BACKLIGHT CURRENT OFF TIMER RUNNING FADE-IN OVERRIDDEN FADE-OUT OVERRIDDEN BL_EN = 1 (REASSERTED) BL_EN = 0 BL_EN = 0 BL_EN = 1 SET BY USER SET BY INTERNAL STATE MACHINE 08829-017 BL_EN = 1 BL_EN = 1 BL_EN = 0 Figure 39. Off Timer Rev. C | Page 18 of 57 Figure 41. Fade Override Function (FOVR is High) 08829-019 MAXIMUM MAXIMUM Data Sheet ADP8870 L2_EN BACKLIGHT AMBIENT LIGHT SENSING The ADP8870 integrates two ambient light-sensing comparators. One of the ambient light sensing comparators (CMP_IN) is always available. The second one (CMP_IN2) can be activated instead of having an LED connected to D6. Activating CMP_IN2 is accomplished through Bit CMP2_SEL in Register CFGR. Therefore, when Bit CMP2_SEL is set to 0, Pin D6 is programmed as a current sink. When Bit CMP2_SEL is set to 1, Pin D6 becomes the input for a second phototransistor. These comparators have four programmable trip points (Level 2, Level 3, Level 4, and Level 5) that can be used to select between the five backlight operating modes (daylight, bright, office, indoor, and dark) based on the ambient lighting conditions. L2_TRIP L2_HYS MP _C L2 L3_TRIP L3_HYS R MP _C L3 L4_TRP + L4_HYS L5_TRP + L5_HYS L5_TRP L4_TRP ADC L4_TRIP L4_HYS R MP _C L4 L4_OUT L4_EN L5_TRIP L5_HYS MP _C L5 R L5_OUT L5_EN DAYLIGHT 0000 08829-033 LIGHT INTENSITY (PHOTOSENSOR CURRENT) L3_TRP L3_OUT L3_EN PHOTO SENSOR OUTPUT L2_TRP + L2_HYS L3_TRP + L3_HYS L2_OUT FILTER SETTINGS The Level 5 comparator controls the dark-to-indoor mode transition. The Level 4 comparator controls the indoor-to-office transition. The Level 3 comparator controls the office-to-bright transition. The Level 2 comparator controls the bright-to-outdoor transition (see Figure 42). The currents for the different lighting modes are defined in the BLMXx and BLDMx registers (see the Backlight Operating Levels section). L2_TRP R Figure 43. Ambient Light-Sensing and Trip Comparators BRIGHT 0001 OFFICE 001X INDOOR 01XX 08829-020 DARK 1XXX TIME Figure 42. Light Sensor Modes are Based on the Ambient Light Level Detected Each light sensor comparator uses an external capacitor together with an internal reference current source to form an analog-to-digital converter (ADC) that samples the output of the external photosensor. The ADC result is fed into four programmable trip comparators. The ADC has an input range of 0 μA to 1100 μA (typical). Each level comparator detects when the photosensor output has dropped below the programmable trip point (defined in Register 0x32, Register 0x34, Register 0x36, and Register 0x38). If this event occurs, then the corresponding level output status signal is set in Register 0x30 and Register 0x31. Each level comparator contains programmable hysteresis, meaning that the photosensor output must rise above the trip threshold plus the hysteresis value before the level output clears. Each level is enabled via a corresponding bit in the ALS1_EN (Address 0x2E) and ALS2_EN (Address 0x2F) registers. The L2_TRP and L2_HYS values of Level 2 comparator can be set between 0 μA and 1100 μA (typical) in steps of 4.4 μA (typical). The L3_TRP and L3_HYS values of Level 3 comparator can be set between 0 μA and 550 μA (typical) in steps of 2.2 μA (typical). The L4_TRP and L4_HYS values of Level 4 comparator can be set between 0 μA and 275 μA (typical) in steps of 1.1 μA (typical). The L5_TRP and L5_HYS values of Level 5 comparator can be set between 0 μA and 137 μA (typical) in steps of 0.55 μA (typical). Rev. C | Page 19 of 57 ADP8870 Data Sheet D7 AMBIENT LIGHT-SENSING CONTROL L2_TRP LED D7 can be programmed to operate independent from the backlight reset when under ALS control. This is useful when D7 is used to control peripheral lighting (for example, the keypad) that needs to respond differently than the backlight lighting. This feature uses the same ALS controls and thresholds as the backlight. L2_HYS L3_TRP L3_HYS L4_TRP L4_HYS To engage D7 ALS control, first program the five ALS levels of D7 found in Register 0x25 to Register 0x29. Then set Bit D7ALS_EN in Register 0x01 and Bit D7SEL in Register 0x05. L5_TRP L5_HYS 1100 Figure 44. Comparator Ranges It is important to note that the full-scale value of the L2_TRP and L2_HYS registers is 250 d. Therefore, if the value of L2_TRP + L2_HYS exceeds 250 d, the comparator output cannot deassert. For example, if L2_TRP is set at 204 d (80% of the full-scale value, or approximately 0.80 × 1122 μA = 898 μA), then L2_HYS must be set at less than 46 d (250 − 204 = 46). If it is not, then L2_HYS + L2_TRP exceeds 250 d and the Level 2 comparator is not allowed to go low. When both phototransistors are enabled and programmed in automatic mode, the user application needs to determine which of the comparator outputs to use, selecting via Bit SEL_AB in Register 0x04 for automatic light sensing transitions. For example, the user’s software might select the comparator of the phototransistor exposed to higher light intensity to control the transition between the programmed backlight intensity levels. The level comparators can be enabled independent of each other or can operate simultaneously. A single conversion from each ADC takes 80 ms (typical). When set for automatic backlight adjustment (see the Automatic Backlight Adjustment section), the ADC and comparators run continuously. If the backlight is disabled, it is possible to use the light sensor comparators in a single-shot mode. A single-shot read of the photocomparators is performed by setting the FORCE_RD bit (Register 0x2D). After the single shot measurement is completed, the internal state machine clears the FORCE_RD bit. Interrupt Flag CMP_INT (Register 0x02) is set if any of the level output status bits change state for the main photosensor input. This means that interrupts can be generated if ambient light conditions transition between any of the programmed trip points. CMP_INT can cause the nINT pin to be asserted if the CMP_IEN bit (Register 0x03) is set. The CMP_INT flag can only be cleared by writing a 1 to it or resetting the part. DARK L5 INDOOR L4 OFFICE L3 BRIGHT L2 DAYLIGHT 08829-022 550 LED OUTPUT CURRENT 275 ADC RANGE (µA) 08829-021 137 BACKLIGHT CURRENT D7 CURRENT Figure 45. A Possible Example of the Separate ALS Control of D7 AUTOMATIC BACKLIGHT ADJUSTMENT The ambient light sensor comparators can be used to automatically transition the backlight between one of its three operating levels. To enable this mode, set the CMP_AUTOEN bit in Register 0x01. When enabled, the internal state machine takes control of the BLV bits and changes them based on the level output status bits. Table 6 shows the relationship between backlight operation and the ambient light sensor comparator outputs. The higher numbered level output status bit have greater priority over the lower numbered levels. Filter times between 80 ms and 10 sec can be programmed for the comparators (Register 0x2D) before they change state. Table 6. Comparator Output Truth Table1 L5_OUT 1 0 0 0 0 1 L4_OUT X 1 0 0 0 X is the don’t care bit. The operation of CMP2_INT (Register 0x02) and CMP2_IEN (Register 0x03) is similar except that the second phototransistor (that is, CMP_IN2) is used. Rev. C | Page 20 of 57 L3_OUT X X 1 0 0 L2_OUT X X X 1 0 ALS Level Dark Indoor Office Bright Outdoor BLV Code 100 011 010 001 000 Data Sheet ADP8870 INDEPENDENT SINK CONTROL (ISC) OVERVOLTAGE PROTECTION (OVP) Each of the 7 LEDs can be configured (in Register 0x05) to operate as either part of the backlight or to operate as an independent sink current (ISC). Each ISC can be enabled independently and has its own current level. All ISCs share the same fade-in times, fade-out times, and fade law. Overvoltage protection is implemented on the output. There are two types of overvoltage events: normal (no fault) and abnormal. Normal (No Fault) Overvoltage The ISCs have additional timers to facilitate blinking functions. A shared on timer (SCON), used in conjunction with the off timers of each ISC (SC1OFF, SC2OFF, SC3OFF, SC4OFF, SC5OFF, SC6OFF, and SC7OFF), allow the LED current sinks to be configured in various blinking modes. The on timer can be set to four settings: 0.2 sec, 0.6 sec, 0.8 sec, and 1.2 sec. The off timers also have four settings: disabled, 0.6 sec, 0.8 sec, and 1.2 sec. Blink mode is activated by setting the off timers to any setting other than disabled. Program all fade, on, and off timers before enabling any of the LED current sinks. If ISCx is on during a blink cycle and SCx_EN is cleared, it turns off (or fades to off if fade-out is enabled). If ISCx is off during a blink cycle and SCx_EN is cleared, it stays off. Abnormal (Fault/Sudden Load Change) Overvoltage ISCx CURRENT ON TIME FADE-IN ON TIME FADE-OUT FADE-IN FADE-OUT MAXIMUM OFF TIME SCx_EN SET BY USER 08829-023 OFF TIME The output voltage approaches VOUT(REG) (4.7 V typical) during normal operation. This is not caused by a fault or load change, but simply a consequence of the input voltage times the gain reaching the clamped output voltage VOUT(REG). To prevent this, the ADP8870 detects when the output voltage rises to VOUT(REG). It then increases the effective ROUT of the gain stage to reduce the voltage that is delivered. This effectively regulates VOUT to VOUT(REG); however, there is a limit to the effect that this system can have on regulating VOUT. It is designed only for normal operation and is not intended to protect against faults or sudden load changes. During this mode, no interrupt is set and the operation is transparent to the LEDs and overall application. The automatic gain selection equations take into account the additional drop within ROUT to maintain optimum efficiency. Due to the open loop behavior of the charge pump as well as how the gain transitions are computed, a sudden load change or fault can abnormally force VOUT beyond 6 V. If the event happens slowly enough, the system first tries to regulate the output to 4.7 V (typical) as in a normal overvoltage scenario. However, if this is not sufficient, or if the event happens too quickly, then the ADP8870 enters overvoltage protection mode when VOUT exceeds the OVP threshold (typically 5.7 V). In this mode, the charge pump is disabled to prevent VOUT from rising too high. The current sources and all other device functionality remain intact. When the output voltage falls below the OVP threshold, the charge pump resumes operation. If the fault or load step recurs, the process may repeat. An interrupt flag is set at each OVP instance. THERMAL SHUTDOWN (TSD)/ OVERTEMPERATURE PROTECTION Figure 46. LEDx Blink Mode with Fading SHORT-CIRCUIT PROTECTION (SCP) MODE The ADP8870 can protect against short circuits on the output (VOUT). Short-circuit protection (SCP) is activated at the point when VOUT < 55% of VIN. Note that this SCP sensing is disabled during startup and restart attempts (fault recovery). SCP sensing is reenabled 4 ms (typical) after activation. During a short-circuit fault, the device enters a low current consumption state and an interrupt flag is set. The device can be restart at any time after receiving a short-circuit fault by simply rewriting nSTBY = 1. It then repeats another complete soft start sequence. Note that the value of the output capacitance (COUT) should be small enough to allow VOUT to reach approximately 55% (typical) of VIN within the 4 ms (typical) time. If COUT is too large, the device inadvertently enters short-circuit protection. If the die temperature of the ADP8870 rises above a safety limit (150°C typical), the controllers enter TSD protection mode. In this mode, most of the internal functions are shut down, the part enters standby, and the TSD_INT interrupt (Register 0x02) is set. When the die temperature decreases below ~130°C, the part is allowed to be restarted. To restart the part, simply remove it from standby. No interrupt is generated when the die temperature falls below 130°C. However, if the software clears the pending TSD_INT interrupt and the temperature remains above 130°C, another interrupt is generated. The complete state machine for these faults (SCP, OVP, and TSD) is shown in Figure 47. Rev. C | Page 21 of 57 ADP8870 Data Sheet STBY 0 EXIT STBY 1 TSD FAULT DIE TEMP > TSD EXIT STBY START-UP: CHARGE VIN TO VOUT 0 1 DIE TEMP < TSD – TSD(HYS) SCP FAULT 0 VOUT > VOUT(START) VOUT < VOUT(SC) 1 0 EXIT STARTUP VOUT < VOUT(SC) 0 1 VOUT < VOVP 0 0 WAIT 100µs (TYP) G=1 VD1:D7(MIN) < VHR(UP) 1 VOUT > VOVP 1 OVP FAULT 1 1 0 0 VOUT > VOUT(REG) 0 VOUT < VOVP TRY TO REGULATE VOUT TO VOUT(REG) WAIT 100µs (TYP) VD1:D7(MIN) < VHR(UP) 0 0 VD1:D7(MIN) > VD(MAX) 1 1 1 OVP FAULT G = 1.5 1 VOUT > VOVP 0 1 VOUT < VOVP 0 0 1 WAIT 100µs (TYP) VD1:D7(MIN) > VD(MAX) VOUT > VOUT(REG) 1 0 OVP FAULT G=2 TRY TO REGULATE VOUT TO VOUT(REG) NOTES 1. VD(MAX) IS THE CALCULATED TRANSITION POINT AT WHICH GAIN IS REDUCED. 08829-024 VOUT > VOVP Figure 47. Fault State Machine Rev. C | Page 22 of 57 Data Sheet ADP8870 INTERRUPTS BACKLIGHT OFF INTERRUPT There are six interrupt sources available on the ADP8870 (in Register 0x02). The backlight off interrupt (BLOFF_INT) is set when the backlight completes an automated fade sequence. This could be a simple fade-out command or a complete dimming profile. This feature is useful to synchronize the backlight turn off with the LCD display driver.     The interrupt (if any) that appears on the nINT pin is determined by the bits mapped in Register INT_EN. To clear an interrupt, write a 1 to the interrupt in the INT_STAT register or reset the part. FADE-IN: OFF TO MAXIMUM FADE-OUT: MAXIMUM TO DIM MAXIMUM BACKLIGHT CURRENT FADE-OUT: DIM TO OFF DIM BLOFF_INT SET BL_EN = 1 DIM_EN = 1 BL_EN = 0 SET BY USER SET BY INTERNAL STATE MACHINE Figure 48. End of Fade-Out (EOF) Interrupt as Used for a Backlight Fade-Out (Set by User) DIM TIMER RUNNING FADE-IN FADE-OUT MAXIMUM BACKLIGHT CURRENT OFF TIMER FADE-OUT RUNNING DIM BLOFF_INT SET BL_EN = 1 DIM_EN = 1 SET BY USER SET BY INTERNAL STATE MACHINE BL_EN = 0 DIM_EN = 0 08829-026  Backlight off: at the end of each automated backlight fadeout, this interrupt (BLOFF_INT) is set. Main light sensor comparator: CMP_INT sets every time the main light sensor comparator detects a threshold (Level 2, Level 3, Level 4, or Level 5) transition (rising or falling conditions). Sensor Comparator 2: CMP2_INT interrupt works the same way as CMP_INT, except that the sensing input is coming from the second light sensor. The programmable threshold is the same as the main light sensor comparator. Overvoltage protection: OVP_INT is generated when the output voltage exceeds 5.7 V (typical). Thermal shutdown circuit: an interrupt (TSD_INT) is generated when entering overtemperature protection. Short-circuit detection: SHORT_INT is generated when the device enters short-circuit protection mode. 08829-025  Figure 49. End of Fade-Out (EOF) Interrupt as Used for an Automated Dim Profile (Set by Internal State Machine) Rev. C | Page 23 of 57 ADP8870 Data Sheet APPLICATIONS INFORMATION The ADP8870 allows the charge pump to operate efficiently with a minimum of external components, requiring only an input capacitor (CIN), an output capacitor (COUT), and two chargepump fly capacitors (C1 and C2). CIN should be 1 μF or greater, and COUT, C1, and C2 should each be 1 μF. Although in some cases other values can be used, keep in mind the following:    The value of CIN must be high enough to produce a stable input voltage signal at the minimum input voltage and maximum output load. Values larger than 1 μF are permissible for COUT, but care must be exercised to ensure that VOUT charges above 55% (typ) of VIN within 4 ms (typ). See the Short-Circuit Protection (SCP) Mode section for more details. Values larger than 1 μF for C1 and C2 are not recommended, and smaller values may reduce the ability of the charge pump to deliver maximum current. Furthermore, for optimal efficiency, the charge-pump fly capacitors should have low equivalent series resistance (ESR). Low ESR X5R or X7R capacitors are recommended for all four components. The use of fly capacitors sized 0402 and smaller is allowed, but the GDWN_DIS bit in Register 0x01 must be set. Minimum voltage ratings should adhere to the guidelines in Table 7. Table 7. Capacitor Stress in Each Charge Pump Gain State Capacitor CIN COUT C1 C2 Gain = 1× VIN VIN None None Gain = 1.5× VIN VIN × 1.5 (max of 5.5 V) VIN/2 VIN/2 Gain = 2× VIN VIN × 2.0 (max of 5.5 V) VIN VIN If one or both ambient light sensor comparator inputs (CMP_IN and/or D6) are used, a small capacitor (0.1 μF is recommended) must be connected from the comparator input pins to ground. When a light sensor conversion reading takes place, the voltage on these pins is VALS (0.95 V typical, see Table 1). Therefore, the minimum supply voltage for the ALS sensor should be greater than VALS(MAX) plus the biasing voltage required for the photosensor. Any color of LED can be used if the VF (forward voltage) is less than 4.1 V. However, using lower VF LEDs reduces the input power consumption by allowing the charge pump to operate at lower gain states. The equivalent model for a charge pump is shown in Figure 50. VOUT ROUT VOUT = G ×VIN – IOUT × ROUT(G) COUT VOUT = VF(MAX) + VDx (7) Combining Equation 6 and Equation 7 gives VIN = (VF(MAX) + VDx + IOUT × ROUT(G))/G (8) This equation is useful for calculating approximate bounds for the charge pump design. Determining the Transition Point of the Charge Pump Consider the following design example where: VF(MAX) = 3.7 V IOUT = 140 mA (7 LEDs at 20 mA each) ROUT(G = 1.5×) = 3 Ω (obtained from Figure 12) At the point of a gain transition, VDx = VHR(UP). Table 1 gives the typical value of VHR(UP) as 0.225 V. Therefore, the input voltage level when the gain transitions from 1.5× to 2× is VIN = (3.7 V + 0.225 V + 140 mA × 3 Ω)/1.5 = 2.90 V LAYOUT GUIDELINES Use the following layout guidelines:     VDx Figure 50. Charge-Pump Equivalent Circuit Model (6) The ROUT term is a combination of the RDS(ON) resistance for the switches used in the charge pump and a small resistance that accounts for the effective dynamic charge-pump resistance. The ROUT level changes based on the gain, which is dependent on the configuration of the switches. Typical ROUT values are given in Table 1 and Figure 15 to Figure 17. VOUT is also equal to the largest VF of the LEDs used plus the voltage drop across the regulating current source. This gives IOUT 08829-027 G × VIN The input voltage is multiplied by the gain (G) and delivered to the output through an effective resistance (ROUT). The output current flows through ROUT and produces an IR drop that yields  Rev. C | Page 24 of 57 For optimal noise immunity, place the CIN and COUT capacitors as close to their respective pins as possible. These capacitors should share a short ground trace. If the LEDs are a significant distance from the VOUT pin, another capacitor on VOUT, placed closer to the LEDs, is advisable. For optimal efficiency, place the charge-pump fly capacitors as close to the part as possible. The ground pin should be connected at the ground for the input and output capacitors. If the LFCSP package is used, the exposed pad must be soldered at the board to the GND pin. Unused Diode Pins[D1:D7] can be connected to ground or VOUT, or can remain floating. However, the unused diode current sinks must be disabled by setting them as independent sinks in Register 0x05 and then disabling them in Register 0x1B. If they are not disabled, the charge-pump efficiency may suffer. If the CMP_IN phototransistor input is not used, it can be connected to ground or can remain floating. Data Sheet  capacitor on this pin. If the nRST pin is not used, it must be pulled well above the VIH(MAX) level (see Table 1). Do not allow the nRST pin to float. If the interrupt pin (nINT) is not used, connect it to ground or leave it floating. Never connect the nINT pin to a voltage supply, except through a ≥1 kΩ series resistor. The ADP8870 has an integrated noise filter on the nRST pin. Under normal conditions, it is not necessary to filter the reset line. However, if exposed to an unusually noisy signal, then it is beneficial to add a small RC filter or bypass EXAMPLE CIRCUIT Figure 51 shows an example circuit for a generic application. VDD_ALS OPTIONAL PHOTOSENSOR VOUT PHOTOSENSOR 0.1µF D1 D2 D3 D4 D5 D6 D7 CMP_IN 0.1µF VIN 1µF VOUT 1µF VDDIO C1+ nRST ADP8870 C1– C1 1µF SDA C2+ SCL nINT C2– PWM GND Figure 51. Generic Application Schematic Rev. C | Page 25 of 57 C2 1µF 08829-028  ADP8870 ADP8870 Data Sheet I2C PROGRAMMING AND DIGITAL CONTROL In general, all registers are set to default values on reset or in case of a UVLO event and are read/write unless otherwise specified. Unused bits are read as 0. 0 1 1 B0 B7 B0 ACK REGISTER ADDRESS REGISTER VALUE SELECT REGISTER TO WRITE ACK 8-BIT VALUE TO WRITE IN THE ADDRESSED REGISTER ST 08829-029 DEVICE ID FOR WRITE OPERATION B7 R/W ACK STOP 1 WRITE = 0 0 START 1 FROM ADP8870 B0 0 FROM ADP8870 B7 ST FROM ADP8870 The ADP8870 provides full software programmability to facilitate its adoption in various product architectures. The I2C address is 0101011x (x = 0 during write, x = 1 during read). Therefore, the write address is 0x56, and the read address is 0x57. SLAVE TO MASTER MASTER TO SLAVE Figure 52. I2C Write Sequence SELECT REGISTER TO WRITE B0 1 0 1 0 DEVICE ID FOR READ OPERATION 1 B7 1 R/W ACK B0 REGISTER VALUE 8-BIT VALUE TO WRITE IN THE ADDRESSED REGISTER SLAVE TO MASTER MASTER TO SLAVE Figure 53. I2C Read Sequence Table 8. Register Set Definitions Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 to 0x19 0x1A 0x1B 0x1C 0x1D Register Name MFDVID MDCR INT_STAT INT_EN CFGR BLSEL PWMLED BLOFF BLDIM BLFR BLMX1 BLDM1 BLMX2 BLDM2 BLMX3 BLDM3 BLMX4 BLDM4 BLMX5 BLDM5 Reserved ISCLAW ISCC ISCT1 ISCT2 Description Manufacturer and device ID Device mode and status Interrupts status Interrupts enable Configuration register Sink enable backlight or independent PWM enable selection Backlight off timeout Backlight dim timeout Backlight fade-in and fade-out rates Backlight, Brightness Level 1—daylight, maximum current Backlight, Brightness Level 1—daylight, dim current Backlight, Brightness Level 2—bright, maximum current Backlight, Brightness Level 2—bright, dim current Backlight, Brightness Level 3—office, maximum current Backlight, Brightness Level 3—office, dim current Backlight, Brightness Level 4—indoor, maximum current Backlight, Brightness Level 4— indoor, dim current Backlight, Brightness Level 5—dark, maximum current Backlight, Brightness Level 5—dark, dim current Reserved Independent sink current fade law Independent sink current control Independent sink current timer for LED[7:5] Independent sink current timer for LED[4:1] Rev. C | Page 26 of 57 ACK ST STOP B7 ACK RS 0 08829-030 B0 REGISTER ADDRESS FROM MASTER B7 1 R/W ACK READ = 1 DEVICE ID FOR WRITE OPERATION 1 FROM ADP8870 0 REPEATED START 1 FROM ADP8870 0 FROM ADP8870 B0 1 START 0 WRITE = 0 B7 ST Data Sheet Address 0x1E 0x1F 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A to 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A to 0x3F 0x40 0x41 0x42 0x43 Register Name ISCF ISC1 ISC2 ISC3 ISC4 ISC5 ISC6 ISC7 ISC7_L2 ISC7_L3 ISC7_L4 ISC7_L5 Reserved CMP_CTL ALS1_EN ALS2_EN ALS1_STAT ALS2_STAT L2_TRP L2_HYS L3_TRP L3_HYS L4_TRP L4_HYS L5_TRP L5_HYS Reserved PH1LEVL PH1LEVH PH2LEVL PH2LEVH ADP8870 Description Independent sink current fade register Independent Sink Current LED1 Independent Sink Current LED2 Independent Sink Current LED3 Independent Sink Current LED4 Independent Sink Current LED5 Independent Sink Current LED6 Independent Sink Current LED7, Brightness Level 1—daylight Independent Sink Current LED7, Brightness Level 2—bright Independent Sink Current LED7, Brightness Level 3—office Independent Sink Current LED7, Brightness Level 4—indoor Independent Sink Current LED7, Brightness Level 5—dark Reserved ALS comparator control register Main ALS comparator level enable Second ALS comparator level enable Main ALS comparator status register Second ALS comparator status register Level 2 comparator reference Level 2 hysteresis Level 3 comparator reference Level 3 hysteresis Level 4 comparator reference Level 4 hysteresis Level 5 comparator reference Level 5 hysteresis Reserved First phototransistor ambient light level—low byte register First phototransistor ambient light level—high byte register Second phototransistor ambient light level—low byte register Second phototransistor ambient light level—high byte register Rev. C | Page 27 of 57 ADP8870 Data Sheet REGISTER SUMMARY The reset value for all bits is 0, except for bits at Address 0x00 (see Table 10 for the unique reset value of Address 0x00). Table 9. Register Map Addr 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x40 0x41 0x42 0x43 Name MFDVID MDCR INT_STAT INT_EN CFGR BLSEL PWMLED BLOFF BLDIM BLFR BLMX1 BLDM1 BLMX2 BLDM2 BLMX3 BLDM3 BLMX4 BLDM4 BLMX5 BLDM5 ISCLAW ISCC ISCT1 ISCT2 ISCF ISC1 ISC2 ISC3 ISC4 ISC5 ISC6 ISC7 ISC7_L2 ISC7_L3 ISC7_L4 ISC7_L5 CMP_CTL ALS1_EN ALS2_EN ALS1_STAT ALS2_STAT L2_TRP L2_HYS L3_TRP L3_HYS L4_TRP L4_HYS L5_TRP L5_HYS PH1LEVL PH1LEVH PH2LEVL PH2LEVH Bit 7 Bit 5 MANUFACTURE ID D7ALS_EN INT_CFG nSTBY Reserved BLOFF_INT Reserved BLOFF_IEN SEL_AB CMP2_SEL Reserved D7SEL D6SEL Reserved D7ENPWM D6ENPWM Reserved Reserved BL_FO Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Bit 6 SC7_EN SCON SC4OFF SC6_EN Bit 4 Bit 3 Bit 2 DIM_EN SHORT_INT SHORT_IEN BLV D5SEL D5ENPWM GDWN_DIS TSD_INT TSD_IEN SIS_EN OVP_INT OVP_IEN D4SEL D4ENPWM D3SEL D3ENPWM Bit 1 Device ID CMP_AUTOEN CMP2_INT CMP2_IEN BL_LAW D2SEL D2ENPWM Bit 0 BL_EN CMP_INT CMP_IEN FOVR D1SEL D1ENPWM OFFT DIMT BL_FI BL1_MC BL1_DC BL2_MC BL2_DC BL3_MC BL3_DC BL4_MC BL4_DC BL5_MC BL5_DC Reserved SC5_EN SC7OFF SC3OFF SC4_EN SC3_EN SC6OFF SC2OFF SCFO SC2_EN SC_LAW SC1_EN SC5OFF SC1OFF SCFI Reserved Reserved Reserved Reserved Reserved Reserved SCR Reserved Reserved Reserved Reserved SCD1 SCD2 SCD3 SCD4 SCD5 SCD6 SCD7 SCD7_L2 SCD7_L3 SCD7_L4 SCD7_L5 FILT2 FORCE_RD2 Reserved Reserved Reserved Reserved L5_EN L5_EN2 CMP1_L5_OUT CMP2_L5_OUT L2_TRP L2_HYS L3_TRP L3_HYS L4_TRP L4_HYS L5_TRP L5_HYS PH1LEV_LOW Reserved FILT L4_EN L4_EN2 CMP1_L4_OUT CMP2_L4_OUT PH1LEV_HIGH PH2LEV_LOW Reserved PH2LEV_HIGH Rev. C | Page 28 of 57 L3_EN L3_EN2 CMP1_L3_OUT CMP2_L3_OUT FORCE_RD L2_EN L2_EN2 CMP1_L2_OUT CMP2_L2_OUT Data Sheet ADP8870 REGISTER DETAILS MANUFACTURER AND DEVICE ID (MFDVID)—REGISTER 0x00 Multiple device revisions are tracked by the device ID field. This is a read-only register. Table 10. MFDVID Manufacturer and Device ID Bit Map Bit 7 Bit 6 0 0 Bit 5 Manufacture ID 1 Bit 4 Bit 3 Bit 2 1 0 0 Bit 1 Device ID 0 Bit 0 1 MODE CONTROL REGISTER (MDCR)—REGISTER 0x01 Table 11. MDCR Bit Map Bit 7 D7ALS_EN Bit 6 INT_CFG Bit 5 nSTBY Bit 4 DIM_EN Bit 3 GDWN_DIS Bit 2 SIS_EN Bit 1 CMP_AUTOEN Bit 0 BL_EN Table 12. MDCR Bit Descriptions Bit Name D7ALS_EN Bit No. 7 INT_CFG 6 nSTBY 5 DIM_EN 4 GDWN_DIS 3 SIS_EN 2 CMP_AUTOEN 1 BL_EN 0 Description 1 = ambient light sensing (ALS) control of independent sink (ISC) D7 is enabled. When the ADP8870 is configured as an ISC in Register 0x05, then Register 0x24 to Register 0x28 are used to set the outdoor, bright, office, indoor, and dark current levels for D7. CMPAUTO_EN (in Register 0x01) and at least one of the level enable bits (in Register 0x2D and/or Register 0x2E) must be set high for this feature to operate. 0 = ambient light sensing (ALS) control of ISC D7 is disabled (D7 responds as a standard backlight LED or ISC LED). Interrupt configuration. 1 = processor interrupt deasserts for 50 μs and reasserts with pending events. 0 = processor interrupt remains asserted if the host tries to clear the interrupt while there is a pending event. 1 = device is in normal mode. 0 = device is in standby, only I2C is enabled. DIM_EN is set by the hardware after a DIM timeout. The user may also force the backlight into DIM mode by asserting this bit. DIM mode can only be entered if BL_EN is also enabled. 1 = backlight is operating at the DIM current level (BL_EN must also be asserted). 0 = backlight is not in DIM mode. 1 = the charge pump does not switch down in gain until all LEDs are off. The charge pump switches up in gain as needed. This feature is useful if the ADP8870 charge pump is used to drive an external load. 0 = the charge pump automatically switches up and down in gain. This provides optimal efficiency, but is not suitable for driving external loads (other than those connected to the diode drivers of the ADP8870). Synchronous independent sinks enable. 1 = enables all LED current sinks designated as independent sinks. This bit has no effect if any of the SCx_EN bits in Register 0x1B are set. All of the sink current bits must be set to 0. 0 = disables all sinks designated as independent sinks. This bit has no effect if any of the SCx_EN bits are set in Register 0x1B. All of the sink current bits must be cleared. 1 = backlight automatically responds to the comparator outputs. At least one of the level enable bits (Register 0x32, Register 0x34, Register 0x36, and/or Register 0x38) must be set for this to function. BLV values in Register 0x04 are overridden. 0 = backlight does not autorespond to comparator level changes. The user can manually select backlight operating levels using the BLV bits in Register 0x04. 1 = backlight is enabled, but only if the device is not in standby mode. 0 = backlight is disabled. Rev. C | Page 29 of 57 ADP8870 Data Sheet INTERRUPT STATUS REGISTER (INT_STAT)—REGISTER 0x02 Table 13. INT_STAT Bit Map Bit 7 Bit 6 Reserved Bit 5 BLOFF_INT 4 SHORT_INT 3 TSD_INT 2 OVP_INT 1 CMP2_INT 0 CMP_INT Table 14. INT_STAT Bit Descriptions Bit Name Reserved BLOFF_INT Bit No. [7:6] 5 SHORT_INT 4 TSD_INT 3 OVP_INT 2 CMP2_INT 1 CMP_INT 0 1 Description 1 Reserved. Backlight off. 1 = indicates that the controller has completed a backlight fade profile. 0 = the controller has not automatically completed a backlight fade profile. Short-circuit error. 1 = a short-circuit or overload condition on VOUT or current sinks was detected. 0 = no short-circuit or overload condition detected. Thermal shutdown. 1 = device temperature is too high and has been shut down. 0 = no overtemperature condition detected. Overvoltage interrupt. 1 = charge-pump output voltage has exceeded VOVP. 0 = charge-pump output voltage has not exceeded VOVP. 1 = indicates that the second sensor comparator has been triggered. 0 = the second comparator has not been triggered. 1 = indicates that the sensor comparator has been triggered. 0 = the comparator has not been triggered. Interrupt bits are cleared by writing a 1 to the flag; writing a 0 or reading the flag has no effect. INTERRUPT ENABLE (INT_EN)—REGISTER 0x03 Table 15. INT_EN Bit Map Bit 7 Bit 6 Reserved Bit 5 BLOFF_IEN Bit 4 SHORT_IEN Bit 3 TSD_IEN Bit 2 OVP_IEN Bit 1 CMP2_IEN Bit 0 CMP_IEN Table 16. INT_EN Bit Descriptions Bit Name Reserved BLOFF_IEN Bit No. [7:6] 5 SHORT_IEN 4 TSD_IEN 3 OVP_IEN 2 Description Reserved. Automated backlight off indicator. 1 = the automated backlight off indicator is enabled. 0 = the automated backlight off indicator is disabled. When this bit is set, an interrupt is set anytime a backlight fade-out completes. This occurs after an automated fadeout or after the completion of a backlight dimming profile. This is useful to synchronize the complete turn off for the backlights with other devices in the application. Short-circuit interrupt enabled. When the SHORT_INT status bit is set after an error condition, an interrupt is raised to the host if the SHORT_IEN flag is enabled. 1 = the short-circuit interrupt is enabled. 0 = the short-circuit interrupt is disabled (SHORT_INT flag is still asserted). Thermal shutdown interrupt enabled. When the TSD_INT status bit is set after an error condition, an interrupt is raised to the host if the TSD_IEN flag is enabled. 1 = the thermal shutdown interrupt is enabled. 0 = the thermal shutdown interrupt is disabled (TSD_INT flag is still asserted). Overvoltage interrupt enabled. When the OVP_INT status bit is set after an error condition, an interrupt is raised to the host if the OVP_IEN flag is enabled. 1 = the overvoltage interrupt is enabled. 0 = the overvoltage interrupt is disabled (OVP_INT flag is still asserted). Rev. C | Page 30 of 57 Data Sheet ADP8870 Bit Name CMP2_IEN Bit No. 1 CMP_IEN 0 Description When the CMP2_INT status bit is set after an enabled comparator trips, an interrupt is raised if the CMP2_IEN flag is enabled. 1 = the second phototransistor comparator interrupt is enabled. 0 = the second phototransistor comparator interrupt is disabled (CMP2_INT flag is still asserted). When the CMP_INT status bit is set after an enabled comparator trips, an interrupt is raised if the CMP_IEN flag is enabled. 1 = the comparator interrupt is enabled. 0 = the comparator interrupt is disabled (CMP_INT flag is still asserted). BACKLIGHT REGISTER DESCRIPTIONS Configuration Register (CFGR)—Register 0x04 Table 17. CFGR Bit Map Bit 7 SEL_AB Bit 6 CMP2_SEL Bit 5 Bit 4 BLV Bit 3 Bit 2 Bit 1 BL_LAW Bit 0 FOVR Table 18. CFGR Bit Descriptions Bit Name SEL_AB Bit No. 7 CMP2_SEL 6 BLV [5:3] BL_LAW [2:1] FOVR 0 Description 1 = selects second phototransistor (CMP_IN2) to control the backlight. 0 = selects main phototransistor (CMP_IN) to control the backlight. 1 = second phototransistor enabled, current sink on D6 disabled. 0 = current sink on D6 enabled, second phototransistor disabled. Brightness level. This field indicates the brightness level at which the device is operating. The software may force the backlight to operate at one of the three brightness levels. Setting CMP_AUTOEN high (Register 0x01), automatically sets these values and overwrites any previously written values. 000 = Level 1 (daylight). 001 = Level 2 (bright). 010 = Level 3 (office). 011 = Level 4 (indoor). 100 = Level 5 (dark). 101 to 111 = disabled (backlight set to 0 mA). Backlight transfer law. 00 = square law DAC, linear time steps. 01 = square law DAC, linear time steps. 10 = square law DAC, nonlinear time steps (Cubic 10). 11 = square law DAC, nonlinear time steps (Cubic 11). Backlight fade override. 1 = backlight fade override enabled. 0 = backlight fade override disabled. Rev. C | Page 31 of 57 ADP8870 Data Sheet Backlight Selection (BLSEL)—Register 0x05 Table 19. BLSEL Bit Map Bit 7 Reserved Bit 6 D7SEL Bit 5 D6SEL Bit 4 D5SEL Bit 3 D4SEL Bit 2 D3SEL Bit 1 D2SEL Bit 0 D1SEL Bit 1 D2ENPWM Bit 0 D1ENPWM Table 20. BLSEL Bit Descriptions Bit Name Reserved D7SEL Bit No. 7 6 D6SEL 5 D5SEL 4 D4SEL 3 D3SEL 2 D2SEL 1 D1SEL 0 Description Reserved. Diode 7 backlight selection. 1 = selects LED 7 as an independent sink. 0 = connects LED 7 sink to the backlight enable, BL_EN. Diode 6 backlight selection. 1 = selects LED 6 as an independent sink. 0 = connects LED 6 sink to the backlight enable, BL_EN. Diode 5 backlight selection. 1 = selects LED 5 as an independent sink. 0 = connects LED 5 sink to the backlight enable, BL_EN. Diode 4 backlight selection. 1 = selects LED 4 as independent sink. 0 = connects LED 4 sink to the backlight enable, BL_EN. Diode 3 backlight selection. 1 = selects LED 3 as independent sink. 0 = connects LED 3 sink to the backlight enable, BL_EN. Diode 2 backlight selection. 1 = selects LED 2 as independent sink. 0 = connects LED 2 sink to the backlight enable, BL_EN. Diode 1 backlight selection. 1 = selects LED 1 as independent sink. 0 = connects LED 1 sink to the backlight enable, BL_EN. PWM Enable Selection Register (PWMLED)—Register 0x06 Table 21. PWMLED Bit Map Bit 7 Reserved Bit 6 D7ENPWM Bit 5 D6ENPWM Bit 4 D5ENPWM Bit 3 D4ENPWM Bit 2 D3ENPWM Table 22. PWMLED Bit Descriptions Bit Name Reserved D7ENPWM Bit No. 7 6 D6ENPWM 5 D5ENPWM 4 D4ENPWM 3 D3ENPWM 2 Description Reserved. Diode 7 backlight sink PWM enable. 1 = enables the externally applied PWM signal to scale the output current of D7. 0 = D7 does not respond to the external PWM signal. Diode 6 backlight sink PWM enable. 1 = enables the externally applied PWM signal to scale the output current of D6. 0 = D6 does not respond to the external PWM signal. Diode 5 backlight sink PWM enable. 1 = enables the externally applied PWM signal to scale the output current of D5. 0 = D5 does not respond to the external PWM signal. Diode 4 backlight sink PWM enable. 1 = enables the externally applied PWM signal to scale the output current of D4. 0 = D4 does not respond to the external PWM signal. Diode 3 backlight sink PWM enable. 1 = enables the externally applied PWM signal to scale the output current of D3. 0 = D3 does not respond to the external PWM signal. Rev. C | Page 32 of 57 Data Sheet ADP8870 Bit Name D2ENPWM Bit No. 1 D1ENPWM 0 Description Diode 2 backlight sink PWM enable. 1 = enables the externally applied PWM signal to scale the output current of D2. 0 = D2 does not respond to the external PWM signal. Diode 1 backlight sink PWM enable. 1 = enables the externally applied PWM signal to scale the output current of D1. 0 = D1 does not respond to the external PWM signal. Backlight Off Timeout (BLOFF)—Register 0x07 Table 23. BLOFF Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 OFFT Table 24. BLOFF Bit Descriptions Bit Name Reserved OFFT Bit No. 7 [6:0] Description Reserved. Backlight off timeout. After the off timeout period, the backlight turns off. If the dim timeout is enabled, the off timeout starts after the dim timeout. 0000 = timeout disabled. 0000001 = 1 sec. 0000010 = 2 sec. … 1111111 = 127 sec. Backlight Dim Timeout (BLDIM)—Register 0x08 Table 25. BLDIM Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 DIMT Bit 2 Bit 1 Bit 0 Table 26. BLDIM Bit Descriptions Bit Name Reserved DIMT Bit No. 7 [6:0] Description Reserved. Backlight dim timeout. After the dim timeout period, the backlight is set to the dim current value. The dim timeout starts after the backlight reaches the maximum current. 0000 = timeout disabled. 0000001 = 1 sec. 0000010 = 2 sec. 0000011 = 3 sec. … 1111111 = 127 sec. Rev. C | Page 33 of 57 ADP8870 Data Sheet Backlight Fade (BLFR)—Register 0x09 Table 27. BLFR Bit Map Bit 7 Bit 6 Bit 5 BL_FO Bit 4 Bit 3 Bit 2 Bit 1 BL_FI Bit 0 Table 28. BLFR Bit Descriptions Bit Name BL_FO Bit No. [7:4] BL_FI [3:0] 1 Description Backlight fade-out rate. If the fade-out is disabled (BL_FO = 0000), the backlight changes instantly (within 100 ms). If the fade-out rate is set, the backlight fades from its current value to the dim or the off value. The times listed for BL_FO are for a full-scale fade-out (30 mA to 0 mA). Fades between closer current values reduce the fade time. See the Automated Fade-In and Fade-Out section for more information. 0000 = 0.1 sec (fade-out disabled). 1 0001 = 0.3 sec. 0010 = 0.6 sec. 0011 = 0.9 sec. 0100 = 1.2 sec. 0101 = 1.5 sec. 0110 = 1.8 sec. 0111 = 2.1 sec. 1000 = 2.4 sec. 1001 = 2.7 sec. 1010 = 3.0 sec. 1011 = 3.5 sec. 1100 = 4.0 sec. 1101 = 4.5 sec. 1110 = 5.0 sec. 1111 = 5.5 sec. Backlight fade-in rate. If the fade-in is disabled (BL_FI = 0000), the backlight changes instantly (within 100 ms). If the fade-in rate is set, the backlight fades from its current value to its maximum value when the backlight is turned on. The times listed for BL_FI are for a full-scale fade-in (0 mA to 30 mA). Fades between closer current values reduce the fade time. See the Automated Fade-In and Fade-Out section for more information. 0000 = 0.1 sec (fade-in disabled). 0001 = 0.3 sec. 0010 = 0.6 sec. 0011 = 0.9 sec. … 1111 = 5.5 sec. Even with fade-in and fade-out disabled, the backlight does not instantaneously fade, but instead fades rapidly in about 100 ms. Rev. C | Page 34 of 57 Data Sheet ADP8870 Backlight Level 1 (Daylight) Maximum Current Register (BLMX1)—Register 0x0A Table 29. BLMX1 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL1_MC Bit 2 Bit 1 Bit 0 Table 30. BLMX1 Bit Descriptions Bit Name Reserved BL1_MC Bit No. 7 [6:0] Description Reserved. Backlight maximum Level 1 (daylight) current. The backlight maximum current can be set according to the square law function (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Table 31. Diode Output Currents Per DAC Code DAC Code 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 0x20 0x21 Current (mA) 1 0.000 0.002 0.007 0.017 0.030 0.047 0.067 0.091 0.119 0.151 0.186 0.225 0.268 0.314 0.365 0.419 0.476 0.538 0.603 0.671 0.744 0.820 0.900 0.984 1.071 1.163 1.257 1.356 1.458 1.564 1.674 1.787 1.905 2.026 DAC Code 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F 0x40 0x41 0x42 0x43 Rev. C | Page 35 of 57 Current (mA) 1 2.150 2.279 2.411 2.546 2.686 2.829 2.976 3.127 3.281 3.439 3.601 3.767 3.936 4.109 4.285 4.466 4.650 4.838 5.029 5.225 5.424 5.627 5.833 6.043 6.257 6.475 6.696 6.921 7.150 7.382 7.619 7.859 8.102 8.350 ADP8870 DAC Code 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5A 0x5B 0x5C 0x5D 0x5E 0x5F 0x60 0x61 0x62 0x63 Data Sheet Current (mA) 1 8.601 8.855 9.114 9.376 9.642 9.912 10.185 10.463 10.743 11.028 11.316 11.608 11.904 12.203 12.507 12.814 13.124 13.439 13.757 14.078 14.404 14.733 15.066 15.403 15.743 16.087 16.435 16.787 17.142 17.501 17.863 18.230 DAC Code 0x64 0x65 0x66 0x67 0x68 0x69 0x6A 0x6B 0x6C 0x6D 0x6E 0x6F 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7A 0x7B 0x7C 0x7D 0x7E 0x7F 1 Current (mA) 1 18.600 18.974 19.351 19.733 20.118 20.507 20.899 21.295 21.695 22.099 22.506 22.917 23.332 23.750 24.173 24.599 25.028 25.462 25.899 26.340 26.784 27.232 27.684 28.140 28.599 29.063 29.529 30.000 Cubic 10 and Cubic 11 laws use the same current settings but vary the time step per DAC code. Rev. C | Page 36 of 57 Data Sheet ADP8870 Backlight Level 1 (Daylight) Dim Current Register (BLDM1)—Register 0x0B Table 32. BLDM1 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL1_DC Bit 2 Bit 1 Bit 0 Table 33. BLDM1 Bit Descriptions Bit Name Reserved BL1_DC Bit No. 7 [6:0] Description Reserved. Backlight Level 1 (daylight) dim current. The backlight is set to the dim current value after a dim timeout or when the DIM_EN flag is set by the user (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Backlight Level 2 (Bright) Maximum Current Register (BLMX2)—Register 0x0C Table 34. BLMX2 Backlight Maximum Level 2 Current Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL2_MC Bit 2 Bit 1 Bit 0 Table 35. BLMX2 Backlight Maximum Level 2 Current Bit Descriptions Bit Name Reserved BL2_MC Bit No. 7 [6:0] Description Reserved. Backlight Level 2 (bright) maximum current (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Backlight Level 2 (Bright) Dim Current Register (BLDM2)—Register 0x0D Table 36. BLDM2 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL2_DC Bit 2 Bit 1 Bit 0 Table 37. BLDM2 Bit Descriptions Bit Name Reserved BL2_DC Bit No. 7 [6:0] Description Reserved. Backlight Level 2 (bright) dim current. The backlight is set to the dim current value after a dim timeout or when the DIM_EN flag is set by the user (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Rev. C | Page 37 of 57 ADP8870 Data Sheet Backlight Level 3 (Office) Maximum Current Register (BLMX3)—Register 0x0E Table 38. BLMX3 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL3_MC Bit 2 Bit 1 Bit 0 Bit 1 Bit 0 Table 39. BLMX3 Bit Descriptions Bit Name Reserved BL3_MC Bit No. 7 [6:0] Description Reserved. Backlight Level 3 (office) maximum current (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Backlight Level 3 (Office) Dim Current Register (BLDM3)—Register 0x0F Table 40. BLDM3 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL3_DC Bit 2 Table 41. BLDM3 Bit Descriptions Bit Name Reserved BL3_DC Bit No. 7 [6:0] Description Reserved. Backlight Level 3 (office) dim current. The backlight is set to the dim current value after a dim timeout or when the DIM_EN flag is set by the user (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Backlight Level 4 (Indoor) Maximum Current Register (BLMX4)—Register 0x10 Table 42. BLMX4 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL4_MC Bit 2 Table 43. BLMX4 Bit Descriptions Bit Name Reserved BL4_MC Bit No. 7 [6:0] Description Reserved. Backlight Level 4 (indoor) maximum current (see Table 31 for a complete list of values). Current (mA) DAC Code 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Rev. C | Page 38 of 57 Bit 1 Bit 0 Data Sheet ADP8870 Backlight Level 4 (Indoor) Dim Current Register (BLDM4)—Register 0x11 Table 44. BLDM4 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL4_DC Bit 2 Bit 1 Bit 0 Table 45. BLDM4 Bit Descriptions Bit Name Reserved BL4_DC Bit No. 7 [6:0] Description Reserved. Backlight Level 4 (indoor) dim current. The backlight is set to the dim current value after a dim timeout or when the DIM_EN flag is set by the user (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Backlight Level 5 (Dark) Maximum Current Register (BLMX5)—Register 0x12 Table 46. BLMX5 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL5_MC Bit 2 Bit 1 Bit 0 Bit 1 Bit 0 Table 47. BLMX5 Bit Descriptions Bit Name Reserved BL5_MC Bit No. 7 [6:0] Description Reserved. Backlight Level 5 (dark) maximum current (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Backlight Level 5 (Dark) Dim Current Register (BLDM5)—Register 0x13 Table 48. BLDM5 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 BL5_DC Bit 2 Table 49. BLDM5 Bit Descriptions Bit Name Reserved BL5_DC Bit No. 7 [6:0] Description Reserved. Backlight Level 5 (dark) dim current. The backlight is set to the dim current value after a dim timeout or when the DIM_EN flag is set by the user (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Rev. C | Page 39 of 57 ADP8870 Data Sheet INDEPENDENT SINK REGISTER DESCRIPTIONS Independent Sink Current Fade Law Register (ISCLAW)—Register 0x1A Table 50. ISCLAW Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Reserved Bit 3 Bit 2 Bit 1 Bit 0 SC_LAW Table 51. ISCLAW Bit Descriptions Bit Name Reserved SC_LAW Bit No. [7:2] [1:0] Description Reserved. SC fade transfer law. 00 = square law DAC, linear time steps. 01 = square law DAC, linear time steps. 10 = square law DAC, nonlinear time steps (Cubic 10). 11 = square law DAC, nonlinear time steps (Cubic 11). Independent Sink Current Control (ISCC)—Register 0x1B Table 52. ISCC Bit Map Bit 7 Reserved Bit 6 SC7_EN Bit 5 SC6_EN Bit 4 SC5_EN Bit 3 SC4_EN Bit 2 SC3_EN Table 53. ISCC Bit Descriptions Bit Name Reserved SC7_EN Bit No. 7 6 SC6_EN 5 SC5_EN 4 SC4_EN 3 Description Reserved. This enable acts on the LED 7. 1 = Independent Sink Current LED7 is turned on. 0 = Independent Sink Current LED7 is turned off. This enable acts on the LED 6. 1 = Independent Sink Current LED6 is turned on. 0 = Independent Sink Current LED6 is turned off. This enable acts on the LED 5. 1 = Independent Sink Current LED5 is turned on. 0 = Independent Sink Current LED5 is turned off. This enable acts on the LED 4. 1 = Independent Sink Current LED4 is turned on. 0 = Independent Sink Current LED4 is turned off. SC3_EN 2 SC2_EN 1 SC1_EN 0 This enable acts on the LED 3. 1 = Independent Sink Current LED3 is turned on. 0 = Independent Sink Current LED3 is turned off. This enable acts on the LED 2. 1 = Independent Sink Current LED2 is turned on. 0 = Independent Sink Current LED2 is turned off. This enable acts on the LED 1. 1 = Independent Sink Current LED1 is turned on. 0 = Independent Sink Current LED1 is turned off. Rev. C | Page 40 of 57 Bit 1 SC2_EN Bit 0 SC1_EN Data Sheet ADP8870 Independent Sink Current Time (ISCT1)—Register 0x1C Table 54. ISCT1 Bit Map Bit 7 Bit 6 SCON Bit 5 Bit 4 SC7OFF Bit 3 Bit 2 SC6OFF Bit 1 Bit 0 SC5OFF Table 55. ISCT1 Bit Descriptions Bit Name SCON Bit No. [7:6] SC7OFF [5:4] SC6OFF [3:2] SC5OFF [1:0] 1 2 Description 1, 2 Sink current on time. If the sink current off time is not disabled, then when the independent current sink is enabled (Register 0x1B), it remains on for the on time selected (per the following times) and then turns off. 00 = 0.2 sec. 01 = 0.6 sec. 10 = 0.8sec. 11 = 1.2 sec. Independent Sink Current LED7 off time. When the sink current off time is disabled, the sink current remains on while enabled. If the sink current off time is set to any other value, then the ISC turns off for the off time (per the following listed times) and then turns on according to the SCON setting. 00 = off time disabled. 01 = 0.6 sec. 10 = 1.2 sec. 11 = 1.8 sec. Independent Sink Current LED6 off time. When the sink current off time is disabled, the sink current remains on while enabled. If the sink current off time is set to any other value, then the ISC turns off for the off time (per the following listed times) and then turns on according to the SCON setting. 00 = off time disabled. 01 = 0.6 sec. 10 = 1.2 sec. 11 = 1.8 sec. Independent Sink Current LED5 off time. When the sink current off time is disabled, the sink current remains on while enabled. If the sink current off time is set to any other value, then the ISC turns off for the off time (per the following listed times) and then turns on according to the SCON setting. 00 = off time disabled. 01 = 0.6 sec. 10 = 1.2 sec. 11 = 1.8 sec. An independent sink remains on continuously when SCx_EN = 1 and SCx_OFF = 00 (disabled). To enable multiple independent sinks, set the appropriate SCx_EN bits. To create equivalent blinking and fading sequences, enable all independent sinks in one write cycle to cause a preprogrammed sequence to start simultaneously. Rev. C | Page 41 of 57 ADP8870 Data Sheet Independent Sink Current Time (ISCT2)—Register 0x1D Table 56. ISCT2 Bit Map Bit 7 Bit 6 SC4OFF Bit 5 Bit 4 SC3OFF Bit 3 Bit 2 SC2OFF Bit 1 Bit 0 SC1OFF Table 57. ISCT2 Bit Descriptions Designation SC4OFF Bit [7:6] SC3OFF [5:4] SC2OFF [3:2] SC1OFF [1:0] 1 2 Description 1, 2 Independent Sink Current LED4 off time. When the sink current off time is disabled, the sink current remains on while enabled. If the sink current off time is set to any other value, then the ISC turns off for the off time (per the following listed times) and then turns on according to the SCON setting. 00 = off time disabled. 01 = 0. 6 sec. 10 = 1.2 sec. 11 = 1.8 sec. Independent Sink Current LED3 off time. When the sink current off time is disabled, the sink current remains on while enabled. If the sink current off time is set to any other value, then the ISC turns off for the off time (per the following listed times) and then turns on according to the SCON setting. 00 = off time disabled. 01 = 0. 6 sec. 10 = 1.2 sec. 11 = 1.8 sec. Independent Sink Current LED2 off time. When the sink current off time is disabled, the sink current remains on while enabled. If the sink current off time is set to any other value, then the ISC turns off for the off time (per the following listed times) and then turns on according to the SCON setting. 00 = off time disabled. 01 = 0. 6 sec. 10 = 1.2 sec. 11 = 1.8 sec. Independent Sink Current LED1 off time. When the sink current off time is disabled, the sink current remains on while enabled. If the sink current off time is set to any other value, then the ISC turns off for the off time (per the following listed times) and then turns on according to the SCON setting. 00 = off time disabled. 01 = 0. 6 sec. 10 = 1.2 sec. 11 = 1.8 sec. An independent sink remains on continuously when SCx_EN = 1 and SCx_OFF = 00 (disabled). To enable multiple independent sinks, set the appropriate SCx_EN bits. To create equivalent blinking and fading sequences, enable all independent sinks in one write cycle. This causes a preprogrammed sequence to start simultaneously. Rev. C | Page 42 of 57 Data Sheet ADP8870 Independent Sink Current Fade (ISCF)—Register 0x1E Table 58. ISCF Bit Map Bit 7 Bit 6 Bit 5 SCFO Bit 4 Bit 3 Bit 2 Bit 1 SCFI Bit 0 Table 59. ISCF Bit Descriptions Bit Name SCFO Bit No. [7:4] SCFI 3:0 Description Sink current fade-out time. The maximum fade time is from full-scale to 0 mA. Therefore, a fade is shorter between maximum and dim or between dim and off. Binary code fade-out times are as follows: 0000 = disabled. 0001 = 0.30 sec. 0010 = 0.60 sec. 0011 = 0.90 sec. 0100 = 1.2 sec. 0101 = 1.5 sec. 0110 = 1.8 sec. 0111 = 2.1 sec. 1000 = 2.4 sec. 1001 = 2.7 sec. 1010 = 3.0 sec. 1011 = 3.5 sec. 1100 = 4.0 sec. 1101 = 4.5 sec. 1110 = 5.0 sec. 1111 = 5.5 sec. Sink current fade-in time. The maximum fade time is from 0 mA to full scale. Binary code fade-out times are as follows: 0000 = disabled. 0001 = 0.30 sec. 0010 = 0.60 sec. 0011 = 0.90 sec. 0100 = 1.2 sec. 0101 = 1.5 sec. 0110 = 1.8 sec. 0111 = 2.1 sec. 1000 = 2.4 sec. 1001 = 2.7 sec. 1010 = 3.0 sec. 1011 = 3.5 sec. 1100 = 4.0 sec. 1101 = 4.5 sec. 1110 = 5.0 sec. 1111 = 5.5 sec. Rev. C | Page 43 of 57 ADP8870 Data Sheet Sink Current Register LED1 (ISC1)—Register 0x1F Table 60. ISC1 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 SCD1 Bit 2 Bit 1 Bit 0 Table 61. ISC1 Bit Descriptions Bit Name Reserved SCD1 Bit No. 7 [6:0] Description Reserved Sink current. Use the following DAC code schedule (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Sink Current Register LED2 (ISC2)—Register 0x20 Table 62. ISC2 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 SCD2 Bit 2 Bit 1 Bit 0 Table 63. ISC2 Bit Descriptions Bit Name Reserved SCD2 Bit No. 7 [6:0] Description Reserved. Sink current. Use the following DAC code schedule (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Sink Current Register LED3 (ISC3)—Register 0x21 Table 64. ISC3 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 SCD3 Bit 2 Bit 1 Table 65. ISC3 Bit Descriptions Bit Name Reserved SCD3 Bit No. 7 [6:0] Description Reserved. Sink current. Use the following DAC code schedule (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Rev. C | Page 44 of 57 Bit 0 Data Sheet ADP8870 Sink Current Register LED4 (ISC4)—Register 0x22 Table 66. ISC4 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 SCD4 Bit 2 Bit 1 Bit 0 Table 67. ISC4 Bit Descriptions Bit Name Reserved SCD4 Bit No. 7 [6:0] Description Reserved. Sink current. Use the following DAC code schedule (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Sink Current Register LED5 (ISC5)—Register 0x23 Table 68. ISC5 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 SCD5 Bit 2 Bit 1 Bit 0 Table 69. ISC5 Bit Descriptions Bit Name Reserved SCD5 Bit No. 7 [6:0] Description Reserved. Sink current. Use the following DAC code schedule (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Sink Current Register LED6 (ISC6)—Register 0x24 Table 70. ISC6 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 SCD6 Bit 2 Bit 1 Table 71. ISC6 Bit Descriptions Bit Name Reserved SCD6 Bit No. 7 [6:0] Description Reserved Sink current. Use the following DAC code schedule (see Table 31 for a complete list of values). Current (mA) DAC Code 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 Rev. C | Page 45 of 57 Bit 0 ADP8870 Data Sheet Sink Current Register LED7 Brightness Level 1 (ISC7)—Register 0x25 Table 72. ISC7 Bit Map Bit 7 SCR Bit 6 Bit 5 Bit 4 Bit 3 SCD7 Bit 2 Bit 1 Table 73. ISC7 Bit Descriptions Bit Name SCR Bit No. 7 SCD7 [6:0] Description 1 = Sink Current 1. 0 = Sink Current 0. For Sink Current 0, use the following DAC code schedule (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 For Sink Current 1, use the following DAC code schedule (see Table 74 for a complete list of values). DAC Code 0000000 Current (mA) 0.000 0000001 0.004 0000010 0.014 0000011 0.034 … … 1111111 60.000 Output Currents for LED7 with SCR = 1 Table 74. Diode Output Currents for LED7 (SCR High) DAC Code 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 Diode Current (mA) 0.000 0.004 0.014 0.034 0.06 0.094 0.134 0.182 0.238 0.302 0.372 0.45 0.536 0.628 0.73 0.838 0.952 1.076 1.206 1.342 1.488 1.64 1.8 DAC Code 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B 0x2C 0x2D Rev. C | Page 46 of 57 Diode Current (mA) 1.968 2.142 2.326 2.514 2.712 2.916 3.128 3.348 3.574 3.81 4.052 4.3 4.558 4.822 5.092 5.372 5.658 5.952 6.254 6.562 6.878 7.202 7.534 Bit 0 Data Sheet DAC Code 0x2E 0x2F 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x37 0x38 0x39 0x3A 0x3B 0x3C 0x3D 0x3E 0x3F 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F 0x50 0x51 0x52 0x53 0x54 0x55 ADP8870 Diode Current (mA) 7.872 8.218 8.57 8.932 9.3 9.676 10.058 10.45 10.848 11.254 11.666 12.086 12.514 12.95 13.392 13.842 14.3 14.764 15.238 15.718 16.204 16.7 17.202 17.71 18.228 18.752 19.284 19.824 20.37 20.926 21.486 22.056 22.632 23.216 23.808 24.406 25.014 25.628 26.248 26.878 DAC Code 0x56 0x57 0x58 0x59 0x5A 0x5B 0x5C 0x5D 0x5E 0x5F 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6A 0x6B 0x6C 0x6D 0x6E 0x6F 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7A 0x7B 0x7C 0x7D 0x7E 0x7F Rev. C | Page 47 of 57 Diode Current (mA) 27.514 28.156 28.808 29.466 30.132 30.806 31.486 32.174 32.87 33.574 34.284 35.002 35.726 36.46 37.2 37.948 38.702 39.466 40.236 41.014 41.798 42.59 43.39 44.198 45.012 45.834 46.664 47.5 48.346 49.198 50.056 50.924 51.798 52.68 53.568 54.464 55.368 56.28 57.198 58.126 59.058 60.000 ADP8870 Data Sheet Sink Current Register LED7 Brightness Level 2 (ISC7_L2)—Register 0x26 Table 75. ISC7_L2 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 SCD7_L2 Bit 2 Bit 1 Bit 0 Table 76. ISC7_L2 Bit Descriptions Bit Name Reserved SCD7_L2 Bit No. 7 [6:0] Description Reserved. For SCR = 0 (Register ISC7), use the following DAC code schedule (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 For SCR = 1 (Register ISC7), use the following DAC code schedule (see Table 74 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.004 0000010 0.014 0000011 0.034 … … 1111111 60.000 Sink Current Register LED7 Brightness Level 3 (ISC7_L3)—Register 0x27 Table 77. ISC7_L3 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 SCD7_L3 Bit 2 Bit 1 Bit 0 Table 78. ISC7_L3 Bit Descriptions Bit Name Reserved SCD7_L3 Bit No. 7 [6:0] Description Reserved. For SCR = 0 (Register ISC7), use the following DAC code schedule (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 For SCR = 1 (Register ISC7), use the following DAC code schedule (see Table 74 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.004 0000010 0.014 0000011 0.034 … … 1111111 60.000 Rev. C | Page 48 of 57 Data Sheet ADP8870 Sink Current Register LED7 Brightness Level 4 (ISC7_L4)—Register 0x28 Table 79. ISC7_L4 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 SCD7_L4 Bit 2 Bit 1 Bit 0 Table 80. ISC7_L4 Bit Descriptions Bit Name N/A SCD7_L4 Bit No. 7 6:0 Description Reserved. For SCR = 0 (Register ISC7), use the following DAC code schedule (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30.000 For SCR = 1 (Register ISC7), use the following DAC code schedule (see Table 74 for a complete list of values). DAC Code Current (mA) 0000000 0.00 0000001 0.004 0000010 0.014 0000011 0.034 … … 1111111 60.000 Sink Current Register LED7 Brightness Level 5 (ISC7_L5)—Register 0x29 Table 81. ISC7_L5 Bit Map Bit 7 Reserved Bit 6 Bit 5 Bit 4 Bit 3 SCD7_L5 Bit 2 Bit 1 Bit 0 Table 82. ISC7_L5 Bit Descriptions Bit Name Reserved SCD7_L5 Bit No. 7 [6:0] Description Reserved. For SCR = 0 (Register ISC7), use the following DAC code schedule (see Table 31 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.002 0000010 0.007 0000011 0.017 … … 1111111 30 For SCR = 1 (Register ISC7), use the following DAC code schedule (see Table 74 for a complete list of values). DAC Code Current (mA) 0000000 0.000 0000001 0.004 0000010 0.014 0000011 0.034 … … 1111111 60.000 Rev. C | Page 49 of 57 ADP8870 Data Sheet COMPARATOR REGISTER DESCRIPTIONS Register 0x2D to Register 0x39 control the comparators, and Register 0x40 to Register 0x43 provide the raw data obtained from the comparators. ALS Comparator Control (CMP_CTL)—Register 0x2D Table 83. CMP_CTL Bit Map Bit 7 Bit 6 FILT2 Bit 5 Bit 4 FORCE_RD2 Bit 3 Bit 2 Bit 1 FILT Bit 0 FORCE_RD Table 84. CMP_CTL Bit Descriptions Bit Name FILT2 Bit No. [7:5] Description Filter setting for the second light sensor. 000 = 80 ms. 001 = 160 ms. 010 = 320 ms. 011 = 640 ms. 100 = 1280 ms. 101 = 2560 ms. 110 = 5120 ms. 111 = 10,240 ms. FORCE_RD2 4 FILT [3:1] Forces a read of the second light sensor while the backlight is off. This bit is reset by the chip after the conversion is complete and is ignored if the backlight is enabled. Filter setting for the main light sensor. 000 = 80 ms. 001 = 160 ms. 010 = 320 ms. 011 = 640 ms. 100 = 1280 ms. 101 = 2560 ms. 110 = 5120 ms. 111 = 10,240 ms. FORCE_RD 0 Forces a read of the main light sensor while the backlight is off. This bit is reset by the chip after the conversion is complete and is ignored if the backlight is enabled. Main ALS Comparator Level Enable (ALS1_EN)—Register 0x2E Table 85. ALS1_EN Bit Map Bit 7 Bit 6 Bit 5 Reserved Bit 4 Bit 3 L5_EN Bit 2 L4_EN Table 86. ALS1_EN Bit Descriptions Bit Name Reserved L5_EN Bit No. [7:4] 3 L4_EN 2 L3_EN 1 L2_EN 0 Description Reserved. 1 = the Level 5 comparator is enabled for the CMP_IN comparator. 0 = the Level 5 comparator is disabled for the CMP_IN comparator. 1 = the Level 4 comparator is enabled for the CMP_IN comparator. 0 = the Level 4 comparator is disabled for the CMP_IN comparator. 1 = the Level 3 comparator is enabled for the CMP_IN comparator. 0 = the Level 3 comparator is disabled for the CMP_IN comparator. 1 = the Level 2 comparator is enabled for the CMP_IN comparator. 0 = the Level 2 comparator is disabled for the CMP_IN comparator. Rev. C | Page 50 of 57 Bit 1 L3_EN Bit 0 L2_EN Data Sheet ADP8870 Secondary ALS Comparator Level Enable (ALS2_EN)—Register 0x2F Table 87. ALS2_EN Bit Map Bit 7 Bit 6 Bit 5 Reserved Bit 4 Bit 3 L5_EN2 Bit 2 L4_EN2 Bit 1 L3_EN2 Bit 0 L2_EN2 Table 88. ALS2_EN Bit Descriptions Bit Name Reserved L5_EN2 Bit No. [7:4] 3 L4_EN2 2 L3_EN2 1 L2_EN2 0 Description Reserved. 1 = the Level 5 comparator and auto level changing is enabled for the CMP2 comparator. 0 = the Level 5 comparator is disabled for the CMP2 comparator. 1 = the Level 4 comparator and auto level changing is enabled for the CMP2 comparator. 0 = the Level 4 comparator is disabled for the CMP2 comparator. 1 = the Level 3 comparator and auto level changing is enabled for the CMP2 comparator. 0 = the Level 3 comparator is disabled for the CMP2 comparator. 1 = the Level 2 comparator and auto level changing is enabled for the CMP2 comparator. 0 = the Level 2 comparator is disabled for the CMP2 comparator. Main ALS Comparator Status (ALS1_STAT)—Register 0x30 Table 89. ALS1_STAT Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 CMP1_L5_OUT Reserved Bit 2 CMP1_L4_OUT Bit 1 CMP1_L3_OUT Bit 0 CMP1_L2_OUT Table 90. ALS1_STAT Bit Descriptions Bit Name Reserved CMP1_L5_OUT CMP1_L4_OUT CMP1_L3_OUT CMP1_L2_OUT Bit No. [7:4] 3 2 1 0 Description Reserved. This bit is the output of the Level 5 comparator for the main light sensor. This bit is the output of the Level 4 comparator for the main light sensor. This bit is the output of the Level 3 comparator for the main light sensor. This bit is the output of the Level 2 comparator for the main light sensor. Second ALS Comparator Status (ALS2_STAT)—Register 0x31 Table 91. ALS2_STAT Bit Map Bit 7 Bit 6 Bit 5 Reserved Bit 4 Bit 3 CMP2_L5_OUT Bit 2 CMP2_L4_OUT Bit 1 CMP2_L3_OUT Table 92. ALS2_STAT Bit Descriptions Bit Name Reserved CMP2_L5_OUT CMP2_L4_OUT CMP2_L3_OUT CMP2_L2_OUT Bit No. [7:4] 3 2 1 0 Description Reserved. This bit is the output of the Level 5 comparator for the second light sensor. This bit is the output of the Level 4 comparator for the second light sensor. This bit is the output of the Level 3 comparator for the second light sensor. This bit is the output of the Level 2 comparator for the second light sensor. Rev. C | Page 51 of 57 Bit 0 CMP2_L2_OUT ADP8870 Data Sheet Comparator Level 2 Threshold (L2_TRP)—Register 0x32 Table 93. L2_TRP Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 L2_TRP Bit 2 Bit 1 Bit 0 Table 94. L2_TRP Bit Descriptions Bit Name L2_TRP Bit No. [7:0] Description Comparator Level 2 threshold. If the comparator input is below L2_TRP, then the comparator trips and the backlight enters Level 2 (bright) mode. The code settings for photosensor current are as follows: 00000000 = 0 μA. 00000001 = 4.3 μA. 00000010 = 8.6 μA. 00000011 = 12.9 μA. … 11111010 = 1080 μA. … 11111111 = 1106 μA. Although codes above 1111010 (250 d) are possible, they should not be used. Furthermore, the maximum value of L2_TRP + L2_HYS must not exceed 1111010 (250 d). Comparator Level 2 Hysteresis (L2_HYS)—Register 0x33 Table 95. L2_HYS Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 L2_HYS Bit 2 Bit 1 Bit 0 Table 96. L2_HYS Bit Descriptions Bit Name L2_HYS Bit No. [7:0] Description Comparator Level 2 hysteresis. If the comparator input is above L2_TRP + L2_HYS, the comparator trips and the backlight enters Level 1 (daylight) mode. The code settings for photosensor current hysteresis are as follows: 0000000 = 0 μA. 00000001 = 4.3 μA. 00000010 = 8.6 μA. 00000011 = 12.9 μA. … 11111010 = 1080 μA. … 11111111 = 1106 μA. Although codes above 1111010 (250 d) are possible, they should not be used. Furthermore, the maximum value of L2_TRP + L2_HYS must not exceed 1111010 (250 d). Rev. C | Page 52 of 57 Data Sheet ADP8870 Comparator Level 3 Threshold (L3_TRP)—Register 0x34 Table 97. L3_TRP Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 L3_TRP Bit 2 Bit 1 Bit 0 Table 98. L3_TRP Bit Descriptions Bit Name L3_TRP Bit No. [7:0] Description Comparator Level 3 threshold. If the comparator input is below L3_TRP, then the comparator trips and the backlight enters Level 3 (office) mode. The code settings for photosensor current are as follows: 00000000 = 0 μA. 00000001 = 2.16 μA. 00000010 = 4.32 μA. 00000011 = 8.64 μA. … 11111111 = 550.8 μA. Comparator Level 3 Hysteresis (L3_HYS)—Register 0x35 Table 99. L3_HYS Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 L3_HYS Bit 2 Bit 1 Bit 0 Table 100. L3_HYS Bit Descriptions Bit Name L3_HYS Bit No. [7:0] Description Comparator Level 3 hysteresis. If the comparator input is above L3_TRP + L3_HYS, the comparator trips and the backlight enters Level 2 (bright) mode. The code settings for photosensor current hysteresis are as follows: 00000000 = 0 μA. 00000001 = 2.16 μA. 00000010 = 4.32 μA. 00000011 = 8.64 μA. … 11111111 = 550.8 μA. Comparator Level 4 Threshold (L4_TRP)—Register 0x36 Table 101. L4_TRP Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 L4_TRP Bit 2 Bit 1 Bit 0 Table 102. L4_TRP Bit Descriptions Bit Name L4_TRP Bit No. [7:0] Description Comparator Level 4 threshold. If the comparator input is below L4_TRP, then the comparator trips and the backlight enters Level 4 (indoor) mode. The code settings for photosensor current are as follows: 00000000 = 0 μA. 00000001 = 1.08 μA. 00000010 = 2.16 μA. 00000011 = 4.32 μA. … 11111111 = 275.4 μA. Rev. C | Page 53 of 57 ADP8870 Data Sheet Comparator Level 4 Hysteresis (L4_HYS)—Register 0x37 Table 103. L4_HYS Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 L4_HYS Bit 2 Bit 1 Bit 0 Table 104. L4_HYS Bit Descriptions Bit Name L4_HYS Bit No. [7:0] Description Comparator Level 4 hysteresis. If the comparator input is above L4_TRP + L4_HYS, the comparator trips and the backlight enters Level 3 (office) mode. The code settings for photosensor current hysteresis are as follows: 00000000 = 0 μA. 00000001 = 1.08 μA. 00000010 = 2.16 μA. 00000011 = 4.32 μA. … 11111111 = 275.4 μA. Comparator Level 5 Threshold (L5_TRP)—Register 0x38 Table 105. L5_TRP Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 L5_TRP Bit 2 Bit 1 Bit 0 Table 106. L5_TRP Bit Descriptions Bit Name L5_TRP Bit No. [7:0] Description Comparator Level 5 threshold. If the comparator input is below L5_TRP, then the comparator trips and the backlight enters Level 5 (dark) mode. The code settings for photosensor current are as follows: 0000000 = 0 μA. 0000001 = 0.54 μA. 0000010 = 1.08 μA. 0000011 = 1.62 μA. … 1111111 = 137.7 μA. Comparator Level 5 Hysteresis (L5_HYS)—Register 0x39 Table 107. L5_HYS Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 L5_HYS Bit 2 Bit 1 Bit 0 Table 108. L5_HYS Bit Descriptions Bit Name L5_HYS Bit No. [7:0] Description Comparator Level 5 hysteresis. If the comparator input is above L5_TRP + L5_HYS, the comparator trips and the backlight enters Level 4 (indoor) mode. The code settings for photosensor current hysteresis are as follows: 0000000 = 0 μA. 0000001 = 0.54 μA. 0000010 = 1.08 μA. 0000011 = 1.62 μA. … 1111111 = 137.7 μA. Rev. C | Page 54 of 57 Data Sheet ADP8870 First Phototransistor Register: Low Byte (PH1LEVL)—Register 0x40 Table 109. PH1LEVL Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 PH1LEV_LOW Bit 2 Bit 1 Bit 0 Table 110. PH1LEVL Bit Descriptions Bit Name PH1LEV_LOW Bit No. [7:0] Description 13-bit conversion value for the first light sensor—low byte (Bit 7 to Bit 0). The value is updated every 80 ms when the light sensor is enabled. This is a read-only register. First Phototransistor Register: High Byte (PH1LEVH)—Register 0x41 Table 111. PH1LEVH Bit Map Bit 7 Bit 6 Reserved Bit 5 Bit 4 Bit 3 Bit 2 PH1LEV_HIGH Bit 1 Bit 0 Table 112. PH1LEVH Bit Descriptions Bit Name Reserved PH1LEV_HIGH Bit No. [7:5] [4:0] Description Reserved 13-bit conversion value for the first light sensor—high byte (Bit 12 to Bit 8). The value is updated every 80 ms when the light sensor is enabled. This is a read-only register. The full 13-bit conversion value is equal (in hex) to raw photosensor conversion (RPC) = PH1LEV_HIGH × 0x100 + PH1LEV_LOW. This 13-bit number has a maximum value of 0x1F40 (decimal = 8000). To convert from the RPC (decimal) value into the photosensor current, use the following equation: IALS (measured) = RPC (decimal)/8000 × IALS, where IALS is given in Table 1. Second Phototransistor Register: Low Byte (PH2LEVL)—Register 0x42 Table 113. PH2LEVL Bit Map Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 PH2LEV_LOW Bit 2 Bit 1 Bit 0 Table 114. PH2LEVL Bit Descriptions Bit Name PH2LEV_LOW Bit No. [7:0] Description 13-bit conversion value for the second light sensor—low byte (Bit 7 to Bit 0). The value is updated every 80 ms when the light sensor is enabled. This is a read-only register. Second Phototransistor Register: High Byte (PH2LEVH)—Register 0x43 Table 115. PH2LEVH Bit Map Bit 7 Bit 6 Reserved Bit 5 Bit 4 Bit 3 Bit 2 PH2LEV_HIGH Bit 1 Bit 0 Table 116. PH2LEVH Bit Descriptions Bit Name Reserved Bit No. [7:5] Description Reserved PH2LEV_HIGH [4:0] 13-bit conversion value for the second light sensor—high byte (Bit 12 to Bit 8). The value is updated every 80 ms when the light sensor is enabled. This is a read-only register. The full 13-bit conversion value is equal (in hex) to raw photosensor conversion (RPC) = PH2LEV_HIGH × 0x100 + PH2LEV_LOW. This 13-bit number has a maximum value of 0x1F40 (decimal = 8000). To convert from the RPC (decimal) value into the photosensor current, use the following equation: IALS(measured) = RPC(decimal)/8000 × IALS, where IALS is given in Table 1. Rev. C | Page 55 of 57 ADP8870 Data Sheet OUTLINE DIMENSIONS 2.190 2.150 2.110 4 3 2 1 A BALL A1 IDENTIFIER B 2.395 2.355 2.315 1.60 REF C D E 0.40 REF BOTTOM VIEW TOP VIEW (BALL SIDE UP) (BALL SIDE DOWN) 1.20 REF COPLANARITY 0.05 0.287 0.267 0.247 0.230 0.200 0.170 08-02-2012-A SEATING PLANE SIDE VIEW Figure 54. 20-Ball Wafer Level Chip Scale Package [WLCSP] (CB-20-7) Dimensions shown in millimeters 08829-031 0.645 0.600 0.555 0.415 0.400 0.385 Figure 55. Tape and Reel Orientation for WLCSP Units Rev. C | Page 56 of 57 Data Sheet ADP8870 DETAIL A (JEDEC 95) 0.30 0.25 0.18 16 0.50 BSC PIN 1 INDIC ATOR AREA OPTIONS (SEE DETAIL A) 20 1 15 2.75 2.60 SQ 2.35 EXPOSED PAD 5 11 TOP VIEW 0.80 0.75 0.70 SIDE VIEW PKG-003502 SEATING PLANE 0.50 0.40 0.30 10 6 BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF 0.20 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 10-12-2017-C PIN 1 INDICATOR 4.10 4.00 SQ 3.90 COMPLIANT TO JEDEC STANDARDS MO-220-WGGD-11. 08829-032 Figure 56. 20-Lead Lead Frame Chip Scale Package [LFCSP] 4 mm × 4 mm Body and 0.75 mm Package Height (CP-20-8) Dimensions shown in millimeters Figure 57. Tape and Reel Orientation for LFCSP Units ORDERING GUIDE Model 1 ADP8870ACBZ-R7 ADP8870ACPZ-R7 ADP8870DBCB-EVALZ 1 Temperature Range −40°C to +105°C −40°C to +105°C Package Description 20-Ball WLCSP, 7” Tape and Reel 20-Lead LFCSP, 7” Tape and Reel ADP8870 Daughter Card and LED Board Z = RoHS Compliant Part. ©2012–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08829-0-10/17(C) Rev. C | Page 57 of 57 Package Option CB-20-7 CP-20-8
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