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ADRF5024BCCZN

ADRF5024BCCZN

  • 厂商:

    AD(亚德诺)

  • 封装:

    LGA12

  • 描述:

  • 数据手册
  • 价格&库存
ADRF5024BCCZN 数据手册
Data Sheet ADRF5024 Silicon SPDT Switch, Reflective, 100 MHz to 44 GHz FEATURES ► ► ► ► ► ► ► ► ► ► FUNCTIONAL BLOCK DIAGRAM Ultrawideband frequency range: 100 MHz to 44 GHz Reflective design Low insertion loss with impedance match ► 1.0 dB typical to 18 GHz ► 1.4 dB typical to 40 GHz ► 1.7 dB typical to 44 GHz Low insertion loss without impedance match ► 0.9 dB typical to 18 GHz ► 1.7 dB typical to 40 GHz ► 2.1 dB typical to 44 GHz High input linearity ► P1dB: 27.5 dBm typical ► IP3: 50 dBm typical High RF input power handling ► Through path: 27 dBm ► Hot switching: 27 dBm No low frequency spurious RF settling time (50% VCTRL to 0.1 dB of final RF output): 17 ns 12-terminal, 2.25 mm × 2.25 mm LGA package Pin compatible with the ADRF5025 low frequency cutoff version APPLICATIONS Industrial scanners Test and instrumentation ► Cellular infrastructure: 5G mmWave ► Military radios, radars, electronic counter measures (ECMs) ► Microwave radios and very small aperture terminals (VSATs) ► ► Figure 1. GENERAL DESCRIPTION The ADRF5024 is a reflective, single-pole double-throw (SPDT) switch manufactured in the silicon process. This switch operates from 100 MHz to 44 GHz with better than 1.7 dB of insertion loss and 35 dB of isolation. The ADRF5024 has a radio frequency (RF) input power handling capability of 27 dBm for both the through path and hot switching. The ADRF5024 draws a low current of 14 µA on the positive supply of +3.3 V and 120 µA on negative supply of −3.3 V. The device employs complementary metal-oxide semiconductor (CMOS)-/low voltage transistor to transistor logic (LVTTL)-compatible controls. The ADRF5024 is pin-compatible with the ADRF5025, low frequency cutoff version, which operates from 9 kHz to 44 GHz. The ADRF5024 RF ports are designed to match a characteristic impedance of 50 Ω. For ultrawideband products, impedance matching on the RF transmission lines can further optimize high frequency insertion loss and return loss characteristics. Refer to the Electrical Specifications section, Typical Performance Characteristics section, and Applications Information section for more details. The ADRF5024 comes in a 2.25 mm × 2.25 mm, 12-terminal, RoHS-compliant, land grid array (LGA) package and can operate between −40°C to +105°C. Rev. D DOCUMENT FEEDBACK TECHNICAL SUPPORT Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Data Sheet ADRF5024 TABLE OF CONTENTS Features................................................................ 1 Applications........................................................... 1 Functional Block Diagram......................................1 General Description...............................................1 Specifications........................................................ 3 Electrical Specifications......................................3 Absolute Maximum Ratings...................................5 Thermal Resistance........................................... 5 Power Derating Curves...................................... 5 ESD Caution.......................................................5 Pin Configuration and Function Descriptions........ 6 Interface Schematics..........................................6 Typical Performance Characteristics..................... 7 Insertion Loss, Return Loss, and Isolation......... 7 Input Power Compression and Third-Order Intercept........................................................... 9 Theory of Operation.............................................10 Applications Information...................................... 11 Evaluation Board.............................................. 11 Probe Matrix Board.......................................... 13 Impedance Matching........................................ 13 Outline Dimensions............................................. 14 Ordering Guide.................................................14 Evaluation Boards............................................ 14 REVISION HISTORY 10/2022—Rev. C to Rev. D Changes to RF Input Power Parameter, Table 1............................................................................................. 4 Changes to Table 2.......................................................................................................................................... 5 Changes to Figure 2........................................................................................................................................ 5 Moved Figure 11 and Figure 12....................................................................................................................... 8 analog.com Rev. D | 2 of 14 Data Sheet ADRF5024 SPECIFICATIONS ELECTRICAL SPECIFICATIONS VDD = 3.3 V, VSS = −3.3 V, VCTRL = 0 V or VDD, and case temperature (TCASE) = 25°C for 50 Ω system, unless otherwise noted. Table 1. Parameter Symbol FREQUENCY RANGE INSERTION LOSS Between RFC and RF1/RF2 (On) With Impedance Match f RETURN LOSS RFC and RF1/RF2 (On) With Impedance Match ISOLATION Between RFC and RF1/RF2 Between RF1 and RF2 analog.com tRISE, tFALL tON, tOFF Typ Max Unit 44,000 MHz 1.0 1.4 1.4 1.4 1.7 dB dB dB dB dB 0.9 1.1 1.5 1.7 2.1 dB dB dB dB dB 17 13 13 18 12 dB dB dB dB dB 21 17 13 12 10 dB dB dB dB dB 100 MHz to 18 GHz 18 GHz to 26 GHz 26 GHz to 35 GHz 35 GHz to 40 GHz 40 GHz to 44 GHz 100 MHz to 18 GHz 18 GHz to 26 GHz 26 GHz to 35 GHz 35 GHz to 40 GHz 40 GHz to 44 GHz 42 41 38 36 35 47 45 44 42 38 dB dB dB dB dB dB dB dB dB dB 10% to 90% of RF output 50% VCTRL to 90% of RF output 2 10 ns ns 50% VCTRL to 0.1 dB of final RF output 17 ns See Figure 24 100 MHz to 18 GHz 18 GHz to 26 GHz 26 GHz to 35 GHz 35 GHz to 40 GHz 40 GHz to 44 GHz See Figure 25 100 MHz to 18 GHz 18 GHz to 26 GHz 26 GHz to 35 GHz 35 GHz to 40 GHz 40 GHz to 44 GHz Without Impedance Match Min 100 See Figure 24 100 MHz to 18 GHz 18 GHz to 26 GHz 26 GHz to 35 GHz 35 GHz to 40 GHz 40 GHz to 44 GHz See Figure 25 100 MHz to 18 GHz 18 GHz to 26 GHz 26 GHz to 35 GHz 35 GHz to 40 GHz 40 GHz to 44 GHz Without Impedance Match SWITCHING CHARACTERISTICS Rise and Fall Time On and Off Time RF Settling Time 0.1 dB Test Conditions/Comments Rev. D | 3 of 14 Data Sheet ADRF5024 SPECIFICATIONS Table 1. Parameter 0.05 dB INPUT LINEARITY1 1 dB Power Compression Third-Order Intercept SUPPLY CURRENT Positive Supply Current Negative Supply Current DIGITAL CONTROL INPUTS Voltage Low High Current Low and High RECOMMENDED OPERATING CONDITIONS Supply Voltage Positive Negative Digital Control Voltage RF Input Power2 Input at RFC Through Path Hot Switching Symbol 1 Min 50% VCTRL to 0.05 dB of final RF output 200 MHz to 40 GHz P1dB IP3 Two tone input power = 12 dBm each tone, Δf = 1 MHz VDD and VSS pins IDD ISS Typ Max Unit 22 ns 27.5 50 dBm dBm 14 120 µA µA CTRL pin VINL VINH 0 1.2 IINL, IINH VDD VSS VCTRL PIN Input at RFx Through Path Hot Switching Case Temperature Test Conditions/Comments 0.8 3.3
ADRF5024BCCZN 价格&库存

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ADRF5024BCCZN
    •  国内价格
    • 1000+677.71000

    库存:5000