B230A

1.2 A, 20 V, 700 kHz/1.4 MHz, Nonsynchronous Step-Down Regulator ADP2300/ADP2301 FEATURES 1.2 A maximum load current ±2% output accuracy over temperature range Wide input voltage range: 3.0 V to 20 V 700 kHz (ADP2300) or 1.4 MHz (ADP2301) switching frequency options High efficiency up to 91% Current-mode control architecture Output voltage from 0.8 V to 0.85 × VIN Automatic PFM/PWM mode switching Precision enable pin with hysteresis Integrated high-side MOSFET Integrated bootstrap diode Internal compensation and soft start Minimum external components Undervoltage lockout (UVLO) Overcurrent protection (OCP) and thermal shutdown (TSD) ADIsimPower™ online design tool Available in ultrasmall, 6-lead TSOT package TYPICAL APPLICATIONS CIRCUIT 3.0V TO 20V BST VIN VOUT ADP2300/ ADP2301 ON OFF EN GND SW FB 08342-001 Figure 1. 100 95 90 EFFICIENCY (%) 85 80 75 70 65 60 fSW = 1.4MHz fSW = 700kHz APPLICATIONS LDO replacement for digital load applications Intermediate power rail conversion Communications and networking Industrial and instrumentation Healthcare and medical Consumer VIN = 12V VOUT = 5.0V 0 0.2 0.4 0.6 IOUT (A) 0.8 1.0 1.2 08342-069 Figure 2. Efficiency vs. Output Current GENERAL DESCRIPTION The ADP2300/ADP2301 are compact, constant-frequency, current-mode, step-down dc-to-dc regulators with integrated power MOSFET. The ADP2300/ADP2301 devices run from input voltages of 3.0 V to 20 V, making them suitable for a wide range of applications. A precise, low voltage internal reference makes these devices ideal for generating a regulated output voltage as low as 0.8 V, with ±2% accuracy, for up to 1.2 A load current. There are two frequency options: the ADP2300 runs at 700 kHz, and the ADP2301 runs at 1.4 MHz. These options allow users to make decisions based on the trade-off between efficiency and total solution size. Current-mode control provides fast and stable line and load transient performance. The ADP2300/ADP2301 devices include internal soft start to prevent inrush current at power-up. Other key safety features include short-circuit protection, thermal shutdown (TSD), and input undervoltage lockout (UVLO). The precision enable pin threshold voltage allows the ADP2300/ADP2301 to be easily sequenced from other input/ output supplies. It can also be used as a programmable UVLO input by using a resistive divider. The ADP2300/ADP2301 are available in a 6-lead TSOT package and are rated for the −40°C to +125°C junction temperature range. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. ADP2300/ADP2301 TABLE OF CONTENTS Features .............................................................................................. 1  Applications ....................................................................................... 1  Typical Applications Circuit............................................................ 1  General Description ......................................................................... 1  Revision History ............................................................................... 2  Specifications..................................................................................... 3  Absolute Maximum Ratings............................................................ 4  Thermal Resistance ...................................................................... 4  ESD Caution .................................................................................. 4  Pin Configuration and Function Descriptions ............................. 5  Typical Performance Characteristics ............................................. 6  Functional Block Diagram ............................................................ 13  Theory of Operation ...................................................................... 14  Basic Operation .......................................................................... 14  PWM Mode ................................................................................. 14  Power Saving Mode .................................................................... 14  Bootstrap Circuitry .................................................................... 14  Precision Enable ......................................................................... 14  Integrated Soft Start ................................................................... 14  Current Limit .............................................................................. 14  Short-Circuit Protection ............................................................ 15  Undervoltage Lockout (UVLO) ............................................... 15  Thermal Shutdown .................................................................... 15  Control Loop............................................................................... 15  Applications Information .............................................................. 16  Programming the Output Voltage ........................................... 16  Voltage Conversion Limitations ............................................... 16  Low Input Voltage Considerations .......................................... 17  Programming the Precision Enable ......................................... 17  Inductor ....................................................................................... 18  Catch Diode ................................................................................ 19  Input Capacitor ........................................................................... 19  Output Capacitor........................................................................ 19  Thermal Considerations............................................................ 20  Design Example .............................................................................. 21  Switching Frequency Selection ................................................. 21  Catch Diode Selection ............................................................... 21  Inductor Selection ...................................................................... 21  Output Capacitor Selection....................................................... 21  Resistive Voltage Divider Selection.......................................... 22  Circuit Board Layout Recommendations ................................... 23  Typical Application Circuits ......................................................... 24  Outline Dimensions ....................................................................... 26  Ordering Guide .......................................................................... 26  REVISION HISTORY 2/10—Revision 0: Initial Version Rev. 0 | Page 2 of 28 ADP2300/ADP2301 SPECIFICATIONS VIN = 3.3 V, TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted. Table 1. Parameter VIN Voltage Range Supply Current Shutdown Current Undervoltage Lockout Threshold FB Regulation Voltage Bias Current SW On Resistance 1 Peak Current Limit 2 Minimum On Time Minimum Off Time OSCILLATOR FREQUENCY SOFT START TIME EN Input Threshold Input Hysteresis Pull-Down Current BOOTSTRAP VOLTAGE THERMAL SHUTDOWN Threshold Hysteresis 1 2 Symbol VIN IVIN ISHDN UVLO Test Conditions Min 3 Typ Max 20 800 35 2.95 Unit V μA μA V V V V μA mΩ A ns ns ns MHz MHz μs μs V mV μA V °C °C No switching, VIN = 12 V VEN = 0 V, VIN = 12 V VIN rising VIN falling TJ = 0°C to +125°C TJ = −40°C to +125°C 2.15 0.788 0.784 640 18 2.80 2.40 0.800 0.800 0.01 440 1.9 100 145 70 0.7 1.4 1460 730 1.2 100 1.2 5.0 140 15 VFB IFB 0.812 0.816 0.1 700 2.5 135 190 120 0.9 1.75 VBST − VSW = 5 V, ISW = 150 mA VBST − VSW = 5 V, VIN = 12 V ADP2300 ADP2301 ADP2300 ADP2301 ADP2300 ADP2301 VEN 1.5 0.5 1.0 1.13 1.27 VBOOT No switching, VIN = 12 V Pin-to-pin measurements. Guaranteed by design. Rev. 0 | Page 3 of 28 ADP2300/ADP2301 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter VIN, EN SW BST to SW BST FB Operating Junction Temperature Range Storage Temperature Range Soldering Conditions Rating −0.3 V to +28 V −1.0 V to +28 V −0.6 V to +6 V −0.3 V to +28 V −0.3 V to +3.3 V −40°C to +125°C −65°C to +150°C JEDEC J-STD-020 THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Thermal Resistance1 Package Type 6-Lead TSOT 1 θJA 186.02 θJC 66.34 Unit °C/W θJA and θJC are measured using natural convection on a JEDEC 4-layer board. ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all voltages are referenced to GND. Rev. 0 | Page 4 of 28 ADP2300/ADP2301 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BST GND FB 1 2 3 ADP2300/ ADP2301 TOP VIEW (Not to Scale) 6 5 4 SW VIN EN 08342-002 Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 3 4 5 6 Mnemonic BST GND FB EN VIN SW Description Boost Supply for the High-Side MOSFET Driver. A 0.1 μF capacitor is connected between the SW and BST pins to form a floating supply to drive the gate of the MOSFET switch above the VIN supply voltage. Ground. Connect this pin to the ground plane. Feedback Voltage Sense Input. Connect this pin to a resistive divider from VOUT. Set the voltage to 0.8 V for a desired VOUT. Output Enable. Pull this pin high to enable the output. Pull this pin low to disable the output. This pin can also be used as a programmable UVLO input. This pin has a 1.2 μA pull-down current to GND. Power Input. Connect to the input power source with a ceramic bypass capacitor to GND directly from this pin. Switch Node Output. Connect an inductor to VOUT and a catch diode to GND from this pin. Rev. 0 | Page 5 of 28 ADP2300/ADP2301 TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.3 V, TA = 25°C, VEN = VIN, unless otherwise noted. 100 100 INDUCTOR: LPS6225-103MLC DIODE: B230A 90 90 EFFICIENCY (%) EFFICIENCY (%) 80 80 70 70 60 VOUT = 12V VOUT = 9V VOUT = 5.0V VOUT = 3.3V 60 VOUT VOUT VOUT VOUT VOUT 0 0.2 0.4 0.6 IOUT (A) 50 INDUCTOR: LPS6225-472MLC DIODE: B230A 50 IOUT (A) Figure 4. Efficiency Curve, VIN = 18 V, fSW = 1.4 MHz Figure 7. Efficiency Curve, VIN = 12 V, fSW = 700 kHz 100 100 INDUCTOR: LPS6225-472MLC DIODE: B230A 90 90 EFFICIENCY (%) EFFICIENCY (%) 80 80 70 70 60 VOUT = 12V VOUT = 9V VOUT = 5.0V VOUT = 3.3V 08342-071 60 50 INDUCTOR: LPS6225-103MLC DIODE: B230A 50 IOUT (A) IOUT (A) Figure 5. Efficiency Curve, VIN = 18 V, fSW = 700 kHz Figure 8. Efficiency Curve, VIN = 5.0 V, fSW = 1.4 MHz 100 100 INDUCTOR: LPS6225-103MLC DIODE: B230A 90 90 EFFICIENCY (%) EFFICIENCY (%) 80 80 70 70 60 60 50 INDUCTOR: LPS6225-472MLC DIODE: B230A 40 VOUT = 5.0V VOUT = 3.3V VOUT = 2.5V 08342-072 50 IOUT (A) IOUT (A) Figure 6. Efficiency Curve, VIN = 12 V, fSW = 1.4 MHz Figure 9. Efficiency Curve, VIN = 5.0 V, fSW = 700 kHz Rev. 0 | Page 6 of 28 08342-075 0 0.2 0.4 0.6 0.8 1.0 1.2 40 VOUT = 2.5V VOUT = 1.8V VOUT = 1.2V 0 0.2 0.4 0.6 0.8 1.0 1.2 08342-074 40 0 0.2 0.4 0.6 0.8 1.0 1.2 40 VOUT = 2.5V VOUT = 1.8V VOUT = 1.2V 0 0.2 0.4 0.6 0.8 1.0 1.2 08342-073 0 0.2 0.4 0.6 0.8 1.0 1.2 08342-070 40 40 = 5.0V = 3.3V = 2.5V = 1.8V = 1.2V 1.2 0.8 1.0 ADP2300/ADP2301 100 0.20 0.15 fSW = 1.4MHz fSW = 700kHz 90 0.10 LINE REGULATION (%) EFFICIENCY (%) 80 0.05 0 70 –0.05 –0.10 –0.15 –0.20 60 50 INDUCTOR: LPS6225-472MLC DIODE: B230A 0 0.2 0.4 0.6 IOUT (A) 0.8 08342-089 1.0 1.2 VIN (V) Figure 10. Efficiency Curve, VIN = 3.3 V with External 5.0 V Bootstrap Bias Voltage, fSW = 1.4 MHz 100 1600 Figure 13. Line Regulation, VOUT = 3.3 V, IOUT = 500 mA 90 VOUT = 1.8V VOUT = 1.2V VOUT = 0.8V fSW = 1.4MHz fSW = 700kHz 1400 70 FREQUENCY (kHz) EFFICIENCY (%) 80 1200 1000 60 800 50 INDUCTOR: LPS6225-103MLC DIODE: B230A 08342-066 600 –20 10 40 70 100 130 IOUT (A) TEMPERATURE (°C) Figure 11. Efficiency Curve, VIN = 3.3 V with External 5.0 V Bootstrap Bias Voltage, fSW = 700 kHz 0.20 0.15 0.10 0.05 0 –0.05 –0.10 –0.15 –0.20 08342-067 Figure 14. Frequency vs. Temperature 1600 FSW = 1.4MHz FSW = 700kHz fSW = 1.4MHz fSW = 700kHz 1400 LOAD REGULATION (%) FREQUENCY (kHz) 1200 1000 800 600 0 0.2 0.4 0.6 IOUT (A) 0.8 1.0 1.2 2 5 8 11 VIN (V) 14 17 20 Figure 12. Load Regulation, VOUT = 3.3 V, VIN = 12 V Figure 15. Frequency vs. VIN Rev. 0 | Page 7 of 28 08342-077 400 08342-076 40 0 0.2 0.4 0.6 0.8 1.0 1.2 400 –50 08342-068 40 VOUT = 1.8V VOUT = 1.2V VOUT = 0.8V 5 8 11 14 17 20 ADP2300/ADP2301 40 35 SHUTDOWN CURRENT (µA) 160 140 120 100 80 60 40 20 0 –50 fSW = 1.4MHz fSW = 700kHz 25 20 15 10 5 0 TJ = −40°C TJ = +25°C TJ = +125°C 08342-078 –20 10 40 70 100 130 VIN (V) TEMPERATURE (°C) Figure 16. Shutdown Current vs. VIN Figure 19. Minimum Off Time vs. Temperature 0.804 2.5 0.802 0.8V FEEDBACK VOLTAGE (V) 2.0 0.800 CURRENT LIMIT (A) 1.5 0.798 1.0 0.796 0.794 0.5 TEMPERATURE (°C) VIN (V) Figure 17. 0.8 V Feedback Voltage vs. Temperature Figure 20. Current-Limit Threshold vs. VIN, VBST − VSW = 5.0 V 110 2.5 105 MINIMUM ON TIME (ns) 2.0 100 CURRENT LIMIT (A) 1.5 95 1.0 90 85 0.5 08342-080 –20 10 40 70 100 130 –20 10 40 70 100 130 TEMPERATURE (°C) TEMPERATURE (°C) Figure 18. Minimum On Time vs. Temperature Figure 21. Current-Limit Threshold vs. Temperature Rev. 0 | Page 8 of 28 08342-083 80 –50 0 –50 08342-082 –20 10 40 70 100 130 08342-079 0.792 –50 0 2 5 8 11 14 17 20 08342-081 2 5 8 11 14 17 20 MINIMUM OFF TIME (ns) 30 ADP2300/ADP2301 700 3.0 2.9 RISING FALLING 660 QUIESCENT CURRENT (µA) UVLO THRESHOLD (V) 2.8 2.7 2.6 2.5 2.4 2.3 2.2 620 580 540 TJ = −40°C TJ = +25°C TJ = +125°C 2 5 8 11 VIN (V) 14 17 20 08342-084 2.1 –20 10 40 70 100 130 TEMPERATURE (°C) Figure 22. Quiescent Current vs. VIN Figure 25. UVLO Threshold vs. Temperature 900 800 700 1 VOUT IL MOSFET RDS (ON) (mΩ) 600 500 400 4 SW 300 200 100 0 –50 VGS = 5V VGS = 4V VGS = 3V 2 –20 10 40 70 100 130 TEMPERATURE (°C) 08342-085 CH1 5mV B W B CH2 5V M400ns W CH4 500mA Ω BW A CH2 7.4V Figure 23. MOSFET RDS(ON) vs. Temperature (Pin-to-Pin Measurements) Figure 26. Steady State at Heavy Load, fSW = 1.4 MHz, IOUT = 1 A 1.30 RISING FALLING 1.25 1 VOUT ENABLE THRESHOLD (V) 1.20 1.15 4 IL 1.10 1.05 2 SW –20 10 40 70 100 130 TEMPERATURE (°C) 08342-086 1.00 –50 CH1 20mV B W B CH2 5V W M10µs CH4 200mA Ω BW A CH2 8V Figure 24. Enable Threshold vs. Temperature Figure 27. Steady State at Light Load, fSW = 1.4 MHz, IOUT = 40 mA Rev. 0 | Page 9 of 28 08342-025 08342-024 08342-087 500 2.0 –50 ADP2300/ADP2301 VOUT 1 VOUT IL IOUT 1 4 EN SW 4 SW 3 2 2 CH1 1V CH3 10V B W B W B CH2 10V W M100µs CH4 500mA Ω BW A CH3 8V 08342-026 CH1 50mV B W B CH2 10V W M100µs A CH4 CH4 500mA Ω BW 630mA Figure 28. Soft Start with 1 A Resistance Load, fSW = 1.4 MHz Figure 31. ADP2301 Load Transient, 0.2 A to 1.0 A, VOUT = 3.3 V, VIN = 12 V (fSW = 1.4 MHz, L = 4.7 μH, COUT = 22 μF) VOUT 1 VOUT 1 IL 4 IOUT EN SW 3 2 4 SW 2 CH1 1V CH3 10V B W B W B CH2 10V W M100µs CH4 500mA Ω BW A CH3 8V 08342-027 CH1 200mV B W B CH2 10V W M100µs A CH4 CH4 500mA Ω BW 630mA Figure 29. Soft Start with No Load, fSW = 1.4 MHz Figure 32. ADP2300 Load Transient, 0.2 A to 1.0 A, VOUT = 5.0 V, VIN = 12 V (fSW = 700 kHz, L = 10 μH, COUT = 22 μF) 1 VOUT VOUT 1 IOUT IOUT 4 SW 4 SW 2 08342-057 2 CH1 100mV B W B CH2 10V W M100µs A CH4 CH4 500mA Ω BW 580mA CH1 100mV B W B CH2 10V W M100µs A CH4 CH4 500mA Ω BW 630mA Figure 30. ADP2301 Load Transient, 0.2 A to 1.0 A, VOUT = 5.0 V, VIN = 12 V (fSW = 1.4 MHz, L = 4.7 μH, COUT = 10 μF) Figure 33. ADP2300 Load Transient, 0.2 A to 1.0 A, VOUT = 3.3 V, VIN = 12 V (fSW = 700 kHz, L = 10 μH, COUT = 22 μF) Rev. 0 | Page 10 of 28 08342-060 08342-059 08342-058 ADP2300/ADP2301 100 VOUT 1 200 160 120 80 60 MAGNITUDE [B/A] (dB) 20 0 –20 –40 –60 40 0 –40 –80 –120 –160 2 VIN SW 3 2 08342-061 CH1 5mV CH3 5V B W CH2 10V B W M1ms A CH3 11.4V –80 CROSS FREQUENCY: 127kHz PHASE MARGIN: 53° –100 1 1k 10k 100k FREQUENCY (Hz) 1M Figure 34. ADP2301 Line Transient, 7 V to 15 V, VOUT = 3.3 V, IOUT = 1.2 A, fSW = 1.4 MHz 100 80 60 Figure 37. ADP2301 Bode Plot, VOUT = 5.0 V, VIN = 12 V (fSW = 1.4 MHz, L = 4.7 μH, COUT = 10 μF) 200 160 120 VOUT MAGNITUDE [B/A] (dB) 20 0 –20 –40 –60 40 0 –40 –80 –120 –160 2 1 IL 4 SW 2 08342-033 1M Figure 35. ADP2301 Short-Circuit Entry, VOUT = 3.3 V (fSW = 1.4 MHz) Figure 38. ADP2301 Bode Plot, VOUT = 3.3 V, VIN = 12 V (fSW = 1.4 MHz, L = 4.7 μH, COUT = 22 μF) 100 80 1 200 160 120 60 MAGNITUDE [B/A] (dB) VOUT 20 0 –20 –40 –60 40 0 –40 –80 –120 CROSS FREQUENCY: 27kHz PHASE MARGIN: 76° 1 2 IL 4 SW 2 08342-034 –80 –160 08342-064 CH1 1V B W CH2 10V CH4 1A Ω B W B W M100µs A CH1 1.2V –100 1k –200 1M 10k 100k FREQUENCY (Hz) Figure 36. ADP2301 Short-Circuit Recovery, VOUT = 3.3 V (fSW = 1.4 MHz) Figure 39. ADP2300 Bode Plot, VOUT = 5.0 V, VIN = 12 V (fSW = 700 kHz, L = 10 μH, COUT = 22 μF) Rev. 0 | Page 11 of 28 PHASE [B/A] (Degrees) 40 80 08342-063 CH1 1V B W CH2 10V CH4 1A Ω B W B W M10µs A CH1 2.56V –80 CROSS FREQUENCY: 80kHz PHASE MARGIN: 68° –100 1 1k 10k 100k FREQUENCY (Hz) –200 PHASE [B/A] (Degrees) 40 80 08342-062 –200 PHASE [B/A] (Degrees) 40 80 ADP2300/ADP2301 100 80 60 200 160 120 MAGNITUDE [B/A] (dB) 20 0 –20 –40 –60 40 0 –40 –80 –120 –160 2 –80 CROSS FREQUENCY: 47kHz PHASE MARGIN: 77° –100 1 1k 10k 100k FREQUENCY (Hz) 1M Figure 40. ADP2300 Bode Plot, VOUT = 3.3 V, VIN = 12 V (fSW = 700 kHz, L = 10 μH, COUT = 22 μF) Rev. 0 | Page 12 of 28 08342-065 –200 PHASE [B/A] (Degrees) 40 80 ADP2300/ADP2301 FUNCTIONAL BLOCK DIAGRAM VIN VIN 5 THERMAL SHUTDOWN SHUTDOWN LOGIC UVLO SHUTDOWN IC 1.20V EN 4 ON OFF 0.90V R S VBIAS = 1.1V RAMP GENERATOR 0.8V VFB FB 3 6 OCP 1.2µA OVP 250mV/A BOOT REGULATOR 1 BST 0.5V Q VOUT SW CLK GENERATOR FREQUENCY FOLDBACK (fSW, ½ fSW, ¼ fSW) 2 220k Ω 90pF GND 0.7pF Figure 41. ADP2300/ADP2301 Functional Block Diagram Rev. 0 | Page 13 of 28 08342-038 ADP2300/ADP2301 ADP2300/ADP2301 THEORY OF OPERATION The ADP2300/ADP2301 are nonsynchronous, step-down dc-to-dc regulators, each with an integrated high-side power MOSFET. A high switching frequency and ultrasmall, 6-lead TSOT package allow small step-down dc-to-dc regulator solutions. The ADP2300/ADP2301 can operate with an input voltage from 3.0 V to 20 V while regulating an output voltage down to 0.8 V. The ADP2300/ADP2301 are available in two fixed-frequency options: 700 kHz (ADP2300) and 1.4 MHz (ADP2301). Since the pulse-skip mode comparator monitors the internal compensation node, which represents the peak inductor current information, the average pulse-skip load current threshold depends on the input voltage (VIN), the output voltage (VOUT), the inductor, and the output capacitor. Because the output voltage occasionally dips below regulation and then recovers, the output voltage ripple in the power saving mode is larger than the ripple in the PWM mode of operation. BOOTSTRAP CIRCUITRY The ADP2300/ADP2301 each have an integrated boot regulator, which requires that a 0.1 μF ceramic capacitor (X5R or X7R) be placed between the BST and SW pins to provide the gate drive voltage for the high-side MOSFET. There must be at least a 1.2 V difference between the BST and SW pins to turn on the high-side MOSFET. This voltage should not exceed 5.5 V in case the BST pin is supplied with an external voltage source through a diode. The ADP2300/ADP2301 generate a typical 5.0 V bootstrap voltage for a gate drive circuit by differentially sensing and regulating the voltage between the BST and SW pins. A diode integrated on the chip blocks the reverse voltage between the VIN and BST pins when the MOSFET switch is turned on. BASIC OPERATION The ADP2300/ADP2301 use the fixed-frequency, peak currentmode PWM control architecture at medium to high loads, but shift to a pulse-skip mode control scheme at light loads to reduce the switching power losses and improve efficiency. When the devices operate in fixed-frequency PWM mode, output regulation is achieved by controlling the duty cycle of the integrated MOSFET. When the devices operate in pulse-skip mode at light loads, the output voltage is controlled in a hysteretic manner with higher output ripple. In this mode of operation, the regulator periodically stops switching for a few cycles, thus keeping the conversion losses minimal to improve efficiency. PWM MODE In PWM mode, the ADP2300/ADP2301 operate at a fixed frequency, set by an internal oscillator. At the start of each oscillator cycle, the MOSFET switch is turned on, sending a positive voltage across the inductor. The inductor current increases until the current-sense signal crosses the peak inductor current threshold that turns off the MOSFET switch; this threshold is set by the error amplifier output. During the MOSFET off time, the inductor current declines through the external diode until the next oscillator clock pulse starts a new cycle. The ADP2300/ADP2301 regulate the output voltage by adjusting the peak inductor current threshold. PRECISION ENABLE The ADP2300/ADP2301 feature a precision enable circuit that has a 1.2 V reference voltage with 100 mV hysteresis. When the voltage at the EN pin is greater than 1.2 V, the part is enabled. If the EN voltage falls below 1.1 V, the chip is disabled. The precision enable threshold voltage allows the ADP2300/ADP2301 to be easily sequenced from other input/output supplies. It can also be used as programmable UVLO input by using a resistive divider. An internal 1.2 μA pull-down current prevents errors if the EN pin is floating. INTEGRATED SOFT START The ADP2300/ADP2301 include internal soft start circuitry that ramps the output voltage in a controlled manner during startup, thereby limiting the inrush current. The soft start time is typically fixed at 1460 μs for the ADP2300 and at 730 μs for the ADP2301. POWER SAVING MODE To achieve higher efficiency, the ADP2300/ADP2301 smoothly transition to the pulse-skip mode when the output load decreases below the pulse-skip current threshold. When the output voltage dips below regulation, the ADP2300/ADP2301 enter PWM mode for a few oscillator cycles until the voltage increases to within regulation. During the idle time between bursts, the MOSFET switch is turned off, and the output capacitor supplies all the output current. CURRENT LIMIT The ADP2300/ADP2301 include current-limit protection circuitry to limit the amount of positive current flowing through the highside MOSFET switch. The positive current limit on the power switch limits the amount of current that can flow from the input to the output. Rev. 0 | Page 14 of 28 ADP2300/ADP2301 SHORT-CIRCUIT PROTECTION The ADP2300/ADP2301 include frequency foldback to prevent output current runaway when there is a hard short on the output. The switching frequency is reduced when the voltage at the FB pin drops below a certain value, which allows more time for the inductor current to decline, but increases the ripple current while regulating the peak current. This results in a reduction in average output current and prevents output current runaway. The correlation between the switching frequency and the FB pin voltage is shown in Table 5. Table 5. Correlation Between the Switching Frequency and the FB Pin Voltage FB Pin Voltage VFB ≥ 0.6 V 0.6 V > VFB > 0.2 V VFB ≤ 0.2 V Switching Frequency fSW ½ fSW ¼ fSW UNDERVOLTAGE LOCKOUT (UVLO) The ADP2300/ADP2301 have fixed, internally set undervoltage lockout circuitry. If the input voltage drops below 2.4 V, the ADP2300/ADP2301 shut down and the MOSFET switch turns off. After the voltage rises again above 2.8 V, the soft start period is initiated, and the part is enabled. THERMAL SHUTDOWN If the ADP2300/ADP2301 junction temperature rises above 140°C, the thermal shutdown circuit disables the chip. Extreme junction temperature can be the result of high current operation, poor circuit board design, or high ambient temperature. A 15°C hysteresis is included so that when thermal shutdown occurs, the ADP2300/ADP2301 do not return to operation until the onchip temperature drops below 125°C. After the devices recover from thermal shutdown, a soft start is initiated. CONTROL LOOP The ADP2300/ADP2301 are internally compensated to minimize external component count and cost. In addition, the built-in slope compensation helps to prevent subharmonic oscillations when the ADP2300/ADP2301 operate at a duty cycle greater than or close to 50%. When a hard short (VFB ≤ 0.2 V) is removed, a soft start cycle is initiated to regulate the output back to its level during normal operation, which helps to limit the inrush current and prevent possible overshoot on the output voltage. Rev. 0 | Page 15 of 28 ADP2300/ADP2301 APPLICATIONS INFORMATION PROGRAMMING THE OUTPUT VOLTAGE The output voltage of the ADP2300/ADP2301 is externally set by a resistive voltage divider from the output voltage to the FB pin, as shown in Figure 42. Suggested resistor values for the typical output voltage setting are listed in Table 6. The equation for the output voltage setting is VOLTAGE CONVERSION LIMITATIONS There are both lower and upper output voltage limitations for a given input voltage due to the minimum on time, the minimum off time, and the bootstrap dropout voltage. The lower limit of the output voltage is constrained by the finite, controllable minimum on time, which can be as high as 135 ns for the worst case. By considering the variation of both the switching frequency and the input voltage, the equation for the lower limit of the output voltage is VOUT (min) = t MIN -ON × f SW (max) × (V IN (max) + V D ) − V D where: VIN(max) is the maximum input voltage. fSW(max) is the maximum switching frequency for the worst case. tMIN-ON is the minimum controllable on time. VD is the diode forward drop. ⎛R VOUT = 0.800 V × ⎜1 + FB1 ⎜R FB 2 ⎝ ⎞ ⎟ ⎟ ⎠ where: VOUT is the output voltage. RFB1 is the feedback resistor from VOUT to FB. RFB2 is the feedback resistor from FB to GND. ADP2300/ ADP2301 FB RFB1 RFB2 VOUT 08342-039 The upper limit of the output voltage is constrained by the minimum controllable off time, which can be as high as 120 ns in the ADP2301 for the worst case. By considering the variation of both the switching frequency and the input voltage, the equation for the upper limit of the output voltage is VOUT (max) = (1 − t MIN -OFF × f SW (max) ) × (V IN (min) + VD ) − VD Figure 42. Programming the Output Voltage Using a Resistive Voltage Divider Table 6. Suggested Values for Resistive Voltage Divider VOUT (V) 1.2 1.8 2.5 3.3 5.0 RFB1 (kΩ), ±1% 4.99 12.7 21.5 31.6 52.3 RFB2 (kΩ), ±1% 10 10.2 10.2 10.2 10 where: VIN(min) is the minimum input voltage. fSW(max) is the maximum switching frequency for the worst case. VD is the diode forward drop. tMIN-OFF is the minimum controllable off time. In addition, the bootstrap circuit limits the minimum input voltage for the desired output due to internal dropout voltage. To attain stable operation at light loads and ensure proper startup for the prebias condition, the ADP2300/ADP2301 require the voltage difference between the input voltage and the regulated output voltage (or between the input voltage and the prebias voltage) to be greater than 2.1 V for the worst case. If the voltage difference is smaller, the bootstrap circuit relies on some minimum load current to charge the boost capacitor for startup. Figure 43 shows the typical required minimum input voltage vs. load current for the 3.3 V output voltage. Rev. 0 | Page 16 of 28 ADP2300/ADP2301 5.5 5.3 5.1 4.9 4.7 MINIMUM VIN (V) PROGRAMMING THE PRECISION ENABLE FOR STARTUP 4.5 4.3 4.1 3.9 3.7 3.5 1 10 100 FOR RUNNING Generally, the EN pin can be easily tied to the VIN pin so that the device automatically starts up when the input power is applied. However, the precision enable feature allows the ADP2300/ ADP2301 to be used as a programmable UVLO by connecting a resistive voltage divider to VIN, as shown in Figure 46. This configuration prevents the start-up problems that can occur when VIN ramps up slowly in soft start with a relatively high load current. VIN VOUT = 3.3V fSW = 1.4MHz 1k LOAD CURRENT (mA) VIN REN1 ADP2300/ ADP2301 08342-043 Figure 43. Minimum Input Voltage vs. Load Current EN REN2 Based on three conversion limitations (the minimum on time, the minimum off time, and the bootstrap dropout voltage), Figure 44 shows the voltage conversion limitations. 22 Figure 46. Precision Enable Used as a Programmable UVLO The precision enable feature also allows the ADP2300/ADP2301 to be sequenced precisely by using a resistive voltage divider with another dc-to-dc output supply, as shown in Figure 47. 17 VIN (V) ADP2300/ ADP2301 12 08342-044 OTHER DC-TO-DC OUTPUT REN1 REN2 EN 7 MAXIMUM INPUT FOR ADP2300 MAXIMUM INPUT FOR ADP2301 MINIMUM INPUT FOR ADP2300/ADP2301 08342-055 Figure 47. Precision Enable Used as a Sequencing Control from Another DC-to-DC Output 2 0 2 4 6 8 VOUT (V) 10 12 14 16 With a 1.2 μA pull-down current on the EN pin, the equation for the start-up voltage in Figure 46 and Figure 47 is ⎛ 1 .2 V ⎞ + 1.2 μA ⎟ × R EN 1 + 1.2 V VSTARTUP = ⎜ ⎜R ⎟ ⎝ EN 2 ⎠ Figure 44. Voltage Conversion Limitations LOW INPUT VOLTAGE CONSIDERATIONS For low input voltage between 3 V and 5 V, the internal boot regulator cannot provide enough 5.0 V bootstrap voltage due to the internal dropout voltage. As a result, the increased MOSFET RDS(ON) reduces the available load current. To prevent this, add an external small-signal Schottky diode from a 5.0 V external bootstrap bias voltage. Because the absolute maximum rating between the BST and SW pins is 6.0 V, the bias voltage should be less than 5.5 V. Figure 45 shows the application diagram for the external bootstrap circuit. 3V ~ 5V VIN SCHOTTKY DIODE BST 5V BIAS VOLTAGE where: VSTARTUP is the start-up voltage to enable the chip. REN1 is the resistor from the dc source to EN. REN2 is the resistor from EN to GND. ADP2300/ ADP2301 SW OFF Figure 45. External Bootstrap Circuit for Low Input Voltage Application Rev. 0 | Page 17 of 28 08342-042 ON EN GND FB ADP2300/ADP2301 INDUCTOR The high switching frequency of the ADP2300/ADP2301 allows the use of small inductors. For best performance, use inductor values between 2 μH and 10 μH for ADP2301, and use inductor values between 2 μH and 22 μH for ADP2300. The peak-to-peak inductor current ripple is calculated using the following equation: ΔI RIPPLE = (V IN − VOUT ) ⎛ VOUT + V D ×⎜ ⎜ V +V L × f sw D ⎝ IN The inductor peak current is calculated using the following equation: I PEAK = I LOAD(max) + ΔI RIPPLE 2 ⎞ ⎟ ⎟ ⎠ where: fSW is the switching frequency. L is the inductor value. VD is the diode forward drop. VIN is the input voltage. VOUT is the output voltage. Inductors of smaller values are usually smaller in size and less expensive, but increase the ripple current and the output voltage ripple. As a guideline, the inductor peak-to-peak current ripple should typically be set to 30% of the maximum load current for optimal transient response and efficiency. Therefore, the inductor value is calculated using the following equation: L= The minimum current rating of the inductor must be greater than the inductor peak current. For ferrite core inductors with a quick saturation characteristic, the inductor saturation current rating should be higher than the switch current-limit threshold to prevent the inductor from reaching its saturation point. Be sure to validate the worst-case condition, in which there is a shorted output, over the intended temperature range. Inductor conduction losses are caused by the flow of current through the inductor, which is associated with the internal dc resistance (DCR). Larger sized inductors have smaller DCR and, therefore, may reduce inductor conduction losses. However, inductor core losses are also related to the core material and the ac flux swing, which are affected by the peak-to-peak inductor ripple current. Because the ADP2300/ADP2301 are high switching frequency regulators, shielded ferrite core materials are recommended for their low core losses and low EMI. Some recommended inductors are shown in Table 7. (V IN − VOUT ) 0.3 × I LOAD(max) × f sw ⎛V + VD × ⎜ OUT ⎜ V +V D ⎝ IN ⎞ ⎟ ⎟ ⎠ where ILOAD(max) is the maximum load current. Table 7. Recommended Inductors Vendor Coilcraft Value (μH) 4.7 6.8 10 4.7 4.7 6.8 6.8 10 4.7 6.8 10 4.7 6.8 10 4.7 6.8 10 Part No. LPS6225-472MLC LPS6225-682MLC LPS6225-103MLC CDRH5D28RHPNP-4R7N CDRH5D16NP-4R7N CDRH5D28RHPNP-6R8N CDRH5D16NP-6R8N CDRH5D28RHPNP-100M SD53-4R7-R SD53-6R8-R DR73-100-R B1077AS-4R7N B1077AS-6R8N B1077AS-100M VLC5045T-4R7M VLC5045T-6R8M VLC5045T-100M DCR (mΩ) 65 95 105 43 64 61 84 93 39 59 65 34 40 58 34 46 66 ISAT (A) 3.1 2.7 2.1 3.7 2.15 3.1 1.8 2.45 2.1 1.85 2.47 2.6 2.3 1.8 3.3 2.7 2.1 Dimensions L × W × H (mm) 6.0 × 6.0 × 2.4 6.0 × 6.0 × 2.4 6.0 × 6.0 × 2.4 6.2 × 6.2 × 3.0 5.8 × 5.8 × 1.8 6.2 × 6.2 × 3.0 5.8 × 5.8 × 1.8 6.2 × 6.2 × 3.0 5.2 × 5.2 × 3.0 5.2 × 5.2 × 3.0 7.6 × 7.6 × 3.5 7.6 × 7.6 × 4.0 7.6 × 7.6 × 4.0 7.6 × 7.6 × 4.0 5.0 × 5.0 × 4.5 5.0 × 5.0 × 4.5 5.0 × 5.0 × 4.5 Sumida Cooper Bussmann Toko TDK Rev. 0 | Page 18 of 28 ADP2300/ADP2301 CATCH DIODE The catch diode conducts the inductor current during the off time of the internal MOSFET. The average current of the diode in normal operation is, therefore, dependent on the duty cycle of the regulator as well as the output load current. OUTPUT CAPACITOR The output capacitor selection affects both the output voltage ripple and the loop dynamics of the regulator. The ADP2300/ADP2301 are designed to operate with small ceramic capacitors that have low equivalent series resistance (ESR) and equivalent series inductance (ESL) and are, therefore, easily able to meet stringent output voltage ripple specifications. When the regulator operates in forced continuous conduction mode, the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the output capacitor. ⎛V + VD I DIODE( AVG ) = ⎜1 − OUT ⎜ V IN + V D ⎝ ⎞ ⎟ × I LOAD(max) ⎟ ⎠ where VD is the diode forward drop. The only reason to select a diode with a higher current rating than necessary in normal operation is for the worst-case condition, in which there is a shorted output. In this case, the diode current increases up to the typical peak current-limit threshold. Be sure to consult the diode data sheet to ensure that the diode can operate well within the thermal and electrical limits. The reverse breakdown voltage rating of the diode must be higher than the highest input voltage and allow an appropriate margin for the ringing that may be present on the SW node. A Schottky diode is recommended for best efficiency because it has a low forward voltage drop and fast switching speed. Table 8 provides a list of recommended Schottky diodes. Table 8. Recommended Schottky Diodes Vendor ON Semiconductor Diodes Inc. Vishay Part No. MBRS230LT3 MBRS240LT3 B230A B240A SL23 SS24 VRRM (V) 30 40 30 40 30 40 IAVG (A) 2 2 2 2 2 2 ⎛ 1 ΔV RIPPLE = ΔI RIPPLE × ⎜ + ESRCOUT ⎜ 8× f ×C sw OUT ⎝ ⎞ ⎟ ⎟ ⎠ Capacitors with lower ESR are preferable to guarantee low output voltage ripple, as shown in the following equation: ESR COUT ≤ ΔV RIPPLE ΔI RIPPLE Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. X5R or X7R dielectrics are recommended for best performance, due to their low ESR and small temperature coefficients. Y5V and Z5U dielectrics are not recommended because of their poor temperature and dc bias characteristics. In general, most applications using the ADP2301 (1.4 MHz switching frequency) require a minimum output capacitor value of 10 μF, whereas most applications using the ADP2300 (700 kHz switching frequency) require a minimum output capacitor value of 20 μF. Some recommended output capacitors for VOUT ≤ 5.0 V are listed in Table 9. Table 9. Recommended Capacitors for VOUT ≤ 5.0 V Vendor Murata TDK Value 10 μF, 6.3 V 22 μF, 6.3 V 10 μF, 6.3 V 22 μF, 6.3 V Part No. GRM31MR60J106KE19 GRM31CR60J226KE19 C3216X5R0J106K C3216X5R0J226M Dimensions L × W × H (mm) 3.2 × 1.6 × 1.15 3.2 × 1.6 × 1.6 3.2 × 1.6 × 1.6 3.2 × 1.6 × 0.85 INPUT CAPACITOR The input capacitor must be able to support the maximum input operating voltage and the maximum rms input current. The maximum rms input current flowing through the input capacitor is ILOAD(max)/2. Select an input capacitor capable of withstanding the rms input current for an application’s maximum load current using the following equation: I IN ( RMS) = I LOAD(max) × D × (1 − D) where D is the duty cycle and is equal to V + VD D = OUT V IN + V D The recommended input capacitor is ceramic with X5R or X7R dielectrics due to its low ESR and small temperature coefficients. A capacitance of 10 μF should be adequate for most applications. To minimize supply noise, place the input capacitor as close to the VIN pin of the ADP2300/ADP2301 as possible. Rev. 0 | Page 19 of 28 ADP2300/ADP2301 THERMAL CONSIDERATIONS The ADP2300/ADP2301 store the value of the inductor current only during the on time of the internal MOSFET. Therefore, a small amount of power is dissipated inside the ADP2300/ADP2301 package, which reduces thermal constraints. However, when the application is operating under maximum load with high ambient temperature and high duty cycle, the heat dissipated within the package may cause the junction temperature of the die to exceed the maximum junction temperature of 125°C. If the junction temperature exceeds 140°C, the regulator goes into thermal shutdown and recovers when the junction temperature drops below 125°C. The junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the package due to power dissipation, as indicated in the following equation: TJ = TA + TR where: TJ is the junction temperature. TA is the ambient temperature. TR is the rise in temperature of the package due to power dissipation. The rise in temperature of the package is directly proportional to the power dissipation in the package. The proportionality constant for this relationship is the thermal resistance from the junction of the die to the ambient temperature, as shown in the following equation: TR = θJA × PD where: TR is the rise in temperature of the package. θJA is the thermal resistance from the junction of the die to the ambient temperature of the package. PD is the power dissipation in the package. Rev. 0 | Page 20 of 28 ADP2300/ADP2301 DESIGN EXAMPLE This section provides the procedures to select the external components, based on the example specifications listed in Table 10. The schematic for this design example is shown in Figure 48. Table 10. Step-Down DC-to-DC Regulator Requirements Parameter Input Voltage, VIN Output Voltage, VOUT Programmable UVLO Voltage Specification 12.0 V ± 10% 3.3 V, 1.2 A, 1% VOUT ripple at CCM mode VIN start-up voltage approximately 7.8 V Additional Requirements None None None INDUCTOR SELECTION Select the inductor by using the following equation: L= (V IN − VOUT ) 0.3 × I LOAD(max) × f sw ⎛V + VD × ⎜ OUT ⎜ V +V D ⎝ IN ⎞ ⎟ ⎟ ⎠ where: VOUT = 3.3 V. VIN = 12 V. ILOAD(max) = 1.2 A. VD = 0.4 V. fSW = 1.4 MHz. This results in L = 5.15 μH. The closest standard value is 4.7 μH; therefore, ΔIRIPPLE = 0.394 A. The inductor peak current is calculated using the following equation: I PEAK = I LOAD(max) + ΔI RIPPLE 2 SWITCHING FREQUENCY SELECTION Select the switching frequency—700 kHz (ADP2300) or 1.4 MHz (ADP2301)—using the conversion limitation curve shown in Figure 44 to assess the conversion limitations (the minimum on time, the minimum off time, and the bootstrap dropout voltage). For example, in Figure 44 VIN = 12 V ± 10% is within the conversion limitation for both the 700 kHz and 1.4 MHz switching frequencies for an output voltage of 3.3 V, but choosing the 1.4 MHz switching frequency provides the smallest sized solution. If higher efficiency is required, choose the 700 kHz option; however, the PCB footprint area of the regulator will be larger because of the bigger inductor and output capacitors. where: ILOAD(max) = 1.2 A. ΔIRIPPLE = 0.394 A. Therefore, the calculated peak current for the inductor is 1.397 A. However, to protect the inductor from reaching its saturation point in the current-limit condition, the inductor should be rated for at least a 2.0 A saturation current for reliable operation. CATCH DIODE SELECTION Select the catch diode. A Schottky diode is recommended for best efficiency because it has a low forward voltage drop and faster switching speed. The average current of the catch diode in normal operation, with a typical Schottky diode forward voltage, can be calculated using the following equation: ⎛V + VD ⎜ I DIODE ( AVG ) = ⎜1 − OUT V IN + V D ⎝ ⎞ ⎟ ⎟ × I LOAD(max) ⎠ OUTPUT CAPACITOR SELECTION Select the output capacitor based on the output voltage ripple requirement, according to the following equation: ⎛ 1 ΔV RIPPLE = ΔI RIPPLE × ⎜ + ESRCOUT ⎜ 8× f ×C sw OUT ⎝ where: ΔIRIPPLE = 0.394 A. fSW = 1.4 MHz. ΔVRIPPLE = 33 mV. ⎞ ⎟ ⎟ ⎠ where: VOUT = 3.3 V. VIN = 12 V. ILOAD(max) = 1.2 A. VD = 0.4 V. Therefore, IDIODE(AVG) = 0.85 A. However, for the worst-case condition, in which there is a shorted output, the diode current would be increased to 2 A typical, determined by the peak switch current limit (see Table 1). In this case, selecting a B230A, 2.0 A/30 V surface-mount Schottky diode would result in more reliable operation. If the ESR of the ceramic capacitor is 3 mΩ, then COUT = 1.2 μF. Because the output capacitor is one of the two external components that control the loop stability, most applications using the ADP2301 (1.4 MHz switching frequency) require a minimum 10 μF capacitance to ensure stability. According to the recommended external components in Table 11, choose 22 μF with a 6.3 V voltage rating for this example. Rev. 0 | Page 21 of 28 ADP2300/ADP2301 RESISTIVE VOLTAGE DIVIDER SELECTION To select the appropriate resistive voltage divider, first calculate the output feedback resistive voltage divider, and then calculate the resistive voltage divider for the programmable VIN start-up voltage. The output feedback resistive voltage divider is VOUT The resistive voltage divider for the programmable VIN start-up voltage is ⎛ 1.2 V ⎞ + 1.2 μA ⎟ × R EN 1 + 1.2 V VSTARTUP = ⎜ ⎜R ⎟ ⎝ EN 2 ⎠ If VSTARTUP = 7.8 V, choose REN2 = 10.2 kΩ, and then calculate REN1, which in this case is 56 kΩ. ⎛R = 0.800 V × ⎜1 + FB1 ⎜R FB 2 ⎝ ⎞ ⎟ ⎟ ⎠ For the 3.3 V output voltage, choose RFB1 = 31.6 kΩ and RFB2 = 10.2 kΩ as the feedback resistive voltage divider, according to the recommended values in Table 11. VIN = 12V C1 10µF 25V R3 56kΩ 1% R4 10.2kΩ 1% BST VIN C3 0.1µF 6.3V L1 4.7µH 2.0A ADP2301 (1.4MHz) SW VOUT = 3.3V 1.2A C2 22µF 6.3V D1 B230A R1 31.6kΩ 1% R2 10.2kΩ 1% EN GND FB Figure 48. Schematic for the Design Example Table 11. Recommended External Components for Typical Applications at 1.2 A Output Load Part Number ADP2300 (700 kHz) VIN ( V) 18 18 12 12 12 12 12 9 9 5 5 18 18 12 12 12 9 9 5 5 VOUT (V) 3.3 5.0 1.2 1.8 2.5 3.3 5.0 3.3 5.0 1.8 2.5 3.3 5.0 2.5 3.3 5.0 3.3 5.0 1.8 2.5 IOUT (A) 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.2 L (μH) 10 15 6.8 6.8 10 10 10 10 10 4.7 4.7 4.7 6.8 4.7 4.7 4.7 4.7 4.7 2.2 2.2 COUT (μF) 22 22 2 × 22 2 × 22 22 22 22 22 22 2 × 22 22 22 10 22 22 10 22 10 2 × 22 22 RFB1 (kΩ), ±1% 31.6 52.3 4.99 12.7 21.5 31.6 52.3 31.6 52.3 12.7 21.5 31.6 52.3 21.5 31.6 52.3 31.6 52.3 12.7 21.5 RFB2 (kΩ), ±1% 10.2 10 10 10.2 10.2 10.2 10 10.2 10 10.2 10.2 10.2 10 10.2 10.2 10 10.2 10 10.2 10.2 ADP2301 (1.4 MHz) Rev. 0 | Page 22 of 28 08342-045 ADP2300/ADP2301 CIRCUIT BOARD LAYOUT RECOMMENDATIONS Good circuit board layout is essential to obtain the best performance from the ADP2300/ADP2301. Poor layout can affect the regulation and stability, as well as the electromagnetic interface (EMI) and electromagnetic compatibility (EMC) performance. A PCB layout example is shown in Figure 50. Refer to the following guidelines for a good PCB layout: • Minimize the length of the FB trace connecting the top of the feedback resistive voltage divider to the output. In addition, keep these traces away from the high current traces and the switch node to avoid noise pickup. BST VIN • • • Figure 49. Typical Application Circuit with High Current Traces Shown in Blue INDUC TOR C3 L1 BST CA P CA TCH DIODE D1 C1 C2 ADP2300/ADP2301 08342-056 INPUT CA P Figure 50. Recommended PCB Layout for the ADP2300/ADP2301 Rev. 0 | Page 23 of 28 OUTPUT CAP 08342-046 • Place the input capacitor, inductor, catch diode, output capacitor, and bootstrap capacitor close to the IC using short traces. Ensure that the high current loop traces are as short and wide as possible. The high current path is shown in Figure 49. Maximize the size of ground metal on the component side to improve thermal dissipation. Use a ground plane with several vias connecting to the component side ground to further reduce noise interference on sensitive circuit nodes. ADP2300/ ADP2301 SW EN GND FB RFB2 RFB1 ADP2300/ADP2301 TYPICAL APPLICATION CIRCUITS VIN = 12V C1 10µF 25V R3 100kΩ 5% EN ON OFF GND BST VIN C4 0.1µF L1 6.3V 6.8µH 2.0A SW D1 B230A ADP2300 (700kHz) VOUT = 1.2V 1.2A C2 22µF 6.3V C3 22µF 6.3V R1 4.99kΩ 1% R2 10kΩ 1% FB Figure 51. ADP2300—700 kHz Typical Application, VIN = 12 V, VOUT = 1.2 V/1.2 A with External Enabling VIN = 12V C1 10µF 25V R3 100k Ω 5% BST VIN C4 0.1µF 6.3V SW D1 B230A R1 12.7k Ω 1% R2 10.2k Ω 1% L1 6.8µH 2.0A ADP2300 (700kHz) VOUT = 1.8V 1.2A C2 22µF 6.3V C3 22µF 6.3V EN ON OFF GND FB Figure 52. ADP2300—700 kHz Typical Application, VIN = 12 V, VOUT = 1.8 V/1.2 A with External Enabling VIN = 12V C1 10µF 25V R3 100k Ω 5% BST VIN C3 0.1µF L1 6.3V 10µH 2.0A SW D1 B230A R1 21.5k Ω 1% R2 10.2k Ω 1% ADP2300 (700kHz) VOUT = 2.5V 1.2A C2 22µF 6.3V EN ON OFF GND FB Figure 53. ADP2300—700 kHz Typical Application, VIN = 12 V, VOUT = 2.5 V/1.2 A with External Enabling Rev. 0 | Page 24 of 28 08342-050 08342-051 08342-052 ADP2300/ADP2301 VIN = 12V C1 10µF 25V R3 56k Ω 1% R4 10.2k Ω 1% EN GND BST VIN C3 0.1µF 6.3V L1 4.7µH 2.0V SW D1 B230A R1 31.6kΩ 1% R2 10.2kΩ 1% ADP2301 (1.4MHz) VOUT = 3.3V 1.2A C2 22µF 6.3V FB Figure 54. ADP2301—1.4 MHz Typical Application, VIN = 12 V, VOUT = 3.3 V/1.2 A (with Programmable 7.8 V Start-Up Input Voltage) VIN = 12V C1 10µF 25V R3 100k Ω 5% EN ON OFF GND FB BST VIN C3 0.1µF L1 6.3V 4.7µH 2.0A SW D1 B230A R1 52.3k Ω 1% R2 10k Ω 1% ADP2301 (1.4MHz) VOUT = 5V 1.2A C2 10µF 6.3V Figure 55. ADP2301—1.4 MHz Typical Application, VIN = 12 V, VOUT = 5.0 V/1.2 A with External Enabling VIN = 18V C1 10µF 25V R3 100k Ω 5% EN ON OFF GND FB BST VIN C3 0.1µF L1 6.3V 6.8µH 2.0A SW D1 B230A R1 52.3k Ω 1% R2 10.2k Ω 1% ADP2301 (1.4MHz) VOUT = 5.0V 1.2A C2 10µF 6.3V Figure 56. ADP2301—1.4 MHz Typical Application, VIN = 18 V, VOUT = 5.0 V/1.2 A with External Enabling VIN = 9V C1 10µF 25V R3 100k Ω 5% EN ON OFF GND FB BST VIN C3 0.1µF L1 6.3V 4.7µH 2.0A SW D1 B230A R1 31.6kΩ 1% R2 10.2kΩ 1% ADP2301 (1.4MHz) VOUT = 3.3V 1.2A C2 22µF 6.3V Figure 57. ADP2301—1.4 MHz Typical Application, VIN = 9 V, VOUT = 3.3 V/1.2 A with External Enabling VIN = 5V C1 10µF 25V R3 100k Ω 5% EN ON OFF GND FB BST VIN C4 0.1µF L1 6.3V 2.2µH 2.0A SW D1 B230A R1 12.7kΩ 1% R2 10.2kΩ 1% ADP2301 (1.4MHz) VOUT = 1.8V 1.2A C2 22µF 6.3V C3 22µF 6.3V 08342-091 08342-092 Figure 58. ADP2301—1.4 MHz Typical Application, VIN = 5 V, VOUT = 1.8 V/1.2 A with External Enabling Rev. 0 | Page 25 of 28 08342-090 08342-048 08342-049 ADP2300/ADP2301 OUTLINE DIMENSIONS 2.90 BSC 6 5 4 1.60 BSC 1 2 3 2.80 BSC PIN 1 INDICATOR 1.90 BSC *0.90 0.87 0.84 0.95 BSC *1.00 MAX 0.20 0.08 8° 4° 0° 0.60 0.45 0.30 102808-A 0.10 MAX 0.50 0.30 SEATING PLANE *COMPLIANT TO JEDEC STANDARDS MO-193-AA WITH THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS. Figure 59. 6-Lead Thin Small Outline Transistor Package [TSOT] (UJ-6) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADP2300AUJZ-R7 ADP2300-EVALZ ADP2301AUJZ-R7 ADP2301-EVALZ 1 Switching Frequency 700 kHz 1.4 MHz Temperature Range −40°C to +85°C −40°C to +85°C Package Description 6-Lead Thin Small Outline Transistor Package [TSOT] Evaluation Board 6-Lead Thin Small Outline Transistor Package [TSOT] Evaluation Board Package Option UJ-6 UJ-6 Branding L87 L86 Z = RoHS Compliant Part. Rev. 0 | Page 26 of 28 ADP2300/ADP2301 NOTES Rev. 0 | Page 27 of 28 ADP2300/ADP2301 NOTES ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08342-0-2/10(0) Rev. 0 | Page 28 of 28