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BLM21PG331SN1D

BLM21PG331SN1D

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    AD(亚德诺)

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    BLM21PG331SN1D - ADSP-BF506F EZ-KIT Lite® Evaluation System Manual - Analog Devices

  • 数据手册
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BLM21PG331SN1D 数据手册
ADSP-BF506F EZ-KIT Lite® Evaluation System Manual Revision 1.0, December 2009 Part Number 82-000226-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information © 2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent from Analog Devices, Inc. Printed in the USA. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc. Trademark and Service Mark Notice The Analog Devices logo, VisualDSP++, Blackfin, the Blackfin logo, EZ-KIT Lite, and EZ-Extender are registered trademarks of Analog Devices, Inc. All other brand and product names are trademarks or service marks of their respective owners. Regulatory Compliance The ADSP-BF506F EZ-KIT Lite is designed to be used solely in a laboratory environment. The board is not intended for use as a consumer end product or as a portion of a consumer end product. The board is an open system design which does not include a shielded enclosure and therefore may cause interference to other electrical devices in close proximity. This board should not be used in or near any medical equipment or RF devices. The ADSP-BF506F EZ-KIT Lite is currently being processed for certification that it complies with the essential requirements of the European EMC directive 89/336/EEC amended by 93/68/EEC and therefore carries the “CE” mark. The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package. C ONTENTS PREFACE Product Overview ........................................................................... xi Purpose of This Manual ................................................................. xii Intended Audience ........................................................................ xiii Manual Contents .......................................................................... xiii What’s New in This Manual ........................................................... xiv Technical or Customer Support ...................................................... xiv Supported Processors ....................................................................... xv Product Information ....................................................................... xv Analog Devices Web Site ........................................................... xv VisualDSP++ Online Documentation ....................................... xvi Technical Library CD ............................................................... xvi Related Documents ................................................................. xvii Notation Conventions .................................................................. xviii USING ADSP-BF506F EZ-KIT LITE Package Contents .......................................................................... 1-2 Default Configuration ................................................................... 1-3 EZ-KIT Lite Installation ............................................................... 1-3 ADSP-BF506F EZ-KIT Lite Evaluation System Manual v Contents EZ-KIT Lite Session Startup ......................................................... 1-5 Evaluation License Restrictions ..................................................... 1-7 Memory Map ............................................................................... 1-7 Internal Flash Memory Interface ................................................... 1-8 SPI Flash Memory Interface .......................................................... 1-9 Power-On-Self Test ....................................................................... 1-9 LEDs and Push Buttons .............................................................. 1-10 JTAG Interface ........................................................................... 1-10 Expansion Interface II ................................................................. 1-11 VDDINT Programmable Regulator ............................................ 1-12 Power Measurements .................................................................. 1-12 Example Programs ...................................................................... 1-13 Background Telemetry Channel .................................................. 1-13 Reference Design Information ..................................................... 1-14 ADSP-BF506F EZ-KIT LITE HARDWARE REFERENCE System Architecture ...................................................................... 2-2 Programmable Flags ...................................................................... 2-3 Push Buttons and Switches ............................................................ 2-7 UART Setup Switch (SW1) ..................................................... 2-8 Boot Mode Select Switch (SW2) .............................................. 2-8 Push Button Enable Switch (SW3) .......................................... 2-9 ADC Enable Switch (SW4) ..................................................... 2-9 CAN Enable Switch (SW5) ..................................................... 2-9 Reset Push Button (SW6) ........................................................ 2-9 vi ADSP-BF506F EZ-KIT Lite Evaluation System Manual Contents Programmable Flag Push Buttons (SW7–8) ............................ 2-10 ADC Loopback Switches (SW9–10) ....................................... 2-10 Jumpers ...................................................................................... 2-11 SPI FLASH CS Enable Jumper (JP1) ..................................... 2-11 Voltage Reference Select Jumper (JP2) ................................... 2-12 VDDEXT Power Jumper (JP3) .............................................. 2-12 VDDINT Power Jumper (JP4) .............................................. 2-12 VDDFLASH Power Jumper (JP5) .......................................... 2-12 ADC Voltage Reference (JP6) ................................................ 2-13 LEDs .......................................................................................... 2-14 Reset LED (LED1) ................................................................ 2-15 GPIO LEDs (LED2–4) ......................................................... 2-15 Power LED (LED5) ............................................................... 2-15 Connectors ................................................................................. 2-16 RS-232 Connector (J1) .......................................................... 2-17 CAN Connector (J2) ............................................................. 2-17 SD Connector (J3) ................................................................ 2-17 JTAG Connector (P1) ........................................................... 2-17 Expansion Interface II Connectors (P2 and P4) ...................... 2-18 Expansion Interface II Connector (P3) ................................... 2-18 DMAX Land Grid Array Connectors (P5–6) .......................... 2-19 ADC Input Connector (P7) ................................................... 2-19 Power Connector (P9) ........................................................... 2-19 ADSP-BF506F EZ-KIT Lite Evaluation System Manual vii Contents ADSP-BF506F EZ-KIT LITE BILL OF MATERIALS ADSP-BF506F EZ-KIT LITE SCHEMATIC Title Page ..................................................................................... B-1 Processor and SPI Flash ................................................................ B-2 Processor Power, Bypass CAPs ....................................................... B-3 ADC Buffers ................................................................................ B-4 ADC ............................................................................................ B-5 CAN ............................................................................................ B-6 Reset, LEDs, Push Buttons, UART, SD ......................................... B-7 Expansion Interface, DMAX ......................................................... B-8 Dual Power Regulator ................................................................... B-9 Power ......................................................................................... B-10 INDEX viii ADSP-BF506F EZ-KIT Lite Evaluation System Manual P REFACE Thank you for purchasing the ADSP-BF506F EZ-KIT Lite®, Analog Devices, Inc. evaluation system for the ADSP-BF504/BF506(F) Blackfin® processors. Blackfin processors embody a new type of embedded processor designed specifically to meet the computational demands and power constraints of today’s embedded audio, video, and communications applications. They deliver breakthrough signal-processing performance and power efficiency within a reduced instruction set computing (RISC) programming model. Blackfin processors support a media instruction set computing (MISC) architecture. This architecture is the natural merging of RISC, media functions, and digital signal processing (DSP) characteristics. Blackfin processors deliver signal-processing performance in a microprocessor-like environment. Based on the Micro Signal Architecture (MSA), Blackfin processors combine a 32-bit RISC instruction set, dual 16-bit multiply accumulate (MAC) DSP functionality, and eight-bit video processing performance that had previously been the exclusive domain of very-long instruction word (VLIW) media processors. ADSP-BF506F EZ-KIT Lite Evaluation System Manual ix The evaluation board is designed to be used in conjunction with the VisualDSP++® development environment to test capabilities of the ADSP-BF504/BF506(F) Blackfin processors. The VisualDSP++ development environment aids advanced application code development and debug, such as: • Create, compile, assemble, and link application programs written in C++, C, and ADSP-BF506F assembly • Load, run, step, halt, and set breakpoints in application programs • Read and write data and program memory • Read and write core and peripheral registers • Plot memory Access to the processor from a personal computer (PC) is achieved through a USB port or an external JTAG emulator. The USB interface provides unrestricted access to the ADSP-BF506F processor and evaluation board peripherals. Analog Devices JTAG emulators offer faster communication between the host PC and target hardware. Analog Devices carries a wide range of in-circuit emulation products. To learn more about Analog Devices emulators and processor development tools, go to http://www.analog.com/dsp/tools/. The ADSP-BF506F EZ-KIT Lite provides example programs to demonstrate the evaluation board capabilities. An EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. For details about evaluation license restrictions after the 90 days, refer to “Evaluation License Restrictions” on page 1-7 in this manual and the VisualDSP++ Installation Quick Reference Card. x ADSP-BF506F EZ-KIT Lite Evaluation System Manual Preface Product Overview The board features: • Analog Devices ADSP-BF506F Blackfin processor Core performance up to 400 MHz External bus performance up to 80 MHz 120-pin LQFP package 25 MHz crystal • Programmable VDDINT core power Analog Devices AD5258 TWI digital potentiometer Analog Devices ADP1715 low dropout linear regulator • Internal parallel flash memory Numonyx M58WT032 – 4 MB (2M x 16 bits) • SPI flash memory Numonyx M25P16 – 16 Mb • Internal ADC Analog Devices AD7266 2 MSPS, 12-bit, 3-channel SAR analog-to-digital converter Twelve single-ended inputs Six differential inputs • Universal asynchronous receiver/transmitter (UART) ADM3202 RS-232 line driver/receiver DB9 female connector ADSP-BF506F EZ-KIT Lite Evaluation System Manual xi Purpose of This Manual • LEDs Five LEDs: one board reset (red), three general-purpose (amber), and one power (green) • Push buttons Three push buttons: one reset and two programmable flags with debounce logic • Expansion interface II Next generation of the expansion interface design, provides access to most of the processor signals • Land grid array Easy probing of all port pins • Other features JTAG ICE 14-pin header Processor power measurement jumpers For information about the hardware components of the EZ-KIT Lite, refer to “ADSP-BF506F EZ-KIT Lite Bill Of Materials” on page A-1. P urpose of This Manual The ADSP-BF506F EZ-KIT Lite Evaluation System Manual provides instructions for installing the product hardware (board). The text describes operation and configuration of the board components and provides guidelines for running your own code on the ADSP-BF506F EZ-KIT Lite. Finally, a schematic and a bill of materials are provided for reference. xii ADSP-BF506F EZ-KIT Lite Evaluation System Manual Preface The product software installation is detailed in the VisualDSP++ Installation Quick Reference Card. Intended Audience The primary audience for this manual is a programmer who is familiar with Analog Devices processors. This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set. Programmers who are unfamiliar with Analog Devices processors can use this manual but should supplement it with other texts (such as the ADSP-BF50x Blackfin Processor Hardware Reference and Blackfin Processor Instruction Set Reference) that describe your target architecture. Programmers who are unfamiliar with VisualDSP++ should refer to the VisualDSP++ online Help and user’s or getting started guides. For the locations of these documents, see “Related Documents”. Manual Contents The manual consists of: • Chapter 1, “Using ADSP-BF506F EZ-KIT Lite” on page 1-1. Describes EZ-KIT Lite functionality from a programmer’s perspective and provides an easy-to-access memory map. • Chapter 2, “ADSP-BF506F EZ-KIT Lite Hardware Reference” on page 2-1. Provides information on the EZ-KIT Lite hardware components. • Appendix A, “ADSP-BF506F EZ-KIT Lite Bill Of Materials” on page A-1. Provides a list of components used to manufacture the EZ-KIT Lite board. ADSP-BF506F EZ-KIT Lite Evaluation System Manual xiii What’s New in This Manual • Appendix B, “ADSP-BF506F EZ-KIT Lite Schematic” on page B-1. Provides the resources to allow board-level debugging or to use as a reference guide. Appendix B is part of the online Help. What’s New in This Manual This is the first edition of the ADSP-BF506F EZ-KIT Lite Evaluation System Manual. Technical or Customer Support You can reach Analog Devices, Inc. Customer Support in the following ways: • Visit the Embedded Processing and DSP products Web site at http://www.analog.com/processors/technicalSupport • E-mail tools questions to processor.tools.support@analog.com • E-mail processor questions to processor.support@analog.com (World wide support) processor.europe@analog.com (Europe support) processor.china@analog.com (China support) • Phone questions to 1-800-ANALOGD • Contact your Analog Devices, Inc. local sales office or authorized distributor • Send questions by mail to: Analog Devices, Inc. One Technology Way xiv ADSP-BF506F EZ-KIT Lite Evaluation System Manual Preface P.O. Box 9106 Norwood, MA 02062-9106 USA Supported Processors This evaluation system supports Analog Devices ADSP-BF504, ADSP-BF504F, and ADSP-BF506F Blackfin embedded processors. Product Information Product information can be obtained from the Analog Devices Web site, VisualDSP++ online Help system, and a technical library CD. Analog Devices Web Site The Analog Devices Web site, www.analog.com, provides information about a broad range of products—analog integrated circuits, amplifiers, converters, and digital signal processors. To access a complete technical library for each processor family, go to http://www.analog.com/processors/technical_library. The manuals selection opens a list of current manuals related to the product as well as a link to the previous revisions of the manuals. When locating your manual title, note a possible errata check mark next to the title that leads to the current correction report against the manual. Also note, MyAnalog.com is a free feature of the Analog Devices Web site that allows customization of a Web page to display only the latest information about products you are interested in. You can choose to receive weekly e-mail notifications containing updates to the Web pages that meet ADSP-BF506F EZ-KIT Lite Evaluation System Manual xv Product Information your interests, including documentation errata against all manuals. MyAnalog.com provides access to books, application notes, data sheets, code examples, and more. Visit MyAnalog.com to sign up. If you are a registered user, just log on. Your user name is your e-mail address. VisualDSP++ Online Documentation Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, Dinkum Abridged C++ library, and FLEXnet License Tools software documentation. You can search easily across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary Portable Documentation Format (.pdf) files for all manuals are provided on the VisualDSP++ installation CD. Each documentation file type is described as follows. File .chm .htm or .html Description Help system files and manuals in Microsoft help format Dinkum Abridged C++ library and FLEXnet License Tools software documentation. Viewing and printing the .html files requires a browser, such as Internet Explorer 6.0 (or higher). VisualDSP++ and processor manuals in PDF format. Viewing and printing the .pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher). .pdf Technical Library CD The technical library CD contains seminar materials, product highlights, a selection guide, and documentation files of processor manuals, VisualDSP++ software manuals, and hardware tools manuals for the following processor families: Blackfin, SHARC, TigerSHARC, ADSP-218x, and ADSP-219x. xvi ADSP-BF506F EZ-KIT Lite Evaluation System Manual Preface To order the technical library CD, go to http://www.analog.com/processors/technical_library, navigate to the manuals page for your processor, click the request CD check mark, and fill out the order form. Data sheets, which can be downloaded from the Analog Devices Web site, change rapidly, and therefore are not included on the technical library CD. Technical manuals change periodically. Check the Web site for the latest manual revisions and associated documentation errata. Related Documents For information on product related development software, see the following publications. Table 1. Related Processor Publications Title ADSP-BF504/BF506(F) Blackfin Embedded Processor Data Sheet ADSP-BF50x Blackfin Processor Hardware Reference Blackfin Processor Programming Reference Description General functional description, pinout, and timing of the processor. Description of the internal processor architecture and all register functions. Description of all allowed processor assembly instructions. Table 2. Related VisualDSP++ Publications Title ADSP-BF506F EZ-KIT Lite Evaluation System Manual Description Description of the hardware capabilities of the evaluation system; description of how to access these capabilities in the VisualDSP++ environment. Description of the VisualDSP++ features and usage. Description of the assembler function and commands. VisualDSP++ User’s Guide VisualDSP++ Assembler and Preprocessor Manuals ADSP-BF506F EZ-KIT Lite Evaluation System Manual xvii Notation Conventions Table 2. Related VisualDSP++ Publications (Cont’d) Title VisualDSP++ C/C++ Complier and Library Manual for Blackfin Processors VisualDSP++ Linker and Utilities Manual VisualDSP++ Loader and Utilities Manual VisualDSP++ Device Drivers and System Services Manual for Blackfin Processors Description Description of the complier function and commands for Blackfin processors. Description of the linker function and commands. Description of the loader/splitter function and commands. Description of the device drivers’ and system services’ functions and commands. Notation Conventions Text conventions used in this manual are identified and described as follows. Example Close command (File menu) {this | that} Description Titles in reference sections indicate the location of an item within the VisualDSP++ environment’s menu system (for example, the Close command appears on the File menu). Alternative required items in syntax descriptions appear within curly brackets and separated by vertical bars; read the example as this or that. One or the other is required. Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that. Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipse; read the example as an optional comma-separated list of this. Commands, directives, keywords, and feature names are in text with letter gothic font. Non-keyword placeholders appear in text with italic style format. [this | that] [this,…] .SECTION filename xviii ADSP-BF506F EZ-KIT Lite Evaluation System Manual Preface Example Description Note: For correct operation, ... A Note provides supplementary information on a related topic. In the online version of this book, the word Note appears instead of this symbol. Caution: Incorrect device operation may result if ... Caution: Device damage may result if ... A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage. In the online version of this book, the word Caution appears instead of this symbol. Warning: Injury to device users may result if ... A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for the devices users. In the online version of this book, the word Warning appears instead of this symbol. ADSP-BF506F EZ-KIT Lite Evaluation System Manual xix Notation Conventions xx ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1 USING ADSP-BF506F EZ-KIT LITE This chapter provides specific information to assist you with development of programs for the ADSP-BF506F EZ-KIT Lite evaluation system. The following topics are covered. • “Package Contents” on page 1-2 • “Default Configuration” on page 1-3 • “EZ-KIT Lite Installation” on page 1-3 • “EZ-KIT Lite Session Startup” on page 1-5 • “Evaluation License Restrictions” on page 1-7 • “Memory Map” on page 1-7 • “Internal Flash Memory Interface” on page 1-8 • “SPI Flash Memory Interface” on page 1-9 • “Power-On-Self Test” on page 1-9 • “LEDs and Push Buttons” on page 1-10 • “JTAG Interface” on page 1-10 • “Expansion Interface II” on page 1-11 • “VDDINT Programmable Regulator” on page 1-12 • “Power Measurements” on page 1-12 ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-1 Package Contents • “Example Programs” on page 1-13 • “Background Telemetry Channel” on page 1-13 • “Reference Design Information” on page 1-14 For information about the graphical user interface, including the boot loading, target options, and other facilities of the EZ-KIT Lite system, refer to the online Help. For more detailed information about the ADSP-BF506F Blackfin processor, see documents referred to as “Related Documents”. Package Contents Your ADSP-BF506F EZ-KIT Lite package contains the following items. • ADSP-BF506F EZ-KIT Lite board • VisualDSP++ Installation Quick Reference Card • CD containing: VisualDSP++ software ADSP-BF506F EZ-KIT Lite debug software USB driver files Example programs • USB cable Contact the vendor where you purchased your EZ-KIT Lite or contact Analog Devices, Inc. if any item is missing. 1-2 ADSP-BF506F EZ-KIT Lite Evaluation System Manual Using ADSP-BF506F EZ-KIT Lite Default Configuration The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package. The ADSP-BF506F EZ-KIT Lite board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your computer case. When removing the EZ-KIT Lite board from the package, handle the board carefully to avoid the discharge of static electricity, which can damage some components. Figure 1-1 shows the default jumper settings, switches, connector locations, and LEDs used in installation. Confirm that your board is in the default configuration before using the board. EZ-KIT Lite Installation For correct operation, install the software and hardware in the order presented in the VisualDSP++ Installation Quick Reference Card. Substitute instructions in step 3 with instructions in this section. There are two options to connect the EZ-KIT Lite hardware to a personal computer (PC) running VisualDSP++ 5.0: via an Analog Devices emulator or va a standalone debug module. The standalone debug agent allows a debug agent to interface to the ADSP-BF506F EZ-KIT Lite. The standalone debug agent is shipped with the kit. ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-3 EZ-KIT Lite Installation Figure 1-1. EZ-KIT Lite Hardware Setup To connect the EZ-KIT Lite to a PC via an emulator: 1. Plug the 5V adaptor into connector P9 (labeled 5V) or plug the USB cable into ZP1 (labeled USB). 2. Attach the emulator to the header connector P1 (labeled JTAG) on the EZ-KIT Lite. 1-4 ADSP-BF506F EZ-KIT Lite Evaluation System Manual Using ADSP-BF506F EZ-KIT Lite To connect the EZ-KIT Lite to a PC via the debug agent: 1. Plug one side of the provided USB cable into the USB connector of the debug agent ZP1 (labeled USB). Plug the other side of the cable into a USB port of the PC running VisualDSP++ . 2. Verify that the yellow USB monitor LED on the debug agent, ZLED2, is lit. This signifies that the board is communicating properly with the host PC and ready to run VisualDSP++. EZ-KIT Lite Session Startup 1. If you are running VisualDSP++ for the first time, navigate to the VisualDSP++ environment via the Start–>Programs menu. The main window appears. Note that VisualDSP++ does not connect to any session. Skip the rest of this step to step 2. If you have run VisualDSP++ previously, the last opened session appears on the screen. You can override the default behavior and force VisualDSP++ to start a new session by pressing and holding down the Ctrl key while starting VisualDSP++. Do not release the Ctrl key until the Session Wizard appears on the screen. Go to step 3. 2. To connect to a new EZ-KIT Lite session, start Session Wizard by selecting one of the following. • From the Session menu, New Session. • From the Session menu, Session List. Then click New Session from the Session List dialog box. • From the Session menu, Connect to Target. ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-5 EZ-KIT Lite Session Startup 3. The Select Processor page of the wizard appears on the screen. Ensure Blackfin is selected in Processor family. In Choose a target processor, select ADSP-BF506F. Click Next. 4. The Select Connection Type page of the wizard appears on the screen. Select EZ-KIT Lite and click Next. 5. The Select Platform page of the wizard appears on the screen. Ensure that the selected platform is ADSP-BF506F EZ-KIT Lite via Debug Agent. Specify your own Session name for your session or accept the default name. The session name can be a string of any length; although, the box displays approximately 32 characters. The session name can include space characters. If you do not specify a session name, VisualDSP++ creates a session name by combining the name of the selected platform with the selected processor. The only way to change a session name later is to delete the session and open a new session. Click Next. 6. The Finish page of the wizard appears on the screen. The page displays your selections. Check the selections. If you are not satisfied, click Back to make changes; otherwise, click Finish. VisualDSP++ creates the new session and connects to the EZ-KIT Lite. Once connected, the main window’s title is changed to include the session name set in step 6. To disconnect from a session, click the disconnect button or select Session–>Disconnect from Target. To delete a session, select Session –> Session List. Select the session name from the list and click Delete. Click OK. 1-6 ADSP-BF506F EZ-KIT Lite Evaluation System Manual Using ADSP-BF506F EZ-KIT Lite Evaluation License Restrictions The ADSP-BF506F EZ-KIT Lite installation is part of the the VisualDSP++ installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial unrestricted 90-day evaluation license expires: • VisualDSP++ restricts a connection to the ADSP-BF506F EZ-KIT Lite via the USB debug agent interface only. Connections to simulators and emulation products are no longer allowed. • The linker restricts a user program to to ¼ of internal memory (16 Kbytes), which is 4 Kbytes for code space with no restrictions for data space. • The EZ-KIT Lite hardware must be connected and powered up to use VisualDSP++ with a valid evaluation or permanent license. Refer to the VisualDSP++ Installation Quick Reference Card for details. Memory Map The ADSP-BF506F processor has internal static random access memory (SRAM) used for instruction or data storage. See Table 1-1. The internal memory details can be found in the ADSP-BF50x Blackfin Processor Hardware Reference. The ADSP-BF506F EZ-KIT Lite board includes external serial peripheral interconnect (SPI) flash and internal flash memories. See Table 1-2; see also the following “Internal Flash Memory Interface” and “SPI Flash Memory Interface”. ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-7 Internal Flash Memory Interface Table 1-1. EZ-KIT Lite Internal Memory Map Start Address 0xFFE0 0000 0xFFC0 0000 0xFFB0 1000 0xFFB0 0000 0xFFA1 4000 0xFFA0 8000 0xFFA0 4000 0xFFA0 0000 0xFF80 8000 0xFF80 4000 0xFF80 0000 0xEF00 1000 Content CORE MEMORY MAPPED REGISTERS SYSTEM MEMORY MAPPED REGISTERS Reserved INTERNAL SCRATCHPAD RAM (4K BYTES) Reserved Reserved L1 INSTRUCTION SRAM/CACHE (16K BYTES) L1 INSTRUCTION BANK A SRAM (16K BYTES) Reserved L1 DATA BANK A SRAM/CACHE (16K BYTES) L1 DATA BANK A SRAM (16K BYTES) Reserved Table 1-2. EZ-KIT Lite External (Interface-Accessible) Memory Map Start Address 0xEF00 0000 0x2040 0000 0x2000 0000 0x0000 0000 Content BOOT ROM (4K BYTES) Reserved SYNC FLASH (32M BITS) Reserved Internal Flash Memory Interface Internal parallel flash memory of the ADSP-BF506F EZ-KIT Lite is a 4 MB (2M x 16 bits) Numonyx M58WT032 device, which is internal to the processor. The address range for flash memory is 0x2000 0000 to 0x203F FFFF. 1-8 ADSP-BF506F EZ-KIT Lite Evaluation System Manual Using ADSP-BF506F EZ-KIT Lite By default, the EZ-KIT Lite boots from SPI flash memory. The processor boots from internal parallel flash memory if the boot mode select switch (SW2) is set to position 1 or 2; see “Boot Mode Select Switch (SW2)” on page 2-8. Flash memory code can be modified. For instructions, refer to the online Help and example program included in the EZ-KIT Lite installation directory. SPI Flash Memory Interface SPI flash memory of the ADSP-BF506F EZ-KIT Lite is a 16 Mb Numonyx M25P16 device. The device is selected via SPI0_SEL1. SPI flash memory is pre-loaded with boot code for the power-on-self test (POST) program. For more information, refer to “Power-On-Self Test” on page 1-9. P ower-On-Self Test The power-on-self-test program (POST) tests all EZ-KIT Lite peripherals and validates functionality as well as connectivity to the processor. Once assembled, each EZ-KIT Lite if fully tested for an extended period of time with a POST. All EZ-KIT Lite boards are shipped with a POST pre-loaded into one of their on-board flash memories. The POST is executed by resetting the board and pressing the proper push button(s). The POST also can be used for reference for a custom software design or hardware troubleshooting. Note that the source code for the POST program is included in the VisualDSP++ installation directory along with the readme.txt file, which describes how the board is configured to run a POST. ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-9 LEDs and Push Buttons LEDs and Push Buttons The EZ-KIT Lite provides two push buttons and three LEDs for general-purpose I/O. The three LEDs, labeled LED2 through LED4, are accessed via the PF0–2 GPIO ports of the processor. For information on how to program the flag pins, refer to the ADSP-BF50x Blackfin Processor Hardware Reference Manual. The two general-purpose push buttons are labeled PB0 and PB1. The status of each individual button can be read through programmable flag inputs PF3 and PF4. The flag reads a ‘1’ when a corresponding switch is being pressed. When the switch is released, the flag reads a ‘0’. A connection between the push buttons and processor inputs is established through a DIP switch, SW3. The switch should be turned off when another source is driving the signals. An example program is included in the ADSP-BF506F installation directory to demonstrate functionality of the LEDs and push buttons. The LED and push button signals also are connected to the expansion interface II; see “Expansion Interface II Connectors (P2 and P4)” on page 2-18 and “Expansion Interface II Connector (P3)” on page 2-18. JTAG Interface The board contains an on-board debug agent that operates via a USB port. The ADSP-BF506F EZ-KIT Lite receives all of its power via USB; therefore, no power supply is required. For debugging, the JTAG connector (P1) allows an external emulator (USB-ICE or HPUSB-ICE) to connect to the board, instead of the on-board debug agent. 1-10 ADSP-BF506F EZ-KIT Lite Evaluation System Manual Using ADSP-BF506F EZ-KIT Lite For more information about emulators, contact Analog Devices or go to: http://www.analog.com/en/embedded-processing-dsp/Blackfin/processors/Blackfin_development_tools/fca.html. Expansion Interface II The expansion interface II allows an Analog Devices EZ-Extender or a custom-design daughter board to be tested across various hardware platforms that have the same expansion interface. The expansion interface II implemented on the ADSP-BF506F EZ-KIT Lite consists of three connectors, which are 0.1 in. shrouded headers (P2– 4). The connectors contain a majority of the ADSP-BF506F processor’s signals. For pinout information, go to “ADSP-BF506F EZ-KIT Lite Schematic” on page B-1. The mechanical dimensions of the expansion connectors can be obtained by contacting “Technical or Customer Support”. For more information about daughter boards, visit the Analog Devices Web site at: http://www.analog.com/en/embedded-processing-dsp/Blackfin/processors/Blackfin_development_tools/fca.html. Limits to current and interface speed must be taken into consideration when using the expansion interface. Current for the expansion interface II is sourced from the EZ-KIT Lite; therefore, the current should be limited to 1A for 5V and 500 mA for the 3.3V planes. If more current is required, then a separate power connector and a regulator must be designed on a daughter card. Additional circuitry can add extra loading to signals, decreasing their maximum effective speed. Analog Devices does not support and is not responsible for the effects of additional circuitry. ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-11 VDDINT Programmable Regulator VDDINT Programmable Regulator By default, the EZ-KIT Lite runs at 1.4V. The board contains a programmable regulator that supplies the processor’s core with a voltage between 1.1 and 1.4. The voltage is adjusted by writing to the AD5258 digital potentiometer via the 2-wire interface (TWI) signals.Table 1-3 shows the appropriate step and corresponding voltage values. For an example of writing to the AD5258 potentiometer, refer to the POST example. For more information on the acceptable voltage/frequency values, refer to the ADSP-BF604/BF506(F) Blackfin Embedded Processor data sheet and ADSP-BF50x Blackfin Processor Hardware Reference manual. For more information about the digital potentiometer, refer to the AD5258 data sheet. Table 1-3. Table 5. Voltage Values Step Value 57 46 36 27 18 10 3 Voltage (V) 1.10 1.15 1.20 1.25 1.30 1.35 1.40 Power Measurements Several locations are provided for measuring the current draw from various power planes. Precision 0.1 ohm shunt resistors are available on the VDDINT, VDDEXT, and VDDFLASH voltage domains. For current draw, the jumper is removed, voltage across the resistor can be measured 1-12 ADSP-BF506F EZ-KIT Lite Evaluation System Manual Using ADSP-BF506F EZ-KIT Lite using an oscilloscope, and the value of the resistor can be measured using a precision multi-meter. Once the voltage and resistance are measured, the current can be calculated by dividing the voltage by the resistance. For the highest accuracy, a differential probe should be used for measuring the voltage across the resistor. Example Programs Example programs are provided with the ADSP-BF506F EZ-KIT Lite to demonstrate various capabilities of the product. The programs are installed with the ADSP-BF506F special kit installation, on top of the VisualDSP++ 5.0 base kit or any VisualDSP++ and can be found in the \Blackfin\Examples\ADSP-BF506F EZ-KIT Lite directory. Refer to a readme file provided with each example for more information. Background Telemetry Channel The USB debug agent supports the background telemetry channel (BTC), which facilitates data exchange between VisualDSP++ and the processor without interrupting processor execution. The BTC allows you to view a variable as it is updated or changed, all while the processor continues to execute. For increased performance of the BTC, including faster reading and writing, please check our latest line of processor emulators at: http://www.analog.com/en/embedded-processing-dsp/blackfin/USB-EMULATOR/products/product.html. For more information about the BTC, see the online Help. ADSP-BF506F EZ-KIT Lite Evaluation System Manual 1-13 Reference Design Information Reference Design Information A reference design info package is available for download on the Analog Devices Web site. The package provides information on the design, layout, fabrication, and assembly of the EZ-KIT Lite. The information can be found at: http://www.analog.com/en/embedded-processing-dsp/content/reference_designs/fca.html. 1-14 ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2 ADSP-BF506F EZ-KIT LITE HARDWARE REFERENCE This chapter describes the hardware design of the ADSP-BF506F EZ-KIT Lite board. The following topics are covered. • “System Architecture” on page 2-2 Describes the board’s configuration and explains how the board components interface with the processor. • “Programmable Flags” on page 2-3 Shows the locations and describes the programming flags (PFs). • “Push Buttons and Switches” on page 2-7 Shows the locations and describes the push buttons and switches. • “Jumpers” on page 2-11 Shows the locations and describes the configuration jumpers. • “LEDs” on page 2-14 Shows the locations and describes the LEDs. • “Connectors” on page 2-16 Shows the locations and provides part numbers for the on-board connectors. In addition, the manufacturer and part number information is provided for the mating parts. ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-1 System Architecture System Architecture This section describes the processor’s configuration on the EZ-KIT Lite board (Figure 2-1). Figure 2-1. System Architecture The EZ-KIT Lite is designed to demonstrate the ADSP-BF506F Blackfin processor capabilities. The processor has an I/O voltage of 3.3V. The core voltage of the processor is controlled by an Analog Devices ADP1715 low dropout regulator (LDO) and an Analog Devices AD5258 digipot, which 2-2 ADSP-BF506F EZ-KIT Lite Evaluation System Manual ADSP-BF506F EZ-KIT Lite Hardware Reference is configurable over the 2-wire interface (TWI) signals. Refer to the power-on-self test (POST) example in the ADSP-BF506F installation directory of VisualDSP++ for information on how to set up the TWI interface. The core voltage and clock rate can be set up on the fly by the processor. The input clock is 25 MHz. The default boot mode for the processor is SPI flash boot. See “Boot Mode Select Switch (SW2)” for information on how to change the default boot mode. P rogrammable Flags The processor has 35 general-purpose input/output (GPIO) signals spread across three ports (PF, PG, and PH). The pins are multi-functional and depend on the ADSP-BF506F processor setup. The following tables show how the programmable flag pins are used on the EZ-KIT Lite. • PF programmable flag pins – Table 2-1 PG programmable flag pins – Table 2-2 PH programmable flag pins – Table 2-3 Table 2-1. Port F Programmable Flag Connections Processor Pin PF0 Other Processor Function TSCLK0/UA0_RX_ALT/TMR6/ CUD0 RSCLK0/UA0_TX_ALT/TMR5/ CDG0 DT0PRI/PWM0_BH/PPI_D8/ CZM0 TFS0/PWM0_BL/PPI_D9/ CDG0 EZ-KIT Lite Function Default: LED0 Land grid array, expansion interface II Default: LED1 Land grid array, expansion interface II Default: LED2 Land grid array, expansion interface II Default: PB0 Land grid array, expansion interface II PF1 PF2 PF3 ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-3 Programmable Flags Table 2-1. Port F Programmable Flag Connections (Cont’d) Processor Pin PF4 Other Processor Function RFS0/PWM0_CH/PPI_D10/ TACLK0 RFS0/PWM0_CH/PPI_D10/ TACLK0 UA1_TX/PWM0_TRIP/ PPI_D12 UA1_RX/PWM0_SYNC/ PPI_D13/TACI3 UA1_RTS/DT0SEC/PPI_D7 EZ-KIT Lite Function Default: PB1 Land grid array, expansion interface II Default: not used Land grid array, expansion interface II Default: not used Land grid array, expansion interface II Default: not used Land grid array, expansion interface II Default: not used Land grid array, expansion interface II Default: not used Land grid array, expansion interface II Default: SPI0_SCK Land grid array, expansion interface II Default: SPI0_MISO Land grid array, expansion interface II Default: SPI0_MOSI Land grid array, expansion interface II Default: SPI0_SEL1 Land grid array, expansion interface II Default: not used Land grid array, expansion interface II Default: not used Land grid array, expansion interface II PF5 PF6 PF7 PF8 PF9 UA1_CTS/DR0SEC/PPI_D6/ CZM0 SPI0_SCK/TMR2/PPI_D5 PF10 PF11 SPI0_MISO/PWM0_TRIP/ PPI_D4/TACLK2 SPI0_MOSI/PWM0_SYNC/ PPI_D3 SPI0_SEL1/TMR3/PPI_D2/ SPI0_SS SPI0_SEL2/PWM0_AH/ PPI_D1 SPI0_SEL3/PWM0_AL/ PPI_D0 PF12 PF13 PF14 PF15 2-4 ADSP-BF506F EZ-KIT Lite Evaluation System Manual ADSP-BF506F EZ-KIT Lite Hardware Reference Table 2-2. Port G Programmable Flag Connections Processor Pin PG0 Other Processor Function SPI1_SEL3/TMRCLK/ PPI_CLK/ UA1_RX_ALT/ TACI4 SPI1_SEL2/PPI_FS3/ CAN_RX/ TACI5 SPI1_SEL1/TMR4/CAN_TX/ SPI1_SS HWAIT/SPI1_SCK/DT1SEC/ UA1_TX_ALT SPI1_MOSI/DR1SEC_ALT/ PWM1_SYNC/TACLK6 SPI1_MISO/TMR7/ PWM1_TRIP PG6 ACM_SGLDIFF/SD_D3/ PWM1_AH ACM_RANGE/SD_D2/PWM1_AL EZ-KIT Lite Function Default: CAN_ERR Land grid array, expansion interface II Default: CAN_RX Land grid array, expansion interface II Default: CAN_TX Land grid array, expansion interface II Default: not used Land grid array, expansion interface II Default: SD_WP Land grid array, expansion interface II Default: SD_CD Land grid array, expansion interface II Default: ACM_SGLDIFF SD_D3, land grid array, expansion interface II Default: ACM_RANGE SD_D2, land grid array, expansion interface II Default: ADC_DOUTB SD_D1, land grid array, expansion interface II Default: ADC_DOUTA SD_D0, land grid array, expansion interface II Default: ADC_CS SD_CMD, land grid array, expansion interface II Default: ADC_SCLK SD_CLK, land grid array, expansion interface II Default: UART0_RX DS_D4, land grid array, expansion interface II Default: UART0_TX DS_D5, land grid array, expansion interface II PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 DR1SEC/SD_D1/PWM1_BH PG9 DR1PRI/SD_D0/PWM1_BL PG10 RFS1/SD_CMD/PWM1_CH/ TACI6 RSCLK1/SD_CLK/PWM1_CL/ TACLK7 UA0_RX/SD_D4/PPI_D15/ TACI2 UA0_TX/SD_D5/PPI_D14/ CZM1 PG11 PG12 PG13 ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-5 Programmable Flags Table 2-2. Port G Programmable Flag Connections (Cont’d) Processor Pin PG14 Other Processor Function /UA0_RTS/SD_D6/TMR0/ PPI_FS1/CUD1 /UA0_CTS/SD_D7/TMR1/ PPI_FS2/CDG1 EZ-KIT Lite Function Default: UART0_RTS DS_D5, land grid array, expansion interface II Default: UART0_CTS DS_D7, land grid array, expansion interface II PG15 Table 2-3. Port H Programmable Flag Connections Processor Pin PH0 Other Processor Function ACM_A2/DT1PRI/SPI0_SEL3 /WAKEUP ACM_A1/TFS1/ SPI1_SEL3_ALT/TACLK3 ACM_A0/TSCLK1/ SPI1_SEL2_ALT/TACI7 EZ-KIT Lite Function Default: ACM_A2 Land grid array, expansion interface II Default: ACM_A1 Land grid array, expansion interface II Default: ACM_A0 Land grid array, expansion interface II PH1 PH2 2-6 ADSP-BF506F EZ-KIT Lite Evaluation System Manual ADSP-BF506F EZ-KIT Lite Hardware Reference Push Buttons and Switches This section describes operation of the push buttons and switches. The push button and switch locations are shown in Figure 2-2. Figure 2-2. Push Button and Switch Locations ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-7 Push Buttons and Switches UART Setup Switch (SW1) The UART setup switch (SW1) configures the UART0 signals between the DCE connector (J1) and processor. Table 2-5 shows the switch settings. Table 2-4. UART Setup Switch (SW1) SW1 Position 1 and 3 2 4 5 6 and 7 8 Function Enable flow control Disconnects the UART_RX signal from the processor; the UART_RX signal can be used for another function Connects the RTS and CTS signals together Allows the host to reset the EZ-KIT Lite via the CTS signal Selects the source for the CTS signal Loops the TX and RX signals together for testing Boot Mode Select Switch (SW2) The boot mode select switch (SW2) determines the boot mode of the processor. Table 2-5 shows the available boot mode settings. By default, the ADSP-BF506F processor boots from SPI flash memory. Table 2-5. Boot Mode Select Switch (SW2) SW2 Position 0 1 2 3 4 5 Processor Boot Mode Idle—no boot Boots from stacked parallel flash in asynchronous mode Boots from stacked parallel flash in synchronous mode Boots through SPI0 master from SPI memory Boots through SPI0 slave from host device Boots through PPI from host 2-8 ADSP-BF506F EZ-KIT Lite Evaluation System Manual ADSP-BF506F EZ-KIT Lite Hardware Reference Table 2-5. Boot Mode Select Switch (SW2) (Cont’d) SW2 Position 6 7 Processor Boot Mode Reserved Boots through UART0 slave from host device Push Button Enable Switch (SW3) The push button enable switch (SW3) disconnects the associated push button circuit from the general-purpose I/O (GPIO) pins of the processor and allows the signals to be used on the expansion interface. ADC Enable Switch (SW4) The ADC enable switch (SW4) disconnects the ADC from the SPORT1 interface of the processor and allows the ADC signals to be used on the SD connector or the expansion interface. CAN Enable Switch (SW5) The CAN enable switch (SW5) disconnects the CAN transceiver from the processor and allows the CAN signals to be used on the expansion interface. Reset Push Button (SW6) The reset push button (SW6) resets the processor via a hardware reset. The reset push button does not reset the on-board debug agent. The only way to reset the debug agent is to cycle power. ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-9 Push Buttons and Switches Programmable Flag Push Buttons (SW7–8) Two momentary push buttons (SW7 and SW8) are provided for general-purpose user input. The buttons are connected to the PF3–4 GPIO pins of the processor. The push buttons are active high and, when pressed, send a high (1) to the processor. The GPIO enable switch (SW3) disconnects the push buttons from the associated push button signals (refer to “Push Button Enable Switch (SW3)” on page 2-9 for more information). ADC Loopback Switches (SW9–10) The ADC loopback switches (SW9 and SW10) are used for testing only. The switches connect a test signal to the ADC inputs. 2-10 ADSP-BF506F EZ-KIT Lite Evaluation System Manual ADSP-BF506F EZ-KIT Lite Hardware Reference Jumpers This section describes functionality of the configuration jumpers. Figure 2-3 shows the jumper locations. Figure 2-3. Configuration Jumper Locations SPI FLASH CS Enable Jumper (JP1) The SPI flash CS enable jumper (JP1) connects the SPI0_SEL1 signal to SPI flash memory. By default, JP1 is installed, and SPI flash is connected. ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-11 Jumpers Voltage Reference Select Jumper (JP2) The voltage reference select jumper (JP2) selects between a 2.5V on-chip reference and an external voltage reference. When the jumper is installed on positions 2 and 3, the on-chip 2.5V reference is used. When the jumper is installed on positions 1 and 2, an external reference can be connected to the ADC through the DCAPA and DCAPB signals (see “ADC Voltage Reference (JP6)” on page 2-13). By default, JP2 is installed on positions 2 and 3. VDDEXT Power Jumper (JP3) The VDDEXT power jumper (JP3) is used to measure the processor’s I/O voltage and current. By default, JP3 is ON, and the current flows through the two-pin IDC header. To measure power, remove the jumper on JP3 and measure the voltage across the precision resistor and resistance value. For more information, refer to “Power Measurements” on page 1-12. VDDINT Power Jumper (JP4) The VDDINT power jumper (JP4) is used to measure the processor’s core voltage and current. By default, JP4 is ON, and the current flows through the two-pin IDC header. To measure power, remove the jumper on JP4 and measure the voltage across the precision resistor and resistance value. For more information, refer to “Power Measurements” on page 1-12. VDDFLASH Power Jumper (JP5) The VDDFLASH power jumper (JP5) is used to measure the internal parallel flash voltage and current. By default, JP5 is ON, and the current flows through the two-pin IDC header. To measure power, remove the jumper on JP5 and measure the voltage across the precision resistor and resistance value. For more information, refer to “Power Measurements” on page 1-12. 2-12 ADSP-BF506F EZ-KIT Lite Evaluation System Manual ADSP-BF506F EZ-KIT Lite Hardware Reference ADC Voltage Reference (JP6) The ADC voltage reference jumper (JP6) is used to supply a reference voltage to the ADC. In order to use an external voltage reference, a jumper must be placed on positions 1 and 2 of JP2. To use the on-board AD780 precision voltage reference, install a jumpers at position 1, 2 and 3, 4. To supply your own voltage reference, remove all jumpers from JP6 and connect your voltage reference to pins 1 and 3. By default, no jumpers are installed on JP6. ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-13 LEDs LEDs This section describes the on-board LEDs. Figure 2-3 shows the LED locations. Figure 2-4. LED Locations 2-14 ADSP-BF506F EZ-KIT Lite Evaluation System Manual ADSP-BF506F EZ-KIT Lite Hardware Reference Reset LED (LED1) When LED1 is lit, it indicates that the master reset of all the major ICs is active. The reset signal is controlled by the Analog Devices ADM708 supervisory reset circuit. GPIO LEDs (LED2–4) Three LEDs connect to the three general-purpose I/O pins of the processor (see Table 2-6). The LEDs are active high and lit by writing a “1” to the correct programmable flag signal. Table 2-6. GPIO LEDs LED Reference Designator LED2 LED3 LED4 Processor Programmable Flag Pin PF0 PF1 PF2 Power LED (LED5) When LED5 is lit solid, it indicates that power is being properly supplied to the board. ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-15 Connectors Connectors This section describes connector functionality and provides information about mating connectors. The connector locations are shown in Figure 2-5. Figure 2-5. Connector Locations 2-16 ADSP-BF506F EZ-KIT Lite Evaluation System Manual ADSP-BF506F EZ-KIT Lite Hardware Reference RS-232 Connector (J1) Part Description DB9, female, vertical mount Manufacturer NORCOMP Mating Cable 2m female-to-female cable DIGI-KEY AE1020-ND Part Number 191-009-213-L-571 CAN Connector (J2) Part Description RJ11 modular jack Manufacturer AMP Mating Cable 4-conductor modular jack cable L-COM TSP3044 Part Number 5558872-1 SD Connector (J3) Part Description SD 8-bit Manufacturer MORETHANALL Memory Card 256 MB SANDISK-STACK SDSDB-256-A10 Part Number MHC-W21-601-LF JTAG Connector (P1) The JTAG header (P1) is the connecting point between the JTAG interface and ADSP-BF506F processor. Pin 3 is missing to provide keying. Pin 3 in the mating connector should have a plug. ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-17 Connectors When an emulator is used with the EZ-KIT Lite, the on-board debug agent is bypassed. E xpansion Interface II Connectors (P2 and P4) P2 and P4 are board-to-board connectors providing signals for the SPI, TWI, UART, SPORT, and GPIO signals of the processor. The connectors are located on the upper edge of the board (one connector is on the top and one is on the bottom). For more information, see “Expansion Interface II” on page 1-11. Part Description 50-position 0.1’’, SMT header Manufacturer SAMTEC Mating Connector 50-position 0.1’’, SMT socket SAMTEC SSW-125-22-F-D-VS Part Number TSSH-125-01-L-DV-A E xpansion Interface II Connector (P3) is a board-to-board connector providing signals for the PPI and GPIO signals of the processor. The connector is located on the upper edge of the board. For more information, see “Expansion Interface II” on page 1-11. P3 Part Description 70-position 0.1’’, SMT header Manufacturer SAMTEC Mating Connector 70-position 0.1’’, SMT socket SAMTEC SSW-135-22-F-D-VS Part Number TSSH-135-01-L-DV-A 2-18 ADSP-BF506F EZ-KIT Lite Evaluation System Manual ADSP-BF506F EZ-KIT Lite Hardware Reference DMAX Land Grid Array Connectors (P5–6) The DMAX land grid array areas (P5 and P6) are intended for the probing of the processor signals. The pads are exposed and designed to attach a Tektronix logic analyzer to the connectors listed in the following table. For more information about the land grid array, consult the Tektronix web site. Part Description Primary retention Alternate retention Manufacturer Tektronix Tektronix Part Number 020290800 020291000 ADC Input Connector (P7) Part Description 24-position 0.1’’, TH header Manufacturer SAMTEC Part Number TSSH-112-01-L-D Power Connector (P9) Part Description 0.65 mm power jack Manufacturer CUI Mating Connector 5.0VDC@3.6A power supply GLOBETEK GS-1750(R) Part Number 045-0883R ADSP-BF506F EZ-KIT Lite Evaluation System Manual 2-19 Connectors 2-20 ADSP-BF506F EZ-KIT Lite Evaluation System Manual A ADSP-BF506F EZ-KIT LITE BILL OF MATERIALS The bill of materials corresponds to “ADSP-BF506F EZ-KIT Lite Schematic” on page B-1. Ref. 1 2 3 4 5 6 7 8 9 10 11 12 Qty. 1 1 1 2 1 1 1 1 1 1 1 1 Description 74LVC14A SOIC14 Reference Designator U1 Manufacturer TI IDT EPSON TI PHILIPS VISHAY ST MICRO MICREL ANALOG DEVICES ANALOG DEVICES ANALOG DEVICES ANALOG DEVICES Part Number 74LVC14AD IDT74FCT3244APYG SG-8002CA MP SN74LVC1G08DBVR TJA1041T/N1 Si4411DY-T1-E3 M25P16-VMW6G MIC94042YFL ADM708SARZ ADM3202ARNZ ADSPBF506FBSWZENG ADP1864AUJZ-R7 IDT74FCT3244A U5 PY SSOP20 25MHZ OSC003 SN74LVC1G08 SOT23-5 TJA1041 SOIC14 SI4411DY SO-8 BF506F M25P16 U4 MIC94042 MLF4 ADM708SARZ SOIC8 ADM3202ARNZ SOIC16 ADSP-BF506F LQFP120 ADP1864AUJZ SOT23-6 U15 U18,U20 U19 U3 U4 U6 U17 U16 U7 VR1 ADSP-BF506F EZ-KIT Lite Evaluation System Manual A-1 Ref. 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 Qty. 1 1 1 6 1 1 2 2 1 1 1 4 1 1 1 1 6 Description ADP1715 MSOP8 AD5258 MSOP10 ADP1715 MSOP8 AD8022 MSOP8 ADP1613 MSOP8 DIP8 SWT016 DIP6 SWT017 DIP4 SWT018 DB9 9PIN CON038 RJ11 4PIN CON039 DIP2 SWT020 IDC 2X1 IDC2X1 IDC 3X1 IDC3X1 IDC 7X2 IDC7X2 IDC 12X2 IDC12X2 3A RESETABLE FUS004 IDC 2PIN_JUMPER_ SHORT Reference Designator VR3 U2 VR4 U9-14 VR2 SW1 SW9-10 SW4-5 J1 J2 SW3 JP1,JP3-5 JP2 P1 P7 F1 SJ1-6 Manufacturer ANALOG ANALOG DEVICES ANALOG DEVICES ANALOG DEVICES ANALOG DEVICES C&K CTS ITT NORCOMP TYCO C&K FCI FCI SAMTEC SAMTEC TYCO DIGI-KEY Part Number ADP1715ARMZ-R7 AD5258BRMZ10 ADP1715ARMZ-1.8R7 AD8022ARMZ ADP1613ARMZ-R7 TDA08H0SB1 218-6LPST TDA04HOSB1 191-009-213-L-571 5558872-1 CKN9064-ND 90726-402HLF 90726-403HLF TSW-107-07-T-D SSW-112-01-T-D SMD300F-2 S9001-ND A-2 ADSP-BF506F EZ-KIT Lite Evaluation System Manual ADSP-BF506F EZ-KIT Lite Bill Of Materials Ref. 30 31 32 33 34 35 36 37 38 39 40 41 42 43 Qty. 1 3 1 1 3 2 2 2 1 2 2 8 1 34 Description PWR .65MM CON045 MOMENTARY SWT024 ROTARY SWT027 SD_CONN 8-BIT CON067 YELLOW LED001 100 1/10W 5% 0805 600 100MHZ 500MA 1206 Reference Designator P9 SW6-8 SW2 J3 LED2-4 R92,R94 FER2-3 Manufacturer DIG PANASONIC COPAL MORETHANALL PANASONIC VISHAY STEWARD VISHAY MURATA AVX AVX AVX AVX AVX Part Number CP1-023-ND EVQ-Q2K03W S-8110 MHC-W21-601-LF LN1461C CRCW0805100RJNEA HZ1206B601R-10 CRCW08050000Z0EA DLW5BSN191SQ2 0805YC474KAT2A 0805ZC105KAT2A 08056D106KAT2A 08056D475KAT2A 0402ZD104KAT2A 0 1/10W 5% 0805 R71,C101 190 100MHZ 5A FER002 0.47UF 16V 10% 0805 1UF 10V 10% 0805 10UF 6.3V 10% 0805 4.7UF 6.3V 10% 0805 0.1UF 10V 10% 0402 FER4 C76-77 C87-88 C7,C13,C21,C33,C71, C73-74,C121 C113 C4-6,C9-12,C20,C2224,C31-32,C37-48,C70, C72,C75,C89-92,C109, C118 C2-3,C8,C14-19,C2530,C81-86,C93,C108, C122 44 24 0.01UF 16V 10% 0402 AVX 0402YC103KAT2A ADSP-BF506F EZ-KIT Lite Evaluation System Manual A-3 Ref. 45 Qty. 42 Description 10K 1/16W 5% 0402 Reference Designator R3-6,R9,R11,R14,R19, R27-38,R69-70,R72-73, R79,R81-83,R88-91, R95,R98-101,R108, R128,R133-134,R137 R15-17 Manufacturer VISHAY Part Number CRCW040210K0FKED 46 47 3 25 4.7K 1/16W 5% 0402 VISHAY PANASONIC CRCW04024K70JNED ERJ-2GE0R00X 0 1/16W 5% 0402 R21-22,R25-26,R39-40, R42-43,R45-46,R49-50, R52-53,R55-56,R58-61, R63-64,R66-67,R130 33 1/16W 5% 0402 2.2UF 10V 10% 0805 1A SK12 DO-214AA 10PF 50V 5% 0805 1UF 16V 10% 0603 68PF 50V 5% 0603 4.7UF 6.3V 20% 0603 470PF 50V 5% 0603 220UF 6.3V 20% D2E 330 1/10W 5% 0603 R7-8,R18,R20,R135136,R138-142 C119-120 D8,D10 C34-36,C49-69 C96 C112 C106-107,C110 C111 CT1 R80,R84-87 48 49 50 51 52 53 54 55 56 57 58 11 2 2 24 1 1 3 1 1 5 1 VISHAY AVX CRCW040233R0JNEA 0805ZD225KAT2A DIODES INC B120B-13-F AVX PANASONIC AVX PANASONIC AVX SANYO VISHAY PHYCOMP 08055A100JAT2A ECJ-1VB1C105K 06035A680JAT2A ECJ-1VB0J475M 06033A471JAT2A 10TPE220ML CRCW0603330RJNEA 232270296001L 0 1/10W 5% 0603 R111 A-4 ADSP-BF506F EZ-KIT Lite Evaluation System Manual ADSP-BF506F EZ-KIT Lite Bill Of Materials Ref. 59 Qty. 15 Description 10 1/10W 5% 0603 4700PF 16V 10% 0603 100PF 50V 5% 0603 1000PF 50V 5% 0603 62.0 1/10W 1% 0603 4.99K 1/16W 1% 0603 24.9K 1/10W 1% 0603 0.05 1/2W 1% 1206 10UF 16V 10% 1210 GREEN LED001 RED LED001 1000PF 50V 5% 1206 255.0K 1/10W 1% 0603 80.6K 1/10W 1% 0603 22000PF 25V 10% 0402 5A MBRS540T3G SMC Reference Designator R23-24,R41,R44,R4748,R51,R54,R57,R62, R65,R68,R75,R77,R113 C79 C78,C80 C104 R74,R76 R112 R123 R121-122,R125-126, R131 C97-100,C102,C114, C117 LED5 LED1 C115-116 R127 R124 C94 D6-7 Manufacturer VISHAY Part Number CRCW060310R0JNEA 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 1 2 1 2 1 1 5 7 1 1 2 1 1 1 2 DIGI-KEY AVX PANASONIC DIGI-KEY VISHAY DIGI-KEY SEI AVX PANASONIC PANASONIC AVX VISHAY DIGI-KEY DIGI-KEY ON SEMI 311-1083-2-ND 06035A101JAT2A ECJ-1VC1H102J 311-62.0HRTR-ND CRCW06034K99FKEA 311-24.9KHTR-ND CSF 1/2 0.05 1%R 1210YD106KAT2A LN1361CTR LN1261CTR 12065A102JAT2A CRCW06032553FK 311-80.6KHRCT-ND 490-3252-1-ND MBRS540T3G ADSP-BF506F EZ-KIT Lite Evaluation System Manual A-5 Ref. 75 76 77 78 79 80 81 Qty. 1 1 1 1 2 1 2 Description 2.5UH 30% IND013 33.0K 1/16W 1% 0402 1.0K 1/16W 1% 0402 220PF 50V 10% 0402 100K 1/16W 5% 0402 2.2UF 25V 10% 0805 1A MBR130LSFT1G SOD-123FL 1UH 20% IND019 33 1/16W 5% RNS003 1.2K 1/16W 1% 0402 4.3 1/4W 5% 1206 2.67K 1/16W 1% 0402 22UH 20% IND024 330 100MHZ 1.5A 0805 3300PF 50V 5% 0603 Reference Designator L3 R2 R120 C1 R1,R114 C103 D4-5 Manufacturer COILCRAFT ROHM PANASONIC DIGI-KEY DIGI-KEY DIGI-KEY ON SEMI Part Number MSS1038-252NLB MCR01MZPF3302 ERJ-2RKF1001X 311-1035-2-ND 541-100KJTR-ND 490-3331-1-ND MBR130LSFT1G 82 83 84 85 86 87 88 89 2 2 3 2 1 1 1 1 L1-2 RN1-2 R12-13,R117 R116,R119 R118 L4 FER1 C95 COILCRAFT PANASONIC VISHAY PANASONIC PANASONIC COILCRAFT MURATA PANASONIC ME3220-102MLB EXB-2HV330JV CRCW04021K20FKED ERJ-8GEYJ4R3V ERJ-2RKF2671X MSD7342-223MLC BLM21PG331SN1D ECJ-1VB1H332K A-6 ADSP-BF506F EZ-KIT Lite Evaluation System Manual ADSP-BF506F EZ-KIT Lite Bill Of Materials Ref. 90 91 92 93 94 95 Qty. 1 1 1 1 1 1 Description 27.4K 1/10W 1% 0603 20.0K 1/16W 1% 0402 30A GSOT05 SOT23-3 30A GSOT03 SOT23-3 40A ESD5Z2.5T1 SOD-523 7A VESD01-02V-GS 08 SOD-52 IDC 25x2 IDC25x2_SMTA 35x2 IDC35x2_SMTA Reference Designator R115 R109 D2 D3 D9 D1 Manufacturer PANASONIC VISHAY VISHAY VISHAY ON SEMI VISHAY Part Number ERJ-3EKF2742V CRCW040220K0FKED GSOT05-GS08 GSOT03-GS08 ESD5Z2.5T1G VESD01-02V-GS08 96 97 1 1 P2 P3 SAMTEC SAMTEC TSSH-125-01-L-DV-A TSSH-135-01-L-DV-A ADSP-BF506F EZ-KIT Lite Evaluation System Manual A-7 A-8 ADSP-BF506F EZ-KIT Lite Evaluation System Manual A B C D 1 1 2 2 ADSP-BF506F EZ-KIT LITE SCHEMATIC 3 3 4 ANALOG DEVICES Title Size Board No. 17-12-2009_16:20 20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD 4 ADSP-BF506F EZ-KIT LITE TITLE A0226-2009 Sheet D 1 Rev C Date A B C 1.0 of 10 A B C D 3.3V R14 10K 0402 U7 118 119 2 4 3 5 7 8 9 10 R8 0402 33 14 16 18 19 21 22 27 28 29 31 32 38 39 40 43 44 45 46 47 48 49 50 3.3V 11 R20 33 0402 OUT 3 RESET 12 NMI RESET PH0/ACM_A2/DT1PRI/SPI0_SEL3/WAKEUP PH1/ACM_A1/TFS1/SPI1_SEL3/TACLK3 PH2/ACM_A0/TSCLK1/SPI1_SEL2/TACI7 110 111 CLKIN XTAL EXT_WAKE PG DSP_EMU DSP_TRST DSP_TCK DSP_TMS C3 0.01UF 0402 DSP_TDI DSP_TDO R18 0402 33 R140 0402 33 68 37 34 35 33 36 EMU EXTCLK TRST TCK TMS TDI TDO BMODE0 BMODE1 BMODE2 R9 10K 0402 ADSP-BF506F LQFP120_EP 58 57 56 1 2 4 4 5 6 7 3 SCL SDA 55 54 R138 0402 R139 0402 33 33 SW2 2 C 1 0 SCL SDA 70 71 120 R7 0402 EXT_WAKE PG 33 TP1 R13 1.2K 0402 R12 1.2K 0402 113 115 114 ACM_A2 ACM_A1 ACM_A0 33 RNS003 ADC_CS/SD_CMD ADC_SCLK/SD_CLK LED0 PF0/TSCLK0/UA0_RX/TMR6/CUD0 PF1/RSCLK0/UA0_TX/TMR5/CDG0 PF2/DT0PRI/PWM0_BH/PPI_D8/CZM0 PF3/TFS0/PWM0_BL/PPI_D9/CDG0 PF4/RFS0/PWM0_CH/PPI_D10/TACLK0 PF5/DR0PRI/PWM0_CL/PPI_D11/TACLK1 PF6/UA1_TX/PWM0_TRIP/PPI_D12 PF7/UA1_RX/PWM0_SYNC/PPI_D13/TACI3 PF8/UA1_RTS/DT0SEC/PPI_D7 PF9/UA1_CTS/DR0SEC/PPI_D6/CZM0 PF10/SPI0_SCK/TMR2/PPI_D5 PF11/SPI0_MISO/PWM0_TRIP/PPI_D4/TACLK2 PF12/SPI0_MOSI/PWM0_SYNC/PPI_D3 PF13/SPI0_SEL1/TMR3/PPI_D2/SPI0_SS PF14/SPI0_SEL2/PWM0_AH/PPI_D1 PF15/SPI0_SEL3/PWM0_AL/PPI_D0 PG0/SPI1_SEL3/TMRCLK/PPI_CLK/UA1_RX/TACI4 PG1/SPI1_SEL2/PPI_FS3/CAN_RX/TACI5 PG2/SPI1_SEL1/TMR4/CAN_TX/SPI1_SS PG3/HWAIT/SPI1_SCK/DT1SEC/UA1_TX PG4/SPI1_MOSI/DR1SEC/PWM1_SYNC/TACLK6 PG5/SPI1_MISO/TMR7/PWM1_TRIP PG6/ACM_SGLDIFF/SD_D3/PWM1_AH PG7/ACM_RANGE/SD_D2/PWM1_AL PG8/DR1SEC/SD_D1/PWM1_BH PG9/DR1PRI/SD_D0/PWM1_BL PG10/RFS1/SD_CMD/PWM1_CH/TACI6 PG11/RSCLK1/SD_CLK/PWM1_CL/TACLK7 PG12/UA0_RX/SD_D4/PPI_D15/TACI2 PG13/UA0_TX/SD_D5/PPI_D14/CZM1 PG14/UA0_RTS/SD_D6/TMR0/PPI_FS1/CUD1 PG15/UA0_CTS/SD_D7/TMR1/PPI_FS2/CDG1 CAN_ERR CAN_RX CAN_TX PG3 SD_WP SD_CD RN2 1 R1A 2 R2A 3 R3A 4 R4A 5 R5A 6 R6A 7 R7A 8 R8A 16 R1B 15 R2B 14 R3B 13 R4B 12 R5B 11 R6B 10 R7B 9 R8B ACM_SGLDIFF/SD_D3 ACM_RANGE/SD_D2 ADC_DOUTB/SD_D1 ADC_DOUTA/SD_D0 UART0_RX/SD_D4 UART0_TX/SD_D5 UART0_RTS/SD_D6 UART0_CTS/SD_D7 1 LED1 LED2 PB0 PB1 PF5 PF6 PF7 PF8 PF9 SPI0_SCK 3.3V SPI0_MISO SPI0_MOSI SPI0_SEL1 PF14 PF15 1 R19 10K 0402 U15 1 OE GND 25MHZ 2 OSC003 3.3V 4 VDD 2 2 SWT027 ROTARY 3.3V R16 4.7K 0402 R17 4.7K 0402 R15 4.7K 0402 SW2: Boot Mode Select Switch POSITION 0 1 16 Mb SPI FLASH "BOOT MODE" R3 10K 0402 R4 10K 0402 R5 10K 0402 U4 SPI0_MOSI 5 SI 6 SCK 1 CS 3 WP 7 HOLD M25P16 SO8W GND 4 8 VCC 2 SO SPI0_MISO BOOT MODE Idle-No Boot Boot from internal parallel flash in async mode Boot from internal parallel flash in sync mode Boot through SPI0 master from SPI memory Boot through SPI0 slave from host device Boot through PPI from host Reserved SPI0_SCK Boot thorugh UART0 slave from host device SPI0_SEL1 JP1 1 IDC2X1 2 All USB interface circuitry is considered proprietary and has been omitted from this schematic. Default 2 3 4 5 6 7 3 When designing your JTAG interface please refer to the Engineer to Engineer Note EE-68 which can be found at http://www.analog.com 3.3V DA_5V 3 3.3V "JTAG" R11 10K 0402 DA_5V P1 1 3 5 7 9 11 13 IDC7X2 DA_SOFT_RESET EXT_PS EXT_PS GND DA_USB_PWR DA_SOFT_RESET DA_USB_PWR 2 4 6 8 10 12 14 JTAG_CONN_SELECT DSP_TCK JTAG_CONN_EMU DSP_TRST JTAG_CONN_TMS DSP_TDI JTAG_CONN_TCK DSP_TDO JTAG_CONN_TRST DSP_EMU JTAG_CONN_TDI JTAG_CONN_TDO R2 33.0K 0402 C1 220PF 0402 DSP_EMU DSP_TDO PG DSP_TDI DSP_TRST DSP_TCK R1 100K 0402 DSP_TMS DSP_TMS 3.3V "SPI FLASH CS ENABLE" SJ1 SHORTING JUMPER DEFAULT=INSTALLED R6 10K 0402 C2 0.01UF 0402 4 DEBUG_AGENT ANALOG DEVICES Title Size Board No. 17-12-2009_16:20 20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD 4 ADSP-BF506F EZ-KIT LITE DSP + SPI FLASH A0226-2009 Sheet D 2 Rev C Date A B C 1.0 of 10 A B C D VDDEXT 1 1 C7 10UF 0805 C6 0.1UF 0402 C5 0.1UF 0402 C4 0.1UF 0402 C20 0.1UF 0402 C8 0.01UF 0402 C15 0.01UF 0402 C16 0.01UF 0402 C14 0.01UF 0402 VDDEXT U7 VDDEXT 1 6 15 20 23 26 30 41 51 59 62 VDDEXT1 VDDEXT2 VDDEXT3 VDDEXT4 VDDEXT5 VDDEXT6 VDDEXT7 VDDEXT8 VDDEXT9 VDDEXT10 VDDEXT11 VDDEXT12 VDDEXT13 VDDEXT14 VDDEXT15 VDDEXT16 VDDINT1 VDDINT2 VDDINT3 VDDINT4 VDDINT5 VDDINT6 VDDINT7 VDDFLASH1 VDDFLASH2 VDDFLASH3 VDDFLASH ADSP-BF506F LQFP120_EP C13 10UF 0805 C12 0.1UF 0402 C11 0.1UF 0402 C10 0.1UF 0402 C9 0.1UF 0402 C18 0.01UF 0402 C17 0.01UF 0402 C19 0.01UF 0402 VDDINT GND1 GND2 GND3 GND4 GND5 13 17 108 109 121 C33 10UF 0805 C32 0.1UF 0402 C31 0.1UF 0402 C25 0.01UF 0402 C26 0.01UF 0402 C27 0.01UF 0402 C28 0.01UF 0402 C29 0.01UF 0402 C30 0.01UF 0402 2 64 66 67 VDDINT 112 116 24 42 52 53 61 VDDFLASH 65 117 25 63 69 2 3 C21 10UF 0805 C22 0.1UF 0402 C23 0.1UF 0402 C24 0.1UF 0402 3 4 ANALOG DEVICES Title Size Board No. 17-12-2009_16:20 20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD 4 ADSP-BF506F EZ-KIT LITE DSP POWER, BYPASS CAPS A0226-2009 Sheet D 3 Rev C Date A B C 1.0 of 10 A B C D R42 0 0402 IN_VA1 3 U10 1 R44 10 0603 VA1 R50 0 0402 IN_VA3 3 U12 1 R48 10 0603 VA3 R26 0 0402 IN_VA5 3 U9 1 R24 10 0603 VA5 R27 10K 0402 2 AD8022 MSOP8 R43 0 0402 C51 10PF 0805 R31 10K 0402 2 AD8022 MSOP8 R49 0 0402 C56 10PF 0805 R36 10K 0402 2 AD8022 MSOP8 R25 0 0402 C35 10PF 0805 AGND C36 10PF 0805 1 1 AGND C52 10PF 0805 AGND AGND C55 10PF 0805 AGND AGND R45 0 0402 IN_VA2 5 U10 7 R47 10 0603 VA2 R53 0 0402 IN_VA4 5 U12 7 R51 10 0603 VA4 R40 0 0402 IN_VA6 5 U9 7 R41 10 0603 VA6 R28 10K 0402 6 AD8022 MSOP8 R46 0 0402 C53 10PF 0805 R32 10K 0402 6 AD8022 MSOP8 R52 0 0402 C58 10PF 0805 R35 10K 0402 6 AD8022 MSOP8 R39 0 0402 C49 10PF 0805 AGND C50 10PF 0805 AGND C54 10PF 0805 AGND AGND C57 10PF 0805 AGND AGND 2 2 R59 0 0402 IN_VB1 5 U11 7 R57 10 0603 VB1 R63 0 0402 IN_VB3 3 U13 1 R65 10 0603 VB3 R21 0 0402 IN_VB5 5 U14 7 R23 10 0603 VB5 R30 10K 0402 6 AD8022 MSOP8 R58 0 0402 C62 10PF 0805 R33 10K 0402 2 AD8022 MSOP8 R64 0 0402 C65 10PF 0805 R37 10K 0402 6 AD8022 MSOP8 R22 0 0402 C34 10PF 0805 AGND C69 10PF 0805 AGND C61 10PF 0805 AGND AGND C66 10PF 0805 AGND AGND 3 R56 0 0402 IN_VB2 3 U11 1 R29 10K 0402 2 AD8022 MSOP8 R55 0 0402 C60 10PF 0805 R54 10 0603 VB2 R34 10K 0402 6 AD8022 MSOP8 R61 0 0402 C63 10PF 0805 R60 0 0402 IN_VB4 5 U13 7 R62 10 0603 VB4 R38 10K 0402 2 AD8022 MSOP8 R67 0 0402 C68 10PF 0805 AGND C67 10PF 0805 R66 0 0402 IN_VB6 3 U14 1 R68 10 0603 VB6 3 AGND C59 10PF 0805 AGND AGND C64 10PF 0805 AGND AGND +AVCC -AVCC 4 C37 0.1UF 0402 C38 0.1UF 0402 C39 0.1UF 0402 C40 0.1UF 0402 C41 0.1UF 0402 C42 0.1UF 0402 C43 0.1UF 0402 C44 0.1UF 0402 C45 0.1UF 0402 C48 0.1UF 0402 C47 0.1UF 0402 C46 0.1UF 0402 ANALOG DEVICES Title Size Board No. 17-12-2009_16:20 20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD 4 ADSP-BF506F EZ-KIT LITE ADC BUFFERS A0226-2009 Sheet D 4 AGND AGND Rev C Date C 1.0 of 10 A B A B C D 1 PS_5V 3.3V 3.3V 1 "ADC INPUTS" IN_VA1 P7 1 3 IN_VA3 5 7 IN_VA5 9 11 IN_VB1 13 15 IN_VB3 17 19 IN_VB5 21 23 IDC12X2 2 4 6 8 10 12 14 16 18 20 22 24 IN_VB6 IN_VB4 VA1 VA2 VA3 VA4 VA5 VA6 80 VA1 81 VA2 83 VA3 84 VA4 85 VA5 86 VA6 IN_VB2 107 VDD106 VDRIVE IN_VA6 U7 AVDD 76 IN_VA4 IN_VA2 FER1 330 0805 R69 10K 0402 DOUTA DOUTB SCLK CS ON 95 RANGE SGL/DIFF96 100 A0 98 A1 97 A2 REF_SELECT DCAPA DCAPB 75 77 94 4 101 4 3 102 3 2 103 2 1 105 SW4 1 SW4 disconnects the DSP from the ADC 8 7 6 5 ADC_DOUTA/SD_D0 ADC_DOUTB/SD_D1 ADC_SCLK/SD_CLK ADC_CS/SD_CMD "ADC ENABLE" DIP4 SWT018 ACM_RANGE/SD_D2 ACM_SGLDIFF/SD_D3 ACM_A0 ACM_A1 ACM_A2 2 AGND VB1 VB2 VB3 VB4 VB5 VB6 92 VB1 91 VB2 90 VB3 89 VB4 88 VB5 87 VB6 2 "EXT VREF" JP6 1 3 5 2 4 SJ7 6 SHORTING JUMPER DEFAULT=NOT INSTALLED SJ8 SHORTING JUMPER DEFAULT=NOT INSTALLED PS_5V 73 78AGND1 79AGND2 82AGND3 93AGND4 99AGND5 122AGND6 AGND7 74 104DGND1 DGND2 3.3V C76 0.47UF 0805 C77 0.47UF 0805 IDC3X2_SMT ADSP-BF506F LQFP120_EP R70 10K 0402 AGND 3.3V 2 SW10 IN_VA1 2 3 4 5 6 ON 1 VR5 2 VIN VOUT TRIM AGND 8 6 5 3 JP2 1 C124 10UF 0805 SHORTING JUMPER DEFAULT=2 & 3 C125 0.1UF 0402 OP_SEL TEMP GND 4 AD780 SOIC8 3 12 11 10 9 8 7 R71 0 0805 SJ2 C123 0.1UF 0402 1 "VOLTAGE REFERENCE SELECT" IDC3X1 3 IN_VA3 IN_VA5 IN_VB1 IN_VB3 IN_VB5 3 4 3 2 DIP6 SWT017 SW9 IN_VB6 IN_VB4 IN_VB2 IN_VA6 IN_VA4 IN_VA2 2 3 4 5 6 ON 1 1 6 5 AGND 12 11 10 9 8 7 3.3V PS_5V AVDD_ADC AGND DIP6 SWT017 SW9 & 10 are only used for POST 6 5 4 3 2 "ADC LOOPBACK" 4 C74 10UF 0805 C75 0.1UF 0402 C73 10UF 0805 C72 0.1UF 0402 C71 10UF 0805 C70 0.1UF 0402 ANALOG DEVICES Title Size Board No. 17-12-2009_16:20 20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD 4 ADSP-BF506F EZ-KIT LITE ADC A0226-2009 Sheet D 5 AGND Rev C Date A B C 1.0 of 10 A B C D 1 1 3.3V PS_5V 3.3V SW5 disconnects the DSP from the CAN IC R72 10K 0402 SW5 1 R73 10K 0402 5 VIO VDD 3 U19 VBAT C78 100PF 0603 R74 62.0 0603 R75 10 0603 R78 10K 0603 DNP J2 1 2 13 CANH 11 SPLIT 12 CANL 2 GND C79 4700PF 0603 R76 62.0 0603 R77 10 0603 3 4 CON039 10 "CAN ENABLE" ON 2 CAN_ERR CAN_RX 4 4 3 3 2 2 1 8 7 6 5 6 EN 14 STB 8 ERR 1 TXD 4 RXD INH 7 9 WAKE 2 "CAN" DIP4 SWT018 CAN_TX TJA1041 SOIC14 C80 100PF 0603 3.3V PS_5V C81 0.01UF 0402 C82 0.01UF 0402 3 3 4 ANALOG DEVICES Title Size Board No. 17-12-2009_16:20 20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD 4 ADSP-BF506F EZ-KIT LITE CAN A0226-2009 Sheet D 6 Rev C Date A B C 1.0 of 10 A B C D 3.3V 3.3V 3.3V "PB1" SW7 MOMENTARY SWT024 R92 100 0805 R91 10K 0402 U1 1 C87 1UF 0805 74LVC14A SOIC14 2 R79 10K 0402 U1 5 74LVC14A SOIC14 U1 9 8 6 LED0 LED1 C83 0.01UF 0402 LED2 3.3V R89 10K 0402 R88 10K 0402 R90 10K 0402 U5 2 4 6 8 11 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 OE1 OE2 IDT74FCT3244APY SSOP20 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 18 16 14 12 9 7 5 3 R86 330 0603 R85 330 0603 R87 330 0603 R84 330 0603 LED4 YELLOW LED001 LED3 YELLOW LED001 LED2 YELLOW LED001 LED5 GREEN LED001 3.3V 1 1 "PB ENABLE" "PB2" SW8 MOMENTARY SWT024 R94 100 0805 R95 10K 0402 U1 3 C88 1UF 0805 74LVC14A SOIC14 4 1 2 SW3 ON 1 74LVC14A SOIC14 U1 PB0 PB1 11 74LVC14A SOIC14 U1 13 74LVC14A SOIC14 12 10 3.3V 13 15 17 C86 0.01UF 0402 1 19 "POWER" 4 3 2 DIP2 SWT020 3.3V 3.3V 3.3V 3.3V "RESET" 2 DA_SOFT_RESET CTS 1 2 SN74LVC1G08 SOT23-5 1 2 SW6 MOMENTARY SWT024 SN74LVC1G08 SOT23-5 U18 4 U20 4 R81 10K 0402 R83 10K 0402 U17 1 4 MR PFI RESET RESET PFO ADM708SARZ SOIC8 8 7 5 LED1 RED LED001 C90 0.1UF 0402 R134 10K 0402 R100 10K 0402 R99 10K 0402 R98 10K 0402 "DCE" U16 1 C1+ 3 C14 C2+ 5 C2C89 0.1UF 0402 2 V+ 6 VJ1 1 6 2 7 2 R80 330 0603 R82 10K 0402 C85 0.01UF 0402 C84 0.01UF 0402 C122 0.01UF 0402 RESET C92 0.1UF 0402 UART0_TX/SD_D5 UART0_RTS/SD_D6 3.3V CTS 3.3V 5 5 6 7 8 4 4 3 "RESET" UART0_RX/SD_D4 UART0_CTS/SD_D7 R141 0402 R142 0402 33 3 2 33 2 ON 1 SW1 1 16 15 14 13 12 11 14 T1IN T1OUT 10 7 T2IN T2OUT 12 13 R1OUT R1IN 9 8 R2OUT R2IN ADM3202ARNZ SOIC16 3 8 4 9 5 CON038 6 11 10 9 C91 0.1UF 0402 R101 10K 0402 RN1 ADC_DOUTA/SD_D0 ADC_DOUTB/SD_D1 1 2 3 4 5 6 7 8 R1A R2A R3A R4A R5A R6A R7A R8A R1B R2B R3B R4B R5B R6B R7B R8B 16 15 14 13 12 11 10 9 R108 10K 0402 R137 10K 0402 J3 7 8 9 1 10 11 12 13 5 DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7 CLK CMD MINI_SD_DAT0 MINI_SD_DAT1 MINI_SD_DAT2 MINI_SD_DAT3 MINI_SD_CLK MINI_SD_CMD GND1 GND2 GND3 GND4 GND5 GND6 CD C93 0.01UF 0402 C121 10UF 0805 4 19 3 VDD1 VDD2 8 7 DIP8 SWT016 ACM_RANGE/SD_D2 ACM_SGLDIFF/SD_D3 UART0_TX/SD_D5 UART0_RTS/SD_D6 UART0_RX/SD_D4 UART0_CTS/SD_D7 3 "UART0 SETUP" (UART 0) 33 RNS003 ADC_SCLK/SD_CLK ADC_CS/SD_CMD R135 0402 R136 0402 33 2 22 33 23 24 16 20 17 SD_CD SD_WP 15 14 3 6 18 21 27 28 WP CON067 4 ANALOG DEVICES Title 20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD 4 "SD CARD" ADSP-BF506F EZ-KIT LITE RESET, LEDS, PUSH BUTTONS, UART, SD Board No. 17-12-2009_16:20 D Size C Date A B C A0226-2009 Sheet 7 Rev 1.0 of 10 A B C D PS_5V 3.3V PS_5V 3.3V PS_5V 3.3V P3 1 3 5 7 9 GND1 GND2 GND3 GND4 GND5 GND6 PPI0FS1 PPI0FS3 PPI0D1 PPI0D3 PPI0D5 PPI0D7 PPI0D9 PPI0D11 PPI0D13 PPI0D15 PPI0D17 TIMER2/GPIO RESET PPI1FS1 PPI1FS3 PPI1D1/PPI0D19 PPI1D3/PPI0D21 PPI1D5/PPI0D23 PPI1D7 PPI1D9 PPI1D11 PPI1D13 PPI1D15 PPI1D17 SDA SCL RSVD2 RSVD4 RSVD6 IDC35X2_SMTA PWR_IN1 PWR_IN2 VDDIO1 VDDIO2 3.3V1 3.3V2 PPI0FS2 PPI0CLK PPI0D0 PPI0D2 PPI0D4 PPI0D6 PPI0D8 PPI0D10 PPI0D12 PPI0D14 PPI0D16 TIMER1/GPIO TIMER3/GPIO PPI1FS2 PPI1CLK PP1D0/PPI0D18 PPI1D2/PPI0D20 PPI1D4/PPI0D22 PPI1D6 PPI1D8 PPI1D10 PPI1D12 PPI1D14 PPI1D16 NC RSVD1 RSVD3 RSVD5 RSVD7 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 LED0 SD_CD UART0_CTS/SD_D7 CAN_ERR PF15 SPI0_SEL1 SPI0_MISO PF9 LED2 PB1 PF6 UART0_TX/SD_D5 LED2 P2 1 GND1 PWR_IN1 3 GND2 PWR_IN2 5 GND3 VDDIO1 7 GND4 VDDIO2 9 GND5 3.3V1 11 GND6 3.3V2 13 DTPRI DRPRI 15 DTSEC DRSEC 17 TSCLK RSCLK 19 TFS RFS 21 SPISEL1 SPISEL2 23 SPISEL3 SPICLK 25 SPIMOSI SPISS 27 SPIMISO TIMER 29 SCL SDA 31 UARTTX UARTRX 33 UARTRTSUARTCTS 35 RESET NC 37 GPIO1 GPIO2 39 GPIO3 GPIO4 41 WAKE RSVD1 43 RSVD2 RSVD3 45 RSVD4 RSVD5 47 RSVD6 RSVD7 49 RSVD8 RSVD9 IDC25X2_SMTA 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 LED1 SD_CD SD_WP ACM_SGLDIFF/SD_D3 ADC_DOUTB/SD_D1 ADC_CS/SD_CMD PF5 PF9 LED1 PB1 CAN_RX PG3 CAN_TX UART0_RTS/SD_D6 SDA UART0_RX/SD_D4 UART0_CTS/SD_D7 ACM_A2 P4 1 GND1 PWR_IN1 3 GND2 PWR_IN2 5 GND3 VDDIO1 7 GND4 VDDIO2 9 GND5 3.3V1 11 GND6 3.3V2 13 DTPRI DRPRI 15 DTSEC DRSEC 17 TSCLK RSCLK 19 TFS RFS 21 SPISEL1 SPISEL2 23 SPISEL3 SPICLK 25 SPIMOSI SPISS 27 SPIMISO TIMER 29 SCL SDA 31 UARTTX UARTRX 33 UARTRTSUARTCTS 35 RESET NC 37 GPIO1 GPIO2 39 GPIO3 GPIO4 41 WAKE RSVD1 43 RSVD2 RSVD3 45 RSVD4 RSVD5 47 RSVD6 RSVD7 49 RSVD8 RSVD9 IDC25X2_SMTA DNP 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 LED1 SD_CD ADC_DOUTA/SD_D0 ADC_DOUTB/SD_D1 ADC_SCLK/SD_CLK ADC_CS/SD_CMD PF14 SPI0_SCK SPI0_SEL1 UART0_RTS/SD_D6 SDA PF7 PF9 1 UART0_RTS/SD_D6 CAN_RX PF14 SPI0_MOSI SPI0_SCK PF8 PB0 PF5 PF7 UART0_RX/SD_D4 11 13 15 17 19 21 23 25 27 29 31 33 LED1 RESET 35 37 39 41 43 45 47 49 51 1 SPORT0 PF8 LED0 PB0 CAN_TX SPORT1 PG3 ACM_A0 ACM_A1 SPI0_SEL1 SPI1 CAN_ERR SD_WP SD_CD SCL SPI0 PF15 SPI0_MOSI SPI0_MISO SCL UART0 UART0_TX/SD_D5 UART0_RTS/SD_D6 RESET LED0 SD_WP EXT_WAKE SD_CD UART1 PF6 PF8 RESET LED0 SD_WP EXT_WAKE PWM1 ACM_RANGE/SD_D2 ADC_DOUTA/SD_D0 ADC_SCLK/SD_CLK 2 53 55 57 59 SDA SCL 61 63 65 67 69 2 P5 P6 LED0 LED1 A1 A2 A3 PB1 PF5 A4 A5 A6 D0 D1 GND0 D4 D5 GND1 CLK1+ CLK1GND2 D10 D11 GND3 D14 D15 GND4 D18 D19 GND5 D22 D23 GND6 D24 D25 GND7 D28 D29 GND8 DMAX_ALT DNP GND9 D2 D3 GND10 D6 D7 GND11 D8 D9 GND12 D12 D13 GND13 D16 D17 GND14 D20 D21 GND15 CLK2CLK2+ GND16 D26 D27 GND17 D30 D31 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 UART0_RTS/SD_D6 UART0_CTS/SD_D7 ADC_CS/SD_CMD ADC_SCLK/SD_CLK SD_WP SD_CD CAN_ERR CAN_RX SPI0_MOSI SPI0_SEL1 PF8 PF9 SCL PF6 SDA PF7 ACM_A2 LED2 ACM_A1 PB0 A1 D0 A2 D1 A3 GND0 A4 D4 A5 D5 A6 GND1 A7 CLK1+ A8 CLK1A9 GND2 A10 D10 A11 D11 A12 GND3 A13 D14 A14 D15 A15 GND4 A16 D18 A17 D19 A18 GND5 A19 D22 A20 D23 A21 GND6 A22 D24 A23 D25 A24 GND7 A25 D28 A26 D29 A27 GND8 DMAX_ALT DNP B1 GND9 B2 D2 B3 D3 B4 GND10 B5 D6 B6 D7 B7 GND11 B8 D8 B9 D9 B10 GND12 B11 D12 B12 D13 B13 GND13 B14 D16 B15 D17 B16 GND14 B17 D20 B18 D21 B19 GND15 B20 CLK2B21 CLK2+ B22 GND16 B23 D26 B24 D27 B25 GND17 B26 D30 B27 D31 ACM_A0 RESET 3 A7 A8 A9 SPI0_SCK SPI0_MISO A10 A11 A12 PF14 PF15 A13 A14 A15 CAN_TX PG3 A16 A17 A18 ACM_SGLDIFF/SD_D3 ACM_RANGE/SD_D2 A19 A20 A21 ADC_DOUTB/SD_D1 ADC_DOUTA/SD_D0 A22 A23 A24 UART0_RX/SD_D4 UART0_TX/SD_D5 A25 A26 A27 3 4 ANALOG DEVICES Title Size Board No. 17-12-2009_16:20 20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD 4 ADSP-BF506F EZ-KIT LITE EXPANSION INTERFACE, DMAX A0226-2009 Sheet D 8 Rev C Date A B C 1.0 of 10 A B C D 1 1 L1 1UH IND019 -AVCC 1 2 L4 22UH IND024 C98 10UF 1210 D4 MBR130LSFT1G SOD-123FL C97 10UF 1210 3 4 PS_5V C103 2.2UF 0805 1 2 L5 22UH IND024 4 DNP 3 2 C102 10UF 1210 R113 10 0603 R114 100K 0402 2 C101 0 0805 D5 MBR130LSFT1G SOD-123FL L2 1UH IND019 +AVCC C104 1000PF 0603 R110 0 0603 DNP VR2 6 7 3 4 R111 0 0603 C96 1UF 0603 C105 1UF 0603 DNP VIN FREQ EN GND 5 SW 2 FB 8 SS COMP 1 R115 27.4K 0603 C100 10UF 1210 C99 10UF 1210 ADP1613 MSOP8 R109 20.0K 0402 C94 22000PF 0402 R112 4.99K 0603 C95 3300PF 0603 3 3 4 ANALOG DEVICES Title Size Board No. 17-12-2009_16:20 20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD 4 ADSP-BF506F EZ-KIT LITE DUAL POWER REGULATOR A0226-2009 Sheet D 9 Rev C Date A B C 1.0 of 10 A B C D DA_5V PS_5V R130 0 0402 6 OUT1 8 OUT2 EXT_WAKE SJ3 SHORTING JUMPER DEFAULT=INSTALLED U6 7 IN1 DA_USB_PWR 1 EN 2 FLG GND 3 MIC2025-1 SOIC8 1.1 - 1.4V @ 500mA 3.3V R116 4.3 1206 R119 4.3 1206 Remove JP4 when measuring VDDINT "VDDINT" JP4 1 IDC2X1 R121 0.05 1206 2 VDDINT TP6 1 R133 10K 0402 1 EXT_PS F1 3A FUS004 FER4 190 FER002 4 1 P9 1 C116 1000PF 1206 D7 MBRS540T3G 5A SMC C117 10UF 1210 D2 GSOT05 SOT23-3 SDA SCL U2 3 2 2 AD0 3 AD1 4 SDA 5 SCL AD5258 MSOP10 B 9 PS_5V 1 W A 10 R117 1.2K 0402 R129 10K 0402 DNP C110 4.7UF 0603 VR3 TP3 1 EN IN OUT ADJ 5 GND1 6 GND2 7 GND3 8 GND4 D1 VESD01-02V-GS08 SOD-523 D8 SK12 DO-214AA 8 VCC GND VLOGIC 7 R120 1.0K 0402 2 C108 0.01UF 0402 3 4 3 2 POWER CON045 6 C109 0.1UF 0402 C106 4.7UF 0603 R118 2.67K 0402 C107 4.7UF 0603 R128 10K 0402 ADP1715 MSOP8 "5V" C115 1000PF 1206 FER2 600 1206 2 FER3 600 1206 TP2 SHGND 2 SHGND MH1 MH2 MH3 MH4 0.156 0.156 0.156 0.156 1.8V @ 500mA "VDDFLASH" VDDFLASH JP5 1 3.3V TP8 IDC2X1 VR4 1 EN 2 IN 4 SS C119 2.2UF 0805 C118 0.1UF 0402 OUT 3 R131 0.05 1206 2 TP7 MH5 MH6 MH7 MH8 0.125 0.125 0.125 0.125 PS_5V 5 6GND1 7GND2 8GND3 GND4 3 C114 10UF 1210 Remove JP3 when measuring VDDEXT SJ4 SHORTING JUMPER DEFAULT=INSTALLLED ADP1715 MSOP8 C120 2.2UF 0805 D9 ESD5Z2.5T1 SOD-523 D10 SK12 DO-214AA 3 3.3V @ 2A PGND SJ6 VDDEXT SHORTING JUMPER DEFAULT=INSTALLLED R123 24.9K 0603 VR1 1 COMP IN CS 5 4 6 R126 0.05 1206 R125 0.05 1206 U3 1 2 5 6 7 8 D6 MBRS540T3G SMC CT1 220UF D2E C113 4.7UF 0805 D3 GSOT03 SOT23-3 L3 2.5UH IND013 TP4 3.3V "VDDEXT" JP3 1 IDC2X1 R122 0.05 1206 TP5 2 Remove JP5 when measuring VDDFLASH C111 470PF 0603 C112 68PF 0603 R124 80.6K 0603 3 FB GND 2 PGATE 3 4 ADP1864AUJZ SOT23-6 SJ5 SHORTING JUMPER DEFAULT=INSTALLLED SI4411DY SO-8 R127 255.0K 0603 PGND PGND 4 W1 COPPER 2A ANALOG DEVICES Title Size Board No. 17-12-2009_16:20 20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD 4 ADSP-BF506F EZ-KIT LITE POWER A0226-2009 Sheet D 10 Rev PGND C Date C 1.0 of 10 A B I INDEX A ADC enable switch (SW4), 2-9 ADC input connector (P7), 2-19 ADC loopback switches (SW9-10), 2-10 ADC voltage ref (JP6), 2-13 architecture, of this EZ-KIT Lite, 2-2 audio codec enable switch (SW4), 2-9 input connector (P7), 2-19 loopback switches (SW9-10), 2-10 B background telemetry channel (BTC), 1-13 bill of materials, A-1 board schematic (ADSP-BF506F), B-1 boot modes, 2-8 mode select switch (SW2), 2-8 connectors diagram of locations, 2-16 J1 (RS-232), 2-17 J2 (CAN), 2-17 J3 (SD), 2-17 P1 (JTAG), 1-4, 1-10, 2-17 P2 (expansion), 2-18 P3 (expansion), 2-18 P4 (expansion), 2-18 P5-6 (land grid array), 2-19 P7 (ADC input), 2-19 P9 (power), 1-4, 2-19 contents, of this EZ-KIT Lite package, 1-2 customer support, xiv D default configuration, of this EZ-KIT Lite, 1-3 design reference info, 1-14 DIP switch (SW3), 2-9, 2-10 DMAX land grid array connectors (P5-6), 2-19 C CAN interface connector (J2), 2-17 enable switch (SW5), 2-9 clock in (CLK IN) signal, 2-3 configuration, of this EZ-KIT Lite, 1-3 E example programs, 1-13 expansion interface, 1-11, 2-18 external memory, 1-8 F flag pins, See programmable flags by name (PFx, PGx, and PHx) ADSP-BF506F EZ-KIT Lite Evaluation System Manual I-1 Index G general-purpose IO pins (GPIO), 1-10, 2-9, 2-15 general-purpose push buttons (PB0-1), 1-10 N notation conventions, xviii P package contents, 1-2 PF0-2 (IO) signals, 2-3, 2-15 PF3-15 signals, 2-3 PG0-15 signals, 2-5 PH0-2 signals, 2-6 power connector (P9), 1-4, 2-19 LED (LED5), 2-15 measurements, 1-12 power-on-self test (POST), 1-9 programmable flag (PF) inputs PF3-4, 1-10 push buttons (SW7-8), 2-10 I installation, of this EZ-KIT Lite, 1-3 internal flash memory interface, 1-8 IO voltage, 2-2 J JTAG interface, 1-10 connector (P1), 1-4, 1-10, 2-17 jumpers diagram of locations, 2-11 JP1 (SPI flash enable), 2-11 JP2 (voltage reference select), 2-12 JP3 (VDDEXT power), 2-12 JP4 (VDDINT power), 2-12 JP5 (VDDFLASH power), 2-12 JP6 (ADC voltage ref), 2-13 R Reduced Instruction Set Computing (RISC), ix reset LEDs (LED1), 2-15 push button (SW6), 2-9 restriction, of the evaluation license, 1-7 RS-232 connector (J1), 2-17 L LEDs diagram of locations, 2-14 LED1 (reset), 2-15 LED2-4 (PF0-2), 1-10, 2-15 LED5 (power), 2-15 LED8 (reset), 2-15 license restrictions, x, 1-7 S schematic, of ADSP-BF506F EZ-KIT Lite, B-1 SD connector (J3), 2-17 SPI flash memory interface, 1-9 CS enable jumper (JP1), 2-11 SRAM memory, 1-7 See also memory map startup, of this EZ-KIT Lite, 1-5 SW1 (UART setup) switch, 2-8 SW2 (boot mode select) switch, 2-8 M Media Instruction Set Computing (MISC), ix memory map, of this EZ-KIT Lite, 1-7 Micro Signal Architecture (MSA), ix I-2 ADSP-BF506F EZ-KIT Lite Evaluation System Manual Index SW3 (push button enable) DIP switch, 1-10, 2-9, 2-10 SW4 (ADC enable) switch, 2-9 SW5 (CAN enable) switch, 2-9 SW6 (reset) push button, 2-9 SW9-10 (ADC) loopback switches, 2-10 switches, diagram of locations, 2-7 system architecture, of this EZ-KIT Lite, 2-2 U UART setup switch (SW1), 2-8 VDDFLASH, 1-12 pin, 1-12 power jumper (JP5), 2-12 VDDIN pin, 1-12 VDDINT power jumper (JP4), 2-12 programmable regulator, 1-12 very-long instruction word (VLIW), ix VisualDSP++ environment, 1-5 voltage reference select jumper (JP2), 2-12 values, 1-12 V VDDEXT, 1-12 pin, 1-12 power jumper (JP3), 2-12 ADSP-BF506F EZ-KIT Lite Evaluation System Manual I-3
BLM21PG331SN1D 价格&库存

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BLM21PG331SN1D
  •  国内价格
  • 100+0.08415
  • 500+0.07905
  • 1000+0.0714
  • 5000+0.0612
  • 10000+0.05508

库存:5698