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LT1307CS8#PBF

LT1307CS8#PBF

  • 厂商:

    AD(亚德诺)

  • 封装:

    SOICN8_150MIL

  • 描述:

    IC REG BOOST ADJ 600MA 8SOIC

  • 数据手册
  • 价格&库存
LT1307CS8#PBF 数据手册
LT1307/LT1307B Single Cell Micropower 600kHz PWM DC/DC Converters U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO Uses Small Ceramic Capacitors 50µA Quiescent Current (LT1307) 1mA Quiescent Current (LT1307B) Operates with VIN as Low as 1V 600kHz Fixed Frequency Operation Starts into Full Load Low Shutdown Current: 3µA Low-Battery Detector 3.3V at 75mA from a Single Cell Automatic Burst Mode® Operation at Light Load (LT1307) Continuous Switching at Light Load (LT1307B) Low VCESAT Switch: 295mV at 500mA U APPLICATIO S ■ ■ ■ ■ ■ ■ ■ The LT ®1307/LT1307B are micropower, fixed frequency DC/DC converters that operate from an input voltage as low as 1V. First in the industry to achieve true current mode PWM performance from a single cell supply, the LT1307 features automatic shifting to power saving Burst Mode operation at light loads. High efficiency is maintained over a broad 100µA to 100mA load range. The LT1307B does not shift into Burst Mode operation at light loads, eliminating low frequency output ripple at the expense of light load efficiency. The devices contain a lowbattery detector with a 200mV reference and shut down to less than 5µA. No load quiescent current of the LT1307 is 50µA and the internal NPN power switch handles a 500mA current with a voltage drop of just 295mV. Unlike competitive devices, large electrolytic capacitors are not required with the LT1307/LT1307B in single cell applications. The high frequency (600kHz) switching allows the use of tiny surface mount multilayer ceramic (MLC) capacitors along with small surface mount inductors. The devices work with just 10µF of output capacitance and require only 1µF of input bypassing. Pagers Cordless Telephones GPS Receivers Battery Backup Portable Electronic Equipment Glucose Meters Diagnostic Medical Instrumentation The LT1307/LT1307B are available in 8-lead MSOP, PDIP and SO packages. , LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. U TYPICAL APPLICATIO Single Cell to 3.3V Converter Efficiency L1 10µH 1.5V CELL SHUTDOWN VIN LBI 90 SW FB LT1307 SHDN LBO GND VC 100k 680pF R1 1.02M 1% R2 604k 1% C1: MURATA-ERIE GRM235Y5V105Z01 MARCON THCS50E1E105Z TOKIN 1E105ZY5U-C103-F 3.3V C2: MURATA-ERIE GRM235Y5V106Z01 75mA MARCON THCS50E1E105Z TOKIN 1E106ZY5U-C304-F D1: MOTOROLA MBR0520L C2 L1: COILCRAFT D01608C-103 10µF SUMIDA CD43-100 MURATA ERIE LQH3C100 FOR 5V OUTPUT: R1 = 1M, R2 = 329k 80 EFFICIENCY (%) C1 1µF D1 VIN = 1.5V 70 VIN = 1V VIN = 1.25V 60 1307 F01 Figure 1. Single Cell to 3.3V Boost Converter 50 0.1 1 10 LOAD CURRENT (mA) 100 1307 TA01 1307fa 1 LT1307/LT1307B W W W AXI U U ABSOLUTE RATI GS (Note 1) VIN, SHDN, LBO Voltage ......................................... 12V SW Voltage ............................................................. 30V FB Voltage ....................................................... VIN + 1V VC Voltage ................................................................ 2V LBI Voltage ............................................ 0V ≤ VLBI ≤ 1V Current into FB Pin .............................................. ±1mA Junction Temperature ........................................... 125°C Operating Temperature Range Commercial (Note 2) ......................... – 20°C to 70°C Industrial ........................................... – 40°C to 85°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C U U W PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER TOP VIEW VC FB SHDN GND 1 2 3 4 8 7 6 5 LBO LBI VIN SW TJMAX = 125°C, θJA = 160°C/W TOP VIEW LT1307CMS8 LT1307BCMS8 MS8 PACKAGE 8-LEAD PLASTIC MSOP MS8 PART MARKING ORDER PART NUMBER VC 1 8 LBO FB 2 7 LBI SHDN 3 6 VIN GND 4 5 SW N8 PACKAGE 8-LEAD PDIP LTIC LTIB S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 125°C, θJA = 100°C/W (N8) TJMAX = 125°C, θJA = 120°C/W (S8) LT1307CN8 LT1307CS8 LT1307IS8 LT1307BCS8 LT1307BIS8 S8 PART MARKING 1307 1307B 1307I 1307BI Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Commercial Grade 0°C to 70°C. VIN = 1.1V, VSHDN = VIN, LT1307/LT1307B unless otherwise noted. SYMBOL PARAMETER CONDITIONS IQ Quiescent Current Not Switching (LT1307) Not Switching (LT1307B) VSHDN = 0V VFB Feedback Voltage IB FB Pin Bias Current (Note 3) VFB = VREF Reference Line Regulation 1V ≤ VIN ≤ 2V (25°C, 0°C) 1V ≤ VIN ≤ 2V (70°C) 2V ≤ VIN ≤ 5V MIN ● ● ● ● 1.20 ● ● Minimum Input Voltage Input Voltage Range gm Error Amp Transconductance ∆I = 5µA AV Error Amp Voltage Gain 25°C, 0°C 70°C fOSC Switching Frequency TYP MAX 50 1.0 1 90 1.5 3 1.22 1.24 V 27 60 nA 0.6 0.3 1.1 1.5 0.8 %/V %/V %/V 0.92 1 V 5 V 65 µmhos ● 1 ● 25 35 35 30 100 550 600 ● UNITS µA mA µA V/V V/V 750 kHz 1307fa 2 LT1307/LT1307B ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Commercial Grade 0°C to 70°C. VIN = 1.1V, VSHDN = VIN, LT1307/LT1307B unless otherwise noted. SYMBOL PARAMETER CONDITIONS Maximum Duty Cycle 25°C, 0°C 70°C Switch Current Limit (Note 4) DC = 40% DC = 75% Switch VCESAT MIN TYP 80 76 84 MAX UNITS % % 0.6 0.5 1.25 A A ISW = 500mA (25°C, 0°C) ISW = 500mA (70°C) 295 350 400 mV mV Burst Mode Operation Switch Current Limit (LT1307 Only) L = 10µH L = 22µH 100 50 Shutdown Pin Current VSHDN = VIN VSHDN = 0V LBI Threshold Voltage ● 2.5 – 1.5 ● ● 4.0 – 2.5 µA µA 200 210 mV LBO Output Low ISINK = 10µA ● 0.1 0.25 V LBO Leakage Current VLBI = 250mV, VLBO = 5V ● 0.01 0.1 µA LBI Input Bias Current (Note 5) VLBI = 150mV ● 5 25 Low-Battery Detector Gain 1MΩ Load (25°C, 0°C) 1MΩ Load (70°C) Switch Leakage Current VSW = 5V Reverse Battery Current (Note 6) ● 190 mA mA 1000 500 3000 0.01 ● nA V/V V/V 3 750 µA mA Commercial Grade TA = – 20°C, VIN = 1.1V, VSHDN = VIN, unless otherwise noted (Note 2). SYMBOL PARAMETER CONDITIONS IQ Quiescent Current VFB = 1.3V, Not Switching (LT1307) VFB = 1.3V, Not Switching (LT1307B) VSHDN = 0V VFB Feedback Voltage gm Error Amp Transconductance TYP MAX UNITS 50 1.1 1 100 1.6 3 µA mA µA 1.195 1.22 1.245 25 35 65 AV Error Amp Voltage Gain 35 100 fOSC Switching Frequency 500 600 Maximum Duty Cycle 80 84 ∆I = 5µA MIN V µmhos V/V 750 kHz % Switch VCESAT ISW = 500mA, VIN = 1.2V 250 350 mV Shutdown Pin Current VSHDN = VIN VSHDN = 0V 2.5 – 1.5 4.0 – 2.5 µA µA 200 210 mV LBI Threshold Voltage 186 1307fa 3 LT1307/LT1307B ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. Industrial Grade – 40°C to 85°C. VIN = 1.1V, VSHDN = VIN, LT1307/LT1307B unless otherwise noted. SYMBOL PARAMETER CONDITIONS IQ Quiescent Current VFB = 1.3V, Not Switching (LT1307) VFB = 1.3V, Not Switching (LT1307B) VSHDN = 0V VFB Feedback Voltage IB FB Pin Bias Current (Note 3) VFB = VREF Reference Line Regulation 1V ≤ VIN ≤ 2V (– 40°C) 1V ≤ VIN ≤ 2V (85°C) 2V ≤ VIN ≤ 5V Minimum Input Voltage MIN ● ● ● ● 1.195 ● 10 ● – 40°C 85°C Input Voltage Range TYP MAX UNITS 50 1 1 100 1.8 3 µA mA µA 1.22 1.245 27 100 nA 0.6 0.3 1.1 3.2 0.8 %/V %/V %/V 1.1 0.8 1.2 1.0 V V 5 V 65 µmhos ● gm Error Amp Transconductance ∆I = 5µA AV Error Amp Voltage Gain – 40°C 85°C fOSC Switching Frequency ● – 40°C 85°C Switch Current Limit (Note 4) DC = 40% DC = 75% Switch VCESAT 35 35 30 ● Maximum Duty Cycle 25 V V/V V/V 500 600 80 75 84 80 750 kHz % % 0.6 0.5 1.25 A A ISW = 500mA, VIN = 1.2V (– 40°C) ISW = 500mA (85°C) 250 330 350 400 mV mV Burst Mode Operation Switch Current Limit (LT1307 Only) L = 10µH L = 22µH 100 50 Shutdown Pin Current VSHDN = VIN VSHDN = 0V ● ● ● LBI Threshold Voltage ● 186 mA mA 2.5 – 1.5 4.0 – 2.5 µA µA 200 210 mV LBO Output Low ISINK = 10µA ● 0.1 0.25 V LBO Leakage Current VLBI = 250mV, VLBO = 5V ● 0.1 0.3 µA LBI Input Bias Current (Note 5) VLBI = 150mV ● 5 30 nA Low-Battery Detector Gain 1MΩ Load (– 40°C) 1MΩ Load (85°C) Switch Leakage Current VSW = 5V Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Specifications for commercial (C) grade devices are guaranteed but not tested at – 20°C. MS8 package devices are designed for and intended to meet commercial temperature range specifications but are not tested at – 20°C or 0°C. Note 3: Bias current flows into FB pin. 1000 400 ● 6000 0.01 V/V V/V µA 3 Note 4: Switch current limit guaranteed by design and/or correlation to static tests. Duty cycle affects current limit due to ramp generator. Note 5: Bias current flows out of LBI pin. Note 6: The LT1307/LT1307B will withstand continuous application of 1.6V applied to the GND pin while VIN and SW are grounded. 1307fa 4 LT1307/LT1307B U W TYPICAL PERFOR A CE CHARACTERISTICS 3.3V Output Efficiency, Circuit of Figure 1 (LT1307B) 5V Output Efficiency, Circuit of Figure 1 (LT1307) 90 90 90 80 80 VIN = 1.25V VIN = 1.5V 60 VIN = 1.25V 60 EFFICIENCY (%) VIN = 1.00V 70 VIN = 1V 50 40 VIN = 1.5V 30 10 1 LOAD CURRENT (mA) 50 40 20 10 0.1 100 200 VIN = 1V VIN = 1.25V 60 30 20 50 0.1 VIN = 1.5V 70 70 EFFICIENCY (%) EFFICIENCY (%) 80 5V Output Efficiency, Circuit of Figure 1 (LT1307B) 1 10 LOAD CURRENT (mA) 10 0.1 100 LT1307 • G01 1 10 LOAD CURRENT (mA) 1307 G02 1307 G02 Feedback Bias Current vs Temperature Quiescent Current vs Temperature LBI Bias Current vs Temperature 50 80 100 16 VIN = 1.1V 14 60 50 40 30 20 40 LBI BIAS CURRENT (nA) FEEDBACK BIAS CURRENT (nA) QUIESCENT CURRENT (µA) 70 30 20 12 10 8 6 4 10 10 2 0 –50 –25 0 50 25 TEMPERATURE (°C) 75 0 –50 100 –25 0 25 50 TEMPERATURE (°C) 75 0 –50 100 –25 0 50 25 TEMPERATURE (°C) 1307 G05 1307 G04 Switch VCESAT vs Current 500 20 10 100 LT1307 • TPC06 Shutdown Pin Bias Current vs Input Voltage Quiescent Current in Shutdown 75 8 6 4 2 0 16 12 8 4 0 0 1 3 2 INPUT VOLTAGE (V) 4 5 1307 G07 400 VCESAT (mV) SHUTDOWN PIN CURRENT (µA) QUIESCENT CURRENT (µA) TA = 25°C 300 200 100 0 1 3 2 INPUT VOLTAGE (V) 4 5 1307 G07 0 0 100 500 200 300 400 SWITCH CURRENT (mA) 600 LT1307 • TPC09 1307fa 5 LT1307/LT1307B U W TYPICAL PERFOR A CE CHARACTERISTICS Feedback Voltage vs Temperature Oscillator Frequency vs Input Voltage LBI Reference vs Temperature 1.230 900 210 208 1.220 1.215 1.210 1.205 800 206 204 FREQUENCY (kHz) REFERENCE VOLTAGE (mV) FEEDBACK VOLTAGE (V) 1.225 202 200 198 196 194 25°C 85°C 700 –40°C 600 500 192 1.200 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 190 –50 400 –25 25 50 0 TEMPERATURE (°C) 1307 G10 VOUT 200mV/DIV AC COUPLED IL 200mA/DIV IL 200mA/DIV ILOAD 55mA 5mA ILOAD 55mA 5mA 500µs/DIV VOUT 50mV/DIV DC COUPLED OFFSET ADDED ILOAD 20mA/DIV VIN = 1V VOUT = 5V 1307 G17 1307 G15 ILOAD 10mA/DIV 1307 G18 Circuit Operation, L = 22µH (LT1307) VOUT 50mV/DIV AC COUPLED VSW 5V/DIV VSW 5V/DIV IL 100mA/DIV 1307 G19 ILOAD 10mA/DIV Load Regulation (LT1307) VOUT 50mV/DIV AC COUPLED ILOAD 10mA/DIV VIN = 0.92V VOUT = 3.3V Circuit Operation, L = 10µH (LT1307) Load Regulation (LT1307) VIN = 1.15V VOUT = 5V Load Regulation (LT1307) VOUT 50mV/DIV DC COUPLED OFFSET ADDED VIN = 1.15V VOUT = 3.3V 1307 G16 5 LT1307 • TPC12 1307 G14 VOUT 50mV/DIV DC COUPLED OFFSET ADDED ILOAD 20mA/DIV 4 INPUT VOLTAGE (V) Load Regulation (LT1307) VOUT 50mV/DIV DC COUPLED OFFSET ADDED 3 2 VOUT 50mV/DIV DC COUPLED OFFSET ADDED VIN = 1.25V VOUT = 3.3V 1307 G13 Load Regulation (LT1307) VIN = 1V VOUT = 3.3V 1 Transient Response (LT1307B) VOUT 200mV/DIV AC COUPLED 500µs/DIV 100 LT1307 • TPC11 Transient Response (LT1307) VIN = 1.25V VOUT = 3.3V 75 IL 100mA/DIV VIN = 1.25V VOUT = 5V ILOAD = 1.5mA 100µs/DIV 1307 G20 VIN = 1.25V VOUT = 5V ILOAD = 1.5mA 100µs/DIV 1307 G21 1307fa 6 LT1307/LT1307B U U U PI FU CTIO S VC (Pin 1): Compensation Pin for Error Amplifier. Connect a series RC from this pin to ground. Typical values are 100kΩ and 680pF. Minimize trace area at VC. SW (Pin 5): Switch Pin. Connect inductor/diode here. Minimize trace area at this pin to keep EMI down. VIN (Pin 6): Supply Pin. Must have 1µF ceramic bypass capacitor right at the pin, connected directly to ground. FB (Pin 2): Feedback Pin. Reference voltage is 1.22V. Connect resistor divider tap here. Minimize trace area at FB. Set VOUT according to: VOUT = 1.22V(1 + R1/R2). LBI (Pin 7): Low-Battery Detector Input. 200mV reference. Voltage on LBI must stay between ground and 700mV. SHDN (Pin 3): Shutdown. Ground this pin to turn off switcher. Must be tied to VIN (or higher voltage) to enable switcher. Do not float the SHDN pin. LBO (Pin 8): Low-Battery Detector Output. Open collector, can sink 10µA. A 1MΩ pull-up is recommended. GND (Pin 4): Ground. Connect directly to local ground plane. W BLOCK DIAGRA VIN 6 VIN R5 40k R6 40k + VOUT R1 (EXTERNAL) FB R2 (EXTERNAL) SHDN VC gm 1 ERROR AMPLIFIER + SHUTDOWN – FB 2 Q1 Q2 ×10 LBI BIAS – R4 140k + 7 * R3 30k A1 LBO 8 ENABLE – 200mV A4 SW COMPARATOR – RAMP GENERATOR 3 + Σ + DRIVER FF A2 Q3 Q R + 5 S + A=3 600kHz OSCILLATOR 0.15Ω – 4 *HYSTERESIS IN LT1307 ONLY GND 1307 F02 Figure 2. LT1307/LT1307B Block Diagram 1307fa 7 LT1307/LT1307B U W U U APPLICATIO S I FOR ATIO OPERATION The LT1307 combines a current mode, fixed frequency PWM architecture with Burst Mode micropower operation to maintain high efficiency at light loads. Operation can best be understood by referring to the block diagram in Figure 2. Q1 and Q2 form a bandgap reference core whose loop is closed around the output of the converter. When VIN is 1V, the feedback voltage of 1.22V, along with an 80mV drop across R5 and R6, forward biases Q1 and Q2’s base collector junctions to 300mV. Because this is not enough to saturate either transistor, FB can be at a higher voltage than VIN. When there is no load, FB rises slightly above 1.22V, causing VC (the error amplifier’s output) to decrease. When VC reaches the bias voltage on hysteretic comparator A1, A1’s output goes low, turning off all circuitry except the input stage, error amplifier and lowbattery detector. Total current consumption in this state is 50µA. As output loading causes the FB voltage to decrease, A1’s output goes high, enabling the rest of the IC. Switch current is limited to approximately 100mA initially after A1’s output goes high. If the load is light, the output voltage (and FB voltage) will increase until A1’s output goes low, turning off the rest of the LT1307. Low frequency ripple voltage appears at the output. The ripple frequency is dependent on load current and output capacitance. This Burst Mode operation keeps the output regulated and reduces average current into the IC, resulting in high efficiency even at load currents of 100µA or less. If the output load increases sufficiently, A1’s output remains high, resulting in continuous operation. When the LT1307 is running continuously, peak switch current is controlled by VC to regulate the output voltage. The switch is turned on at the beginning of each switch cycle. When the summation of a signal representing switch current and a ramp generator (introduced to avoid subharmonic oscillations at duty factors greater than 50%) exceeds the VC signal, comparator A2 changes state, resetting the flipflop and turning off the switch. Output voltage increases as switch current is increased. The output, attenuated by a resistor divider, appears at the FB pin, closing the overall loop. Frequency compensation is provided by an external series RC network connected between the VC pin and ground. Low-battery detector A4’s open collector output (LBO) pulls low when the LBI pin voltage drops below 200mV. There is no hysteresis in A4, allowing it to be used as an amplifier in some applications. The entire device is disabled when the SHDN pin is brought low. To enable the converter, SHDN must be at VIN or at a higher voltage. The LT1307B differs from the LT1307 in that there is no hysteresis in comparator A1. Also, the bias point on A1 is set lower than on the LT1307 so that switching can occur at inductor current less than 100mA. Because A1 has no hysteresis, there is no Burst Mode operation at light loads and the device continues switching at constant frequency. This results in the absence of low frequency output voltage ripple at the expense of efficiency. The difference between the two devices is clearly illustrated in Figures 3 and 4. The top two traces in Figure 3 show an LT1307/LT1307B circuit, using the components indicated in Figure 1, set to a 5V output. Input voltage is 1.25V. Load current is stepped from 1mA to 41mA for both circuits. Low frequency Burst Mode operation voltage ripple is observed on Trace A, while none is observed on LT1307 VOUT TRACE A 500mV/DIV AC COUPLED TRACE B LT1307B VOUT 500mV/DIV AC COUPLED IL 41mA 1mA VIN = 1.25V VOUT = 5V 1ms/DIV 1307 F03 Figure 3. LT1307 Exhibits Burst Mode Operation Ripple at 1mA Load, LT1307B Does Not LT1307 VOUT TRACE A 200mV/DIV AC COUPLED TRACE B LT1307B VOUT 200mV/DIV AC COUPLED IL 45mA 5mA VIN = 1.5V VOUT = 5V 500µs/DIV 1307 F04 Figure 4. At Higher Loading and a 1.5V Supply, LT1307 Again Exhibits Burst Mode Operation Ripple at 5mA Load, LT1307B Does Not 1307fa 8 LT1307/LT1307B U W U U APPLICATIO S I FOR ATIO Trace B. Similarly, Figure 4 details the two circuits with a load step from 5mA to 45mA with a 1.5V input. The LT1307B also can be used in lower current applications where a clean, low ripple output is needed. Figure 5 details transient response of a single cell to 3.3V converter, using an inductor value of 100µH. This high inductance minimizes ripple current, allowing the LT1307B to regulate without skipping cycles. As the load current is stepped from 5mA to 10mA, the output voltage responds cleanly. Note that the VC pin loop compensation has been made more conservative (increased C, decreased R). quite evident, as is this particular device’s 575kHz switching frequency (nominal switching frequency is 600kHz). Note, however, the absence of significant energy at 455kHz. Figure 7’s plot reduces the frequency span from 255kHz to 655kHz with a 455kHz center. Burst Mode low frequency ripple creates sidebands around the 575kHz switching fundamental. These sidebands have low signal amplitude at 455kHz, measuring – 55dBmVRMS. As load current is further reduced, the Burst Mode frequency decreases. This spaces the sidebands around the switching frequency closer together, moving spectral energy further IL 20mA/DIV IL 10mA 5mA VIN = 1.25V VOUT = 3.3V 1ms/DIV 1307 F05 OUTPUT NOISE VOLTAGE (dBmVRMS) 40 VOUT 100mV/DIV AC COUPLED Figure 5. Increasing L to 100µH, Along with RC = 36k, CC = 20nF and COUT = 10µF, Low Noise Performance of LT1307B Can Be Realized at Light Loads of 5mA to 10mA DC/DC CONVERTER NOISE CONSIDERATIONS Switching regulator noise is a significant concern in many communications systems. The LT1307 is designed to keep noise energy out of the sensitive 455kHz band at all load levels while consuming only 60µW to 100µW at no load. At light load levels, the device is in Burst Mode, causing low frequency ripple to appear at the output. Figure 6 details spectral noise directly at the output of Figure 1’s circuit in a 1kHz to 1MHz bandwidth. The converter supplies a 5mA load from a 1.25V input. The Burst Mode fundamental at 5.1kHz and its harmonics are 20 10 0 –10 –20 –30 –40 –50 –60 10 100 FREQUENCY (kHz) 1 1000 1307 F06 Figure 6. Spectral Noise Plot of 3.3V Converter Delivering 5mA Load. Burst Mode Fundamental at 5.1kHz is 23dBmVRMS or 14mVRMS –20 OUTPUT NOISE VOLTAGE (dBmVRMS) At light loads, the LT1307B will begin to skip alternate cycles. The load point at which this occurs can be decreased by increasing the inductor value. However, output ripple will continue to be significantly less than the LT1307 output ripple. Further, the LT1307B can be forced into micropower mode, where IQ falls from 1mA to 50µA by pulling down VC to 0.3V or less externally. RBW = 100Hz 30 –25 RBW = 100Hz –30 –35 –40 –45 –50 –55 –60 –65 –70 255 455 FREQUENCY (kHz) 655 1307 F07 Figure 7. Span Centered at 455kHz Shows – 55dBmVRMS (1.8µVRMS) at 455kHz. Burst Mode Creates Sidebands 5.1kHz Apart Around the Switching Frequency Fundamental of 575kHz 1307fa 9 LT1307/LT1307B U W U U APPLICATIO S I FOR ATIO away from 455kHz. Figure 8 shows the noise spectrum of the converter with the load increased to 20mA. The LT1307 shifts out of Burst Mode operation, eliminating low frequency ripple. Spectral energy is present only at the switching fundamental and its harmonics. Noise voltage measures – 5dBmVRMS or 560µVRMS at the 575kHz switching frequency, and is below – 60dBmVRMS for all other frequencies in the range. By combining Burst Mode with fixed frequency operation, the LT1307 keeps noise away from 455kHz. OUTPUT NOISE VOLTAGE (dBmVRMS) 0 To eliminate the low frequency noise of Figure 6, the LT1307 can be replaced with the LT1307B. Figure 9 details the spectral noise at the output of Figure 1’s circuit using an LT1307B at 5mA load. Although spectral energy is present at 333kHz due to alternate pulse skipping, all Burst Mode operation spectral components are gone. Alternate pulse skipping can be eliminated by increasing inductance. FREQUENCY COMPENSATION Obtaining proper values for the frequency compensation network is largely an empirical, iterative procedure, since variations in input and output voltage, topology, capacitor value and ESR, and inductance make a simple formula elusive. As an example, consider the case of a 1.25V to 3.3V boost converter supplying 50mA. To determine optimum compensation, the circuit is built and a transient load is applied to the circuit. Figure 10 shows the setup. RBW = 100Hz –10 –20 –30 –40 –50 –60 –70 –80 10µH –90 –100 255 MBR0520L VOUT 455 FREQUENCY (kHz) 655 VIN Figure 8. With Converter Delivering 20mA, Low Frequency Sidebands Disappear. Noise is Present Only at the 575kHz Switching Frequency SW SHDN LT1307 VC 1307 F08 1µF 66Ω 1M 3300Ω FB GND 1.25V 10µF* R 590k C 50Ω OUTPUT VOLTAGE NOISE (dBmVRMS) 0 *CERAMIC –10 –20 1307 • F10 Figure 10. Boost Converter with Simulated Load –30 –40 –50 –60 –70 –80 –90 –100 205 455 FREQUENCY (kHz) 705 LT1307 • F09 Figure 9. LT1307B at 5mA Load Shows No Audio Components or Sidebands About Switching Frequency, 333kHz Fundamental Amplitude is –10dBmV, or 316µVRMS Figure 11a details transient response without compensation components. Although the output ripple voltage at a 1mA load is low, allowing the error amplifier to operate wideband results in excessive ripple at a 50mA load. Some kind of loop stabilizing network is obviously required. A 100k/22nF series RC is connected to the VC pin, resulting in the response pictured in Figure 11b. The output settles in about 7ms to 8ms. This may be acceptable, but we can do better. Reducing C to 2nF gives Figure 11c’s response. This is clearly in the right direction. After another order of magnitude reduction, Figure 11d’s response shows some 1307fa 10 LT1307/LT1307B U W U U APPLICATIO S I FOR ATIO VOUT 200mV/DIV AC COUPLED VOUT 200mV/DIV AC COUPLED IL 51mA 1mA IL 51mA 1mA 5ms/DIV 5ms/DIV 1307 F11a Figure 11a. VC Pin Left Unconnected. Output Ripple Voltage is 300mVP-P Under Load Figure 11b. Inclusion of a 100k/22nF Series RC on VC Pin Results in Overdamped Stable Response VOUT 200mV/DIV AC COUPLED VOUT 200mV/DIV AC COUPLED IL 51mA 1mA IL 51mA 1mA 1ms/DIV 1307 F11b 500µs/DIV 1307 F11a Figure 11c. Reducing C to 2nF Speeds Up Response, Although Still Overdamped 1307 F11b Figure 11d. A 100k/200pF Series RC Shows Some Underdamping VOUT 200mV/DIV AC COUPLED IL 51mA 1mA 1ms/DIV 1307 F11b Figure 11e. A 100k/680pF RC Provides Optimum Settling Time with No Ringing underdamping. Now settling time is about 300µs. Increasing C to 680pF results in the response shown in Figure 11e. This response has minimum settling time with no overshoot or underdamping. Converters using a 2-cell input need more capacitance at the output. This added capacitance moves in the output pole, requiring added C at the VC pin network to prevent loop oscillation. Observant readers will notice R has been set to 100k for all the photos in Figure 11. Usable R values can be found in the 10k to 500k range, but after too many trips to the resistor bins, 100k wins. 1307fa 11 LT1307/LT1307B U W U U APPLICATIO S I FOR ATIO LAYOUT HINTS COMPONENT SELECTION The LT1307 switches current at high speed, mandating careful attention to layout for proper performance. You will not get advertised performance with careless layouts. Figure 12 shows recommended component placement. Follow this closely in your PC layout. Note the direct path of the switching loops. Input capacitor CIN must be placed close (< 5mm) to the IC package. As little as 10mm of wire or PC trace from CIN to VIN will cause problems such as inability to regulate or oscillation. A 1µF ceramic bypass capacitor is the only input capacitance required provided the battery has a low inductance path to the circuit. The battery itself provides the bulk capacitance the device requires for proper operation. If the battery is located some distance from the circuit, an additional input capacitor may be required. A 100µF aluminum electrolytic unit works well in these cases. This capacitor need not have low ESR. Inductors 1 R1 R2 CC KEEP TRACES OR LEADS SHORT! LT1307 8 2 7 3 6 Table 1. Inductors Suitable for Use with the LT1307 L 4 5 CIN AA CELL RC Inductors appropriate for use with the LT1307 must possess three attributes. First, they must have low core loss at 600kHz. Most ferrite core units have acceptable losses at this switching frequency. Inexpensive iron powder cores should be viewed suspiciously, as core losses can cause significant efficiency penalties at 600kHz. Second, the inductor must handle current of 500mA without saturating. This places a lower limit on the physical size of the unit. Molded chokes or chip inductors usually do not have enough core to support 500mA current and are unsuitable for the application. Lastly, the inductor should have low DCR (copper wire resistance) to prevent efficiency-killing I2R losses. Linear Technology has identified several inductors suitable for use with the LT1307. This is not an exclusive list. There are many magnetics vendors whose components are suitable for use. A few vendor’s components are listed in Table 1. D COUT VOUT GROUND PART VALUE MAX DCR MFR HEIGHT (mm) LQH3C100 10µH 0.57 Murata-Erie 2.0 DO1608-103 10µH 0.16 Coilcraft 3.0 CD43-100 10µH 0.18 Sumida 3.2 CD54-100 10µH 0.10 Sumida 4.5 Best Efficiency CTX32CT-100 10µH 0.50 Coiltronics 2.2 1210 Footprint COMMENT Smallest Size 1307 F12 Figure 12. Recommended Component Placement. Traces Carrying High Current Are Direct. Trace Area at FB Pin and VC Pin is Kept Low. Lead Length to Battery Should Be Kept Short OPERATION FROM A LABORATORY POWER SUPPLY If a lab supply is used, the leads used to connect the circuit to the supply can have significant inductance at the LT1307’s switching frequency. As in the previous situation, an electrolytic capacitor may be required at the circuit in order to reduce the AC impedance of the input sufficiently. An alternative solution would be to attach the circuit directly to the power supply at the supply terminals, without the use of leads. The power supply’s output capacitance will then provide the bulk capacitance the LT1307 circuit requires. Capacitors For single cell applications, a 10µF ceramic output capacitor is generally all that is required. Ripple voltage in Burst Mode can be reduced by increasing output capacitance. For 2- and 3-cell applications, more than 10µF is needed. For a typical 2-cell to 5V application, a 47µF to 100µF low ESR tantalum capacitor works well. AVX TPS series (100% surge tested) or Sprague (don’t be vague—ask for Sprague) 594D series are both good choices for low ESR capacitors. Alternatively, a 10µF ceramic in parallel with a low cost (read high ESR) electrolytic capacitor, either tantalum or aluminum, can be used instead. For through hole applica- 1307fa 12 LT1307/LT1307B U W U U APPLICATIO S I FOR ATIO tions where small size is not critical, Panasonic HFQ series aluminum electrolytic capacitors have been found to perform well. Q3 R2 400k SHUTDOWN CURRENT SHDN Table 2. Vendor Telephone Numbers VENDOR COMPONENTS Coilcraft Inductors (708) 639-6400 Marcon Capacitors (708) 913-9980 Murata-Erie VIN 200k TELEPHONE Inductors, Capacitors (404) 436-1300 Sumida Inductors (847) 956-0666 Tokin Capacitors (408) 432-8020 AVX Capacitors (207) 282-5111 Sprague Capacitors (603) 224-1961 Coiltronics Inductors (407) 241-7876 Diodes Most of the application circuits on this data sheet specify the Motorola MBR0520L surface mount Schottky diode. This 0.5A, low drop diode complements the LT1307 quite well. In lower current applications, a 1N4148 can be used, although efficiency will suffer due to the higher forward drop. This effect is particularly noticeable at low output voltages. For higher voltage output applications, such as LCD bias generators, the extra drop is a small percentage of the output voltage so the efficiency penalty is small. The low cost of the 1N4148 makes it attractive wherever it can be used. In through hole applications the 1N5818 is the all around best choice. START-UP CURRENT Q2 Q1 1307 F13 Figure 13. Shutdown Circuit LOW-BATTERY DETECTOR The LT1307’s low-battery detector is a simple PNP input gain stage with an open collector NPN output. The negative input of the gain stage is tied internally to a 200mV ±5% reference. The positive input is the LBI pin. Arrangement as a low-battery detector is straightforward. Figure 14 details hookup. R1 and R2 need only be low enough in value so that the bias current of the LBI pin doesn’t cause large errors. For R2, 100k is adequate. The 200mV reference can also be accessed as shown in Figure 15. 3.3V R1 VIN LBI Note that allowing SHDN to float turns on both the startup current (Q2) and the shutdown current (Q3) for VIN > 2VBE. The LT1307 doesn’t know what to do in this situation and behaves erratically. SHDN voltage above VIN is allowed. This merely reverse-biases Q3’s base emitter junction, a benign condition. 1M + LBO R2 100k TO PROCESSOR – 200mV INTERNAL REFERENCE GND SHUTDOWN PIN The LT1307 has a Shutdown pin (SHDN) that must be grounded to shut the device down or tied to a voltage equal or greater than VIN to operate. The shutdown circuit is shown in Figure 13. LT1307 R1 = VLB – 200mV 2µA 1307 F14 Figure 14. Setting Low-Battery Detector Trip Point 200k 2N3906 VIN LBO LT1307 VREF 200mV 10k LBI + 10µF GND 1307 F15 Figure 15. Accessing 200mV Reference 1307fa 13 LT1307/LT1307B U W U U APPLICATIO S I FOR ATIO REVERSE BATTERY CONSIDERATIONS tion after sustaining polarity reversal for the life of a single AA alkaline cell. The LT1307 is built on a junction-isolated bipolar process. The p-type substrate is connected to the GND pin of the LT1307. Substrate diodes, normally reverse-biased, are present on the SW pin and the VIN pin as shown in Figure 16. When the battery polarity is reversed, these diodes conduct, as illustrated in Figure 17. With a single AA or AAA cell, several hundred milliamperes flow in the circuit. The LT1307 can withstand this current without damage. In laboratory tests, the LT1307 performed without degrada- When using a 2- or 3-cell supply, an external protection diode is recommended as shown in Figure 18. When the battery polarity is reversed, the 1N4001 conducts, limiting reverse voltage across the LT1307 to a single diode drop. This arrangement will quickly deplete the cells’ energy, but it does prevent the LT1307 from excessive power dissipation and potential damage. – 1.5V 1.5V CURRENT FLOW VIN 1 CELL VIN SW SW 1 CELL D1 LT1307 D2 Q1 D1 LT1307 GND 1307 F16 D2 Q1 GND 1307 F17 Figure 17. When Cell Is Reversed Current Flows through D1 and D2 Figure 16. LT1307 Showing Internal Substrate Diodes D1 and D2. In Normal Operation Diodes are Reverse-Biased 2 OR 3 CELLS 1N4001 VIN SW LT1307 GND 1307 F18 Figure 18. 1N4001 Diode Protects LT1307 from Excessive Power Dissipation When a 2- or 3-Cell Battery is Used 1307fa 14 LT1307/LT1307B U TYPICAL APPLICATIO S Externally Controlled Burst Mode Operation L1 10µH MBR0520 VOUT 1µF CERAMIC 2 CELLS 300k VIN VC 100k M1 2N7002 1nF R5 590k LT1307B LBO SHDN GND R2 49.9k SHUTDOWN This circuit overcomes the limitation of load-based transitioning between Burst Mode operation and constant switching mode by adding external control. If M1’s gate is grounded by an external open-drain signal, the converter functions normally in constant switching mode, delivering 3.3V. Output noise is low, however efficiency at loads less than 1mA is poor due to the 1mA supply current of the LT1307B. If M1’s gate is allowed to float, the low-battery VOUT 500mV/DIV IL R3 698k VOUT 3.3V 200mA LBI R1 10M GROUND = HIGH POWER/LOW NOISE FLOAT = Burst Mode OPERATION R4 1M SW FB C2* 10µF CERAMIC + C1 100µF 1307 F19 3.0V IN LOW-POWER Burst Mode OPERATION C1 = AVX TPSC107K006R0150 L1 = COILCRAFT DO1608-103 SUMIDA CD43-100 * C2 OPTIONAL: REDUCES OUTPUT RIPPLE CAUSED BY C1'S ESR detector now drives the VC pin. R3 and R2 set the output to 3V by allowing M1’s gate to go to VOUT until the output voltage drops below 3V. R1 adds hysteresis, resulting in low-frequency Burst Mode operation ripple voltage at the output. By pulling the VC pin below a VBE, quiescent current of the LT1307B drops to 60µA, resulting in acceptable efficiency at loads in the 100µA range. VOUT 100mV/DIV IL100mA 10mA 10mA 100µA 0.2s/DIV 1307 F20 This photo details output voltage as the circuit is switched between the two modes. Load current is 100µA in Burst Mode operation; 10mA in constant switching mode. 2ms/DIV 1307 F21 This photo shows transient response in constant switching mode with a 10mA to 100mA stepped load. Output ripple at the switching frequency can be reduced considerably by adding a 10µF ceramic capacitor in parallel with the 100µF tantalum. 1307fa 15 LT1307/LT1307B U TYPICAL APPLICATIO S Low Cost 2-Cell to 5V L1 10µH VIN 1.4V TO 3.3V + 1N5818 + C1* 220µF 6.3V VIN SW LT1307 0.1µF 5V 100mA C2 220µF 6.3V 1M SHDN FB 0.1µF GND 100k 323k 4700pF 1307 TA02 C1, C2: PANASONIC ECA0JFQ221 (DIGI-KEY P5604-ND) L1: SUMIDA CD43-100 Step-Up/Step-Down Converter L1 10µH VIN 2.1V TO 4.8V VIN 1µF CERAMIC 3 CELLS MBR0520 • 3.3V 100mA SW LT1307 VC 100k 2.2µF CERAMIC 1.02M FB SHDN 10µF CERAMIC • L1* GND 608k 1000pF SHDN 1307 TA03 L1: COILTRONICS CTX10-1 OR 2 MURATA ERIE LQH3C100 EFFICIENCY ≈70% TO 73% Constant Current NiCd Battery Charger with Overvoltage Protection for Acknowledge-Back Pagers VIN 1.8V TO 1V L1 10µH 3 1µF VIN VC 1 CELL AA OR AAA 2.2µF CERAMIC • SW FB LBO 2200pF SHDN 1 = CHARGE 0 = SHUTDOWN 1M •1 OVERVOLTAGE 323k PROTECTION LT1307 47k MBR0520L 2 LBI GND 4 30k 200mV 15mA 1µF CERAMIC 3 CELLS NiCd –100mV 280k 1nF 6.7Ω 3V 1307 TA04 L1: COILTRONICS CTX10-1 1307fa 16 LT1307/LT1307B U TYPICAL APPLICATIO S Single Cell Powered Constant Current LED Driver L1 10µH VIN D1 100k D2 VIN LBO Q1 2N3906 SW FB NC LT1307B AA CELL VC GND SHDN + C1 1µF CERAMIC LBI 40mA C3 22µF C2 1µF CERAMIC R2 22k R1 5.1Ω 100k 1307 TA05 ON/OFF L1: MURATA-ERIE LQH3C100K04 D1: 1N4148 VIN C1, C2: CERAMIC D2, D3: LUMEX SSL-X100133SRC/4 "MEGA-BRITE" RED LED OR PANASONIC LNG992CF9 HIGH BRIGHTNESS BLUE LED Flash Memory VPP Supply VIN 3V TO 5.5V L1 10µH + 12V/30mA FROM 3V 12V/60mA FROM 5V ~250mVP-P RIPPLE 0.33µF 1µF TANTALUM SHUTDOWN 1N4148 D1 47k VIN SW SHDN LT1307 VC 2000pF 10pF 0.33µF CERAMIC ×2 2M 1% FB GND 232k 1% D1: MOTOROLA MBR0520L L1: MURATA-ERIE LQH3C100K04 1307 TA09 High Voltage Flyback Converter OPTIONAL DOUBLER 2VOUT 0.1µF 0.01µF VIN 1V TO 5V T1 1:12 1µF CERAMIC 100k T1: DALE LPE3325-A190, n = 12 (605) 665-9301 ( ) 4 VOUT = 1.22V 1 + 1 SHUTDOWN • 3 1N4148 • SW VIN SHDN FB LT1307 VC GND 6 R1 VOUT R2 240k 1% 0.1µF R1 R2 MAXIMUM DUTY CYCLE: ≈80% FOR FLYBACK, VOUT = DC n(VIN – VSW) 1 – DC FOR 1VIN, MAXIMUM VOUT = 0.8 12(1 – 0.2) ≈ 37V 1 – 0.8 FOR 2VIN, MAXIMUM VOUT ≈ 85V. HIGHER VOLTAGES ACHIEVED WITH CAPACITIVE DOUBLER OR TRIPLER NO SNUBBER REQUIRED WITH SPECIFIED TRANSFORMER AND VIN < 5V 1000pF 1307 TA06 1307fa 17 LT1307/LT1307B U TYPICAL APPLICATIO S Single Cell CCFL Power Supply 6 10 T1 4 5 3 2 1.5V 100Ω Q1 1.5V 47pF 3kV 1 C1 0.1µF CCFL Q2 L1 33µH D1 1.5V 1µF CERAMIC 1 CELL VIN SW 1N4148 LT1307B SHDN FB 10k 1N4148 VC GND 1k 0.1µF 0.1µF 10k DIMMING 1307 TA08 1 = OPERATE 0 = SHUTDOWN C1: WIMA MKP-20 D1: MOTOROLA MBR0520L L1: SUMIDA CD54-330 T1: COILTRONICS CTX110611 Q1, Q2: ZETEX FZT-849 U PACKAGE DESCRIPTIO MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 0.254 (.010) 3.2 – 3.45 (.126 – .136) DETAIL “A” 0° – 6° TYP GAUGE PLANE 0.42 ± 0.04 (.0165 ± .0015) TYP 0.65 (.0256) BSC RECOMMENDED SOLDER PAD LAYOUT 0.53 ± 0.015 (.021 ± .006) DETAIL “A” 1.10 (.043) MAX 0.86 (.34) REF 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 8 7 6 5 0.18 (.077) SEATING PLANE 0.22 – 0.38 (.009 – .015) 0.65 (.0256) BCS 0.13 ± 0.05 (.005 ± .002) NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.52 (.206) REF 3.00 ± 0.102 (.118 ± .004) NOTE 4 4.88 ± 0.1 (.192 ± .004) MSOP (MS8) 1001 1 2 3 4 1307fa 18 LT1307/LT1307B U PACKAGE DESCRIPTION N8 Package 8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) 0.400* (10.160) MAX 8 7 6 5 1 2 3 4 0.255 ± 0.015* (6.477 ± 0.381) 0.300 – 0.325 (7.620 – 8.255) 0.065 (1.651) TYP 0.009 – 0.015 (0.229 – 0.381) ( +0.035 0.325 –0.015 8.255 +0.889 –0.381 0.130 ± 0.005 (3.302 ± 0.127) 0.045 – 0.065 (1.143 – 1.651) ) 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 ± 0.003 (0.457 ± 0.076) 0.100 (2.54) BSC N8 1098 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) 0.189 – 0.197* (4.801 – 5.004) 8 7 6 5 0.150 – 0.157** (3.810 – 3.988) 0.228 – 0.244 (5.791 – 6.197) 1 0.010 – 0.020 × 45° (0.254 – 0.508) 0.008 – 0.010 (0.203 – 0.254) 0.053 – 0.069 (1.346 – 1.752) 0°– 8° TYP 0.016 – 0.050 (0.406 – 1.270) 0.014 – 0.019 (0.355 – 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 2 3 4 0.004 – 0.010 (0.101 – 0.254) 0.050 (1.270) BSC SO8 1298 1307fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT1307/LT1307B U TYPICAL APPLICATIO LCD Bias Generator D1 –VOUT 0.1µF 10pF LT1307 VC 100k VOUT 16V TO 24V 5mA FROM 1 CELL 15mA FROM 2 CELLS 35mA FROM 3 CELLS SW 1µF 1, 2 OR 3 CELLS D2 D3 L1 VIN 1µF 3.3M C1 FB SHDN GND 1M 4700pF 215k 1307 TA07 3.3µF SHUTDOWN + L1: 3.3µH (1 CELL) 4.7µH (2 CELLS) 10µH (3 CELLS) SUMIDA CD43 MURATA-ERIE LQH3C COILCRAFT D01608 C1: 1µF FOR +OUTPUT 0.01µF FOR – OUTPUT D1 TO D3: MBR0530 OR 1N4148 100k PWM IN 3.3V, 0% TO 100% RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC®1163 Triple High Side Driver for 2-Cell Inputs 1.8V Minimum Input, Drives N-Channel MOSFETs LTC1174 Micropower Step-Down DC/DC Converter 94% Efficiency, 130µA IQ, 9V to 5V at 300mA LT1302 High Output Current Micropower DC/DC Converter 5V/600mA from 2V, 2A Internal Switch, 200µA IQ LT1304 2-Cell Micropower DC/DC Converter Low-Battery Detector Active in Shutdown LTC1440/1/2 Ultralow Power Single/Dual Comparators with Reference 2.8µA IQ, Adjustable Hysteresis LTC1516 2-Cell to 5V Regulated Charge Pump 12µA IQ, No Inductors, 5V at 50mA from 3V Input LTC3400 600mA, 1.2MHz, Synchronous Boost Converter 92% Efficiency, VIN: 0.85V to 5V, ThinSOTTM Package LTC3401 1A, 3MHz, Synchronous Boost Converter 97% Efficiency, VIN: 0.5V to 5V, 10-Lead MSOP LTC3402 2A, 3MHz, Synchronous Boost Converter 97% Efficiency, VIN: 0.5V to 5V, 10-Lead MSOP ThinSOT is a trademark of Linear Technology Corporation. 1307fa 20 Linear Technology Corporation LT/TP 1101 1.5K REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com  LINEAR TECHNOLOGY CORPORATION 1995
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