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LT3782AEFE

LT3782AEFE

  • 厂商:

    AD(亚德诺)

  • 封装:

    TSSOP28

  • 描述:

    IC REGULATOR

  • 数据手册
  • 价格&库存
LT3782AEFE 数据手册
LT3782A 2-Phase Step-Up DC/DC Controller Description Features 2-Phase Operation Reduces Required Input and Output Capacitance n Programmable Switching Frequency: 150kHz to 500kHz n 6V to 40V Input Range n 10V Gate Drive with V CC ≥13V n High Current Gate Drive (4A) n Programmable Soft-Start and Current Limit n Programmable Slope Compensation for High Noise Immunity n MOSFET Gate Signals with Programmable Falling Edge Delay for External Synchronous Drivers n Programmable Undervoltage Lockout n Programmable Duty Cycle Clamp (50% or Higher) n Thermally Enhanced 28-Lead TSSOP and 4mm × 5mm QFN Packages The LT®3782A is a current mode 2-phase step-up DC/DC converter controller. Its high switching frequency (up to 500kHz) and 2-phase operation reduce system filtering capacitance and inductance requirements. n With 10V gate drive (VCC ≥13V) and 4A peak drive current, the LT3782A can drive most industrial grade high power MOSFETs with high efficiency. For synchronous applications, the LT3782A provides synchronous gate signals with programmable falling edge delay to avoid cross conduction when using external MOSFET drivers. Other features include programmable undervoltage lockout, soft-start, current limit, duty cycle clamp (50% or higher) and slope compensation. The LT3782A is identical to the LT3782 except that the LT3782A has a tighter current sense mismatch tolerance. The LT3782A is available in thermally enhanced 28-lead TSSOP and 4mm × 5mm QFN packages. Applications Industrial Equipment n Telecom Infrastructure n Interleaved Isolated Power Supply L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks, ThinSOT and No RSENSE are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6144194. n Typical Application 50V 4A Boost Converter 20µH VIN 10V TO 36V 1µF VCC GBIAS1 GBIAS2 825k + D2 VOUT 50V, 4A SLOPE 0.004Ω Q2 BGATE2 DELAY 80k 0.1µF SS VC 13k 6.8nF 0.004Ω 12 93 VIN = 12V 91 VIN = 24V 89 85 10Ω 24.9k SENSE1+ SENSE1– SENSE2+ SENSE2– FB GND 10nF 9 6 POWER LOSS 3 475k VEE2 10Ω 15 VIN = 12V 87 DCL RSET 95 220µF VEE1 59k VIN = 24V EFFICIENCY Q1 LT3782A 18 97 POWER LOSS (W) 274k 10µF ×2 D1 2µF GBIAS BGATE1 RUN 100pF 20µH EFFICIENCY (%) 10µF ×2 Efficiency and Power Loss vs Load Current 0 1 2 3 IOUT (A) 4 5 0 3782A TA01b 10nF D1, D2: 30BQ060PbF Q1, Q2: Si7852DP-T1-E3 3782A TA01 3782afc For more information www.linear.com/LT3782A 1 LT3782A Absolute Maximum Ratings (Note 1) VCC Supply Voltage....................................................40V GBIAS, GBIAS1, GBIAS2 Pin (Externally Forced)....................................................14V SYNC, RUN Pin..........................................................30V Operating Junction Temperature Range (Notes 2, 3).................................. –40°C to 125°C SS............................................................ 300µA Max ISS SENSE1+, SENSE2+, SENSE1–, SENSE2– ...................................... –0.3V to 2V Storage Temperature Range...................– 65°C to 150°C Lead Temperature (Soldering, 10 sec) For FE Package...................................................... 300°C Pin Configuration TOP VIEW 26 NC GND 4 25 NC SYNC 5 24 VEE1 DELAY 6 23 BGATE1 DCL 3 DCL 7 22 GBIAS1 SENSE1+ 4 SENSE1+ 8 SENSE2 12 15 NC 9 10 11 12 13 14 17 RUN 15 VC 16 VEE2 SENSE2– 8 18 NC 16 FB 17 BGATE2 RSET 7 19 VEE2 SS 14 18 GBIAS2 SLOPE 6 20 BGATE2 SENSE2+ 13 19 NC FE PACKAGE 28-LEAD PLASTIC TSSOP TJMAX = 125°C, θJA = 30°C/ W EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB RUN – SENSE1– 5 21 GBIAS2 FB RSET 11 20 NC 29 GND VC SLOPE 10 21 GBIAS1 SS 9 22 BGATE1 DELAY 2 NC SENSE1 28 27 26 25 24 23 SYNC 1 SENSE2+ – 29 GND VEE1 27 VCC 3 VCC 2 NC GBIAS SGATE1 SGATE2 28 GBIAS GND 1 SGATE1 TOP VIEW SGATE2 UFD PACKAGE 28-LEAD (4mm × 5mm) PLASTIC QFN TJMAX = 125°C, θJA = 37°C/ W EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3782AEFE#PBF LT3782AEFE#TRPBF LT3782AFE 28-Lead Plastic TSSOP –40°C to 125°C LT3782AIFE#PBF LT3782AIFE#TRPBF LT3782AFE 28-Lead Plastic TSSOP –40°C to 125°C LT3782AEUFD#PBF LT3782AEUFD#TRPBF 3782A 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C LT3782AIUFD#PBF LT3782AIUFD#TRPBF 3782A 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3782AEFE LT3782AEFE#TR LT3782AFE 28-Lead Plastic TSSOP –40°C to 125°C LT3782AIFE LT3782AIFE#TR LT3782AFE 28-Lead Plastic TSSOP –40°C to 125°C LT3782AEUFD LT3782AEUFD#TR 3782A 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C LT3782AIUFD LT3782AIUFD#TR 3782A 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 2 3782afc For more information www.linear.com/LT3782A LT3782A Electrical Characteristics The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TJ = 25°C. VCC = 13V, RSET = 80k, no load on any outputs, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Overall Supply Voltage (VCC) l Supply Current (IVCC) 6 VC ≤ 0.5V (Switching Off), VCC ≤ 40V 40 V 11 16 mA 2.44 2.6 Shutdown RUN Threshold l 2.3 RUN Threshold Hysteresis 80 Supply Current in Shutdown 1V ≤ RUN ≤ VREF RUN ≤ 0.3V, VCC ≤ 30V RUN Pin Input Current VRUN = 2.3V l V mV 0.4 40 0.65 90 mA µA –0.5 –2 µA V V Voltage Amplifier gm Reference Voltage (VREF) 2.42 2.4 2.44 l 2.464 2.488 200 260 370 µmho 0.2 0.6 µA Transconductance VVC = 1V, ∆IVC = ±2µA l Input Current IFB VFB = VREF l VC High IVC = 0 1.5 V VC Low IVC = 0 0.35 0.4 V Source Current IVC VVC = 0.7V – 1V, VFB = VREF – 100mV 8 11 14 µA Sink Current IVC VVC = 0.7V – 1V, VFB = VREF + 100mV 13 20 28 µA VC Threshold for Switching Off (BGATE1, BGATE2 Low) l VSS = 0.1V – 2.8V Soft-Start Current ISS 0.3 6 V 10 15 µA 70 mV 10 mV Current Amplifier CA1, CA2 Voltage Gain ∆VC /∆VSENSE 4 Current Limit (VSENSE1+ – VSENSE1–) (VSENSE2+ – VSENSE2–) VFB = 2.3V 55 Current Limit Mismatch (∆VSENSE1 – ∆VSENSE2), VFB = 2.3V –10 +, I Input Current (ISENSE1 SENSE1 –, I SENSE2 +, I SENSE2 –) ∆VSENSE = 0V 63 60 µA Oscillator Switching Frequency RSET = 130k RSET = 80k RSET = 40k 130 212 386 154 250 465 177 288 533 Synchronization Pulse Threshold on SYNC Pin Rising Edge VSYNC 0.8 1.2 2 Synchronization Frequency Range (Note: Operation Switching Frequency Equals Half of the Synchronization Frequency) RSET = 130k RSET = 80k RSET = 40k 180 290 550 VRSET RSET = 80k Maximum Duty Cycle VFB = VREF – 25mV, RSET > 80k RSET = 40k Duty Cycle Limit RSET = 80k, VDCL ≤ 0.3V VDCL = 1.2V VDCL = VRSET DCL Pin Input Current VDCL ≤ 0.3V l l l l l l 90 83 240 392 715 kHz kHz kHz V kHz kHz kHz 2.3 V 94 90 % % 50 75 Max Duty Cycle % % –0.1 –0.3 µA 3782afc For more information www.linear.com/LT3782A 3 LT3782A ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TJ = 25°C. VCC = 13V, RSET = 80k, no load on any outputs, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Gate Driver VGBIAS IGBIAS < 70mA l 10.2 11 11.7 V BGATE1, BGATE2 High Voltage 13V ≤ VCC ≤ 24V, IBGATE = –100mA VCC = 8V, IBGATE = –100mA l l 7.8 3.8 9.2 5 10.5 V V BGATE1, BGATE2 Source Current (Peak) Capacitive Load >22µF Capacitive Load >50µF BGATE1, BGATE2 Low Voltage 8V ≤ VCC ≤ 24V, IBGATE = 100mA BGATE1, BGATE2 Sink Current (Peak) Capacitive Load >22µF Capacitive Load >50µF SGATE1, SGATE2 High Voltage 8V ≤ VCC ≤ 24V, ISGATE = –20mA SGATE1, SGATE2 Low Voltage 3 4 A A 0.5 l 0.7 V 3 4 5.5 6.7 V 8V ≤ VCC ≤ 24V, ISGATE = 20mA 0.5 0.7 V SGATE1, SGATE2 Peak Current 500pF Load 100 mA Delay of BGATE High DELAY Pin and RSET Pin Shorted VDELAY = 1V VDELAY = 0.5V VDELAY = 0.25V 100 150 250 500 ns ns ns ns Delay Pin Input Current VDELAY = 0.25V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3782AE is guaranteed to meet performance specifications from 0°C to 85°C operating junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3782AI is guaranteed to meet performance specifications over the 10.7 14 10.6 12 10.5 10.4 8 6 10.2 4 10.1 2 0 50 100 IGBIAS (mA) 3782A G01 4 0 3 12 2 10 1 10 10.3 10.0 ∆VREF vs VCC, ∆Frequency vs VCC (RSET = 80k) ∆VREF (mV) 16 ICC (mA) 10.8 µA TJ = 25°C unless otherwise noted. 20 18 –0.3 full –40°C to 125°C operating junction temperature range. The maximum ambient temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. Note 3: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. ICC vs VCC 10.9 –0.1 6 8 10 12 14 16 18 20 22 24 26 28 30 VCC (V) 3782A G02 8 ∆VREF 0 6 –1 4 –2 2 ∆FREQUENCY –3 0 –4 –2 –5 6 9 12 15 18 21 24 27 30 ∆FREQUENCY (kHz) VGBIAS (V) 11.0 l l Typical Performance Characteristics VGBIAS vs IGBIAS 4.5 A A –4 VCC (V) 3782A G03 3782afc For more information www.linear.com/LT3782A LT3782A TYPICAL PERFORMANCE CHARACTERISTICS 600 2.446 CURRENT LIMIT THRESHOLD (mV) 70 2.444 REFERENCE VOLTAGE (V) 500 400 300 200 2.442 2.440 2.438 2.436 2.434 20 40 60 80 100 120 140 160 180 200 RFREQ (kΩ) 25 75 100 125 50 JUNCTION TEMPERATURE (°C) 0 3782A G04 8 500 6 400 300 IGBIAS 30 55 5 80 TEMPERATURE (°C) 500µ TIME (s) 105 130 3782A G10 750µ 600 500 400 300 200 100 250µ –20 700 200 0 0 55 –45 150 800 DELAY (ns) 600 IGBIAS (mA) 10 –2 58 900 700 VGBIAS 2 61 1000 800 4 64 SGATE (Low) to BGATE (High) Delay vs VDELAY (RSET = 80k) 14 12 67 3782A G05 VGBIAS vs IGBIAS at Start-Up (Charging 2µF) VGBIAS (V) 100 0 0 1m 0.5 0 1.5 1.0 VDELAY (V) 2.0 2.5 3782A G07 3782A G06 Switching Frequency vs Duty Cycle Maximum Duty Cycle Limit vs VDCL (RSET = 80k) 105 120 110 100 MAXIMUM DUTY CYCLE (%) 0 DUTY CYCLE (%) FREQUENCY (kHz) Current Limit Threshold vs Temperature Reference Voltage vs Temperature Switching Frequency vs RFREQ 100 TJ = 25°C, unless otherwise noted. 95 90 85 100 90 80 70 60 50 80 100 200 400 500 300 SWITCHING FREQUENCY (kHz) 600 40 0 0.3 3782A G08 0.6 0.9 1.2 1.5 VDCL (V) 1.8 2.1 2.4 3782A G09 3782afc For more information www.linear.com/LT3782A 5 LT3782A Pin Functions (FE/UFD) SGATE2 (Pin 1/Pin 26): Second Phase Synchronous Drive Signal. An external driver buffer is needed to drive the top synchronous power FET. SS (Pin 14/Pin 11): Soft-Start. A capacitor on this pin sets the output ramp up rate. The typical time for SS to reach the programmed level is (C • 2.44V)/10µA. SGATE1 (Pin 2/Pin 27): First Phase Synchronous Drive Signal. An external driver buffer is needed to drive the top synchronous power FET. VC (Pin 15/Pin 12): The output of the gm error amplifier and the control signal of the current loop of the current-mode PWM. Switching starts at 0.7V, and higher VC voltages corresponds to higher inductor current. GND (Pin 4, Exposed Pad Pin 29/Pin 28, Exposed Pad Pin 29): Ground. Solder the exposed pad to the PCB ground plane for rated thermal performance. The exposed pad should be connected to the GND pin as close to the IC as possible. SYNC (Pin 5/Pin 1): Synchronization Input. The pulse width can range from 10% to 70%. Note that the operating frequency is half of the sync frequency. DELAY (Pin 6/Pin 2): When synchronous drivers are used, the programmable delay that delays BGATE turns on after SGATE turns off. DCL (Pin 7/Pin 3): This pin programs the limit of the maximum duty cycle. When connected to VRSET, it operates at natural maximum duty cycle, approximately 90%. SENSE1+ (Pin 8/Pin 4): First Phase Current Sense Amplifier Positive Input. An RC filter is required across the current sense resistor. Current limit threshold is set at 63mV. SENSE1– (Pin 9/Pin 5): First Phase Current Sense Amplifier Negative Input. SLOPE (Pin 10/Pin 6): A resistor from SLOPE to GND increases the internal current mode PWM slope compensation. RSET (Pin 11/Pin 7): A resistor from RSET to GND sets the oscillator charging current and the operating frequency. SENSE2– (Pin 12/Pin 8): Second Phase Current Sense Amplifier Negative Input. SENSE2+ (Pin 13/Pin 10): Second Phase Current Sense Amplifier Positive Input. An RC filter is required across the current sense resistor. Current limit threshold is set at 63mV. 6 FB (Pin 16/Pin 13): Error Amplifier Inverting Input. A resistor divider to this pin sets the output voltage. RUN (Pin 17/Pin 14): LT3782A goes into shutdown mode when VRUN is below 2.3V and goes to low bias current shutdown mode when VRUN is below 0.3V. VEE2 (Pin 19/Pin 16): Gate Driver BGATE2 Ground. This pin should be connected to ground as close to the IC as possible. BGATE2 (Pin 20/Pin 17): Second Phase MOSFET Driver. GBIAS2 (Pin 21/Pin 18): Bias for Gate Driver BGATE2. Should be connected to GBIAS or an external power supply between 12V to 14V. GBIAS1 (Pin 22/Pin 21): Bias for Gate Driver BGATE1. Should be connected to GBIAS2. BGATE1 (Pin 23/Pin 22): First Phase MOSFET Driver. VEE1 (Pin 24/Pin 23): Gate Driver BGATE1 Ground. This pin should be connected to ground as close to the IC as possible. VCC (Pin 27/Pin 24): Chip Power Supply. Good supply bypassing is required. GBIAS (Pin 28/Pin 25): Internal 11V regulator output for biasing internal circuitry. Should be connected to GBIAS1 and GBIAS2. A bypass low ESR capacitor of 2µF or larger is needed and should be connected directly to the pin to minimize parasitic impedance. NC (Pins 3, 18, 25, 26/Pins 9, 15, 19, 20): Not Connected. Can be connected to GND. 3782afc For more information www.linear.com/LT3782A LT3782A Block Diagram VIN VCC CIN 20µF 27 R6 REGULATOR + RUN 0.5V 22 7V A6 L2 15µH D2 COUT 100µF GBIAS 28 VCC – 2.5V RF1 + RF2 A7 – + + C3 2µF 21 – + VOUT D1 GBIAS2 A8 – + GBIAS1 + A11 – + R8 + LOW POWER SHUTDOWN A5 17 L1 15µH VGBIAS = VCC – 1V AND CLAMPED AT 11V A20 2.44V SGATE1 A4 2 A1 DELAY + + 6 ONE SHOT RSET A12 2.5V BGATE1 GBIAS1 – BGATE1 A13 A14 R1 50k SLOPE COMP CH1 + PWM1 M1 23 A9 SENSE1+ 8 BLANKING R3 SENSE1– 9 – R7 10Ω RS1 C2 2nF VEE1 24 A3 + BGATE1 SGATE1 CL1 – + DELAY 60mV SGATE2 SET A15 1 A17 + + A16 2.5V DELAY – BGATE2 ONE SHOT GBIAS2 BGATE2 A18 A19 R2 50k SLOPE COMP CH2 SET SLOPE SLOPE COMP 10 CH1 CH2 S S R PWM2 R SYNC + SENSE2+ 13 BLANKING R4 SENSE2– 12 – 5 M2 20 A2 R9 10Ω RS2 C4 2nF VEE2 19 A10 RSET 11 OSC RFREQ C5 20pF GND + CK D Q Q + LOGIC CL2 – 7 D7 + DCL VC FB 16 GM 60mV 4 D6 – VREF I1 10µA D4 SS 15 R5 2k 3782A BD NOTE: PACKAGE BOTTOM METAL PLATE (PIN 29) IS FUSED TO CHIP DIE AGND 4V 14 C7 10nF C1 2000pF 3782afc For more information www.linear.com/LT3782A 7 LT3782A Applications Information Operation Soft-Start and Shutdown The LT3782A is a two phase constant frequency current mode boost controller. Switching frequency can be programmed up to 500kHz. During normal switching cycles, the two channels are controlled by internal flip-flops and are 180 degrees out-of-phase. During soft-start, the voltage on the SS pin (VSS) controls the output voltage. The output voltage thus ramps up following VSS . The effective range of VSS is from 0V to 2.44V. The typical time for the output to reach the programmed level is: Referring to the Block Diagram, the LT3782A’s basic functions include a transconductance amplifier (gm) to regulate the output voltage and to control the current mode PWM current loop. It also includes the necessary logic and flipflop to control the PWM switching cycles, two high speed gate drivers to drive high power N-channel MOSFETs, and 2-phase control signals to drive external gate drivers for optional synchronous operation. In normal operation, each switching cycle starts with a switch turn-on. The inductor current of each channel is sampled through the current sense resistor and amplified then compared to the error amplifier output VC to turn the switch off. The phase delay of the second channel is controlled by the divide-by-two D flip-flop and is exactly 180 degrees out-of-phase of the first channel. With a resistor divider connected to the FB pin, the output voltage is programmed to the desired value. The 10V gate drivers are sufficient to drive most high power N-channel MOSFET in many industrial applications. Additional important features include shutdown, current limit, soft-start, synchronization and programmable maximum duty cycle. Additional slope compensation can be added also. Output Voltage Programming With a 2.44V feedback reference voltage VREF, the output VOUT is programmed by a resistor divider as shown in the Block Diagram. ⎛ R ⎞ VOUT = 2.44 ⎜1+ F1 ⎟ ⎝ RF2 ⎠ 8 t= C • 2.44V 10µA C is the capacitor connected from the SS pin to GND. Undervoltage Lockout and Shutdown Only when VRUN is higher than 2.45V VGBIAS will be active and the switching enabled. The LT3782A goes into low current shutdown when VRUN is below 0.3V. A resistor divider can be used on RUN pin to set the desired VCC undervoltage lockout voltage. 80mV of hysteresis is built in on RUN pin thresholds. Oscillation Frequency Setting and Synchronization The switching frequency of LT3782A can be set up to 500kHz by a resistor RFREQ from pin RSET to ground. For fSET = 250kHz, RFREQ = 80k Once the switching frequency fSET is chosen, RFREQ can be found from the Switching Frequency vs RFREQ graph found under the Typical Performance Characteristics section. Note that because of the 2-phase operation, the internal oscillator is running at twice the switching frequency. To synchronize the LT3782A to the system frequency fSYSTEM, the synchronizing frequency fSYNC should be two times fSYSTEM, and the LT3782A switching frequency fSET should be set below 80% of fSYSTEM. fSYNC = 2fSYSTEM and fSET < (fSYSTEM • 0.8) For example, to synchronize the LT3782A to 200kHz system frequency fSYSTEM, fSYNC needs to be set at 400kHz and fSET needs to be set at 160kHz. From the Switching Frequency vs RFREQ graph found under the Typical Performance Characteristics section, RFREQ = 130k. 3782afc For more information www.linear.com/LT3782A LT3782A APPLICATIONS INFORMATION With a 200ns one-shot timer on chip, the LT3782A provides flexibility on the external sync pulse width. The sync pulse threshold is about 1.2V (Figure 1). This pin can be floated when the sync function is not used. Current Limit Current limit is set by the 63mV threshold across SEN1P, SEN1N for channel one and SEN2P, SEN2N for channel two. By connecting an external resistor RS (see Block Diagram), the current limit is set for 63mV/RS . RS should be placed very close to the power switch with very short traces. A low pass RC filter is needed across RS to filter out the switching spikes. Good Kelvin sensing is required for accurate current limit. The input bypass capacitor ground should be at the same ground point of the current sense resistor to minimize the ground current path. Synchronous Rectifier Switches For high output voltage applications, the power loss of the catch diodes are relatively small because of high duty cycle. If diodes power loss or heat is a concern, the LT3782A provides PWM signals through SGATE1 and SGATE2 pins to drive external MOSFET drivers for synchronous rectifier operation. Note that SGATE drives the top switch and BGATE drives the bottom switch. To avoid cross conduction between top and bottom switches, the BGATE turn-on is delayed 100ns (when DELAY pin is tied to RSET pin) from SGATE turn-off (see Figure 2). If a longer delay is needed to compensate for the propagation delay of external gate driver, a resistor divider can be used from RSET to ground to program VDELAY for the longer delay needed. For example, for a switching frequency of 250kHz and delay of 150ns, then RFREQ1 + RFREQ2 should be 80k and VDELAY should be 1V, with VRSET = 2.3V then RFREQ1 = 47.5k and RFREQ2 = 32.5k (see Figure 3). Duty Cycle Limit When DCL pin is shorted to RSET pin and switching frequency is less than 250kHz (RFREQ > 80k), the maximum duty cycle of LT3782A will be at least 90%. The maximum duty cycle can be clamped to 50% by grounding the DCL pin or to 75% by forcing the VDCL voltage to 1.2V with a resistor divider from RSET pin to ground. The typical DCL pin input current is 0.1µA. 5V TO 20V 5k LT3782A BGATE1 SYNC SGATE1 VN2222 PULSE WIDTH > 200ns DELAY SET 3782A F01 3782A F02 Figure 1. Synchronizing with External Clock Figure 2. Delay Timing DELAY LT3782A RSET RFREQ1 47.5k 3782A F03 RFREQ2 32.5k Figure 3. Increase Delay Time 3782afc For more information www.linear.com/LT3782A 9 LT3782A APPLICATIONS INFORMATION Slope Compensation The LT3782A is designed for high voltage and/or high current applications, and very often these applications generate noise spikes that can be picked up by the current sensing amplifier and cause switching jitter. To avoid switching jitter, careful layout is absolutely necessary to minimize the current sensing noise pickup. Sometimes increasing slope compensation to overcome the noise can help to reduce jitter. The built-in slope compensation can be increased by adding a resistor RSLOPE from SLOPE pin to ground. Note that smaller RSLOPE increases slope compensation and the minimum RSLOPE allowed is RFREQ/2. Layout Considerations To prevent EMI, the power MOSFETs and input bypass capacitor leads should be kept as short as possible. A ground plane should be used under the switching circuitry to prevent interplane coupling and to act as a thermal spreading path. Note that the bottom pad of the package is the heat sink, as well as the IC signal ground, and must be soldered to the ground plane. In a boost converter, the conversion gain (assuming 100% efficiency) is calculated as (ignoring the forward voltage drop of the boost diode): VOUT 1 = VIN 1−D Power Inductor Selection In a boost circuit, a power inductor should be designed to carry the maximum input DC current. The inductance should be small enough to generate enough ripple current to provide adequate signal to noise ratio to the LT3782A. An empirical starting of the inductor ripple current (per phase) is about 40% of maximum DC current, which is half of the input DC current in a 2-phase circuit: ΔIL ≅ 40% • IOUT(MAX) • VOUT 2VIN = 20% • IOUT(MAX) • VOUT VIN where VIN , VOUT and IOUT are the DC input voltage, output voltage and output current, respectively. And the inductance is estimated to be: L= where D is the duty ratio of the main switch. D can then be estimated from the input and output voltages: D = 1− Based on the fact that, ideally, the output power is equal to the input power, the maximum average input current is: IO(MAX) IIN(MAX) = 1– DMAX The peak current is: IO(MAX) IIN(PEAK) = 1.2 • 1– DMAX The maximum duty cycle, DMAX , should be calculated at minimum VIN. VIN • D fs • ΔIL where fs is the switching frequency per phase. The saturation current level of inductor is estimated to be: VIN(MIN) VIN ; DMAX = 1− VOUT VOUT The Peak and Average Input Currents ISAT ≥ IOUT(MAX) • VOUT ΔIL IIN + ≅ 70% • 2 2 VIN(MIN) The control circuit in the LT3782A measures the input current by using a sense resistor in each MOSFET source, so the output current needs to be reflected back to the input in order to dimension the power MOSFET properly. 10 3782afc For more information www.linear.com/LT3782A LT3782A APPLICATIONS INFORMATION During the switch on-time, the control circuit limits the maximum voltage drop across the sense resistor to about 63mV. The peak inductor current is therefore limited to 63mV/R. The relationship between the maximum load current, duty cycle and the sense resistor RSENSE is: R ≤ VSENSE(MAX) • 1– DMAX I 1.2 • O(MAX) 2 Power MOSFET Selection Important parameters for the power MOSFET include the drain-to-source breakdown voltage (BVDSS), the threshold voltage (VGS(TH)), the on-resistance (RDS(ON)) versus gateto-source voltage, the gate-to-source and gate-to-drain charges (QGS and QGD, respectively), the maximum drain current (ID(MAX)) and the MOSFET’s thermal resistances (RTH(JC) and RTH(JA)). The gate drive voltage is set by the 10V GBIAS regulator. Consequently, 10V rated MOSFETs are required in most high voltage LT3782A applications. Pay close attention to the BVDSS specifications for the MOSFETs relative to the maximum actual switch voltage in the application. The switch node can ring during the turn-off of the MOSFET due to layout parasitics. Check the switching waveforms of the MOSFET directly across the drain and source terminals using the actual PC board layout (not just on a lab breadboard!) for excessive ringing. Calculating Power MOSFET Switching and Conduction Losses and Junction Temperatures In order to calculate the junction temperature of the power MOSFET, the power dissipated by the device must be known. This power dissipation is a function of the duty cycle, the load current and the junction temperature itself (due to the positive temperature coefficient of its RDS(ON)). As a result, some iterative calculation is normally required to determine a reasonably accurate value. Care should be taken to ensure that the converter is capable of delivering the required load current over all operating conditions (line voltage and temperature), and for the worst-case specifications for VSENSE(MAX) and the RDS(ON) of the MOSFET listed in the manufacturer’s data sheet. The power dissipated by the MOSFET in a 2-phase boost converter is: ⎛ IO(MAX) ⎞ 2 ⎜ ⎟ ⎝ 2 ⎠ PFET = • RDS(ON) • D • ρT (1– D) ⎛ IO(MAX) ⎞ ⎜ ⎟ 2 ⎠ 2 ⎝ +k • VO • •C •f (1– D) RSS The first term in the equation above represents the I2R losses in the device, and the second term, the switching losses. The constant, k = 1.7, is an empirical factor inversely related to the gate drive current and has the dimension of 1/current. The ρT term accounts for the temperature coefficient of the RDS(ON) of the MOSFET, which is typically 0.4%/°C. Figure 4 illustrates the variation of normalized RDS(ON) over temperature for a typical power MOSFET. 2.0 ρT NORMALIZED ON RESISTANCE Sense Resistor Selection 1.5 1.0 0.5 0 –50 50 100 0 JUNCTION TEMPERATURE (°C) 150 3782A F04 Figure 4. Normalized RDS(ON) vs Temperature 3782afc For more information www.linear.com/LT3782A 11 LT3782A APPLICATIONS INFORMATION From a known power dissipated in the power MOSFET, its junction temperature can be obtained using the following formula: will further reduce the input capacitor ripple current rating. The ripple current is plotted in Figure 5. Please note that the ripple current is normalized against: TJ = TA + PFET • RTH(JA) The RTH(JA) to be used in this equation normally includes the RTH(JC) for the device plus the thermal resistance from the case to the ambient temperature (RTH(CA)). This value of TJ can then be compared to the original, assumed value used in the iterative calculation process. Input Capacitor Choice The input capacitor must have high enough voltage and ripple current ratings to handle the maximum input voltage and RMS ripple current rating. The input ripple current in a boost circuit is very small because the input current is continuous. With 2-phase operation, the ripple cancellation 1.00 0.90 0.80 Inorm = The voltage rating of the output capacitor must be greater than the maximum output voltage with sufficient derating. Because the ripple current in output capacitor is a pulsating square wave in a boost circuit, it is important that the ripple current rating of the output capacitor be high enough to deal with this large ripple current. Figure 6 shows the output ripple current in the 1- and 2-phase designs. As shown, the output ripple current of a 2-phase boost circuit reaches almost zero when the duty cycle equals 50% or the output voltage is twice as much as the input voltage. Thus the 2-phase technique significantly reduces the output capacitor size. ∆IIN /INORM 1-PHASE 0.50 0.40 2-PHASE IORIPPLE /IOUT 0.30 0.20 0.10 0 0 0.2 0.6 0.4 DUTY CYCLE 0.8 1.0 3782A F05 Inorm = VIN 3.25 3.00 2.75 2.50 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0 0.1 L • fs 1-PHASE 2-PHASE 0.2 0.3 0.4 0.5 0.6 0.7 0.8 DUTY CYCLE OR (1-VIN / VOUT) 0.9 3782A F06 The RMS Ripple Current is About 29% of the Peak-to-Peak Ripple Current. Figure 5. Normalized Input Peak-to-Peak Ripple Current 12 L • fs Output Capacitor Selection 0.70 0.60 VIN Figure 6. Normalized Output RMS Ripple Currents in Boost Converter: 1-Phase and 2-Phase. IOUT Is the DC Output Current. 3782afc For more information www.linear.com/LT3782A LT3782A APPLICATIONS INFORMATION For a given VIN and VOUT, we can calculate the duty cycle D and then derive the output RMS ripple current from Figure 6. After choosing output capacitors with sufficient RMS ripple current rating, we also need to consider the ESR requirement if electrolytic caps, tantalum caps, POSCAPs or SP CAPs are selected. Given the required output ripple voltage spec ∆VOUT (in RMS value) and the calculated RMS ripple current ∆IOUT, one can estimate the ESR value of the output capacitor to be ESR ≤ ΔVOUT ΔIOUT External Regulator to Bias Gate Drivers For applications with VIN higher than 24V, the IC tempera­ ture may get too high. To reduce heat, an external regulator between 12V to 14V should be used to override the internal VGBIAS regulator to supply the current needed for BGATE1 and BGATE2 (see Figure 7). Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power (¥100%). Percent efficiency can be expressed as: % Efficiency = 100% – (L1 + L2 + L3 + …), where L1, L2, etc. are the individual loss components as a percentage of the input power. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most LT3782A improvement. Although all dissipative elements in the circuit produce losses, four main sources usually account for the majority of the losses in LT3782A application circuits: 1. The supply current into VIN. The VIN current is the sum of the DC supply current IQ (given in the Electrical Characteristics) and the MOSFET driver and control currents. The DC supply current into the VIN pin is typically about 7mA and represents a small power loss (much less than 1%) that increases with VIN. The driver current results from switching the gate capacitance of the power MOSFET; this current is typically much larger than the DC current. Each time the MOSFET is switched on and then off, a packet of gate charge QG is transferred from GBIAS to ground. The resulting dQ/dt is a current that must be supplied to the GBIAS capacitor through the VIN pin by an external supply. In normal operation: IQ(TOT) ≈ IQ = f • QG PIC = VIN • (IQ + f • QG) 2. Power MOSFET switching and conduction losses: ⎛ IO(MAX) ⎞2 ⎜ ⎟ 2 ⎟ • RDS(ON) • DMAX • ρT PFET = ⎜ ⎜⎜ 1– DMAX ⎟⎟ ⎝ ⎠ IO(MAX) + k • VO 2 • GBIAS 12V GBIAS1 2 • CRSS • f 1– DMAX + GBIAS2 3782A F07 2µF Figure 7 3782afc For more information www.linear.com/LT3782A 13 LT3782A APPLICATIONS INFORMATION 3. The I2R losses in the sense resistor can be calculated almost by inspection: ⎛ IO(MAX) ⎞2 ⎜ ⎟ 2 ⎟ • R • DMAX PR(SENSE) = ⎜ ⎜⎜ 1– DMAX ⎟⎟ ⎝ ⎠ 4. The losses in the inductor are simply the DC input current squared times the winding resistance. Expressing this loss as a function of the output current yields: ⎛ IO(MAX) ⎞2 ⎜ ⎟ 2 ⎟ • RW PR(WINDING) = ⎜ ⎜⎜ 1– DMAX ⎟⎟ ⎝ ⎠ 5. Losses in the boost diode. The power dissipation in the boost diode is: PDIODE = IO(MAX) 2 • VD The boost diode can be a major source of power loss in a boost converter. For 13.2V input, 42V output at 3A, a Schottky diode with a 0.4V forward voltage would dissipate 600mW, which represents about 1% of the input power. Diode losses can become significant at low output voltages where the forward voltage is a significant percentage of the output voltage. 6. Other losses, including CIN and CO ESR dissipation and inductor core losses, generally account for less than 2% of the total losses. 14 PCB Layout Considerations To achieve best performance from an LT3782A circuit, the PC board layout must be carefully done. For lower power applications, a two-layer PC board is sufficient. However, at higher power levels, a multiplayer PC board is recommended. Using a solid ground plane under the circuit is the easiest way to ensure that switching noise does not affect the operation. In order to help dissipate the power from MOSFETs and diodes, keep the ground plane on the layers closest to the layers where power components are mounted. Use power planes for MOSFETs and diodes in order to improve the spreading of the heat from these components into the PCB. For best electrical performance, the LT3782A circuit should be laid out as follows: Place all power components in a tight area. This will minimize the size of high current loops. Orient the input and output capacitors and current sense resistors in a way that minimizes the distance between the pads connected to ground plane. Place the LT3782A and associated components tightly together and next to the section with power components. Use a local via to ground plane for all pads that connect to ground. Use multiple vias for power components. Connect the current sense inputs of LT3782A directly to the current sense resistor pads. Connect the current sense traces on the opposite sides of pads from the traces carrying the MOSFETs source currents to ground. This technique is referred to as Kelvin sensing. 3782afc For more information www.linear.com/LT3782A LT3782A Typical Applications 10V to 24V Input to 24V, 8A Output Boost Converter 1 3 4 5 7 10Ω 8 GND SYNC NC NC LT3782A VEE1 DELAY BGATE1 DCL GBIAS1 SENSE1+ GBIAS2 L1 PB2020-103 26 1µF 25 Q1 PH3330 24 CS1 23 9 59k 10 82k 11 10nF SENSE1– BGATE2 VEE2 SLOPE NC RSET 12 SENSE2– RUN 13 SENSE2+ FB 14 SS VC D1 PDS1040 COUT2 330µF, 35V, ×2 0.004Ω 22 21 CIN 22µF 25V 20 19 18 825k 17 274k 16 24.9k 15 221k COUT1 22µF, 25V, ×4 OUTPUT 24V 8A 0.004Ω CS2 Q2 PH3330 • 10Ω NC 2R2 27 2.2µF 10nF CS2 VCC L2 PB2020-103 D2 PDS1040 3782A TA02 4.7nF L1, L2: PULSE PB2020-103 ALL CERAMIC CAPACITORS ARE X7R, TDK CC1 RC1 CC2 6.8nF 13.3k 100pF *OUTPUT CURRENT WITH BOTH INPUTS PRESENT Efficiency 100 98 15VIN 96 EFFICIENCY (%) CS1 SGATE1 10V TO 24V INPUT 28 + 6 GBIAS • 2 SGATE2 12VIN 94 92 90 88 86 0 1 2 3 4 5 IOUT (A) 6 7 8 3782A TA02b 3782afc For more information www.linear.com/LT3782A 15 16 For more information www.linear.com/LT3782A R6 56.2k R5 23.7k R2 60.4k C4 22pF SENSE2– C9 2.2nF C3 2.2nF SENSE2+ R3 10Ω C2 0.1µF SENSE1– 14 13 12 11 10 9 8 7 6 5 R1 10Ω 3 2 1 4 SGATE1 SGATE2 10µF ×2 SENSE1+ ×2 + 330µF VIN 10V TO 14V SS SENSE2+ SENSE2– RSET SLOPE SENSE1– RUN GND VEE2 BGATE2 GBIAS2 GBIAS1 BGATE1 VEE1 GND GND VCC1 GBIAS 15 16 17 18 19 20 21 22 23 24 25 26 27 28 CC2 220pF VC FB = 2.44V LT3782A SENSE1+ DCL DELAY SYNC GND GND SGATE1 SGATE2 RUN BG2 BG1 CC1 6.8nF RC1 15k L2 8.3µH L1 8.3µH SGATE1 C10 1µF 3 2 1 R4 53.6k RFB1 475k VOUT C1 2.2µF C8 2.2µF 5V R7 402k RB 825k RUN IN GND VCC 4 5 6 C12 0.001µF 3 2 1 SENSE1– SGATE2 C5 1µF BG1 TS TG BST SENSE1+ LTC4440-5 5V VIN IN GND VCC D3 PD3S160 SENSE2– SENSE2+ TS TG BST BG2 LTC4440-5 D4 PD3S160 0.006Ω Q2 HAT2172H 4 5 6 C7 1µF 12V Input to 24V at 8.5A Output Synchronous Boost Converter RS4 0.006Ω Q5 HAT2172H BG1 Q6 HAT2166H C6 1µF BG2 3782A TA04 HAT2166H 0.006Ω Q1 HAT2172H D1 DFLS160 RS3 0.006Ω Q4 HAT2172H DFLS160 C13 10µF ×4 330µF ×4 + C11 VOUT 24V AT 8.5A LT3782A TYPICAL APPLICATIONS 3782afc LT3782A Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. FE Package 28-Lead TSSOP (4.4mm) FE Plastic Package (Reference LTC DWG # 05-08-1663 28-Lead Plastic TSSOP (4.4mm)Rev K) (Reference LTC DWG # 05-08-1663 Exposed Pad VariationRev EB K) Exposed Pad Variation EB 9.60 – 9.80* (.378 – .386) 4.75 (.187) 4.75 (.187) 28 27 26 2524 23 22 21 20 1918 17 16 15 6.60 ±0.10 4.50 ±0.10 2.74 (.108) SEE NOTE 4 0.45 ±0.05 EXPOSED PAD HEAT SINK ON BOTTOM OF PACKAGE 6.40 2.74 (.252) (.108) BSC 1.05 ±0.10 0.65 BSC RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.25 REF 1.20 (.047) MAX 0° – 8° 0.65 (.0256) BSC 0.50 – 0.75 (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN MILLIMETERS (INCHES) 3. DRAWING NOT TO SCALE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 0.195 – 0.30 (.0077 – .0118) TYP 0.05 – 0.15 (.002 – .006) FE28 (EB) TSSOP REV K 0913 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 3782afc For more information www.linear.com/LT3782A 17 LT3782A PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UFD Package 28-Lead Plastic QFN (4mm × 5mm) UFD Package (Reference LTC DWG Rev B) 28-Lead Plastic QFN# 05-08-1712 (4mm × 5mm) (Reference LTC DWG # 05-08-1712 Rev B) 0.70 ±0.05 4.50 ±0.05 3.10 ±0.05 2.50 REF 2.65 ±0.05 3.65 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 3.50 REF 4.10 ±0.05 5.50 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 (2 SIDES) 0.75 ±0.05 R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER 2.50 REF R = 0.115 TYP 27 28 0.40 ±0.10 PIN 1 TOP MARK (NOTE 6) 1 2 5.00 ±0.10 (2 SIDES) 3.50 REF 3.65 ±0.10 2.65 ±0.10 (UFD28) QFN 0506 REV B 0.200 REF 0.00 – 0.05 0.25 ±0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WXXX-X). 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 18 3782afc For more information www.linear.com/LT3782A LT3782A Revision History REV DATE DESCRIPTION A 2/10 Change Ambient Temp on FE Package PAGE NUMBER 2 Changes to Order Information 2 Addition to Note 2 4 Change TA = 25°C to TJ = 25°C 6 Changes to Block Diagram 7 Changes to Typical Applications B C 4/10 4/14 3, 4, 5 Changes to Pin Functions 16, 20 Updated Related Parts 20 Add Part Numbers for D1, D2, Q1 and Q2 on Typical Application 1 Addition to Note 2 4 Adjusted RUN Threshold in the Electrical Characteristics table. 3 Changed the RUN Pin description in the Pin Functions section. 6 Changed Duty Cycle Limit in the Applications Information section. 9 3782afc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of itsinformation circuits as described herein will not infringe on existing patent rights. For more www.linear.com/LT3782A 19 LT3782A Typical Application 28V Output Base Station Power Converter with Redundant Input 1 3 4 5 CS1 59k GND SYNC NC LT3782A NC VEE1 BGATE1 DCL GBIAS1 8 SENSE1+ GBIAS2 9 SENSE1– BGATE2 10 82k 25 L1 10µH BAS516 26 Q1 PH4840S 1µF CINA 22µF 24 CS1 23 0.004Ω 11 10nF VEE2 SLOPE NC RSET 12 SENSE2– RUN 13 SENSE2+ FB 14 SS VC D1 PDS1040 COUT2 330µF, 35V, ×2 22 OUTPUT 28V 4A (8A**) 21 COUT1 10µF, 50V, ×4 20 0.004Ω 19 18 825k 17 274k 16 24.9k 15 261k 4.7nF CS2 CINB 22µF Q2 PH4840S • 10Ω NC 2R2 27 2.2µF 10nF CS2 VCC DELAY 7 10Ω SGATE1 VINA 0V TO 28V* 28 + 6 GBIAS • 2 SGATE2 BAS516 L2 10µH D2 PDS1040 3782A TA03 CC1 RC1 CC2 4.7nF 15k 100pF NOTE: VINB 0V TO 28V* *INPUT VOLTAGE RANGE FOR VINA AND VINB IS 0V TO 28V. AT LEAST ONE OF THE INPUTS MUST BE 12V OR HIGHER. L1, L2: PULSE PB2020-103 ALL CERAMIC CAPACITORS ARE X7R, TDK **OUTPUT CURRENT WITH BOTH INPUTS 12V OR HIGHER Related Parts PART NUMBER DESCRIPTION COMMENTS LTC3862/LTC3862-1 Multiphase Current Mode Step-Up DC/DC Controller 2.5V ≤ VIN ≤ 32V, 5V or 10V Gate Drive, 75kHz to 500kHz, TSSOP-24, SSOP-24, 5mm × 5mm QFN-24 LTC3788/LTC3788-1 Multiphase, Dual Output Synchronous Step-Up Controller 2.5V ≤ VIN ≤ 38V, VOUT Up to 60V, 50kHz to 900kHz, 5mm × 5mm QFN-32, SSOP-28 LTC3813 100V Maximum VOUT Current Mode Synchronous Step-Up DC/DC Controller No RSENSE™, 1Ω Gate Driver, Adjustable Off-Time, SSOP-28 LTC3814-5 60V Maximum VOUT Current Mode Synchronous No RSENSE, 1Ω Gate Driver, Adjustable Off-Time, TSSOP-16 Step-Up DC/DC Controller LTC1871/LTC1871-1/ Wide Input Range, No RSENSE Low Quiescent Current Flyback, Boost and SEPIC DC/DC LTC1871-7 Controller Adjustable Fixed Synchronizable 50kHz to 1MHz Operating Frequency, 2.5V ≤ VIN ≤ 36V, MSOP-10 LT3757 Boost, Flyback, SEPIC and Inverting DC/DC Controller 2.9V ≤ VIN ≤ 40V, Adjustable Fixed Synchronizable 100kHz to 1MHz Operating Frequency, 3mm × 3mm DFN-10 and MSOP-10E LT3758 Boost, Flyback, SEPIC and Inverting DC/DC Controller 5.5V ≤ VIN ≤ 100V, Adjustable Fixed Synchronizable 100kHz to 1MHz Operating Frequency, 3mm × 3mm DFN-10 and MSOP-10E LTC3805/LTC3805-5 Adjustable Frequency Boost, Flyback and SEPIC DC/DC Controller VIN and VOUT Limited Only by External Components, 3mm × 3mm DFN-10, MSOP-10E LTC3803/LTC3803-3/ Flyback DC/DC Controller with Fixed 200kHz or LTC3803-5 300kHz Operating Frequency VIN and VOUT Limited Only by External Components, 6-Pin ThinSOT™ Package LTC3872 No RSENSE Current Mode Boost DC/DC Controller 550kHz Fixed Frequency, 2.75V ≤ VIN ≤ 9.8V, ThinSOT Package LTC3780 High Efficiency Synchronous 4-Switch Buck-Boost DC/DC Controller 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 30V, SSOP-24, 5mm × 5mm QFN-32 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT3782A (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT3782A 3782afc LT 0414 REV C • PRINTED IN USA  LINEAR TECHNOLOGY CORPORATION 2008
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