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LT3922HUFD-1#TRPBF

LT3922HUFD-1#TRPBF

  • 厂商:

    AD(亚德诺)

  • 封装:

    WFQFN28

  • 描述:

    36V, 2A MONOLITHIC SYNCHRONOUS S

  • 数据手册
  • 价格&库存
LT3922HUFD-1#TRPBF 数据手册
LT3922-1 36V, 2.3A Synchronous Step-Up LED Driver with 25,000:1 PWM Dimming FEATURES DESCRIPTION ±2.5% LED Current Regulation n ±2% Output Voltage Regulation n 25,000:1 PWM Dimming at 100Hz n 128:1 Internal PWM Dimming n Spread Spectrum Frequency Modulation n Silent Switcher® Architecture for Low EMI n Operates in Boost, Buck Mode and Buck-Boost Mode n 2.8V to 36V Input Voltage Range n Up to 34V LED String Voltage n 2.3A, 40V Internal Switches n 200kHz to 2MHz Switching Frequency with SYNC n Analog or Duty Cycle LED Current Control n Open/Short LED Protection and Fault Indication n Thermally Enhanced 28-Lead (4mm × 5mm) QFN n AEC-Q100 Qualified for Automotive Applications The LT®3922-1 is a monolithic, synchronous, step-up DC/ DC converter that utilizes fixed-frequency, peak current control and provides PWM dimming for a string of LEDs. The LED current is programmed by an analog voltage or the duty cycle of pulses at the CTRL pin. The LT3922-1 will maintain ±2.5% current regulation through an external sense resistor over a wide range of output voltages. n The switching frequency is programmable from 200kHz to 2MHz by an external resistor at the RT pin or by an external clock applied at the SYNC/SPRD pin. With the optional spread spectrum frequency modulation enabled, the frequency varies from 100% to 125% to reduce EMI. The LT3922-1 also includes a driver for an external high side PMOS for PWM dimming and an internal PWM signal generator for analog control of PWM dimming. When an external signal is available, the LT3922-1 can perform 25,000:1 PWM dimming with 100Hz PWM pulses. APPLICATIONS Additional features include an accurate external reference voltage for use with the CTRL and PWM pins, an LED current monitor, an accurate EN/UVLO pin threshold, open-drain fault reporting for open-circuit and short-circuit load conditions, and thermal shutdown. Automotive and Industrial Lighting n Machine Vision n All registered trademarks and trademarks are the property of their respective owners. Protected by U.S. patents, including 7199560, 7321203, and other patents pending. TYPICAL APPLICATION 30V, 333mA Boost LED Driver with 25,000:1 PWM Dimmming L1, 2.2µH VIN 8V TO 27V SW VIN 4.7µF 33µF 1M BST VOUT 0.47µF GND EN/UVLO 0.47µF 365k VOUT OVLO LT3922-1 59.0k ILED 100mA/DIV 1M 10µF FB 33.2k 1µF VREF GND CTRL ISP PWM 300mΩ SYNC/SPRD INTVCC ISN 100k PWMTG FAULT SS RT 2.2µF 10nF L1: WURTH 74437324022 M1: VISHAY Si2319CDS VPWM 2V/DIV RP 45.3k 2MHz ISMON VC 51k M1 INFINITE PERSISTENCE VIN = 12V fPWM = 100Hz 200ns/DIV 39221 TA01b 30V 333mA LED 1nF 39221 TA01a Rev. A Document Feedback For more information www.analog.com 1 LT3922-1 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) VIN and EN/UVLO.......................................................40V ISP, ISN, and VOUT.....................................................40V ISP – ISN..................................................................0.3V CTRL and FB.............................................................3.3V OVLO, PWM, SYNC/SPRD, and FAULT.........................6V SS and VC.................................................................3.3V SW, BST, INTVCC, VREF, ISMON, PWMTG, RT, and RP (Note 2) Operating Junction Temperature Range (Notes 3, 4) LT3922E-1/LT3922I-1............................. –40 to 125°C LT3922H-1.............................................. –40 to 150°C Storage Temperature Range.......................–60 to 150°C GND VOUT NC NC SW SW TOP VIEW 28 27 26 25 24 23 SW 1 22 GND BST 2 21 VOUT INTVCC 3 20 PWMTG VIN 4 19 PWM 29 GND EN/UVLO 5 18 RP OVLO 6 17 SYNC/SPRD VREF 7 16 RT CTRL 8 15 FAULT ISMON SS FB VC ISP ISN 9 10 11 12 13 14 UFD PACKAGE 28-LEAD (4mm × 5mm) PLASTIC QFN θJA = 25°C/W (AS MEASURED ON DEMO BOARD DC2247A), θJC = 3.4°C/W EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3922EUFD-1#PBF LT3922EUFD-1#TRPBF 39221 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C LT3922IUFD-1#PBF LT3922IUFD-1#TRPBF 39221 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C LT3922HUFD-1#PBF LT3922HUFD-1#TRPBF 39221 28-Lead (4mm × 5mm) Plastic QFN –40°C to 150°C LT3922EUFD-1#WPBF LT3922EUFD-1#WTRPBF 39221 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C LT3922IUFD-1#WPBF LT3922IUFD-1#WTRPBF 39221 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C LT3922HUFD-1#WPBF LT3922HUFD-1#WTRPBF 39221 28-Lead (4mm × 5mm) Plastic QFN –40°C to 150°C AUTOMOTIVE PRODUCTS** Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. **Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. Rev. A 2 For more information www.analog.com LT3922-1 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 12V, VEN/UVLO = 2V unless otherwise noted. PARAMETER CONDITIONS MIN Input Voltage Range VIN Pin Quiescent Current VEN/UVLO = 1.5V, Not Switching VEN/UVLO = 0.1V, Shutdown EN/UVLO Threshold (Falling) 1.260 EN/UVLO Rising Hysteresis EN/UVLO Pin Current VEN/UVLO = 1.2V Input OVLO Threshold (Rising) 1.145 Input OVLO Falling Hysteresis OVLO Pin Current TYP 2.8 MAX V 2.9 4 1 mA µA 1.330 1.400 V 25 mV 2 µA 1.205 1.265 50 VOVLO = 1.0V UNITS 36 –100 V mV 100 nA 2.03 2.015 V V Reference VREF Voltage IVREF = 10µA IVREF = 500µA VREF Pin Current Limit VREF = 0V, Current Out of Pin l 1.97 1.985 2 2 3.2 mA LED Current Regulation CTRL-Off Threshold (Falling) l 200 CTRL-Off Rising Hysteresis 210 220 15 −100 mV mV CTRL Pin Current VCTRL = 2V Sense Voltage (VISP−VISN) (Analog Input) VCTRL = 2V (100%), VISP = 24V VCTRL = 0.75V (50%), VISP = 24V VCTRL = 0.3V (5%), VISP = 24V ISP Pin Current VISP = 24.1V, VISN = 24V, VCTRL = 2V ISN Pin Current VISP = 24.1V, VISN = 24V , VCTRL = 2V 75 µA Current Error Amplifier Transconductance VISP = 24V 140 µA/V l l l 97.5 48 3.5 100 50 5 100 nA 102.5 52 6.5 mV mV mV 75 µA Duty Cycle Control of LED Current Sense Voltage (VISP−VISN) (Duty Cycle Input) CTRL Duty = 75% (100%), VISP = 24V CTRL Duty = 37.5% (50%), VISP = 24V CTRL Duty = 15% (5%), VISP = 24V 99 49 4 CTRL Pulse Input High (VIH) 100 50 5 101 51 6 1.6 V CTRL Pulse Input Low (VIL) CTRL Pulse Input Frequency Range mV mV mV 10 0.4 V 200 kHz Voltage Regulation FB Regulation Voltage VCTRL = 2V FB Pin Current FB in Regulation l 1.175 1.200 −100 Voltage Error Amplifier Transconductance 1.225 V 100 nA 1000 µA/V INTVCC Regulator INTVCC Voltage INTVCC Pin Current Limit 2.7 VINTVCC = 0V, Current Out of Pin 3 20 3.3 V mA Rev. A For more information www.analog.com 3 LT3922-1 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 12V, VEN/UVLO = 2V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX 2.3 2.55 2.8 25 35 UNITS Power Stage Peak Current Limit VIN = 3V Bottom Switch Minimum Off-Time l 15 A ns Bottom Switch On-Resistance 140 mΩ Top Switch On-Resistance 155 mΩ Oscillator Programmed Switching Frequency (fSW) RT = 45.3k, VSYNC/SPRD = 0V RT = 499k, VSYNC/SPRD = 0V Spread Spectrum Frequency Range RT = 45.3k, VSYNC/SPRD = 3V RT = 499k, VSYNC/SPRD = 3V RT Pin Current Limit VRT = 0V, Current Out of Pin l l 1880 175 2000 200 1880 175 kHz kHz 2650 306 kHz kHz 75 SYNC/SPRD Threshold (Rising) 1.4 SYNC/SPRD Falling Hysteresis 0.2 SYNC/SPRD Pin Current 2120 245 VSYNC/SPRD = 5V −100 µA 1.5 V V 100 nA Soft-Start SS Pin Charging Current VSS = 1V 20 µA SS Pin Discharging Current VSS = 2V 2 µA SS Lower Threshold 0.2 V SS Higher Threshold 1.7 V Fault Detection Open-Circuit Threshold (FB Rising) VISP = VISN = 20V l 1.117 Open-Circuit Falling Hysteresis 1.140 1.163 50 LED Short-Circuit Threshold (VISP − VISN) VISP = 20V FAULT Pull-Down Current VFAULT = 0.2V, VFB = 1.25V FAULT Leakage Current VFAULT = 3V, VFB = 0.7V V mV 150 mV 0.8 mA −100 100 nA 1.292 V Overvoltage Protection FB Overvoltage Threshold (Rising) l 1.240 FB Overvoltage Falling Hysteresis 1.266 22 mV LED Current Monitor ISMON Voltage VISP − VISN = 100mV (100%), VISP = 24V VISP − VISN = 10mV (10%), VISP = 24V 0.980 80 1.000 100 1.020 120 10 11 V mV PWM Driver PWMTG Gate Drive (VOUT – VPWMTG) VOUT = 20V, VPWM = 1.5V V PWM Threshold (Rising) 1.4 V PWM Falling Hysteresis 0.2 V PWM Pin Current VPWM = 2V PWM to PWMTG Propagation Delay Turn-On Turn-Off CPWMTG = 2.1nF (Connected from VOUT to PWMTG) VOUT = 20V −100 100 110 140 nA ns ns Rev. A 4 For more information www.analog.com LT3922-1 ELECTRICAL CHARACTERISTICS PARAMETER CONDITIONS MIN PWM Voltage for 100% PWM Dimming RP = 28.7k, VREF = 2V 2.00 PWM Voltage for 0% PWM Dimming RP = 28.7k, VREF = 2V PWM Dimming Accuracy RP = 28.7k, VREF = 2V, VPWM = 1.1V RP = 28.7k, VREF = 2V, VPWM = 1.9V 7.5 87.5 PWM Dimming Frequency RP = 28.7k, RT = 45.3k, VSYNC/SPRD = 0V RP = 332k, RT = 45.3k, VSYNC/SPRD = 0V 7.34 115 RP Pin Current Limit VRP = 0V, Current Out of Pin TYP MAX UNITS Internal PWM Dimming Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Do not apply a positive or negative voltage source to these pins, otherwise permanent damage may occur. Note 3: The LT3922E-1 is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the −40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The V 0.99 V 10.5 90.5 13.5 93.5 % % 7.81 122 8.28 129 kHz Hz 65 µA LT3922I-1 is guaranteed to meet performance specifications over the −40°C to 125°C operating junction temperature range. The LT3922H-1 is guaranteed over the −40°C to 150°C operating junction temperature range. Operating lifetime is derated at junction temperatures greater than 125°C. Note 4: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. The maximum rated junction temperature will be exceeded when this protection is active. Continuous operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. Rev. A For more information www.analog.com 5 LT3922-1 TYPICAL PERFORMANCE CHARACTERISTICS EN/UVLO Thresholds RISING FALLING EN/UVLO PIN CURRENT (µA) 1.45 EN/UVLO THRESHOLD (V) EN/UVLO Pin Current 3.00 1.40 1.35 1.30 1.25 1.20 –45 –20 5 VEN/UVLO = 1.2V 2.00 1.50 1.00 5 0.50 3.2 3.20 3.00 2.80 2.60 2.40 5 2.00 –45 –20 30 55 80 105 130 155 TEMPERATURE (°C) 5 2.02 –40°C 25°C 125°C 150°C 2.85 2.80 VREF Voltage 0 2 6 8 10 INTVCC LOAD CURRENT (mA) 12 39221 G07 0 25 50 75 100 125 150 TEMPERATURE (°C) 2.00 1.99 1.97 –50 –25 VREF Load Regulation 2.01 1.98 4 2.7 2.02 VREF VOLTAGE (V) 2.90 2.8 39221 G06 2.01 VREF VOLTAGE (V) INTVCC VOLTAGE (V) 3.05 2.95 2.9 39221 G05 INTVCC Load Regulation 3.00 3.0 2.5 –50 –25 30 55 80 105 130 155 TEMPERATURE (°C) 39221 G04 3.10 VIN = 36V VIN = 12V VIN = 2.7V 2.6 2.20 0 –45 –20 30 55 80 105 130 155 TEMPERATURE (°C) INTVCC Voltage 3.1 INTVCC VOLTAGE (V) 1.00 5 39221 G03 VIN = 36V VIN = 12V VIN = 2.7V 3.40 1.50 1.15 1.05 –45 –20 30 55 80 105 130 155 TEMPERATURE (°C) VIN Quiescent Current 3.60 VIN QUIESCENT CURRENT (mA) VIN SHUTDOWN CURRENT (µA) 2.00 1.20 39221 G02 VIN Shutdown Current VIN = 36V VIN = 12V VIN = 2.7V 1.25 1.10 0.50 39221 G01 2.50 RISING FALLING 1.30 2.50 0 –45 –20 30 55 80 105 130 155 TEMPERATURE (°C) OVLO Threshold 1.35 OVLO THRESHOLD (V) 1.50 VIN = 12V, TA = 25°C, unless otherwise noted. 2.00 1.99 –40°C 25°C 125°C 150°C 1.98 0 25 50 75 100 125 150 TEMPERATURE (°C) 39221 G08 1.97 0 200 400 600 800 VREF LOAD CURRENT (µA) 1000 39221 G09 Rev. A 6 For more information www.analog.com LT3922-1 TYPICAL PERFORMANCE CHARACTERISTICS INTVCC and VREF UVLO Falling Thresholds VREF Line Regulation 2.008 THRESHOLD VOLTAGE (V) 2.006 2.002 2.000 1.998 1.996 1.994 2.7 25 2.4 2.1 1.8 1.5 1.2 1.992 1.990 30 0 3 6 0.9 –45 –20 9 12 15 18 21 24 27 30 33 36 VIN VOLTAGE (V) 5 39221 G10 10 0 –45 –20 30 55 80 105 130 155 TEMPERATURE (°C) Soft-Start Currents 75 20 1.6 60 THRESHOLD VOLTAGE (V) 2.0 65 15 PULL-UP CURRENT PULL-DOWN CURRENT 10 5 55 –45 –20 RT PIN RP PIN 5 0 –45 –20 30 55 80 105 130 155 TEMPERATURE (°C) 5 Switching Frequency 0.8 0.4 250 2000 240 1900 230 1800 220 1700 210 1600 200 190 180 30 55 80 105 130 155 TEMPERATURE (°C) 8320 INTERNAL PWM FREQUENCY (Hz) 2100 RT = 45.3k RT = 499k 5 30 55 80 105 130 155 TEMPERATURE (°C) 39221 G15 Internal PWM Frequency 260 5 SS HIGH SS LOW 39221 G14 2200 1400 –45 –20 1.2 0 –45 –20 30 55 80 105 130 155 TEMPERATURE (°C) 39221 G13 1500 30 55 80 105 130 155 TEMPERATURE (°C) Soft-Start Thresholds 25 70 5 39221 G12 80 CURRENT (µA) MAXIMUM PIN CURRENT (µA) 15 39221 G11 RT and RP Pin Current Limits SWITCHING FREQUENCY (kHz) 20 5 INTVCC UVLO VREF UVLO Internal PWM Duty Cycle RT = 45.3k 134 7936 7552 128 7168 122 116 6784 6400 –45 –20 RP = 28.7k RP = 332k 5 10.5 140 110 30 55 80 105 130 155 TEMPERATURE (°C) 39221 G17 39221 G16 INTERNAL PWM DUTY CYCLE (%) VOLTAGE (V) 2.004 Minimum Off Time 3.0 MINIMUM OFF TIME (ns) 2.010 VIN = 12V, TA = 25°C, unless otherwise noted. RT = 45.3k RP = 332k 10.4 18.2k 1% 10.3 22.1k 1% VREF PWM LT3922-1 10.2 10.1 10.0 –45 –20 5 30 55 80 105 130 155 TEMPERATURE (°C) 39221 G18 Rev. A For more information www.analog.com 7 LT3922-1 TYPICAL PERFORMANCE CHARACTERISTICS LED Current (Digital CTRL) 100 100 VISP – VISN (mV) 125 VISP – VISN (mV) 125 75 50 PULSE FREQUENCY AT CTRL PIN = 20kHz 0 0.25 0.50 0.75 1 1.25 1.50 1.75 VCTRL (V) 75 50 0 2 0 LED Current (5% Regulation) 150 100 120 80 40 50 0 98.6 99.3 100 100.7 ISP–ISN VOLTAGE (mV) VCTRL = 2V VISP = 24V 39221 G22 2.9 4.6 5 5.4 ISP–ISN VOLTAGE (mV) 39221 G21 400 LED Current Line Regulation 400 PEAK SW CURRENT LIMITED 350 0 20 39221 G23 400 fSW = 2MHz L = 4.7µH 1.22 600 0 5.8 VCTRL = 0.3V VISP = 24V Peak SW Current Limit 3.0 1.21 200 0 4.2 101.4 1.19 1.20 VFB (V) –40°C 25°C 125°C 800 N = 355 ISMON (mV) 200 1.18 ISMON Voltage 1000 150°C 25°C –40°C 160 N = 355 NUMBER OF UNITS NUMBER OF UNITS 0 1.17 12.5 25 37.5 50 62.5 75 87.5 100 DCTRL (%) 200 150°C 25°C –40°C 250 50 39221 G20 LED Current (100% Regulation) 300 75 25 39221 G19 350 VCTRL = 2V 100 25 25 0 LED Voltage Limit 125 VISP – VISN (mV) LED Current (Analog CTRL) VIN = 12V, TA = 25°C, unless otherwise noted. 40 60 VISP – VISN (mV) 80 100 39221 G24 LED Current vs VOUT VFB OVERVOLTAGE PROTECTION LIMITED 350 300 300 2.6 250 250 2.5 2.4 2.3 200 150 2.2 20 30 40 50 60 70 DUTY CYCLE (%) 80 90 100 39221 G25 50 200 VIN = 8V fSW = 2MHz RSNS = 0.3Ω RFB_TOP = 1M RFB_BOT = 34.8k 150 fSW = 2MHz RSNS = 0.3Ω 11 LEDs (VOUT ~33V) 100 10 LEDs (VOUT ~ 30V) 5 LEDs (VOUT ~ 15V) 2.1 2.0 10 ILED (mA) 2.7 ILED (mA) PEAK SW CURRENT (A) 2.8 0 3 6 9 12 15 18 21 24 27 30 VIN (V) 39221 G26 100 50 9 15 21 27 VOUT (V) 33 39 39221 G27 Rev. A 8 For more information www.analog.com LT3922-1 TYPICAL PERFORMANCE CHARACTERISTICS VISP – VISN SHORTLED Threshold FB OPENLED Threshold 1.10 1.05 1.00 0.95 5 170 160 150 140 130 120 –45 –20 30 55 80 105 130 155 TEMPERATURE (°C) 5 39221 G28 96 94 94 90 88 86 80 fSW = 400kHz fSW = 2MHz 6 92 90 88 86 80 PWMTG ON Voltage 0 200 800 1.20 1.18 –45 –20 1000 9 8 120 80 CPWMTG = 2.2nF (C0G type) 30 55 80 105 130 155 TEMPERATURE (°C) 39221 G34 5 30 55 80 105 130 155 TEMPERATURE (°C) 39221 G33 FB OVLO Threshold 1.33 160 40 –45 –20 5 39221 G32 TURN OFF TURN ON PROPAGATION DELAY (ns) VOUT – VPWMTG (V) 400 600 ILED (mA) 200 10 30 55 80 105 130 155 TEMPERATURE (°C) 1.21 PWM Driver Propagation Delay 12 11 5 1.19 6 LED (VOUT ~ 18V) 9 LED (VOUT ~ 27V) 12 LED (VOUT ~ 36V) 39221 G31 5 50 1.22 82 8 10 12 14 16 18 20 22 24 26 28 30 VIN (V) 7 –45 –20 100 Regulated FB Voltage VIN = 12V fSW = 2MHz 84 84 82 150 1.23 FB VOLTAGE (V) 96 92 200 39221 G30 Efficiency vs ILED 98 EFFICIENCY (%) EFFICIENCY (%) 100 ILED = 400mA 11 LEDs (VOUT ~ 33V) 98 250 39221 G29 Efficiency vs VIN 100 TOP SWITCH BOTTOM SWITCH 300 0 –45 –20 30 55 80 105 130 155 TEMPERATURE (°C) 30 55 80 105 130 155 TEMPERATURE (°C) 39221 G35 FB OVLO THRESHOLD VOLTAGE (V) 0.90 –45 –20 POWER SWITCH ON–RESISTANCE (mΩ) RISING FALLING 1.15 Power Switch On-Resistance 350 180 VISP – VISN SHORTLED THRESHOLD (mV) FB OPENLED THRESHOLD (V) 1.20 VIN = 12V, TA = 25°C, unless otherwise noted. RISING FALLING 1.30 1.27 1.24 1.21 1.18 –45 –20 5 30 55 80 105 130 155 TEMPERATURE (°C) 39221 G36 Rev. A For more information www.analog.com 9 LT3922-1 TYPICAL PERFORMANCE CHARACTERISTICS C/10 Threshold Case Temperature Rise 35 16 14 12 10 8 6 –45 –20 5 30 55 80 105 130 155 TEMPERATURE (°C) 25 15 10 5 0 150°C 25°C –40°C 8 12 16 20 VIN (V) 24 28 N = 359 250 200 150 100 50 fSW = 2MHz fSW = 400kHz 4 150°C 25°C –40°C 300 20 Internal PWM Duty Cycle (90%) 250 DC2247A DEMO BOARD VLED = 30V I LED = 333mA TROOM = 25°C 30 39221 G37 300 Internal PWM Duty Cycle (10%) 350 NUMBER OF UNITS RISING FALLING CASE TEMPERATURE RISE (°C) VISP – VISN C/10 THRESHOLD (mV) 18 VIN = 12V, TA = 25°C, unless otherwise noted. 32 0 8.6 9.4 10.2 11.0 PWM DUTY CYCLE (%) 11.8 39221 G39 39221 G38 Input Voltage Transient Response Input Voltage Transient Response N = 359 VIN 5V/DIV VIN 5V/DIV ILED 100mA/DIV ILED 100mA/DIV 200 150 100 5ms/DIV 50 0 90.2 90.6 91.4 92.2 PWM DUTY CYCLE (%) 93.0 93.4 FRONT PAGE APPLICATION 18V to 6.5V INPUT VOLTAGE TRANSIENT VLED = 30V ILED = 333mA Start-Up with 10% Internal PWM Start-Up with 50% Internal PWM VOUT 10V/DIV VIN 10V/DIV VOUT 10V/DIV VIN 10V/DIV ILED 100mA/DIV VIN 10V/DIV ILED 100mA/DIV ILED 100mA/DIV 500µs/DIV FRONT PAGE APPLICATION VLED = 30V ILED = 333mA 39221 G43 39221 G42 FRONT PAGE APPLICATION 6.5V to 18V INPUT VOLTAGE TRANSIENT VLED = 30V ILED = 333mA 39221 G40 Turn ON and OFF Performance 5ms/DIV 39221 G41 39221 G44 5ms/DIV FRONT PAGE APPLICATION WITH PWM = 1.1V RP = 332k TO GND VLED = 30V ILED = 333mA 39221 G45 5ms/DIV FRONT PAGE APPLICATION WITH PWM = 1.5V RP = 332k TO GND VLED = 30V ILED = 333mA Rev. A 10 For more information www.analog.com LT3922-1 PIN FUNCTIONS SW: Switch Pins. These pins are internally connected to the power devices and drivers. They should always be tied together. In normal operation, the voltage of these pins will switch between the output voltage and zero at the programmed frequency. Do not force any voltage on these pins. BST: Boost Pin. This pin supplies the top power switch GATE driver. Connect a 33nF capacitor between this pin and SW close to the package. An internal diode from INTVCC to BST will charge the capacitor when the SW pin switches low. INTVCC: Internally Regulated, Low-Voltage Supply Pin. This pin provides the power for the converter switch GATE drivers. Do not force any voltage on this pin. Place a 2.2µF bypass capacitor to GND close to the package. VIN: Input Voltage Pin. This pin supplies power to the internal, high-performance analog circuitry. Connect a bypass capacitor between this pin and GND. EN/UVLO: Enable and Undervoltage Lockout Pin. A voltage at this pin greater than 1.33V will enable switching, and a voltage less than 0.1V is guaranteed to shut down the internal current bias and sub-regulators. A resistor network between this pin and ground can be used to set the pin voltage and automatically lockout the part when VIN is below a certain level. No internal components pull up or down on this pin, so it requires an external voltage bias for normal operation. This pin may be tied directly to VIN. OVLO: Input Overvoltage Lockout Pin. When the voltage at this pin rises above 1.205V, the system disables switching and resets the soft-start capacitor. Do not leave this pin open. Tie this pin to GND when the OVLO function is not used. VREF: Reference Voltage Pin. This pin provides a buffered 2V reference capable of 3mA drive. It can be used to supply resistor networks for setting the voltages at the CTRL and PWM pins. Bypass with a 1μF capacitor to GND. CTRL: Control Pin. An analog voltage from 250mV to 1.25V at this pin programs the regulated voltage between ISP and ISN (and therefore, the regulated current supplied to the load). Alternatively, a digital pulse at this pin with duty cycle from 12.5% to 62.5% can be used to program the regulated voltage. Below 200mV or 10% duty cycle, the CTRL pin voltage disables switching. For more detail, see Typical Performance Characteristics and Applications Information sections. ISP: Positive Current Sense Pin. This pin is one of the inputs to the internal current sense error amplifier. It should be connected to the positive side of the external sense resistor. Use Kelvin connection for accurate current sensing. ISN: Negative Current Sense Pin. This pin is one of the inputs to the internal current sense error amplifier. It should be connected to the negative side of the external sense resistor. Use Kelvin connection for accurate current sensing. VC: Compensation Pin. A resistor and capacitor connected in series from this pin to GND stabilize the current and voltage regulation. Typical resistor and capacitor values are from 0k to 100k and from 0.1nF to 10nF, respectively. FB: Feedback Pin. When the voltage at this pin is near 1.2V the regulated current is automatically reduced from the programmed value. A resistor network between this pin and VOUT can be used to set a limit for the output voltage. If the voltage at the FB pin reaches 1.266V, a FB overvoltage lockout comparator disables switching. SS: Soft-Start Pin. At startup and recovery from fault conditions, a 20μA current charges the capacitor and the FB voltage tracks the rising voltage at this pin until the load current reaches its programmed level. Typical values for the capacitor are 10nF to 100nF. Using a single resistor from SS to INTVCC, the LT3922-1 can be set in two different fault modes for the shorted LED conditions: hiccup (no resistor) and latchoff (100k). Refer to the Applications Information section for a detailed explanation. ISMON: Output Current Monitoring Pin. This pin provides a buffered voltage output equal to 10mV for every 1mV between ISP and ISN. Rev. A For more information www.analog.com 11 LT3922-1 PIN FUNCTIONS FAULT: Fault Pin. Connect to INTVCC through a resistance of 100k. An internal switch pulls this pin low when any of following conditions happen: 1. Open LED: VFB > 1.14V and (VISP – VISN) < 10mV 2. Shorted LED: (VISP – VISN) > 150mV for more than 300us, or (VISP – VISN) > 700mV (typical), or VOUT < (VIN – 2V) RT: Timing Resistor Pin. A resistor from this pin to GND programs the switching frequency between 200kHz and 2MHz. Do not leave this pin open. SYNC/SPRD: Synchronization Pin. To override the programmed switching frequency, drive this pin with an external clock having a frequency between 200kHz and 2MHz. Even when using the external clock, select an RT resistor that corresponds to the desired switching frequency. Tie the pin to INTVCC to enable Spread Spectrum Frequency Modulation. This pin should be tied to GND when not in use. RP: PWM Resistor Pin. Connect a resistor from this pin to GND to set the frequency of the internal PWM signal. Do not use a resistor larger than 1MΩ. If using an external PWM pulse for LED dimming, tie this pin to GND. Refer to the Applications Information section for a detailed explanation. PWM: PWM Input Pin. With the RP pin tied to GND, drive this pin with a digital pulse to control PWM dimming of the LEDs. Alternatively, when using a resistor on the RP pin to GND, set the voltage of this pin between 1V and 2V to generate an internal pulse with duty cycle between 0% and 100%. When using an analog signal, place a 1µF bypass capacitor between this pin and GND. Tie this pin high when PWM dimming is not required. PWMTG: PWM Driver Output Pin. This pin can drive the gate of an external high-side PMOS device for PWM dimming of LEDs. Do not force any voltage on this pin. VOUT: Output Pins. Connect to the output and place output capacitors between these pins and GND as close as possible to the package. Refer to the Applications Information section for the recommended capacitor placements. GND (Pin 22, 23, Exposed Pad Pin 29): Ground Pins. All GND pins must be soldered to the board ground plane. NC: No Connect Pins. These pins can be left open or connected to the ground. Rev. A 12 For more information www.analog.com LT3922-1 BLOCK DIAGRAM VIN 4.7µH 10µF 2.2µF 3 VIN 2 INTVCC 33nF BST SW 28 27 EN/UVLO 5 356k INTERNAL VCC REGULATOR MTSW S UVLO AND OVLO OVLO R 6 PEAK CURRENT COMPARATOR VREF 2V REFERENCE VOUT Q 24 SYNCHRONOUS CONTROLLER 59.0k 7 29 GND (EXPOSED PAD) 4 1M 1 GND MBSW RT 16 45.3k 1.4V SYNC/SPRD 17 – 0.47µF VOUT 200kHz TO 2MHz OSCILLATOR 4.7µF 23 + – + 1µF 0.47µF 22 200mΩ 21 VOUT – 10V REGULATOR PWMTG V/I CONVERTER + PWMTG DRIVER 20 gm = 140µA/V CURRENT REGULATION AMPLIFIER + – PWM 19 2.5k 2.5k ISMON INTERNAL PWM SIGNAL 14 25k 0.25V 10× gm = 1000µA/V VOLTAGE REGULATION AMPLIFIER – A/D DETECTOR CONTROL BUFFER + 8 + + – ISN 10 ISP 9 + + – CTRL + – 1.25V 12 1.2V INTVCC 20µA FAULT SOFT-START AND LED FAULT CONTROL 2µA SS 25 N/C 26 N/C 1M FB 13 VC 11 10nF 33.2k 100k 15 RP 18 39221 BD 10k 1nF Rev. A For more information www.analog.com 13 LT3922-1 OPERATION The LT3922-1 is a step-up LED driver that utilizes a fixedfrequency peak current control to accurately regulate the current through a string of LEDs. Low EMI performance is realized with the LT3922-1's Silent Switcher architecture, which employs magnetic field cancellation techniques to minimize electromagnetic interference. The LT3922-1 includes two power switches, their drivers, and a diode for providing power to the top switch driver. The switches connect the external inductor terminal connected to the SW pin alternately to the ground and then to the output (VOUT). The inductor current rises and falls accordingly and the peak current can be regulated through the combined effect of the other circuit blocks. The synchronous controller ensures the power switches do not conduct at the same time, and a programmable oscillator turns on the bottom switch at the beginning of each switching cycle. The frequency of this oscillator is set by an external resistor at the RT pin and can be overridden by external pulses at the SYNC/SPRD pin. The SYNC/ SPRD pin can also be used to command spread spectrum frequency modulation (SSFM). The bottom switch is turned off by the peak current comparator which waits during the on-time for the inductor current to exceed the target set by the voltage at the VC pin. This target is modified by a signal from the oscillator which stabilizes the inductor current. A network of passive components at the VC pin is necessary to stabilize this regulation loop. The inductor current is derived from the desired LED current programmed by the voltage at the CTRL pin. The analog-to-digital detector and the control buffer convert either a DC voltage or duty cycle of pulses at the CTRL pin into the input for the current regulation amplifier. The other input to this amplifier comes from the ISP and ISN pin voltages. An external current sense resistor between these pins should be placed in series with the string of LEDs such that the voltage across it provides the feedback to regulate the LED current. The current regulation amplifier then compares the actual LED current to the desired LED current and adjusts VC as necessary. The voltage regulation amplifier overrides the current regulation amplifier when the FB pin voltage is higher than an internal 1.2V reference. An external resistor network from the LED string to the FB pin provides an indication of the LED string voltage and allows the voltage amplifier to prevent overvoltage of the LED string. The ISP, ISN, and FB pin voltages are also monitored to detect fault conditions like open and short circuits, which are then reported by pulling FAULT pin low. The response to a fault can be selected either to try hiccup restarts or to latchoff by the choice of an external resistor connected to the SS pin. Refer to the Applications Information section for a detailed explanation of fault responses. Finally, pulse-width modulation (PWM) of the LED current is achieved by turning on and off an external PMOS switch between the VOUT and the string of LEDs. An external pulse at the PWM pin controls the state of the PWM driver or a DC voltage at the PWM pin dictates the duty ratio of an internal PWM pulse, whose frequency is programmed with an external resistor at the RP pin. The proprietary circuits of the LT3922-1 ensures a rapid recovery of the LED current pulses for PWM. APPLICATIONS INFORMATION The following is a guide to selecting the external components and configuring the LT3922-1 according to the requirements of an application. Programming LED Current with the CTRL Pin The primary function of the LT3922-1 is to regulate the current in a string of LEDs. This current should pass through a series current sense resistor. The voltage across this resistor is sensed by the current regulation amplifier through the ISP and ISN pins and regulated to a level programmed by the CTRL pin. The maximum resistor voltage that can be programmed is 100mV which corresponds to 1A through the LED string when a 100mΩ current sense resistor is used. To allow for this maximum current, the CTRL pin may be connected directly to the VREF pin which provides Rev. A 14 For more information www.analog.com LT3922-1 APPLICATIONS INFORMATION an accurate 2V reference. Lower current levels can be programmed by DC CTRL voltages between 250mV and 1.25V as shown in Figure 1. ILED 100mV RSNS DCTRL < 10% CTRL-OFF ILED 100mV RSNS 50mV RSNS VCTRL < 200mV CTRL-OFF 50mV RSNS 0 12.5% 37.5% 62.5% 75% DCTRL 39221 F02 Figure 2. Duty Cycle CTRL Range 0 0.25V 0.75V 1.25V 1.5V VCTRL VREF VREF 39221 F01 RCTRL1 Figure 1. Analog CTRL Range LT3922-1 RCTRL1 Below 250mV, the CTRL pin commands zero LED current, and above 1.25V, it commands the maximum. When an independent voltage source is not available, the intermediate CTRL voltages may be derived from the 2V reference at the VREF pin using a resistor network or potentiometer as long as the total current drawn from the VREF pin is less than 1mA. Additionally, the LT3922-1 is capable of interpreting a digital pulse at the CTRL pin. The high level of the pulse must be greater than 1.6V. The low level must be less than 0.4V. The frequency must be greater than 10kHz and less than 200kHz. Then the regulated voltage between ISP and ISN will vary with the duty ratio of the pulse as shown in Figure 2. In this case, the LED current is zero for duty cycles less than 12.5% and reaches its maximum above 62.5%. The LT3922-1 will cease switching if the duty cycle of the CTRL pin pulse is less than 10%, and also for DC CTRL pin voltages less than 200mV. RNTC LT3922-1 CTRL CTRL RCTRL2 RCTRL2 39221 F03 RNTC Figure 3. Setting CTRL with NTC Resistors Setting Switching Frequency with the RT Pin The switching frequency of the LT3922-1 is programmed by a resistor connected between the RT pin and GND. Values of the RT resistor from 45.3k up to 499k program frequencies from 2MHz down to 200kHz as shown in Table 1. Higher frequencies allow for smaller external components but increase switching power losses and radiated EMI. Table 1. RT Resistance Range SWITCHING FREQUENCY RT 2.0 MHz 45.3k 1.6 MHz 57.6k 1.2 MHz 78.7k 1.0 MHz 95.3k 400 kHz 249k 200 kHz 499k To reduce the LED current when the temperature of the LEDs rises, use resistors with negative temperature coefficient (NTC) in the network from VREF to CTRL as shown in Figure 3. Rev. A For more information www.analog.com 15 LT3922-1 APPLICATIONS INFORMATION Synchronizing Switching Frequency Maximum Duty Cycle The switching frequency can also be synchronized to an external clock connected to the SYNC/SPRD pin. The high-level of the external clock must be at least 1.5V, and the frequency must be between 200kHz and 2MHz. The RT resistor is still required in this case, and the resistance should correspond to the frequency of the external clock. If the external clock ever stops, the LT3922-1 will rely on the RT resistor to set the frequency. The choice of switching frequency should be made knowing that the maximum VOUT voltage of a boost converter is determined by the maximum duty cycle for a given VIN voltage as shown in the following equation: Enabling Spread Spectrum Frequency Modulation Connecting SYNC/SPRD to INTVCC will enable spread spectrum frequency modulation (SSFM). The switching frequency will vary from the frequency set by the RT resistor to 125% of that frequency. If neither synchronization nor SSFM is required, connect SYNC/SPRD to GND. As shown in Figure 4, enabling SSFM can significantly attenuate the electromagnetic interference that the LT3922-1, like all switching regulators, emits at the switching frequency and its harmonics. This feature is designed to help devices that include the LT3922-1 perform better in the various standard industrial tests related to interference. 80 SSFM ON SSFM OFF PEAK CONDUCTED EMI (dBµV) 70 60 50 40 30 20 10 0 –10 –20 0 5 10 15 20 FREQUENCY (MHz) 25 30 39221 F04 Figure 4. Typical Conducted Peak EMI of the LT3922-1 with 2MHz Switching Frequency VOUT = VIN (1) ( 1– D ) where D is the duty cycle of the boost converter defined as the ratio of the on-time of the bottom power switch to the total switching period. The maximum duty cycle for a given switching frequency is determined by the minimum off-time of the bottom power switch. The longest minimum off-time of the LT3922-1 is 35ns, so the maximum duty cycle is 93% at 2MHz switching frequency. Therefore, if an application requires higher duty cycle, the switching frequency should be set lower to achieve the demanded duty cycle. Selecting an Inductor The LT3922-1 limits the inductor peak current to a minimum of 2.3A over the duty cycle without sub-harmonic oscillations. This current limit will override the CTRL input command if the programmed LED current demands higher inductor peak current than 2.3A. Therefore, it is important to select the inductor value to ensure the peak inductor current is below the limit over the desired input voltage range. The following is an example of inductor value decision process for the application where we want 300mA LED current at 30V output, while the input ranges from 8V to 25V and the switching frequency is 2MHz. The maximum peak inductor current can be derived by adding the half of the inductor current ripple amplitude to the average inductor current value, both values of which are determined by the input and output voltages, switching frequency, efficiency and the inductor values. Hence, the minimum inductor value LMIN that ensures the peak inductor current below 2.3A is: The attenuation varies depending on the chosen switching frequency, the range of frequencies in which interference is measured, and whether a test measures peak, quasi-peak, or average emissions. The results of several other emission measurements are with select typical application circuits. ( ) ⎛ VIN(MIN) • VOUT – VIN(MIN) ⎞ ⎜ ⎟ 2 • VOUT • fSW ⎜⎝ ⎟⎠ LMIN = VOUT • ILED ⎛ ⎞ ⎜⎝ 2.3 – V ⎟ IN(MIN) • EFFICIENCY ⎠ (2) Rev. A 16 For more information www.analog.com LT3922-1 APPLICATIONS INFORMATION Using this equation gives an inductance of about 1.4µH assuming 90% efficiency for the given conditions. With this minimum inductor value guideline, choose an inductor with low core loss and low DC resistance. Inductor must be able to handle the peak inductor current without saturation. To minimize the radiated noise, use a shielded inductor. The manufacturers featured in Table 2 are recommended sources of inductors. Table 2. Inductor Manufacturers MANUFACTURER WEBSITE Wurth Electronics www.we-online.com Coilcraft www.coilcraft.com Vishay Intertechnology www.vishay.com Selecting an Input Capacitor The input capacitor supplies the inductor ripple current and the transient current that occurs in PWM dimming operations. A 10µF ceramic capacitor should be sufficient to provide these non-steady state currents. Place the input capacitor close to the inductor. If possible, place an additional 1µF ceramic capacitor close to the VIN pin for better noise immunity. Use X7R or X5R ceramic capacitors as they typically retain their capacitance better than other capacitor types over wide voltage and temperature ranges. If the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk electrolytic capacitance may be necessary. A low ESR ceramic input capacitor combined with parasitic inductances in the current paths can form a high-Q LC tank circuit which can ring the capacitor voltage up to twice the input voltage. A higher ESR electrolytic capacitor, on the other hand, minimizes this ringing. Refer to the Linear Technology Application Note 88 for more information. Sources of quality ceramic and electrolytic capacitors are listed in Table 3. Table 3. Capacitor Manufacturers MANUFACTURER WEBSITE Murata Manufacturing www.murata.com Garrett Electronics www.garrettelec.com Panasonic www.industrial.panasonic.com Nippon Chemi-Con www.chemi-con.co.jp Stabilizing the Regulation Loop The LT3922-1 uses internal error amplifiers to regulate the LED current and the output voltage to the user programmed values. The output impedance of the error amplifiers and the external compensation capacitor, CC, connected to VC pin create the dominant pole of the control loop. The compensation resistor, RC, in series with CC forms a left-half-plane (LHP) zero. This LHP zero allows better regulation of LED current and output voltage during transient operations. For most LED applications, 1nF and 10k would be good starting values for CC and RC, respectively. Refer to the Linear Technology Application Note 76 for more information. Selecting and Placing Output Capacitors The output capacitors need to have very low ESR to reduce the output ripple. Placing several low ESR ceramic capacitors in parallel is an effective way to reduce ESR. These output capacitors in a boost converter should have a ripple current rating greater than the half of the maximum SW pin current. Use X7R or X5R ceramic capacitors as they typically retain their capacitance better than other capacitor types over wide voltage and temperature ranges. The LT3922-1 utilizes a proprietary architecture to reduce EMI noise generated by switching. To best utilize this feature, VOUT should be bypassed with three capacitors. Figure 5 shows the VOUT capacitor placements for the QFN package. COUT1 and COUT2 are 0402-0.47µF ceramic capacitors placed as close as possible to the LT3922-1’s VOUT and GND pins. COUT3 should be larger in size and value. A 1206-(2.2µF to 22µF) ceramic capacitor is recommended for typical applications. Rev. A For more information www.analog.com 17 LT3922-1 APPLICATIONS INFORMATION The drain source voltage rating of the chosen PMOS should be greater than the maximum output voltage. Typically the output voltage is a little higher than the sum of the forward voltages of the LEDs in the string. However, when the string is broken, the output voltage will begin to increase due to the imbalance of inductor current and load current. As described in detail later, the LT3922-1 will not reduce the inductor current nor limit the output voltage until the FB pin voltage approaches 1.2V. Therefore, the maximum output voltage is ultimately determined by the resistor network between FB and VOUT. VOUT VOUT COUT3 1206 COUT1 0402 25 24 VOUT 23 22 COUT2 0402 21 GND 20 39221 F05 Figure 5. Placement of Output Capacitors Selecting a MOSFET for PWM Dimming Pulse-Width-Modulation (PWM) dimming of the LED current is an effective way to control the brightness of the light without varying its color. The brightness can also be adjusted with finer resolution this way than by varying the current level. The LT3922-1 features a PWMTG driver that is intended for a high-voltage PMOS switch in position to effectively PWM dim a string of LEDs from the output capacitor and the current sense resistor. When the switch is open and the string is disconnected, the LED current will be zero. In contrast to a low-side NMOS driver, this feature eliminates the need for a dedicated return path for the LED current in automotive applications or other grounded chassis systems. The gate driver for this PMOS is supplied through the VOUT pin. When the PWM pin voltage is greater than 1.4V, the driver will pull the gate of the PMOS to a maximum of 10V below the VOUT pin. If VOUT is below 10V, the gate drive is necessarily reduced. For constant current applications, leave PWMTG open, connect the load directly after the current sense resistor, and connect PWM to INTVCC. In these cases, analog dimming may be implemented with the CTRL pin. In most applications, the gate source voltage rating of the PMOS should be at least 10V. The only exceptions to this rule are applications for which the output voltage is always less than 10V. The PWMTG driver will try to pull the gate of the PMOS down to 10V below VOUT, but it cannot pull the gate below GND. Therefore, when the maximum output voltage is less than 10V, the PMOS gate source voltage rating will be sufficient if it is merely equal to or greater than the output voltage. Finally, the drain current rating of the PMOS must exceed the programmed LED current. Assuming this condition and the conditions above are met, the only electrical parameter to be considered is the on-resistance. Other parameters such as gate charge are less important because PWM dimming frequencies are typically too low for efficiency to be affected noticeably by gate charging loss or transition loss. Table 4 lists recommended manufacturers of PMOS devices. Table 4. PMOS Manufacturers MANUFACTURER WEBSITE Infineon www.infineon.com Vishay Intertechnology www.vishay.com Fairchild Semiconductor Corp. www.fairchildsemi.com NXP Semiconductors www.nxp.com Selecting an RP Resistor for Internal PWM Dimming If the RP pin is tied to GND, an external pulse-width modulated signal at the PWM pin will control PWM dimming of the LED load. The signal will enable the PWMTG driver and turn on the external PMOS device when it is higher than 1.4V. Rev. A 18 For more information www.analog.com LT3922-1 APPLICATIONS INFORMATION However, the LT3922-1 is capable of PWM dimming even when an external PWM signal is not available. In this case, an internal PWM signal with frequency set by a resistor at the RP pin and duty ratio set by a DC voltage at the PWM pin will control the PWMTG driver. The RP resistor should be one of the seven values listed in Table 5. For each of these values, the PWM frequency is a unique ratio of the switching frequency. High PWM Dimming Ratio Table 5. Internal PWM Dimming Frequencies The ISMON pin provides an amplified and buffered monitor of the voltage between the ISP and ISN pins. The gain of the internal amplifier is ten, and the speed is fast enough to track the pulse-width modulated LED current. However, as shown in Figure 6, the ISMON voltage can be filtered with a resistor-capacitor network to monitor the average LED current instead. SWITCHING FREQUENCY RP RATIO 2MHz 1MHz 200kHz 28.7k 28 7.81kHz 3.91kHz 781Hz 47.5k 29 3.91kHz 1.95kHz 391Hz 76.8k 210 1.95kHz 977Hz 195Hz 118k 211 977Hz 488Hz 97.7Hz 169k 212 488Hz 244Hz 48.8Hz 237k 213 244Hz 122Hz 24.4Hz 332k 214 122Hz 61Hz 12.2Hz When using the internal PWM signal, set the voltage at the PWM pin between 1V and 2V. The PWMTG driver will stay off if PWM is below 1V, and it will stay on if PWM is above 2V. Between 1V and 2V there are 128 evenly spaced thresholds corresponding to 128 discrete PWM duty ratios from 0% to 100%. This range of 1V to 2V has been chosen so that the PWM voltage may be set using a potentiometer or a resistor network and the 2V reference available at the VREF pin. Place a small 1µF ceramic capacitor near PWM pin to ground. There is one exception to the above rules for PWM dimming. To avoid excessive start-up times, after the first PWM pulse, PWMTG will stay on until the SS pin voltage reaches 1.7V or the LED current has reached approximately 10% of the full-scale current. The LT3922-1 can drive regulated current pulses with a duration as short as 400ns. This means the PWM dimming ratio can be 25,000:1 when the external PWM signal frequency is 100Hz. The PWM dimming ratio can be even higher as there are no limits on the maximum PWM period. Monitoring LED Current LT3922-1 RMON ISMON ISMON(FILTERED) CMON 39221 F06 Figure 6. ISMON Filter Configuration The resistor should be at least 10k. The capacitance can be as large or small as needed without affecting the stability of the internal amplifier. For example, when the PWM frequency is 200Hz, a 10μF capacitor combined with the 10k resistor would limit the ripple on ISMON to 1%. Selecting the FB Resistors Two resistors should be selected to form a network between the output voltage and the FB pin as shown in Figure 7. VOUT LT3922-1 RFB2 ! R $ VOUT(MAX) = 1.2V • # 1+ FB2 & " RFB1 % FB RFB1 39221 F07 Figure 7. FB Resistor Configuration Rev. A For more information www.analog.com 19 LT3922-1 APPLICATIONS INFORMATION This network forms part of a voltage regulation loop when FB is near 1.2V. In this case, the LT3922-1 will override the programmed LED current and adjust the inductor current to lower the output voltage and limit FB to 1.2V. This resistor configuration therefore determines the maximum output voltage. In this way, the LT3922-1 can also be configured as a voltage regulator instead of an LED driver. It will regulate the output voltage near the programmed maximum as long as the load current is less than the current programmed by CTRL. Note that this voltage limit may be reached inadvertently if it is set too close to the typical output voltage and the output capacitor is too small. To avoid interference with the current regulation, the feedback resistors should be chosen such that FB is below 1.14V when the LEDs are conducting. Open LED Fault Detection and Response The resistor network formed by RFB1 and RFB2 also defines the criteria for the open-LED fault condition. An open-LED fault is detected when the FB pin voltage is greater than 1.14V and simultaneously the difference between ISP and ISN pins is less than 10mV. The latter condition ensures that the output current is low (as it should be in an open circuit) not just that output voltage is high as it may be when the LEDs are conducting a large current. A fault is reported by an internal device pulling the voltage at the FAULT pin low. There is nothing internal that pulls this voltage high, so an external resistor between INTVCC and FAULT is necessary as shown in Figure 8. This configuration allows multiple FAULT pins and similar pins on other parts to be connected and share a single resistor. INTVCC RFAULT Understanding FB Overvoltage Lockout LT3922-1 FAULT Despite the voltage regulation loop, the FB voltage can temporarily exceed the 1.2V limit. If the output voltage is near the maximum when the LED string opens, it may take too long for the feedback loop to adjust the inductor current and avoid overcharging the output. To quickly respond to the overvoltage conditions, the LT3922-1 will immediately stop switching, disconnect the LED string by shutting the external PMOS off when the FB pin exceeds the 1.266V FB overvoltage lockout threshold. The FB overvoltage lockout threshold may be routinely exceeded when the LT3922-1 is being operated as a voltage regulator if the load current decreases rapidly. In this case, the pause in switching limits the output overshoot and ensures that the voltage is back in regulation as quickly as possible. For safe operation, choose RFB1 and RFB2 values to ensure the output voltage is not greater than 40V when the FB voltage is 1.266V. 39221 F08 Figure 8. FAULT Resistor Configuration Shorted LED Fault Detection and Responses The LT3922-1 prevents excessive currents that could damage the LED and the driver by three detection schemes as follows: 1) (VISP – VISN) > 150mV for more than 300µs, or 2) (VISP – VISN) > 700mV (typical), or 3) VOUT < (VIN – 2V) If the LT3922-1 detects any one of these events, it immediately stops switching, turns off the external PMOS PWM switch, pulls down FAULT pin, and initiates a fault response routine using the SS pin. Note that FAULT pin is held low until the part successfully restarts. Rev. A 20 For more information www.analog.com LT3922-1 APPLICATIONS INFORMATION Soft-Start and Fault Modes SS PIN (V) The LT3922-1’s soft-start (SS) pin has two functions. First, it allows the user to program the output startup voltage ramp rate through the SS pin. An internal 20µA current pulls up the SS pin to INTVCC. As shown in Figure 9, connecting an external capacitor CSS at the SS pin to GND will VINTVCC (3V) 1.7V INTVCC RSS (OPTION FOR LATCH-OFF) LT3922-1 TIME DETECTED LED SHORT SS CSS (a) Latchoff Mode 39221 F09 Figure 9. SS Capacitor and Resistor Configuration generate a linear ramp voltage. This voltage ramp at the SS pin forces the LT3922-1 to regulate the FB pin voltage to track the SS pin voltage until VOUT is high enough to drive the LED at the commanded current level. The SS pin is also used as a fault timer. After a shorted LED fault is detected, an internal 2µA current pulls down the voltage on the SS pin. The user can configure two different fault response routines by using or not using a pull-up resistor, RSS, from the SS pin to INTVCC. Figures 10a and 10b illustrate corresponding waveforms of the SS pin voltage for the two responses: latchoff and hiccup mode. With a 470k or smaller RSS, the LT3922-1 will latch off until the user forces a reset by toggling the EN/UVLO pin. Without the RSS, the LT3922-1 enters a hiccup mode operation. The 2µA pulls SS pin down to 0.2V, at which point the 20µA pull-up current turns on again to raise the SS pin voltage. If the fault condition has not been removed until the SS pin reaches 1.7V, the 2µA pull-down current source turns on again to start another cycle. This hiccup mode will continue until the fault is cleared. A typical CSS value is 10nF. Programming EN/UVLO and OVLO Thresholds The LT3922-1 will stop switching, disable the PWMTG driver, and reset the soft-start when the voltage at the EN/UVLO pin drops below 1.33V, or the voltage at the OVLO pin rises above 1.205V. External voltage sources can be used to set the voltage at EN/UVLO and OVLO pins SS PIN (V) INTVCC (3V) 1.7V 0.2V TIME DETECTED LED SHORT FAULT CLEARED 39221 F10 (b) Hiccup Mode Figure 10. Fault Responses: (a) Latchoff and (b) Hiccup to enable or disable the LT3922-1. Alternatively, resistor networks can be placed from VIN to these pins to set the operating range of VIN voltage. For instance, the VIN undervoltage lockout (UVLO) threshold can be accurately set by an external resistor divider. Figure 11 illustrates how to set the falling EN/UVLO threshold and the rising hysteresis voltages in LT3922-1. The internal hysteresis is 25mV, but the user can program VIN FALLING THRESHOLD R1 LT3922-1 ! R1$ VIN(UVLO) = 1.33V • # 1+ & " R2 % EN/UVLO RISING HYSTERESIS R2 39221 F11 ! R1$ VHYST(UVLO) = 25mV • # 1+ & +R1• 2µA " R2 % Figure 11. EN/UVLO Threshold and Hysteresis Voltages Rev. A For more information www.analog.com 21 LT3922-1 APPLICATIONS INFORMATION additional hysteresis through the external resistor as the EN/UVLO pin sinks 2µA current when the EN/UVLO pin voltage is below the threshold. On the other hand, the VIN overvoltage lockout (OVLO) threshold can be accurately set by the external resistor divider as well. Figure 12 illustrates how to set the rising OVLO threshold in LT3922-1. The internal hysteresis of the OVLO pin is 50mV. VIN RISING THRESHOLD LT3922-1 R3 ! R3 $ VIN(OVLO) = 1.205V • # 1+ & " R4 % OVLO FALLING HYSTERESIS R4 39221 F12 ! R3 $ VHYST(OVLO) = 50mV • # 1+ & " R4 % Figure 12. OVLO Threshold and Hysteresis Voltages Both EN/UVLO and OVLO can be set precisely using a single resistor string consisting of three series resistors. Figure 13 shows the resistor string and the threshold and hysteresis voltages for EN/UVLO and OVLO. VIN R5 $ ! VIN(UVLO) = 1.33V • # 1+ " R6+R7 &% R5 EN/UVLO R6 LT3922-1 OVLO R7 39221 F13 R5 $ ! VHYST(UVLO) = 25mV • # 1+ +R5 • 2µA " R6+R7 &% ! R5+R6 $ VIN(OVLO) = 1.205V • # 1+ & " R7 % ! R5+R6 $ VHYST(OVLO) = 50mV • # 1+ & " R7 % Figure 13. EN/UVLO–OVLO Threshold and Hysteresis Voltages Tie EN/UVLO to VIN and tie OVLO to GND if they are not used. Do not leave these pins open. Planning for Thermal Shutdown The LT3922-1 automatically stops switching when the internal temperature is too high. The temperature limit is guaranteed to be higher than the operational temperature of the part. During thermal shutdown, all switching is terminated, SS is forced low, and the LEDs are disconnected through the PWMTG driver. The exposed pad on the bottom of the package must be soldered to a ground plane. Vias placed directly under the package are necessary to dissipate heat. Following these guidelines, the official four-layer demo board DC2247A reduces the thermal resistance, θJA to 25°C/W. With a compromised board design, θJA could be 40°C/W or higher. Designing the Printed Circuit Board (PCB) The output capacitors COUT1 and COUT2 of the LT3922-1 bypass large switched currents from VOUT to GND (see Figure 5). The loops travelled by these currents should be made small as possible to these pins. These output capacitors, along with the inductor and the input capacitors, should be placed on the same side of the PCB, and their connections should be made on that layer. Create a Kelvin ground network by keeping the ground connection for all of the other components separate. It should only join the ground for the input and output capacitors and the return path for the LED current at the exposed pad. There are a few other aspects of the board design that improve performance. An unbroken ground plane on the second layer dissipates heat, but also reduces noise. Likewise minimizing the area of the SW and BST nodes reduces noise. The traces for FB and VC should be kept short to lessen the susceptibility to noise of these highimpedance nodes. Matched Kelvin connections from the external current sense resistor to the ISP and ISN pins are essential for current regulation accuracy. The 2.2μF INTVCC and 1µF VREF capacitors as well as the 33nF BST capacitor should be placed as closely as possible to their respective pins. Use bypass capacitors for the DC input nodes such as VIN, CTRL, and PWM (for internal PWM) to reduce noise. Keep the RT and RP nodes small and away from noisy signals. Finally, a diode with anode connected to ground and cathode to the drain of the PWMTG MOSFET can protect that device from overvoltage caused by excessive inductance in the LED string. Please refer to the demo board layout of the LT3922-1 for more information. Rev. A 22 For more information www.analog.com LT3922-1 TYPICAL APPLICATIONS 2MHz, 93% Efficient 10W (30V, 333mA) Boost LED Driver L1, 4.7µH VIN 8V TO 27V 33nF SW VIN 1M 4.7µF BST VOUT 0.47µF GND EN/UVLO 0.47µF 365k VOUT OVLO LT3922-1 59.0k 1M FB 4.7µF 33.2k GND VREF 1µF ISP 100k ANALOG DIM PWM DIM 300mΩ CTRL PWM ISN SYNC/SPRD INTVCC 100k PWMTG FAULT SS RT 2.2µF 10nF RP M1 ISMON VC 30V 333mA LED 10k 45.3k 2MHz 1nF 39221 TA02a Efficiency vs VIN 100 VLED = 30V fSW = 2MHz 95 EFFICIENCY (%) 100:1 External PWM Dimming 90 ILED 100mA/DIV 85 80 VPWM 2V/DIV 75 100% PWM DUTY CYCLE 70 6 9 12 15 18 21 VIN (V) 24 27 20µs/DIV 30 39221 TA02b INFINITE PERSISTENCE VIN = 12V fPWM = 100Hz 39221 TA02c Rev. A For more information www.analog.com 23 LT3922-1 TYPICAL APPLICATIONS 333mA Boost LED Driver Using Internal PWM and Analog CTRL Dimming L1 4.7µH VIN 8V TO 27V 33nF SW VIN BST VOUT 1M 4.7µF 0.47µF GND EN/UVLO 0.47µF 365k VOUT OVLO LT3922-1 59.0k 1M FB 4.7µF 33.2k VCTRL GND CTRL VREF 100k 1µF 0.1µF (OPTION) PWM ISP 97.6k 300mΩ SYNC/SPRD ISN INTVCC 100k PWMTG FAULT SS RT 2.2µF 10nF RP 45.3k 2MHz M1 ISMON VC 332k 122Hz 10k 1nF 30V 333mA LED 39221 TA03a L1: WURTH 74437324047 M1: VISHAY Si2319CDS 128:1 Internal PWM Dimming 10:1 Internal PWM Dimming ILED 100mA/DIV ILED 100mA/DIV 10µs/DIV 39221 TA03b 200µs/DIV VCTRL = 2V VIN = 12V fPWM = 122Hz 39221 TA03c VCTRL = 2V VIN = 12V fPWM = 122Hz 128:1 Internal PWM with 20:1 Analog CTRL Dimming ILED 10mA/DIV 10:1 Internal PWM with 20:1 Analog CTRL Dimming ILED 10mA/DIV 10µs/DIV 39221 TA03d VCTRL = 0.3V VIN = 12V fPWM = 122Hz 200µs/DIV 39221 TA03e VCTRL = 0.3V VIN = 12V fPWM = 122Hz Rev. A 24 For more information www.analog.com LT3922-1 TYPICAL APPLICATIONS 333mA Boost LED Driver Using External PWM Dimming and SSFM L1 4.7µH VIN 8V TO 27V 33nF SW VIN 1M 4.7µF BST VOUT 0.47µF GND EN/UVLO 0.47µF 365k VOUT OVLO LT3922-1 59.0k 1M FB 4.7µF 33.2k GND VREF CTRL PWM 1µF ISP 300mΩ SSFM SYNC/SPRD ISN INTVCC PWMTG 100k FAULT SS RT 2.2µF 10nF RP 45.3k 2MHz M1 ISMON VC 30V 333mA LED 10k 1nF 39221 TA04a L1: WURTH 74437324047 M1: VISHAY Si2319CDS 122Hz 10:1 External PWM Dimming with and without SSFM ILED (SSFM) 200mA/DIV ILED (NO SSFM) 200mA/DIV 2ms/DIV 39221 TA04b Rev. A For more information www.analog.com 25 LT3922-1 TYPICAL APPLICATIONS Low EMI 400kHz, 96% Efficient 10W (30V, 333mA) Boost LED Driver with SSFM Efficiency vs VIN L1 22µH 33nF VIN 8V TO 27V 10µF 0.1µF 0402 SW VIN FB1 4.7µF 100 BST VOUT 1M 0.47µF 365k 33µF VOUT OVLO 1M LT3922-1 59.0k FB 4.7µF 33.2k 1µF 90 85 GND VREF VLED = 30V fSW = 400kHz 95 0.47µF GND EN/UVLO EFFICIENCY (%) INPUT EMI FILTER WITHOUT EMI FILTERS WITH EMI FILTERS ISP 100k 2.2µF 300mΩ CTRL ANALOG DIM PWM DIM 80 ISN PWM 6 8 10 12 14 16 18 20 22 24 26 28 VIN (V) 39221 TA05b SYNC/SPRD INTVCC 100k PWMTG FAULT SS 2.2µF RT RP 0402 0.1µF 10k 249k 400kHz 10nF M1 ISMON VC D1 FB2 OUTPUT EMI FILTER 1nF L1: COILCRAFT XAL5050-223MEB M1: VISHAY Si2319CDS FB1: WURTH 742792040 FB2: WURTH 742792097 D1: NXP PMEG4010CEJ 30V 333mA LED 39221 TA05a 50 45 40 35 30 25 20 15 10 5 0 –5 –10 –15 Average Radiated EMI Performance (CISPR25) AMPLITUDE (dBµV/m) AMPLITUDE (dBµV/m) Peak Radiated EMI Performance (CISPR25) CLASS 5 PEAK LIMIT LT3922-1 400kHz f SW PEAK EMI 0 100 200 300 400 500 600 FREQUENCY (MHz) 700 800 900 1000 50 45 40 35 30 25 20 15 10 5 0 –5 –10 –15 CLASS 5 AVERAGE LIMIT LT3922-1 400kHz f SW AVERAGE EMI 0 100 39221 TA05c 200 300 400 500 600 FREQUENCY (MHz) 700 800 900 1000 39221 TA05d Rev. A 26 For more information www.analog.com LT3922-1 TYPICAL APPLICATIONS 500mA Boost LED Driver Using Pulse Duty Cycle CTRL Input L1 6.8µH VIN 8V TO 20V 33nF SW VIN 4.7µF 1M BST VOUT 0.47µF GND EN/UVLO 0.47µF 348k VOUT OVLO LT3922-1 84.5k 1M FB 4.7µF 33.2k 1µF 3V, 10kHz PULSE VREF GND PWM CTRL ISP 200mΩ SYNC/SPRD ISN INTVCC PWMTG 100k FAULT SS RT 2.2µF 10nF RP 45.3k 2MHz M1 ISMON VC 10k 1nF L1: WURTH 74437324068 M1: VISHAY Si2319CDS VCTRL Duty Cycle Stepped from 15% to 75% 39221 TA06a VCTRL Duty Cycle Stepped from 75% to 15% ILED 200mA/DIV ILED 200mA/DIV VCTRL 2V/DIV VCTRL 2V/DIV 1ms/DIV 24V 500mA LED 39221 TA06b 1ms/DIV 39221 TA06c Rev. A For more information www.analog.com 27 LT3922-1 TYPICAL APPLICATIONS 2MHz, 95% Efficient 15W (15V, 1A) Buck Mode LED Driver L1 4.7µH 33nF VIN 22V TO 36V VIN 20V TO 36V BST VIN SW VOUT 1M 33µF EN/UVLO 0.47µF 51.1k VOUT 1µF OVLO 249k LT3922-1 34.8k 20k 20k Q1 FB VREF 1µF 0.47µF GND 22µF 33.2k 100k GND ANALOG DIM CTRL PWM DIM PWM ISP 100mΩ SYNC/SPRD ISN INTVCC 100k PWMTG FAULT SS RT 2.2µF L1: WURTH 74437324047 M1: VISHAY Si2319CDS Q1: ZETEX FMMT591A RP 45.3k 2MHz 100nF M1 ISMON VC 4.7nF 15V 1A LED 39221 TA07a Efficiency vs VIN 100 EFFICIENCY (%) 95 90 85 80 75 70 16 20 24 28 VIN (V) 32 36 40 39221 TA07b Rev. A 28 For more information www.analog.com LT3922-1 TYPICAL APPLICATIONS 500mA, 5V to 12V Boost Converter with Accurate Input Current Limit 56mΩ VIN 5V 2.2µF L1 4.7µH 33nF SW VIN 499k BST VOUT 0.47µF GND EN/UVLO 100 95 0.47µF 121k VOUT 150k 90 549k LT3922-1 FB 10µF 60.4k GND VREF ISN 100k EFFICIENCY (%) OVLO 1µF Efficiency VOUT 12V 500mA 85 80 75 70 ISP ANALOG DIM CTRL PWM DIM PWM 65 SYNC/SPRD 60 INTVCC PWMTG 100k 2.2µF L1: WURTH 744316470 100 200 300 ILOAD (mA) 400 500 39221 TA08b ISMON FAULT SS RT 10nF 0 RP 45.3k 2MHz VC 10k 1nF 39221 TA08a Rev. A For more information www.analog.com 29 LT3922-1 TYPICAL APPLICATIONS Shorted LED Robust Boost LED Driver L1 4.7µH VIN 8V TO 18V SW VIN BST VOUT 1M 4.7µF Shorted LED Protection without RSS: Hiccup Mode 33nF GND EN/UVLO 226k 0.47µF VPWMTG 20V/DIV 0.47µF VSS 2V/DIV VOUT OVLO LT3922-1 80.6k 1M FB VFAULTB 2V/DIV 4.7µF 33.2k VREF 1µF CTRL PWM DIM PWM 20ms/DIV ISP 100k ANALOG DIM ILED 1A/DIV GND 200mΩ ISN Shorted LED Protection with RSS: Latchoff Mode SYNC/SPRD INTVCC 100k RSS 100k OPTIONAL PWMTG FAULT SS RT 2.2µF 10nF L1: WURTH 74437324047 M1: VISHAY Si2319CDS D1: NXP PMEG4010CEJ 39221 TA09b ISMON VC RP 45.3k 2MHz M1 D1 332k 122Hz 10k 1nF 21V 500mA LED VPWMTG 20V/DIV VSS 2V/DIV VFAULTB 2V/DIV 39221 TA09a ILED 1A/DIV 100ms/DIV 39221 TA09c Rev. A 30 For more information www.analog.com LT3922-1 TYPICAL APPLICATIONS 2MHz, 88% Efficient 6.25W (12.5V, 500mA) Buck-Boost Mode LED Driver L1 4.7µH VIN 6V TO 18V C4, 33nF SW VIN C2 10µF EN/UVLO C3 1µF VOUT C11 0.47µF GND OVLO C10 0.47µF VOUT LT3922-1 R3 249k R4 R5 20k 20k Q1 FB VREF C5 1µF C9 10µF R6 39.2k GND CTRL ISP R7 0.2Ω SYNC/SPRD PWM ISN INTVCC R1 100k PWMTG SS M1 ISMON FAULT C6 2.2µF RT RP VC R8 10k R2 45.3k 2MHz C7 10nF C8 1nF 12.5V 500mA LED 39221 TA10a L1: WURTH 7443551470 M1: VISHAY Si2319DS Q1: ZETEX FMMT591A Efficiency vs VIN 100 95 90 EFFICIENCY (%) C1 33µF BST 85 80 75 70 65 60 4 6 8 10 12 14 VIN (V) 16 18 20 39221 TA10b Rev. A For more information www.analog.com 31 LT3922-1 PACKAGE DESCRIPTION UFD Package 28-Lead Plastic QFN (4mm × 5mm) (Reference LTC DWG # 05-08-1712 Rev C) 0.70 ±0.05 4.50 ±0.05 3.10 ±0.05 2.50 REF 2.65 ±0.05 3.65 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 3.50 REF 4.10 ±0.05 5.50 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 (2 SIDES) R = 0.05 TYP 0.75 ±0.05 PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER 2.50 REF R = 0.115 TYP 27 28 0.40 ±0.10 PIN 1 TOP MARK (NOTE 6) 1 2 5.00 ±0.10 (2 SIDES) 3.50 REF 3.65 ±0.10 2.65 ±0.10 (UFD28) QFN 0816 REV C 0.200 REF 0.00 – 0.05 0.25 ±0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGHD-3). 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE Rev. A 32 For more information www.analog.com LT3922-1 REVISION HISTORY REV DATE DESCRIPTION A 02/21 Updated LED current regulation to 2.5% accuracy PAGE NUMBER 1 Added AEC-Q100 Qualification and automotive model order information 1, 2 Changed BST pin capacitor to 33 nF 1, 10, 12, 21-29, 30, 32 Clarified Absolute Maximum Ratings 2 Clarified VREF Voltage conditions Revised Electrical Characteristic values 3 3, 4 Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license For is granted implication or otherwise under any patent or patent rights of Analog Devices. moreby information www.analog.com 33 LT3922-1 TYPICAL APPLICATION Low EMI 2MHz, 333mA Boost LED Driver with SSFM L1 4.7µH 0.1µF 0402 SW VIN FB1 33µF 4.7µF BST VOUT 1M 0.47µF GND EN/UVLO AMPLITUDE (dBµV/m) VIN 8V TO 27V Peak Radiated EMI Performance (CISPR25) 33nF INPUT EMI FILTER 0.47µF 365k VOUT OVLO 1M LT3922-1 59.0k FB 2.2µF 33.2k GND VREF 1µF ISP 100k ANALOG DIM CTRL PWM DIM PWM 300mΩ 2.2µF 50 45 40 35 30 25 20 15 10 5 0 –5 –10 –15 ISN CLASS 5 PEAK LIMIT LT3922-1 2MHz f SW PEAK EMI 0 100 200 300 SYNC/SPRD 400 500 600 FREQUENCY (MHz) 700 800 900 1000 39221 TA11b INTVCC SS 2.2µF M1 ISMON FAULT RT 100nF RP 45.3k 2MHz VC 332k 122Hz 24k 0402 0.1µF D1 0.22nF L1: WURTH 74437324047 M1: VISHAY Si2319CDS FB1: WURTH 7427920415 FB2: WURTH 742792097 D1: NXP PMEG4010 CEJ Average Radiated EMI Performance (CISPR25) FB2 OUTPUT EMI FILTER 30V 333mA LED 39221 TA11a AMPLITUDE (dBµV/m) PWMTG 100k 50 45 40 35 30 25 20 15 10 5 0 –5 –10 –15 CLASS 5 AVERAGE LIMIT LT3922-1 2MHz f SW AVERAGE EMI 0 100 200 300 400 500 600 FREQUENCY (MHz) 700 800 900 1000 39221 TA11c RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT3922 36V, 2A Synchronous Step-Up LED Driver VIN = 2.8V to 36V, VOUT(MAX) = 40V, 128:1 Internal Dimming and 5,000:1 External Dimming, ISD = 1µA, 4mm × 5mm QFN-28 LT3932/LT3932-1 36V, 2A Synchronous Step-Down LED Driver VIN = 3.6V to 36V, VOUT = 0V to 36V, 128:1 Internal Dimming and 5,000:1/10,000+:1 External Dimming, ISD = 1µA, 4mm × 5mm QFN-28 LT3952 60V, 4A LED Driver with 4000:1 PWM Dimming with VIN: 3V to 42V, VOUT(MAX) = 60V, 4000:1 PWM, 20:1 Analog, ISD < 1µA, TSSOP-28E Package Spread Spectrum LT3518 2.3A, 2.5MHz High Current LED Driver with 3000:1 VIN: 3V to 30V, VOUT(MAX) = 45V, 3000:1 PWM Dimming, ISD < 1μA, 4mm × 4mm QFN-16 and TSSOP-16E Packages Dimming with PMOS Disconnect FET Driver LT3755/LT3755-1/ 40VIN, 75VOUT, 1MHz Non-Synchronous Boost LED VIN: 4.5V to 40V, VOUT: VIN to 75V, ±4% Current Accuracy, 3mm × 3mm Controller QFN-16 and MSE-16 LT3755-2 LT3761 60VIN, 80VOUT, 1MHz Non-Synchronous Boost LED VIN: 4.5V to 60V, VOUT: VIN to 80V, ±3% Current Accuracy, External and Internal Controller with Internal PWM Generator PWM Dimming, MSE-16 LT3763 60V, 1MHz Synchronous Buck LED Controller LT3795 110V, 1MHz Non-Synchronous Boost LED Controller VIN: 4.5V to 110V, VOUT: VIN to 110V, ±3% Current Accuracy, Internal Spread Spectrum, TSSOP-28 with Spread Spectrum Frequency Modulation LT8391 60V, 650kHz Synchronous 4-Switch Buck-Boost LED VIN: 4V to 60V, VOUT: 0V to 60V, ±3% Current Accuracy, External and Internal PWM Dimming, Spread Spectrum, TSSOP-28 and 4mm × 5mm QFN-28 Controller with Spread Spectrum VIN: 6V to 60V, VOUT: 0V to VIN –2V, ±6% Current Accuracy, TSSOP-28 Rev. A 34 02/21 www.analog.com For more information www.analog.com  ANALOG DEVICES, INC. 2018–2021
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