LT8708
80V Synchronous 4-Switch Buck-Boost DC/DC
Controller with Bidirectional Capability
FEATURES
DESCRIPTION
Single Inductor Allows VIN Above, Below, or
Equal to VOUT
n Six Independent Forms of Regulation
n V Current (Forward and Reverse)
IN
n V
OUT Current (Forward and Reverse)
n V and V
IN
OUT Voltage
n Forward and Reverse Discontinuous Conduction
Mode Supported
n Supports MODE and DIR Pin Changes While Switching
n V
INCHIP Range 2.8V (Need EXTVCC > 6.4V) to 80V
n V
OUT Range: 1.3V to 80V
n Synchronous Rectification: Up to 99% Efficiency
n Available in 40-Lead (5mm × 8mm) QFN with High
Voltage Pin Spacing and 64-Lead (10mm × 10mm)
eLQFP
n AEC-Q100 in Progress
The LT®8708 is a high performance buck-boost switching
regulator controller that operates from an input voltage
that can be above, below or equal to the output voltage.
Features are included to simplify bidirectional power conversion in battery/capacitor backup systems and other
applications that may need regulation of VOUT, VIN, IOUT,
and/or IIN. Forward and reverse current can be monitored
and limited for the input and output sides of the converter.
All four current limits (forward input, reverse input, forward output and reverse output) can be set independently
using four resistors on the PCB.
n
n
The MODE pin can select between discontinuous conduction
mode (DCM), continuous conduction mode (CCM), hybrid
conduction mode (HCM) and Burst Mode® operation. In
combination with the DIR (direction) pin, the chip can be
configured to process power only from VIN to VOUT or only
from VOUT to VIN. With a wide 2.8V to 80V input and 1.3V
to 80V output range, the LT8708 is compatible with most
solar, automotive, telecom and battery-powered systems.
n
All registered trademarks and trademarks are the property of their respective owners.
APPLICATIONS
High Voltage Buck-Boost Converters
Bidirectional Charging System
n Automotive 48V Systems
TYPICAL APPLICATION
12V Bidirectional Dual Battery System with FHCM and RHCM
VBAT1
10V
TO 16V
BATTERY
+
ILIM
ILIM
VBAT2
+
+
TO DIODE
DB1
–
TO DIODE
DB2
+
–
10V
TO 16V
BATTERY
Efficiency
100
99
POWER TRANSFER
DECISION LOGIC
CSPIN
VINCHIP
SHDN
FBIN
VINHIMON
RVS (0V) FWD (3V)
GND BG2 SW2 BOOST2 TG2
CSPOUT
CSNOUT
EXTVCC
VOUTLOMON
FBOUT
INTVCC
LT8708
DIR
LD033
SWEN
LDO33
RVSOFF
MODE
VC
RT
EFFICIENCY (%)
TG1 BOOST1 SW1 BG1 CSP CSN
CSNIN
SS
SYNC
GATEVCC
IMON_OP
IMON_ON
ICN
ICP
IMON_INP
IMON_INN
CLKOUT
8708 TA01a
126kHz
98
97
96
95
DB1
VBAT2 = 13.5V
IOUT = 15A
DB2
TO
TO
BOOST1 BOOST2
94
10
12
14
VBAT1 (V)
16
8708 TA01b
Rev. B
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1
LT8708
TABLE OF CONTENTS
Features...................................................... 1
Applications................................................. 1
Typical Application ......................................... 1
Description.................................................. 1
Absolute Maximum Ratings............................... 3
Pin Configuration........................................... 3
Order Information........................................... 4
Electrical Characteristics.................................. 4
Typical Performance Characteristics.................... 9
Pin Functions............................................... 13
Block Diagram.............................................. 15
Operation................................................... 16
Typographical Conventions...................................... 16
Start-Up................................................................... 16
Start-Up: SHDN Pin............................................. 16
Start-Up: SWEN Pin............................................. 16
Start-Up: Soft-Start of Switching Regulator........ 17
Control Overview..................................................... 17
Power Switch Control ............................................. 18
Switch Control: Buck Region (VIN >> VOUT)........ 19
Switch Control: Buck-Boost (VIN ≅ VOUT).......... 19
Switch Control: Boost Region (VIN 165°C
TJUNCTION < 160°C AND SHDN > 1.221V AND VINCHIP > 2.5V AND
((INTVCC AND GATEVCC < 4.65V)
OR LDO33 < 3.04V)
CHIP OFF
SWITCHER OFF 1
• SWITCHER OFF
• LDOs OFF
• SWEN PULLED LOW
• SWITCHER DISABLED
• INTVCC AND LDO33 OUTPUTS ENABLED
• SWEN AND SS PULLED LOW
(INTVCC AND GATEVCC > 4.81V) AND
LDO33 > 3.075V AND SWEN < 0.8V
SWITCHER OFF 2
• SWITCHER DISABLED
• INTVCC AND LDO33 OUTPUTS ENABLED
• SS PULLED LOW
(INTVCC AND GATEVCC > 4.81V) AND
LDO33 > 3.075V AND SWEN > 1.208V
INITIALIZE
• SS PULLED LOW
• VC FORCED TO COMMAND NEAR ZERO
CURRENT LIMIT
SS < 50mV
SOFT-START
• SS CHARGES UP
• WHEN SS > 0.2V ...
• SWITCHER ENABLED
• VC SOFT-START
• M1, M4 ON-TIME SOFT-START
SS > 1.8V
NORMAL MODE
• NORMAL OPERATION
8708 F02
Figure 2. Start-Up Sequence (All Values are Typical)
Start-Up: Soft-Start of Switching Regulator
In the INITIALIZE state, the SS (soft-start) pin is pulled
low to prepare for soft-starting the switching regulator.
After SS has been discharged to less than 50mV, the
SOFT-START state begins. In this state, as SS gradually
rises, the soft-start circuitry provides a gradual ramp of VC
and the inductor current in the appropriate direction (refer
to the VC vs SS Voltage graph in the Typical Performance
Characteristics section). This prevents abrupt surges
of inductor current and helps the output voltage ramp
smoothly into regulation. See the Switch Control: SoftStart section for information about the power switch control during soft-start.
During soft-start, an integrated 180k (typical) resistor pulls
SS up to 3.3V. The rising ramp rate of the SS pin voltage is set by this 180k resistor and the external capacitor
connected to this pin. When SS reaches 1.8V (typical),
the LT8708 exits soft-start and enters normal operation.
Typical values for the external soft-start capacitor range
from 220nF to 2μF. A minimum of 220nF is recommended.
CONTROL OVERVIEW
The LT8708 is a current mode controller that provides
an output voltage above, below or equal to the input voltage. It also provides bidirectional current monitoring and
regulation capabilities at both the input and the output.
The ADI proprietary control architecture employs an
inductor current-sensing resistor (RSENSE) in buck, boost
or buck-boost regions of operation. The inductor current
is controlled by the voltage on the VC pin, which is the
combined output of six internal error amplifiers EA1 – EA6.
Rev. B
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17
LT8708
OPERATION
Table 1. Error Amplifiers (EA1 − EA6)
AMPLIFIER NAME
PIN NAME
USED TO LIMIT OR REGULATE
EA1
IMON_INN
Negative IIN
EA2
IMON_ON
Negative IOUT
EA3
FBIN
VIN Voltage
EA4
FBOUT
VOUT Voltage
EA5
IMON_INP
Positive IIN
EA6
IMON_OP
Positive IOUT
The VC voltage typically has a min-max range of about
1.2V. The maximum VC voltage commands the most
positive inductor current and, thus, commands the most
power flow from VIN to VOUT. The minimum VC voltage
commands the most negative inductor current and, thus,
commands the most power flow from VOUT to VIN.
In a simple example of VOUT regulation, the FBOUT pin
receives the VOUT voltage feedback signal which is compared to the internal reference voltage using EA4. Low
VOUT voltage raises VC and, thus, more current flows into
VOUT. Conversely, higher VOUT reduces VC, thus, reducing
the current into VOUT or even drawing current and power
from VOUT.
Note that the current and power flow can also be restricted
to one direction, as needed, by the selected conduction
mode discussed in the Uni and Bidirectional Conduction
section.
As mentioned previously, the LT8708 also provides bidirectional current regulation capabilities at both the input
and the output. The VOUT current can be regulated or
limited in the forward and reverse directions (EA6 and
EA2, respectively). The VIN current can also be regulated
or limited in the forward direction and reverse directions
(EA5 and EA1, respectively).
In a common application, VOUT might be regulated using
EA4, while the remaining error amplifiers are monitoring
for excessive input or output current or an input undervoltage condition. In other applications, such as a battery
backup system, a battery connected to VOUT might be
18
charged with constant current (EA6) to a maximum voltage (EA4) and also reversed, at times, to supply power
back to VIN using the other error amplifiers to regulate VIN
and limit the maximum current.
POWER SWITCH CONTROL
The following discussions about the power switch control
assume that the LT8708 is operating in the continuous
conduction mode (see Bidirectional Conduction: CCM).
Other conduction modes have slight differences that are
discussed later in their respective Conduction sections.
Figure 3 shows a simplified diagram of how the four
power switches are connected to the inductor, VIN, VOUT
and ground. Figure 4 shows the regions of operation for
the LT8708 as a function of VOUT – VIN or switch duty
cycle (DC). The power switches are properly controlled
so the transfer between modes is continuous.
VIN
TG1
VOUT
M1
SW1
BG1
L
M4
TG2
SW2
M2
M3
BG2
RSENSE
8708 F03
Figure 3. Simplified Diagram of the Buck-Boost Switches
SWITCH
M3 DCMAX
BOOST REGION
VOUT -VIN
These amplifiers can be used to limit or regulate their
respective voltages or currents as shown in Table 1.
0
BUCK/BOOST REGION
BUCK REGION
M1 ON, M2 OFF
PWM M3, M4 SWITCHES
SWITCH
M3 DCMIN
SWITCH
M2 DCMIN
4-SWITCH PWM
M4 ON, M3 OFF
PWM M1, M2 SWITCHES
8708 F04
SWITCH
M2 DCMAX
Figure 4. Operating Regions vs VOUT − VIN
Rev. B
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LT8708
OPERATION
Switch Control: Buck Region (VIN >> VOUT)
When VIN is significantly higher than VOUT, the part will run
in the buck region. In this region M3 is always off and switch
M4 is always on. At the start of every cycle, synchronous
switch M2 is turned on first. Inductor current is sensed by
amplifier A4 while switch M2 is on. A slope compensation
ramp is added to the sensed voltage which is then compared
by A5 to a reference that is proportional to VC. After the
sensed inductor current falls below the reference, switch M2
is turned off and switch M1 is turned on for the remainder
of the cycle. Switches M1 and M2 will alternate, behaving
like a typical synchronous buck regulator. Figure 5 shows
the switching waveforms in the buck region.
CLOCK
SWITCH M1
SWITCH M2
OFF
SWITCH M3
ON
SWITCH M4
IL
8708 F05
When VIN is much higher than VOUT, the duty cycle of
switch M2 will increase, causing the M2 switch off-time
to decrease. The M2 switch off-time should be kept above
230ns (typical, see Electrical Characteristics) to maintain
steady-state operation and avoid duty cycle jitter, increased
output ripple and reduction in maximum output current.
Switch Control: Buck-Boost (VIN ≅ VOUT)
When VIN is close to VOUT, the controller operates in the
buck-boost region. Figure 6 shows typical waveforms
in this region. Every cycle, if the controller starts with
switches M2 and M4 turned on, the controller first operates as if in the buck region. When A5 trips, switch M2
is turned off and M1 is turned on until the middle of the
clock cycle. Next, switch M4 turns off and M3 turns on.
The LT8708 then operates as if in boost mode until A2
trips. Finally, switch M3 turns off and M4 turns on until
the end of the cycle.
If the controller starts with switches M1 and M3 turned
on, the controller first operates as if in the boost region.
When A2 trips, switch M3 is turned off and M4 is turned
on until the middle of the clock cycle. Next, switch M1
Figure 5. Buck Region (VIN >> VOUT)
The part will continue operating in the buck region over a
range of switch M2 duty cycles. The duty cycle of switch
M2 in the buck region is given by:
⎛ V ⎞
DC(M2,BUCK) = ⎜ 1– OUT ⎟ • 100%
VIN ⎠
⎝
SWITCH M1
SWITCH M2
SWITCH M3
SWITCH M4
As VIN and VOUT get closer to each other, the duty cycle
decreases until the minimum duty cycle of the converter,
in the buck region, reaches DC(ABSMIN,M2,BUCK). If the duty
cycle becomes lower than DC(ABSMIN,M2,BUCK) the part will
move to the buck-boost region.
CLOCK
DC(ABSMIN,M2,BUCK) ≅ tON(M2,MIN) • ƒ • 100%
IL
8708 F06a
6(a) Buck-Boost Region (VIN ≥ VOUT)
CLOCK
SWITCH M1
SWITCH M2
SWITCH M3
where:
tON(M2,MIN) is the minimum on-time for the synchronous switch in buck operation (200ns typical, see
Electrical Characteristics).
SWITCH M4
IL
ƒ is the switching frequency.
6(a) Buck-Boost Region (VIN ≤ VOUT)
8708 F06b
Figure 6. Buck-Boost Region
Rev. B
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19
LT8708
OPERATION
turns off and M2 turns on. The LT8708 then operates as
if in buck mode until A5 trips. Finally, switch M2 turns off
and M1 turns on until the end of the cycle.
CLOCK
SWITCH M3
When VOUT is significantly higher than VIN, the part operates in the boost region. In this region switch M1 is always
on and switch M2 is always off. At the start of every cycle,
switch M3 is turned on first. Inductor current is sensed by
amplifier A4 while switch M3 is on. A slope compensation
ramp is added to the sensed voltage which is then compared (A2) to a reference that is proportional to VC. After the
sensed inductor current rises above the reference voltage,
switch M3 is turned off and switch M4 is turned on for the
remainder of the cycle. Switches M3 and M4 will alternate,
behaving like a typical synchronous boost regulator.
SWITCH M4
⎛
V ⎞
DC(M3,BOOST) = ⎜ 1– IN ⎟ • 100%
⎝ VOUT ⎠
As VIN and VOUT get closer to each other, the duty cycle
decreases until the minimum duty cycle of the converter,
in the boost region, reaches DC(ABSMIN,M3,BOOST). If the
duty cycle becomes lower than DC(ABSMIN,M3,BOOST), the
part will move to the buck-boost region.
DC(ABSMIN,M3,BOOST) ≅ tON(M3,MIN) • ƒ • 100%
where:
tON(M3,MIN) is the minimum on-time for the main
switch in boost operation (200ns typical, see Electrical
Characteristics).
ƒ is the switching frequency.
When VOUT is much higher than VIN, the duty cycle of
switch M3 will increase, causing the M3 switch off-time
to decrease. The M3 switch off-time should be kept
above 230ns (typical, see Electrical Characteristics) to
maintain steady-state operation and avoid duty cycle jitter, increased output ripple and reduction in maximum
output current.
20
OFF
SWITCH M2
Switch Control: Boost Region (VIN > VOUT and the average
VOUT current is relatively high, but M4 is turned off to
block negative components of the AC inductor current.
The hybrid current mode (or HCM) is an alternative to
DCM that often reduces the maximum M4 (or M1) heating in such cases.
The hybrid current mode is a mixture of the light load
DCM operation and CCM operation, but only allows average current flow in one direction. As such, it is possible
to have the lower portions of the inductor current ripple
flow opposite to the selected direction while the average
current remains in the selected direction. The DIR pin is
used to select the desired forward (or FHCM) or reverse
(or RHCM) direction of average current flow.
HCM works by measuring the average forward VOUT current and the average reverse VIN current indicated on ICN
and IMON_INP, respectively. In FHCM (or RHCM), light
load is detected when ICN (or IMON_INP) is above 255mV
(typical). As a result, M4 (or M1) is turned off to prevent
average current flow opposite to the desired direction.
Heavy load is detected when ICN (or IMON_INP) is below
205mV (typical). As a result, CCM operation is enabled,
22
Unidirectional Conduction: Burst Mode
In Burst Mode operation, a VC voltage is set, with about
25mV of hysteresis, below which switching activity is
inhibited and above which switching activity is re-enabled.
A typical example is when, at light output currents, VOUT
rises and forces the VC pin below the threshold that temporarily inhibits switching. After VOUT drops slightly and
VC rises ~25mV, the switching is resumed, initially in the
buck-boost region. Burst Mode operation can increase
efficiency at light load currents by eliminating unnecessary switching activity and related power losses. In Burst
Mode operation, inductor current is only allowed in the
forward direction, regardless of the voltage on the DIR
pin. Burst Mode operation handles reverse-current detection similar to forward DCM. The M4 switch is turned off
when reverse inductor current is detected.
ERROR AMPLIFIERS
The six internal error amplifiers combine to drive VC according to Table 3, with the highest priority being at the top.
Table 3. Error Amp Priorities
TYPICAL CONDITION
if
IMON_INN > 1.21V or
IMON_ON > 1.21V
PURPOSE
then VC
Rises
to Reduce Positive IIN or
Increase Negative IIN
FBIN < 1.205V or
else
if
FBOUT > 1.207V or
to Reduce Negative IIN
to Reduce Negative IOUT
then VC
Falls
to Reduce Positive IOUT or
Increase Negative IOUT
IMON_INP > 1.209V or
to Reduce Positive IIN
IMON_OP > 1.209V
to Reduce Positive IOUT
else
VC Rises
Default
Note that certain error amplifiers are disabled under the
conditions shown in Table 4. A disabled error amplifier is
unable to affect VC and can be treated as if its associated
row is removed from Table 3.
Rev. B
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LT8708
OPERATION
VOUT: Regulation
Table 4. Automatically Disabled Error Amp Conditions
RDCM or RHCM
ERROR
AMP
VOUTLOMON VINHIMON
ASSERTED ASSERTED
PIN NAME
EA1
IMON_INN
4*
EA2
IMON_ON
4*
–
RVSOFF
1.5V
LDO33
< 0.9V
GND
VOUT REGULATION AND SENSING
Two pins, FBOUT and VOUTLOMON, are provided to sense
the VOUT voltage and issue the appropriate response to
the switching regulator.
VOUT is regulated, subject to the priorities in Table 3,
using a resistor divider between VOUT, FBOUT and ground.
FBOUT connects to the EA4 amplifier to drive VC. When
FBOUT rises near or above the EA4 reference (1.207V
typical), VC typically falls, commanding less current into
VOUT. The VOUT regulation voltage is given by the equation:
⎞
⎛ R
VOUT = 1.207V • ⎜ 1+ FBOUT1 ⎟
⎝ RFBOUT2 ⎠
where:
RFBOUT1 and RFBOUT2 are shown in Figure 1.
VOUT: Above Regulation
When the FBOUT pin and EA4 detect that VOUT is significantly above regulation, VC typically falls to its minimum
voltage. The LT8708 responds to the minimum VC voltage
according to the conduction mode enabled by MODE, DIR
and RVSOFF. If reverse conduction is not allowed (FDCM,
FHCM and Burst Mode operation) then switching will stop
and current won’t be delivered to VIN. If reverse conduction is allowed (CCM, RDCM and RHCM), then current
and power will flow from VOUT to VIN.
VOUT: Below Regulation and Undervoltage
When the FBOUT pin and EA4 detect VOUT is below regulation, VC typically rises. If forward conduction is enabled
(CCM, FDCM, FHCM and Burst mode), then current and
power will flow from VIN to VOUT.
A resistor divider between VOUT, VOUTLOMON and ground
is used to detect VOUT undervoltage. This function prevents reverse conduction, from VOUT to VIN, from drawing VOUT down lower than desired. When undervoltage is
detected by VOUTLOMON, RVSOFF is pulled low to disable reverse current and power. This function can be used
as a UVLO (undervoltage lockout), for example, when a
battery or supercapacitor, connected to VOUT, is supplying power to VIN. See the VINHIMON, VOUTLOMON and
RVSOFF section for more detailed information.
Rev. B
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23
LT8708
OPERATION
VIN REGULATION AND SENSING
Two pins, FBIN and VINHIMON, are provided to sense
the VIN voltage and issue the appropriate response to the
switching regulator.
VIN: Regulation
Subject to the priorities in Table 3, a resistor divider
between VIN, FBIN and ground can be used to regulate VIN
or serve an undervoltage lockout function. A few application examples are as follows:
• For VIN supplies with high source impedance (i.e., a
solar panel), VIN regulation can prevent the supply
voltage from dropping too low under high VOUT load
conditions.
• For VIN supplies with low source impedance (i.e., batteries and voltage supplies), the FBIN pin can be used
to stop switching activity when the VIN supply voltage
gets too low for proper system operation.
• VIN can also be regulated to a maximum voltage when
power is flowing from VOUT to VIN, such as in a battery
backup application.
When FBIN falls near or below the EA3 reference (1.205V
typical), the VC voltage falls and reduces current draw from
VIN. The VIN regulation voltage is given by the equation:
⎛ R
⎞
VIN = 1.205V • ⎜ 1+ FBIN1 ⎟
⎝ R
⎠
VIN: Below Regulation
When the FBIN pin and EA3 detect that VIN is significantly
below regulation, VC may fall to its minimum voltage. The
LT8708 responds to the minimum VC voltage according to
the conduction mode enabled by MODE, DIR and RVSOFF.
If only forward conduction is allowed (FDCM, FHCM and
Burst Mode operation) then switching will stop and current won’t be drawn from VOUT. If reverse conduction
is allowed (CCM, RDCM and RHCM), then current and
power will flow from VOUT to VIN.
UVLO functions are available to detect low VIN voltage.
These functions are discussed in the Voltage Lockouts
section.
CURRENT MONITORING AND LIMITING
Monitoring and Limiting: IMON Pins
FBIN2
where:
RFBIN1 and RFBIN2 are shown in Figure 1.
VIN: Above Regulation and Overvoltage
When the FBIN pin and EA3 detect VIN is above regulation,
VC is allowed to rise. If forward conduction is enabled
(CCM, FDCM, FHCM and Burst Mode operation), then current and power can flow from VIN to VOUT. If only reverse
conduction is enabled (RDCM and RHCM), then switching
will stop and current won’t be delivered into VIN. NOTE:
This above-regulation condition is required to allow forward conduction in an application.
24
A resistor divider between VIN, VINHIMON and ground
is used to detect VIN overvoltage. This function prevents
reverse conduction, from VOUT to VIN, from forcing VIN
higher than desired. When overvoltage is detected by
VINHIMON, RVSOFF is pulled low to disable reverse current and power. This function can be used as an OVLO
(over voltage lockout), for example, when a battery,
connected to VIN, is being charged from VOUT. See the
VINHIMON, VOUTLOMON and RVSOFF section for more
detailed information.
The LT8708 can monitor VIN and VOUT current (IIN and
IOUT) in both the positive and negative directions. The
CSPIN and CSNIN pins connect across a current sense
resistor to monitor IIN. External resistors are connected
from the IMON_INP and IMON_INN pins to GND. Their
resulting voltages are linearly proportional to positive IIN
and negative IIN respectively. See amplifier A3 in the Block
Diagram.
Similarly, an IOUT sense resistor, measured by CSPOUT
and CSNOUT, is used to monitor the VOUT current. External
resistors are connected from the IMON_OP and IMON_ON
pins to GND. Their resulting voltages are linearly proportional to positive IOUT and negative IOUT respectively. See
amplifier A1 in the Block Diagram.
Rev. B
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LT8708
OPERATION
The IIN and IOUT currents can be limited and regulated to
independent maximum positive values. When IIN causes
IMON_INP to rise near or above 1.209V (typical), EA5
typically causes VC to pull down and limit/regulate the
maximum current. Similarly, when IOUT causes IMON_
OP to rise near or above 1.209V (typical), EA6 typically
causes VC to pull down and limit/regulate the maximum
current. See Table 3 for error amplifier priorities.
The IIN and IOUT currents can also be limited and regulated to independent maximum negative values. When IIN
causes IMON_INN to rise near or above 1.21V (typical),
EA1 causes VC to pull up and limit the maximum current. Similarly, when IOUT causes IMON_ON to rise near
or above 1.21V (typical), EA2 causes VC to pull up and
limit the maximum current.
The IIN and IOUT current limits can provide many benefits.
They can be used to prevent overloading the input supply, allow for constant-current battery and supercapacitor
charging and can also serve as short-circuit protection
for constant-voltage regulators. See the Applications
Information section for more information about the current monitors and the current regulation and limiting.
Monitoring: ICP and ICN Pins
ICP and ICN are additional current monitor pins with output currents typically equal to those of IMON_OP and
IMON_ON, respectively.
In contrast to IMON_OP, ICP is internally pulled to ~0.6V
(typical) when VC is at its minimum and the conduction mode is either RDCM or RHCM. Also, in contrast to
IMON_ON, ICN is internally pulled to ~0.6V (typical) when
VC is at its maximum and the conduction mode is FDCM,
FHCM or Burst Mode operation.
Always connect a 17.4k resistor from ICP to ground and
from ICN to ground.
INTVCC/EXTVCC/GATEVCC/LDO33 POWER
Power for the top and bottom MOSFET drivers, the LDO33
pin and most internal circuitry is derived from the INTVCC
pin. INTVCC is regulated to 6.3V (typical) from either the
VINCHIP or EXTVCC pin. When the EXTVCC pin is left open
or tied to a voltage less than 6.2V (typical), an internal
low dropout regulator regulates INTVCC from VINCHIP. If
EXTVCC is taken above 6.4V (typical), another low dropout regulator will instead regulate INTVCC from EXTVCC.
Regulating INTVCC from EXTVCC allows the power to be
derived from the lowest supply voltage (highest efficiency) such as the LT8708 switching regulator output
(see INTVCC Regulators and EXTVCC Connection in the
Applications Information section for more details).
The GATEVCC pin directly powers the bottom MOSFET
drivers for switches M2 and M3 (see Figure 3). GATEVCC
should always be connected to INTVCC and should not be
powered or connected to any other source. Undervoltage
lockouts (UVLOs) monitoring INTVCC and GATEVCC disable the switching regulator when the pins are below
4.65V (typical).
The LDO33 pin can provide power to external components such as a microcontroller and/or can provide an
accurate bias voltage. Load current is limited to 17.25mA
(typical). As long as SHDN is high, the LDO33 output is
linearly regulated from the INTVCC pin and is not affected
by the INTVCC or GATEVCC UVLOs or the SWEN pin voltage. LDO33 remains regulated as long as SHDN is high
and sufficient voltage is available on INTVCC (typically >
4.0V). An undervoltage lockout monitoring LDO33 will
disable the switching regulator when LDO33 is below
3.04V (typical).
CLKOUT AND TEMPERATURE SENSING
The CLKOUT pin toggles at the LT8708’s internal clock
frequency whether the internal clock is synchronized to an
external source or is free-running based on the external RT
resistor. The CLKOUT pin can be used to synchronize other
devices to the LT8708’s switching frequency. Also, the
duty cycle of CLKOUT is proportional to the die temperature and can be used to monitor the die for thermal issues.
Rev. B
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25
LT8708
APPLICATIONS INFORMATION
This Applications Information section provides additional
details for setting up an application using the LT8708.
Topics include verifying the power flow conditions, selection of various external components including the switching MOSFETs, sensing resistors, filter capacitors, diodes
and the primary inductor among others. In addition, more
information is provided about voltage lockouts, current
monitoring, PCB layout and efficiency considerations.
This section wraps up with a design example to illustrate
the use of the various design equations presented here.
Table 6. Power Flow Verification Table
VERIFY THE POWER FLOW CONDITIONS
6(b)
Due to the configurability of the LT8708, a methodical
approach should be used to verify that power will flow,
as intended, under all relevant conditions. Table 6(a) and
6(b) are provided to help with this verification.
First, using Table 6(a), note which VIN and VOUT combinations are used in the application. For example, print a copy
of Table 6(a) and highlight or circle the applicable cells.
In Table 6(a):
• VIN_FBIN is the VIN voltage when FBIN is at 1.205V (typ)
• VOUT_FBOUT is the VOUT voltage when FBOUT is at
1.207V (typ)
• VIN_VINHIMON is the VIN voltage when VINHIMON at
1.207V (typ)
• VOUT_VOUTLOMON is the VOUT voltage when VOUTLOMON
is at 1.207V (typ)
If one or more of the FBIN, FBOUT, VINHIMON and
VOUTLOMON pins are tied to their inactive states (see
Table 5 and the VINHIMON, VOUTLOMON and RVSOFF
section), the associated row(s) or column(s) will not apply
to the application. For example, if FBIN is tied to LDO33 to
deactivate that pin function, then the VIN < VIN_FBIN row
of Table 6(a) is not applicable and no cells in that row
should be circled.
Next, for each cell identified in Table 6(a), check that the
operating condition described in Table 6(b) meets the
application’s requirements.
26
6(a)
VOUT/VIN
VOUT <
VOUT_VOUTLOMON
VOUT >
VOUT_VOUTLOMON &
VOUT < VOUT_FBOUT
VOUT >
VOUT_FBOUT
VIN < VIN_FBIN
No Power
Transfer
B
B
VIN > VIN_FBIN &
VIN <
VIN_VINHIMON
A
D
C
VIN >
VIN_VINHIMON
A
D
No Power
Transfer
MODE =
BURST
A
B
C
D
MODE = CCM
MODE =
DCM/HCM,
DIR = FWD
Power Flows from VIN to VOUT
No Power
Flow
Power Flows
from VOUT to VIN
No Power
Flow
Power Flows from VIN to VOUT
MODE = DCM/
HCM, DIR = RVS
No Power Flow
Power Flows
from VOUT to VIN
No Power Flow
Note: Table 6(a) and Table 6(b) assume that the RVSOFF
pin is not driven low by an external device.
See the Design Example section for a further example of
using these tables.
OPERATING FREQUENCY SELECTION
The LT8708 uses a constant frequency architecture
between 100kHz and 400kHz. The frequency can be set
using the internal oscillator or can be synchronized to an
external clock source. Selection of the switching frequency
is a trade-off between efficiency and component size. Low
frequency operation increases efficiency by reducing
MOSFET switching losses, but requires more inductance
and/or capacitance to maintain low output ripple voltage.
For high power applications, consider operating at lower
frequencies to minimize MOSFET heating from switching
losses. The switching frequency can be set by placing an
appropriate resistor from the RT pin to ground and tying
the SYNC pin low. The frequency can also be synchronized
to an external clock source driven into the SYNC pin. The
following sections provide more details.
Rev. B
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LT8708
APPLICATIONS INFORMATION
INTERNAL OSCILLATOR
CLKOUT PIN AND CLOCK SYNCHRONIZATION
The operating frequency of the LT8708 can be set using
the internal free-running oscillator. When the SYNC pin is
driven low (< 0.5V), the operating frequency is set by the
value of the resistor from the RT pin to ground. An internally
trimmed timing capacitor resides inside the IC. The oscillator frequency is calculated using the following formula:
The CLKOUT pin can drive up to 200pF and toggles at the
LT8708’s internal clock frequency whether the internal
clock is synchronized to the SYNC pin or is free-running
based on the external RT resistor. The rising edge of
CLKOUT is approximately 180° out of phase from the
internal clock’s rising edge or the SYNC pin’s rising edge if
it is toggling. CLKOUT starts toggling when the INITIALIZE
state is entered (see Figure 2).
⎛ 43,750 ⎞
fOSC = ⎜
kHz
⎝ RT + 1 ⎟⎠
where:
fOSC is in kHz and RT is in kΩ.
Conversely, RT (in kΩ) can be calculated from the desired
frequency (in kHz) using:
⎛ 43,750 ⎞
RT = ⎜
– 1⎟ kΩ
⎠
⎝ fOSC
SYNC PIN AND CLOCK SYNCHRONIZATION
The operating frequency of the LT8708 can be synchronized to an external clock source. To synchronize to the
external source, simply provide a digital clock signal into
the SYNC pin. The LT8708 will operate at the SYNC clock
frequency.
The duty cycle of the SYNC signal must be between 20%
and 80% for proper operation. Also, the frequency of the
SYNC signal must meet the following two criteria:
1. SYNC may not toggle outside the frequency range of
100kHz to 400kHz unless it is stopped low to enable
the free-running oscillator.
2. The SYNC pin frequency can always be higher than the
free-running oscillator set frequency, fOSC, but should
not be less than 25% below fOSC.
After SYNC begins toggling, it is recommended that
switching activity is stopped before the SYNC pin stops
toggling. Excess inductor current can result when SYNC
stops toggling as the LT8708 transitions from the external
SYNC clock source to the internal free-running oscillator
clock. Switching activity can be stopped by driving either
the SWEN or SHDN pin low.
The CLKOUT pin can be used to synchronize other devices
to the LT8708’s switching frequency. For example, the
CLKOUT pin can be tied to the SYNC pin of another LT8708
regulator which will operate approximately 180°out of
phase of the master LT8708. The frequency of the master
LT8708 can be set by the external RT resistor or by toggling
the SYNC pin. Note that the RT pin of the slave LT8708
must have a resistor tied to ground. In general, use the
same value RT resistor for all of the synchronized LT8708s.
The duty cycle of CLKOUT is proportional to the die temperature and can be used to monitor the die for thermal
issues. See the Junction Temperature Measurement section for more information.
INDUCTOR CURRENT SENSING AND SLOPE
COMPENSATION
The LT8708 operates using inductor current mode control. As described previously in the Power Switch Control
section, the LT8708 measures the peak of the inductor
current waveform in the boost region and the valley of the
inductor current waveform in the buck region. The inductor current is sensed across the RSENSE resistor with pins
CSP and CSN. During any given cycle, the peak (boost
region) or valley (buck region) of the inductor current is
controlled by the VC pin voltage.
Slope compensation provides stability in constant-frequency current mode control architectures by preventing
subharmonic oscillations at high duty cycles. This is accomplished internally by adding a compensating ramp to the
inductor current signal in the boost region, or subtracting
a ramp from the inductor current signal in the buck region.
At higher duty cycles, this results in a reduction of maximum inductor current in the boost region, and an increase
Rev. B
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27
LT8708
APPLICATIONS INFORMATION
of the maximum inductor current in the buck region. For
example, refer to the Maximum Inductor Current Sense
Voltage vs Duty Cycle graph in the Typical Performance
Characteristics section. The graph shows that, with VC at
its maximum voltage, the maximum peak inductor sense
voltage VRSENSE is between 47mV and 93mV depending
on the duty cycle. It also shows that the maximum inductor valley current in the buck region is 82mV increasing to
~130mV at higher duty cycles.
RSENSE SELECTION AND MAXIMUM CURRENT
The RSENSE resistance must be chosen properly to
achieve the desired amount of output current (forward
conduction) and input current (reverse conduction).
Too much resistance can limit the input/output current
below the application requirements. Start by determining the maximum allowed RSENSE resistances in the forward and reverse boost regions (RSENSE(MAX,BOOST,FWD)
and RSENSE(MAX,BOOST,RVS)). Follow this by finding the
maximum allowed RSENSE resistances in the forward
and reverse buck regions (RSENSE(MAX,BUCK,FWD) and
RSENSE(MAX,BUCK,RVS)). The selected RSENSE resistance
must be less than all four values.
For example, an application with a VIN range of 12V to
48V and VOUT set to 36V will have:
DC(MAX,M3,BOOST) ≅
⎛ 12V ⎞
⎜⎝ 1–
⎟ • 100% = 67%
36V ⎠
Referring to the Maximum Inductor Current Sense Voltage
graph in the Typical Performance Characteristics section,
the maximum RSENSE voltage at 67% duty cycle is 68mV,
or:
VRSENSE(MAX,BOOST,MAXDC) ≅ 68mV
for VIN = 12V, VOUT = 36V.
Next, the inductor ripple current in the boost region must
be determined. If the main inductor L is not known, the
maximum ripple current ∆IL(MAX,BOOST) can be estimated
by choosing ∆IL(MAX,BOOST) to be 30% to 50% of the
maximum peak inductor current in the boost region as
follows:
∆IL(MAX,BOOST) ≅
VOUT(MAX,BOOST) •IOUT(MAX,FWD)
RSENSE Selection: Max RSENSE in the Boost Region
Forward Conduction: In this section RSENSE(MAX,BOOST,FWD)
is calculated which is the maximum allowed RSENSE resistance when operating in the boost region with forward
conduction (VIN to VOUT). Skip this section and assume
RSENSE(MAX,BOOST,FWD) = ∞ when this operating condition
does not apply to the application.
In the boost region, the maximum positive VOUT current capability is the lowest when VIN is at its minimum and VOUT is at
its maximum. Therefore, RSENSE must be chosen to meet the
output current requirements under these conditions.
Start by finding the maximum boost region duty cycle
which occurs when VIN is minimum and VOUT is maximum using:
DC(MAX,M3,BOOST) ≅
VIN(MIN,BOOST) •
100%
– 0.5
%Ripple
A
where:
IOUT(MAX,FWD) is the maximum VOUT load current
required in the boost region.
%Ripple is 30% to 50%
For example, using VOUT(MAX) = 36V, VIN(MIN) = 12V,
IOUT(MAX,FWD) = 2A and %Ripple = 40% we can calculate:
IL(MAX,BOOST) ≅
36V • 2A
= 3A
100%
– 0.5
12V •
40%
⎛
VIN(MIN,BOOST) ⎞
⎟ • 100%
⎜ 1–
⎝ VOUT(MAX,BOOST) ⎠
28
Rev. B
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LT8708
APPLICATIONS INFORMATION
Otherwise, if the inductance is already known then
∆IL(MAX,BOOST,FWD) can be more accurately calculated as
follows:
∆IL(MAX,BOOST) =
⎛ DC(MAX,M3,BOOST) ⎞
⎜⎝
⎟⎠ • VIN(MIN,BOOST)
100%
ƒ •L
Before calculating the maximum RSENSE resistance allowed
during reverse operation, however, the inductor ripple current must be determined. If the main inductor L is not
known, the ripple current ∆IL(MIN,BOOST) can be estimated
by choosing ∆IL(MIN,BOOST) to be 10% of the minimum peak
inductor current in the boost region as follows:
A
where:
DC(MAX,M3,BOOST) is the maximum duty cycle percentage in the boost region as calculated previously
ƒ is the switching frequency
L is the inductance of the main inductor
After the maximum ripple current is known, the maximum
allowed RSENSE in the boost region while in forward conduction (VIN to VOUT) can be calculated as follows:
RSENSE(MAX,BOOST,FWD) =
2 • VRSENSE(MAX,BOOST,MAXDC) • VIN(MIN,BOOST)
duty cycle. See Switch Control: Boost Region (VIN VIN, and
∆V(OUT,BUCK,CERAM) ≅
⎛ V ⎞
VOUT • ⎜ 1– OUT ⎟
VIN ⎠
⎝
8 • L • ƒ2 • COUT–CERAM
V
for VOUT < VIN
Add enough ceramic caps to make sure ∆V(OUT,BOOST,CERAM)
and ∆V(OUT,BUCK,CERAM) are adequate for the application.
In a properly designed application, ∆V(OUT,BOOST,CERAM)
and ∆V(OUT,BUCK,CERAM) should be much smaller than
∆V(OUT,BOOST,BULK) and ∆V(OUT,BUCK,BULK), respectively.
SCHOTTKY DIODE (D1, D2, D3, D4) SELECTION
During forward conduction the Schottky diodes, D2 and
D4, shown in Figure 1, conduct during the dead time
between the conduction of the power MOSFET switches.
They help to prevent the body diodes of synchronous
switches M2 and M4 from turning on and storing charge.
For example, D4 can significantly reduce reverse-recovery
current when M3 turns on, which improves converter efficiency, reduces switch M3 power dissipation, and reduces
noise in the inductor current sense resistor (RSENSE).
Similarly, during reverse conduction, D1 and D3 conduct
during the dead time between the conduction of the power
MOSFET switches. In order for the diodes to be effective,
the inductance between them and the synchronous switch
must be as small as possible, mandating that these components be placed very close to the MOSFETs.
Rev. B
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LT8708
APPLICATIONS INFORMATION
For applications with high input or output voltages (typically >40V) avoid Schottky diodes with excessive reverseleakage currents, particularly at high temperatures. Some
ultra-low VF diodes will trade-off increased high temperature leakage current for reduced forward voltage. Diodes
D1 and D2 can have reverse voltages in excess of VIN and
D3 and D4 can have reverse voltages in excess of VOUT.
The combination of high reverse voltage and current can
lead to self-heating of the diode. Besides reducing efficiency, this can increase leakage current which increases
temperatures even further. Choose packages with lower
thermal resistance (θJA) to minimize self heating of the
diodes.
TOPSIDE MOSFET DRIVER SUPPLY
(CB1, DB1, CB2, DB2)
The top MOSFET drivers (TG1 and TG2) are driven digitally between their respective SW and BOOST pin voltages. The BOOST voltages are biased from floating
booststrap capacitors CB1 and CB2, which are normally
recharged through external silicon diodes DB1 and DB2
when the respective top MOSFET is turned off. The capacitors are charged to about 6.3V (about equal to GATEVCC)
forcing the VBOOST1-SW1 and VBOOST2-SW2 voltages to be
about 6.3V. The boost capacitors CB1 and CB2 need to
store about 100 times the gate charge required by the
top switches M1 and M4. In most applications, a 0.1μF
to 0.47μF, X5R or X7R dielectric capacitor is adequate.
The bypass capacitance from GATEVCC to GND should be
at least 10 times the CB1 or CB2 capacitance.
Top Driver: Boost Cap Charge Control Block
When the LT8708 operates exclusively in the boost or
buck region, M1 or M4 respectively may be “on” continuously. This prevents the respective bootstrap capacitor, CB1 or CB2, from being recharged through the silicon
diode, DB1 or DB2. The Boost Cap Charge Control block
(see Figure 1) keeps the appropriate bootstrap capacitor
charged in these cases. In the boost region, when M1 is
always on, current is drawn, as needed, from the CSNOUT
and/or BOOST2 pins to charge the CB1 capacitor. In the
buck region, when M4 is always on, current is drawn, as
needed, from the CSNIN and/or BOOST1 pins to charge
the CB2 capacitor. Because of this function, CSPIN and
CSNIN should be connected across RSENSE1 in series with
the M1 drain. Connect both pins to the M1 drain if they
are not being used. Also, CSPOUT and CSNOUT should
be connected across RSENSE2 in series with the M4 drain
or connect both to the M4 drain if not being used.
Top Driver: Boost Diodes DB1 and DB2
Although Schottky diodes have the benefit of low forward
voltage drops, they can exhibit high reverse current leakage and have the potential for thermal runaway under high
voltage and temperature conditions. Silicon diodes are
thus recommended for diodes DB1 and DB2. Make sure
that DB1 and DB2 have reverse breakdown voltage ratings
higher than VIN(MAX) and VOUT(MAX) and have less than
1mA of reverse-leakage current at the maximum operating
junction temperature. Make sure that the reverse-leakage
current at high operating temperatures and voltages won’t
cause thermal runaway of the diode.
In some cases it is recommended that up to 5Ω of resistance is placed in series with DB1 and DB2. The resistors
reduce surge currents in the diodes and can reduce ringing at the SW and BOOST pins of the IC. Since SW pin
ringing is highly dependent on PCB layout, SW pin edge
rates and the type of diodes used, careful measurements
directly at the SW pins of the IC are recommended. If
required, a single resistor can be placed between GATEVCC
and the common anodes of DB1 and DB2 (as in the front
page application) or by placing separate resistors between
the cathodes of each diode and the respective BOOST
pins. Excessive resistance in series with DB1 and DB2 can
reduce the BOOST-SW capacitor voltage when the M2 or
M3 on-times are very short and should be avoided.
VINHIMON, VOUTLOMON AND RVSOFF
During reverse conduction, current and power are drawn
from VOUT and delivered to VIN. This has the potential
to draw VOUT lower than desired or drive VIN higher
than desired, depending on the supplies and loads. The
VINHIMON and VOUTLOMON pins are used to detect
either of these conditions and disable reverse conduction by pulling RVSOFF low.
Rev. B
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39
LT8708
APPLICATIONS INFORMATION
The purpose of the VINHIMON and VOUTLOMON functions becomes clearer when considering the priorities of
the error amplifiers (see Table 3). A few important cases
should be considered.
1. VIN and VOUT are both above regulation: In this case
FBIN is greater than 1.205V while FBOUT is greater
than 1.207V. Normally this condition causes VC to
fall due to FBOUT being above 1.207V. The LT8708
responds by increasing the reverse current and power
being fed into VIN.
This can be an undesirable response, for example, if
VIN is connected to a battery being charged from VOUT.
The solution is to use VINHIMON to detect the maximum VIN and disable reverse conduction by pulling
RVSOFF low.
2. VIN and VOUT are both below regulation: In this case
FBIN is below 1.205V while FBOUT is below 1.207V.
Normally this condition causes VC to fall due to
FBIN being below 1.205V. The LT8708 responds by
increasing the reverse current and power being drawn
from VOUT.
This can be an undesirable response, for example, if
VOUT is connected to a battery or supercapacitor supplying power to VIN. The solution is to use VOUTLOMON
to detect the minimum VOUT and disable reverse conduction by pulling RVSOFF low.
If VINHIMON rises above its activation threshold or
VOUTLOMON falls below its activation threshold (see
Electrical Characteristics), the LT8708 will pull the
RVSOFF pin low and not allow M4 switch to turn on if
the inductor current is negative. In addition to the 24mV
(typical) voltage hysteresis, the VINHIMON pin will source
1μA (typical) current and the VOUTLOMON pin will sink
1μA (typical) current as current hysteresis.
There are two ways to configure the VINHIMON and
VOUTLOMON pins. Method (1) uses dedicated resistor
dividers for VINHIMON and VOUTLOMON respectively,
while method (2) uses common resistor dividers for
VINHIMON and FBIN as well as for VOUTLOMON and
FBOUT, allowing improved tracking with the FBOUT and
FBIN regulation voltages, respectively.
40
1. Connect a resistor divider between VIN, VINHIMON
and GND to configure the VIN overvoltage threshold. Connect a resistor divider between V OUT,
VOUTLOMON and GND to configure the V OUT undervoltage threshold. (see Figure 12). Use the following
equations to calculate the resistor values:
RHIMON1 =
RHIMON2 =
V
OVIN+
– 1.207
IFBDIV
1.207
IFBDIV
⎛ 1.207 – VHYSMON ⎞ ⎛ RHIMON1 • RHIMON2 ⎞
RHIMON3 = ⎜
⎟⎠ – ⎜⎝ R
⎟
IHYSMON
⎝
HIMON1 +RHIMON2 ⎠
⎞
⎛
VOVIN – • RHIMON2
–⎜
⎟
⎝ IHYSMON • (RHIMON1 +RHIMON2 ) ⎠
RLOMON1 =
RLOMON2 =
V
UVOUT –
– 1.207
IFBDIV
1.207
IFBDIV
• RLOMON2
V
⎞
⎛
UVOUT +
RLOMON3 = ⎜
⎟
⎝ IHYSMON • (RLOMON1 +RLOMON2 ) ⎠
⎞ ⎛ 1.207 + VHYSMON ⎞
⎛R
•R
– ⎜ LOMON1 LOMON2 ⎟ – ⎜
⎟⎠
IHYSMON
⎝ RLOMON1 +RLOMON2 ⎠ ⎝
where:
IFBDIV is the desired current through the resistor string.
50μA – 100μA is a good value.
VOVIN+ and VOVIN– are the rising and falling VIN overvoltage thresholds.
VUVOUT+ and VUVOUT– are the rising and falling VOUT
undervoltage thresholds.
RHIMON1-3 and RLOMON1-3 are shown in Figure 12.
VHYSMON is the VINHIMON and VOUTLOMON hysteresis voltage. Typical value is 24mV.
IHYSMON is the VINHIMON and VOUTLOMON hysteresis
current. Typical value is 1μA.
Rev. B
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LT8708
APPLICATIONS INFORMATION
Use the following equations to calculate the resistor
values:
VIN
RHIMON1
RHIMON3
LT8708
VINHIMON
RIN3 =
RHIMON2
V
OVIN
(a) Resistor Divider for VINHIMON
RIN1 = V
OVIN+
VOUT
RLOMON1
RLOMON3
RIN2 =
LT8708
8708 F12
(b) Resistor Divider for VOUTLOMON
Figure 12.
2. Connect a resistor divider between VIN, FBIN,
VINHIMON and GND to configure the VIN regulation
and overvoltage thresholds (see Figure 13). Connect
a resistor divider between VOUT, VOUTLOMON, FBOUT
and GND to configure the VOUT regulation and undervoltage thresholds (see Figure 14).
VIN
RIN1
VINHIMON
8708 F13
Figure 13. Single Divider for VINHIMON and FBIN
• RIN3
⎛ [(RIN1 + RIN2 ) •IHYSMON + V + – VOVIN – ] • 1.207 ⎞
OVIN
⎜
⎟
V + •IHYSMON
⎜⎝
⎟⎠
OVIN
⎞ ⎛ (V + – 1.207) • RIN3 ⎞
⎛V
– ⎜ HYSMON ⎟ – ⎜ OVIN
⎟
⎟⎠
V +
⎝ IHYSMON ⎠ ⎜⎝
OVIN
1.207
ROUT3 =
IFBDIV
⎛ 1
1 ⎞
ROUT1 = VOUT•ROUT3 • ⎜
–
⎟
⎜⎝ 1.207 V
⎟
–
UVOUT ⎠
(VOUT – V
V
UVOUT –
UVOUT –
)
• ROUT3
– – 1.207) • ROUT3 ⎞
⎞ ⎛ (V
⎛V
– ⎜ HYSMON ⎟ – ⎜ UVOUT
⎟
⎟⎠
V
⎝ IHYSMON ⎠ ⎜⎝
–
UVOUT
where:
VOUT
ROUT4
IFBDIV is the desired current through the resistor string.
50μA – 100μA is a good value.
VOUTLOMON
LT8708
VIN and VOUT are the desired regulation voltages.
FBOUT
ROUT3
VIN
⎛ (ROUT1 •IHYSMON + VUVOUT + – V
) • 1.207 ⎞
UVOUT –
⎜
⎟
•IHYSMON
V
⎜⎝
⎟⎠
–
UVOUT
LT8708
RIN3
ROUT2
OVIN+
ROUT4 =
FBIN
ROUT1
– VIN )
(V
ROUT2 =
RIN4
⎛ 1
1⎞
• RIN3 • ⎜
–
⎝ 1.207 VIN ⎟⎠
RIN4 =
VOUTLOMON
RLOMON2
RIN2
1.207 • VIN
+ •IFBDIV
VOVIN+ and VOVIN– are the rising and falling VIN overvoltage thresholds.
8708 F14
Figure 14. Single Divider for VOUTLOMON and FBOUT
Rev. B
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41
LT8708
APPLICATIONS INFORMATION
VUVOUT+ and VUVOUT– are the rising and falling VOUT
undervoltage thresholds.
RIN1-4 and ROUT1-4 are shown in Figure 13 and Figure 14.
VHYSMON is the VINHIMON and VOUTLOMON hysteresis voltage. Typical value is 24mV.
RSENSE1
FROM
SYSTEM
VIN
TO
CONTROLLER
VIN
IIN
CSPIN
LT8708
+
CSNIN
Ω–
gm = 1m
– A3 +
IHYSMON is the VINHIMON and VOUTLOMON hysteresis
current. Typical value is 1μA.
1.21V
20μA
+
EA1
–
If unused, tie VINHIMON to GND and/or VOUTLOMON
to LDO33.
1.209V
20μA
Note: after the resistor values are selected, make sure
to check that the FBIN and VOUTLOMON voltages are
below their ABSMAX values when VIN and VOUT are at
their maximum, respectively.
+
EA5
–
IMON_INN
VC
IMON_INP
8708 F15
RIMON_INN
CIMON_INN
RIMON_INP
CIMON_INP
IIN AND IOUT CURRENT MONITORING AND LIMITING
The LT8708 has independent IIN and IOUT current monitors that can monitor and limit the respective currents
in both positive and negative directions. Figure 15 and
Figure 16 illustrate the operation of the current monitor
circuits.
The remaining discussion refers to the IIN current monitor
circuit of Figure 15. All discussion and equations are also
applicable to the IOUT current monitor circuit, substituting
pin and device names as appropriate.
Figure 15. IIN Current Monitor and Limit
RSENSE2
FROM
CONTROLLER
VOUT
TO
SYSTEM
VOUT
IOUT
CSPOUT CSNOUT
LT8708
+
Ω–
gm = 1m
A1
+
–
1.21V
20μA
Current Monitoring: The IMON_INP and IMON_INN pins
can be used to monitor IIN in the forward and reverse
directions, respectively. When configured as shown in
Figure 15, the IMON_INP and IMON_INN voltages are
proportional to IIN. VIMON_INP is proportional to the positive IIN current, increasing as IIN becomes more positive. VIMON_INN is proportional to the negative IIN current,
increasing as IIN becomes more negative.
+
EA2
–
20μA
1.209V
+
EA6
–
IMON_ON
VC
IMON_OP
8708 F16
RIMON_ON
CIMON_ON
RIMON_OP
CIMON_OP
Figure 16. IOUT Current Monitor and Limit
42
Rev. B
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LT8708
APPLICATIONS INFORMATION
Transconductance amplifier A3 performs this monitoring
function. A3 converts the current sense voltage, VCSPINCSNIN, into two currents:
+VCSPIN-CSNIN • 1m
A
V
and
–VCSPIN-CSNIN • 1m
Current Limiting: As shown in Figure 15, IMON_INP voltage that exceeds 1.209V (typical) causes VC to reduce,
thus limiting the forward IIN and inductor currents.
IMON_INN voltage that exceeds 1.21V (typical) causes
VC to increase, thus limiting the reverse IIN and inductor
currents (see the Error Amplifiers section).
The forward IIN limit, I(IN,FWD,LIMIT), can be set as needed
by choosing the appropriate RSENSE1 and RIMON_INP resistors using the following equation:
A
V
RIMON_INP =
These currents are added to 20μA offsets and then forced
into RIMON_INP and RIMON_INN, respectively.
Due to the 20μA offset currents, VIMON_INP and VIMON_
INN are not 0V when IIN is 0A. Instead, VIMON_INP(0) =
20μA•RIMON_INP Volts and VIMON_INN(0) = 20μA•RIMON_INN
Volts (typical) when IIN = 0 Amps. As IIN becomes increasingly negative, VIMON_INP reduces below VIMON_INP(0) until
VIMON_INP = 0V. Similarly, as IIN becomes increasingly
positive, VIMON_INN reduces below VIMON_INN(0) until
VIMON_INN = 0V. IMON_INP and IMON_INN will not be driven
below ground as their output currents can only be positive or zero.
The complete transfer functions for IMON_INP and
IMON_INN are given in the equations below:
VIMON_INP
For example, if RSENSE1 is chosen to be 12.5mΩ and the
desired forward IIN current limit is 4A then:
RIMON_INP =
1.209
4A • 1m
The differential voltage VCSPIN-CSNIN should remain
between –100mV and 100mV due to the limited current
that can be driven out of IMON_INP and IMON_INN. If the
instantaneous VCSPIN-CSNIN exceeds these limits but the
average VCSPIN-CSNIN is within the limits, consider including the current sense filter described in the next section.
In addition, IMON_INP and IMON_INN should be filtered
with capacitors CIMON_INP and CIMON_INN due to IIN ripple
and discontinuities that can occur in various regions of
operation. A few nF of capacitance is usually sufficient.
A
• 12.5mΩ + 20µA
V
= 17.3kΩ
Similarly, the reverse IIN limit, I(IN,RVS,LIMIT), can be set as
needed by choosing the appropriate RSENSE1 and RIMON_
INN resistors using the following equation:
RIMON_INN =
⎛ A
⎞
= ⎜ 1m • RSENSE1 •IIN + 20µA ⎟ • RIMON_INP
⎝ V
⎠
A
⎛
⎞
VIMON_INN = ⎜ –1m • RSENSE1 •IIN + 20µA ⎟ • RIMON_INN
⎝
⎠
V
1.209
Ω
A
I(IN,FWD,LIMIT) • 1m • RSENSE1 + 20µA
V
1.21
Ω
A
I(IN,RVS,LIMIT) • 1m • RSENSE1 + 20µA
V
CIMON_INP and CIMON_INN capacitors of at least a few nF
are necessary to maintain loop stability when IMON_INP
and IMON_INN, respectively, are used to operate the
LT8708 at constant current limit.
Review the Electrical Characteristics and the IMON Output
Currents graph in the Typical Performance Characteristics
section to understand the operational limits of the IMON_
OP, IMON_ON, IMON_INP and IMON_INN currents.
External currents can be summed to the IMON pins to
adjust IIN and/or IOUT limit in both directions while switching. When the IMON_OP and IMON_ON pins are used in
Rev. B
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43
LT8708
APPLICATIONS INFORMATION
this way, ICP and ICN can be used to monitor the IOUT
current in the forward and reverse directions respectively
(see the Current Monitoring, Regulation and Limiting: ICP
and ICN Pins section).
Current Sense Filter: The + and – outputs of current sense
amplifiers A1 and A3 are rated to provide a range of –20μA
to +100μA. For example, IMON_INP, which primarily
reports forward IIN current, may not provide the expected
output current when VCSPIN-CSNIN exceeds 100mV. In addition, the IMON_INP pin will not provide the expected output
current when VCSPIN-CSNIN is below –20mV.
Currents that flow through the current sense resistors
(RSENSE1, RSENSE2 in Figure 17) are often discontinuous and can contain significant AC content during each
switching cycle. One example is the forward IIN in the
buck region. If the IIN current presents an average differential (VCSPIN-CSNIN) less than 100mV, but contains
AC peaks exceeding 100mV, the IMON_INP current may
clip. To prevent clipping, the current sense filter shown
in Figure 17, can be added. The filter will reduce the peak
differential (VCSPIN-CSNIN) to 6.4V). This
is the normal connection for the regulator and usually
provides the highest efficiency.
3. EXTVCC connected to an external supply. If an external
supply is available greater than 6.4V (typical) it may be
used to power EXTVCC.
Powering INTVCC from EXTVCC can also provide enough
gate drive when VINCHIP drops as low as 2.8V. This allows
the part to operate with a reduced VINCHIP voltage after
VOUT gets into regulation.
The maximum current drawn through the INTVCC LDO
occurs under the following conditions:
1. Large (capacitive) MOSFETs are being driven at high
frequencies.
2. VIN and/or VOUT is high, thus requiring more charge to
turn the MOSFET gates on and off.
3. The LDO33 pin output current is high.
4. In some applications, LDO current draw is maximum when
the part is operating in the buck-boost region where VIN is
close to VOUT since all four MOSFETs are switching.
To check for overheating find the operating conditions that
consume the most power in the LT8708 (PLT8708). This
will often be under the same conditions just listed that
maximize LDO current. Under these conditions monitor
the CLKOUT pin duty cycle to measure the approximate die
temperature. See the Junction Temperature Measurement
section for more information.
LDO33 REGULATOR
The LT8708 includes a low dropout regulator (LDO) to
regulate the LDO33 pin to 3.3V. This pin can be used to
power external circuitry such as a microcontroller or other
desired peripherals. The input supply for the LDO33 pin
regulator is INTVCC. Therefore INTVCC must have sufficient
Rev. B
For more information www.analog.com
45
LT8708
APPLICATIONS INFORMATION
voltage, typically > 4.0V, to properly regulate LDO33. The
LDO33 and INTVCC regulators are enabled by the SHDN
pin and are not affected by SWEN. The LDO33 pin regulator has overcurrent protection circuitry that typically
limits the output current to 17.25mA. An undervoltage
lockout monitors LDO33 and disables switching activity
when LDO33 falls below 3.04V (typical). LDO33 should
be bypassed locally with 0.1μF or more.
VOLTAGE LOCKOUTS
The LT8708 contains several voltage detectors to make
sure the chip is under proper operating conditions. Table 8
summarizes the pins that are monitored and also indicates
the state that the LT8708 will enter if an under or over
voltage condition is detected.
Table 8. Voltage Lockout Conditions
PIN(S)
APPROXIMATE
VOLTAGE
CHIP STATE
CONDITION
(Figure 2)
VINCHIP
VOUT_FBOUT (12V)
C – power is transferred from VOUT to VIN
=
• When VIN > VIN_FBIN (12V) and VOUT < VOUT_FBOUT (12V)
D – power is transferred from VIN to VOUT
The results above are as expected for this design example.
∆IL(MIN,BOOST) ≅
RT Selection: Choose the RT resistor for the free-running
oscillator frequency using:
⎛ 43,750 ⎞
⎛ 43,750 ⎞
RT = ⎜
– 1⎟ kΩ = ⎜
– 1⎟ = 290.7kΩ
⎝ 150
⎠
f
⎠
⎝ OSC
=
We will choose 294k for RT resistor.
RSENSE Selection: Start by calculating the maximum and
minimum duty cycle in the boost region:
A
12V • 5A
= 3.75A
100%
– 0.5
8V •
40%
IIN(MAX,RVS)
A
100%
– 0.5
10%
3A
= 0.32A
100%
– 0.5
10%
Now calculate the maximum RSENSE values in the boost
region:
DC(MAX,M3,BOOST) ≅
⎛
VIN(MIN,BOOST) ⎞
⎟ • 100%
⎜ 1–
⎝ VOUT(MAX,BOOST) ⎠
8V ⎞
⎛
= ⎜ 1–
• 100% = 33%
⎝ 12V ⎟⎠
DC(ABSMIN,M3,BOOST) ≅ tON(M3,MIN) • ƒ • 100%
= 200ns • 150kHz • 100% = 3%
Next, from the Maximum Inductor Current Sense
Voltage vs Duty Cycle graph in the Typical Performance
Characteristics section:
VRSENSE(MAX,BOOST,MAXDC) ≅ 83mV
50
Rev. B
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LT8708
APPLICATIONS INFORMATION
Next, estimate the inductor current ripples at maximum
and minimum buck duty cycles:
RSENSE(MAX,BOOST,FWD) =
(
2 • VRSENSE(MAX,BOOST,MAXDC) • VIN(MIN,BOOST)
) (
2 • IOUT(MAX,FWD) • VOUT(MAX,BOOST) + ∆IL(MAX,BOOST) • VIN(MIN,BOOST)
=
)
∆IL(MIN,BUCK) ≅
Ω
IOUT(MAX,FWD)
5A
A=
100%
100%
– 0.5
– 0.5
10%
10%
= 0.526A
2 • 83mV • 8V
= 8.85mΩ
(2 • 5A • 12V ) + ( 3.75A • 8V )
RSENSE(MAX,BOOST,RVS) =
2• | VRSENSE(MIN,BOOST,MINDC) |
(2• |IIN(MAX,RVS) |) – ∆IL(MIN,BOOST)
Ω
∆IL(MAX,BUCK) ≅
2 • 93mV
= 32.7mΩ
=
(2 • 3A ) – 0.32A
VIN(MAX,BUCK) •IIN(MAX,RVS)
VOUT(MIN,BUCK) •
Next, calculate the maximum and minimum duty cycle in
the buck region:
DC(ABSMIN,M2,BUCK) ≅ tON(M2,MIN) • ƒ • 100%
=
= 200ns • 150kHz • 100% = 3%
A
25V • 3A
= 3.125A
100%
– 0.5
12V •
40%
Now calculate the maximum RSENSE values in the buck
region:
DC(MAX,M2,BUCK) ≅
⎛ VOUT(MIN,BUCK) ⎞
⎟ • 100%
⎜ 1–
VIN(MAX,BUCK) ⎠
⎝
RSENSE(MAX,BUCK,FWD) =
2 • VRSENSE(MAX,BUCK,MINDC)
⎛ 12V ⎞
= ⎜ 1–
• 100% = 52%
⎝ 25V ⎟⎠
(2 •IOUT(MAX,FWD) ) – ∆IL(MIN,BUCK)
=
Next, from the Maximum Inductor Current Sense
Voltage vs Duty Cycle graph in the Typical Performance
Characteristics section:
VRSENSE(MAX,BUCK,MINDC) ≅ 100mV
100%
– 0.5
%Ripple
Ω
2 • 100mV
= 21.1mΩ
( 2 • 5A ) – 0.53A
RSENSE(MAX,BUCK,RVS) =
(
=
2• | VRSENSE(MIN,BUCK,MAXDC) | •VOUT(MIN,BUCK)
) (
2• | IIN(MAX,RVS) | •VIN(MAX,BUCK) + ∆IL(MAX,BUCK) • VOUT(MIN,BUCK)
2 • 82mV • 12V
( 2 • 3A • 25V ) + ( 3.125A • 12V )
)
Ω
= 10.5mΩ
VRSENSE(MIN,BUCK,MAXDC) ≅ 82mV
Rev. B
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51
LT8708
APPLICATIONS INFORMATION
Choose the smallest calculated RSENSE and add an additional 30% margin, choose RSENSE to be 10.5mΩ/1.3 =
8.1mΩ
Inductor Selection: With RSENSE known, we can now
determine the minimum inductor value that will provide
adequate load current in the boost region using:
L(MIN1,BOOST) ≅
⎛ DC
⎞
VIN(MIN,BOOST) • ⎜ (MAX,M3,BOOST) ⎟
100%
⎝
⎠
⎛ VRSENSE(MAX,BOOST,MAXDC) IOUT(MAX,BOOST) • VOUT(MAX,BOOST) ⎞
⎟⎟
2 • ƒ • ⎜⎜
–
RSENSE
VIN(MIN,BOOST)
⎝
⎠
⎛ 33% ⎞
8V • ⎜
⎟
⎝ 100% ⎠
=
= 3.2µH
⎛ 83mV 5A •12V ⎞
–
2 •150kHz • ⎜
⎟
⎝ 8.1mΩ
8V ⎠
H
To avoid subharmonic oscillations in the inductor current,
choose the minimum inductance according to:
L(MIN2,BOOST) =
⎡
⎛V
⎞⎤
•V
⎢VOUT(MAX,BOOST) – ⎜⎜ IN(MIN,BOOST) OUT(MAX,BOOST) ⎟⎟⎥ •RSENSE
⎢⎣
⎝ VOUT(MAX,BOOST) – VIN(MIN,BOOST) ⎠⎥⎦
0.08 • ƒ
H
⎡
⎛ 8V •12V ⎞⎤
⎟⎥ • 8.1mΩ
⎢12V – ⎜
⎝ 12V – 8V ⎠⎦
⎣
=
= –8.1µH
0.08 •150kHz
L(MIN1,BUCK) =
Select M1 and M2: With 25V maximum input voltage,
MOSFETs with a rating of at least 30V are used. As we do
not yet know the actual thermal resistance (circuit board
design and airflow have a major impact) we assume that
the MOSFET thermal resistance from junction to ambient
is 50°C/W.
If we design for a maximum junction temperature, TJ(MAX)
= 125°C, the maximum allowable power dissipation
can be calculated. First, calculate the maximum power
dissipation:
TJ(MAX) – TA(MAX)
PD(MAX) =
PD(MAX) =
RTH(JA)
125°C – 60°C
= 1.3W
°C
50
W
Since maximum I2R power in the boost region with positive inductor current happens when VIN is minimum, we
can determine the maximum allowable RDS(ON) for the
boost region using (see Table 7):
PM1= PI2R ≅
2
⎡⎛ V
⎞
⎢⎜ OUT •IOUT(MAX,FWD) ⎟ • RDS(ON) • ρτ
⎠
⎢⎝ VIN
⎣
⎡
⎛
⎞⎤
VOUT(MAX,BUCK)
⎢VIN(MAX,BUCK) ⎜1–
⎟⎟⎥ •RSENSE
⎜ V
⎢⎣
IN(MAX,BUCK) – VOUT(MIN,BUCK) ⎠⎥⎦
⎝
H
0.08 • ƒ
⎡
⎛
12V ⎞⎤
= ⎢25V • ⎜1–
⎟⎥ • 8.1mΩ
⎝ 25V – 12V ⎠⎦
⎣
=1.3µH
0.08 •150kHz
The inductance must be higher than all of the minimum
values calculated above. We will choose a 10μH standard
value inductor for improved margin.
MOSFET Selection: The MOSFETs are selected based on
voltage rating, COSS and RDS(ON) value. It is important
to ensure that the part is specified for operation with
the available gate voltage amplitude. In this case, the
52
amplitude is 6.3V and MOSFETs with an RDS(ON) value
specified at VGS = 4.5V can be used.
⎤
⎥ W
⎥
⎦
and therefore
RDS(ON) <
13W
12V
2
• 5A •1.5
8V
= 15.4mΩ
The Fairchild FDMS7672 meets the specifications with a
maximum RDS(ON) of ~6.9mΩ at VGS = 4.5V (~10mΩ at
125°C).
The maximum dissipation in M2 occurs at maximum VIN
voltage when the circuit is operating in the buck region
Rev. B
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LT8708
APPLICATIONS INFORMATION
in the reverse direction. Using the 6.9mΩ Fairchild
FDMS7672, the dissipation is (see Table 7):
PM2 ≅ PI2R +PSWITCHING
⎛V –V
⎞
≅ ⎜ IN OUT •IOUT(MAX,RVS)2 • RDS(ON) • ρτ ⎟
VIN
⎝
⎠
(
+ VIN •IOUT(MAX,RVS) • ƒ • tRF1
+
(
0.5 • COSS(M1+M2) • VIN2
)
The maximum switching power of 0.38W can be reduced
by choosing a slower switching frequency. Since this calculation is approximate, measure the actual rise and fall
times on the PCB to obtain a better power estimate.
Select M3 and M4: With 12V output voltage we need
MOSFETs with 20V or higher rating.
The highest dissipation of M3 and M4 occurs in the boost
region. For switch M3, the max dissipation occurs when
the IOUT is highest in the forward direction and VIN is at
the minimum 8V (see Table 7):
)
•ƒ W
P(M2,MAX) ≅
⎛ 25V – 12V
⎞
2
• ( 3A ) • 6.9mΩ • 1.5⎟
⎜⎝
⎠
25V
PM3 ≅ PI2R +PSWITCHING
+ ( 25V • 3A • 150kHz • 20ns )
⎛ (V
⎞
– V )• V
≅ ⎜ OUT IN2 OUT •IOUT(MAX,FWD)2 • RDS(ON) • ρτ ⎟
VIN
⎝
⎠
+ [(0.5 • (685P + 685P) • 25V • 25V • 150k)]
= 0.13W + 0.225W + 0.064W = 0.419W
⎛
t ⎞
+ ⎜ VOUT2 •IOUT(MAX,FWD) • ƒ • RF2 ⎟
VIN ⎠
⎝
To check the power dissipation in the buck region with
VIN maximum and VOUT minimum, choose the equation
from Table 7 with positive inductor current in buck mode
which yields:
PM1 ≅ PI2R +PSWITCHING
(
For switch M4, the max dissipation occurs when the IIN is
highest in the reverse direction and VIN is highest in the
boost region (see Table 7):
PM4 ≅ PI2R +PSWITCHING
2
⎡⎛ V
⎤
⎞
OUT
≅ ⎢⎜
•IOUT(MAX,FWD) ⎟ • RDS(ON) • ρτ ⎥
⎠
⎢⎝ VIN
⎥
⎣
⎦
(
+ VIN •IOUT(MAX,FWD) • ƒ • tRF1
(
)
⎞
⎛ V
≅ ⎜ IN •IIN(MAX,RVS)2 • RDS(ON) • ρτ ⎟
⎠
⎝ VOUT
)
(
+ VOUT •IIN(MAX,RVS) • ƒ • tRF2
+ 0.5 • COSS(M1+M2) • VIN2 • ƒ W
P(M1,MAX) ≅
2
⎡⎛ 12V
⎤
⎞
• 5A ⎟ • 6.9mΩ • 1.5 ⎥
⎢⎜
⎠
⎢⎣⎝ 25V
⎥⎦
+ ( 25V • 5A • 150k • 20ns )
(
)
)
+ 0.5 • COSS(M3+M4) • VOUT2 • ƒ W
and
VIN(MAX,BOOST)
+ [(0.5 • (685P + 685P) • 25V • 25V • 150k)]
= 0.06W + 0.38W + 0.064W = 0.504W
)
+ 0.5 • COSS(M3+M4) • VOUT2 • ƒ W
VOUT(MAX,BOOST)
= 1– DC(ABSMIN,M3,BOOST)
therefore,
Rev. B
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53
LT8708
APPLICATIONS INFORMATION
PM4 ≅ PI2R +PSWITCHING
= ⎡(1– DC(ABSMIN,M3,BOOST) ) •IIN(MAX,RVS)2 • RDS(ON) • ρτ ⎤
⎣
⎦
(
+ VOUT •IIN(MAX,RVS) • ƒ • tRF2
(
2
)
VIN Voltage: Input voltage is 12V. Select RFBIN2 as 20k.
RFBIN1 is:
)
⎛ V
⎞
RFBIN1 = ⎜ IN – 1⎟ • RFBIN2
⎝ 1.207V ⎠
+ 0.5 • COSS(M3+M4) • VOUT • ƒ W
Select RFBIN1 as 178k. Both RFBIN1 and RFBIN2 should
have a tolerance of no more than 1%.
The Fairchild FDMS7672 can also be used for M3 and M4.
Assuming 20ns rise and fall times, the calculated power
loss is then 0.48W for M3 and 0.21W for M4.
Capacitors: A low ESR (5mΩ) capacitor network with
30μF ceramic capacitors for CIN is selected. In this mode,
the maximum ripple is:
Select RSENSE2, R IMON_OP and R IMON_ON: The
IOUT(MAX,FWD) = 5A and IIN(MAX,RVS) = 3A, with a 20%margin, the IOUT current limit is set to 6A in the forward and
the IIN current limit is set to 3.6A in the reverse directions,
respectively.
∆V(BUCK,CAP) ≅
IOUT(MAX,FWD) •
⎛
⎞⎞
⎛
– VOUT
⎜ 1– exp ⎜ V • ƒ • ESR
⎟⎟
⎝ IN
⎝
CERAM • CIN–CERAM ⎠ ⎠
Choose RIMON_OP to be 17.4k, so that the VCSPOUT-CSNOUT
limit becomes 50mV, and the RSENSE2 is calculated to be:
RSENSE2 =
≅ 5A •
50mV
≅ 8mΩ
6A
Using the equation given in the IIN and IOUT Current
Monitoring and Limiting section, RIMON_ON is calculated
to be:
1.21
Ω
A
I(OUT,RVS,LIMIT) • 1m • RSENSE2 + 20µA
V
1.21
=
= 24.9kΩ
A
3.6A • 1m • 8mΩ + 20µA
V
RIMON_ON =
= 12.5mV
Having 5mΩ of ESR with 66μF ceramic capacitor for the
COUT network sets the maximum output voltage ripple at:
∆V(Boost,CAP) ≅
IOUT(MAX,FWD) •ESRCERAM •
⎛
⎞⎞
⎛
VIN – VOUT
⎟
⎜ 1– exp ⎜ V
⎝ OUT • ƒ • ESRCERAM • COUT–CERAM ⎟⎠ ⎠
⎝
≅ 5A • 5mΩ
⎛
⎛
⎞⎞
8V –12V
• ⎜ 1– exp ⎜
⎝ 12V • 150kHz • 5mΩ • 66µF ⎟⎠ ⎟⎠
⎝
⎛ V
⎞
RFBOUT1 = ⎜ OUT – 1⎟ • RFBOUT2
⎝ 1.207V ⎠
Select RFBOUT1 as 178k. Both RFBOUT1 and RFBOUT2 should
have a tolerance of no more than 1%.
54
12V
• 5mΩ
24V
⎛
⎛
⎞⎞
–12V
• ⎜ 1– exp ⎜
⎝ 24V • 150kHz • 5mΩ • 30µF ⎟⎠ ⎟⎠
⎝
VOUT Voltage: VOUT voltage is 12V. Select RFBOUT2 as
20k. RFBOUT1 is:
VOUT
•ESRCERAM •
VIN
= 25mV
Rev. B
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–
+
VBAT1
10V
TO 16V
CIN3
×2
100k
665k
*
XOR
M5
100Ω
M7
12.1k
1μF
CIN1
27.4k
93.1k
220pF
M6
100k
LD033
68.1k
+
IIN
2mΩ
For more information www.analog.com
–
+
12.1k
FBIN
POWER FLOW
PREVENT
DISCHARGING
VBAT1 BELOW 10.5V
2mΩ
93.1k
DIR
CSPIN
VINCHIP
SHDN
FBIN
VINHIMON
4.7μF
0.22μF
1Ω
CHARGE
VBAT2 TO
14.5V
FBOUT
LIMIT VBAT2
CHARGING
CURRENT TO 15A
2mΩ
VC
680pF
10k
10nF
RT
365k
LT8708
1nF
10Ω
1nF
10Ω
12.1k
133k
8708 TA03b
–
+
VBAT2
10V
TO 16V
2mΩ 1Ω 0.22μF
TO DIODE
DB2
1μF
RVS (0V)
SS
47nF
100Ω
COUT1
4.7nF
23.7k
2mΩ
100k
17.4k
17.4k
100nF
COUT2
4.7nF
4.7nF
4.7μF
20k
154k
17.4k
17.4k
100k
681k
22nF
100k
LD033
VBAT1
10V
TO 16V
–
+
4.7nF
DB1
DB2
3.3Ω
2mΩ
20k
154k
TO
TO
BOOST1 BOOST2
23.7k
4.7μF
CHARGE
VOUTLOMON 100k
VBAT1 TO
PREVENT
14.6V
12.1k
DISCHARGING
VBAT2 BELOW
10.5V
27.4k FBIN
93.1k
LIMIT VBAT1
CHARGING
CURRENT TO 15A
2mΩ
POWER FLOW
Reverse Operation (DIR = 0V)
*SEE UNI AND BIDIRECTIONAL CONDUCTION SECTION FOR MORE DETAILS.
120kHz
8708 TA03a
GATEVCC
IMON_OP
IMON_ON
ICN
ICP
IMON_INP
IMON_INN
SYNC CLKOUT
CSNOUT
EXTVCC
VOUTLOMON
FBOUT
INTVCC
22nF
1Ω
M4
GND BG2 SW2 BOOST2 TG2
CSPOUT
M3
L1
3.3μH
CIN3, COUT3: 220μF, 50V
CIN1, COUT2: 22µF, 50V, X7R
CIN2, COUT1: 10µF, 50V, X7R
M5–M6: T2N7002AK, TOSHIBA
54.9k
SWEN
LD033
LDO33
100k
RVSOFF
MODE
127k
47nF
1Ω
TO DIODE
DB1
M2
TG1 BOOST1 SW1 BG1 CSP CSN
CSNIN
100nF
CIN2
M1
Forward Operation (DIR = 3V)
DB1, DB2: CENTRAL SEMI CMMR1U-02-LTE
L1: 3.3μH, WURTH 701014330
XOR: DIODES INC. 74AHC1G86SE-7
M1–M4: INFINEON BSC010N04LS
RVS (0V) FWD (3V)
POWER TRANFER
DECISION LOGIC
10V
TO 16V
BATTERY
VBAT1
12V Bidirectional Dual Battery System with FHCM & RHCM
TO 16V
8708 TA03c
–
VBAT2
+ 10V
12.1k
133k
–
+
COUT3
×2
10V
TO 16V
BATTERY
+
I
VBAT2 OUT
LT8708
TYPICAL APPLICATIONS
Rev. B
55
LT8708
APPLICATIONS INFORMATION
12V Bidirectional Dual Battery System with FHCM & RHCM Details
VBAT1 Charge Voltage = 14.6V (FBIN in RHCM)
VBAT2_UV to Stop Discharging = 10.5V (VOUTLOMON Falling) or 11.7V (VOUTLOMON Rising)
VBAT2 Charge Voltage = 14.5V (FBOUT in FHCM)
VBAT1 Charging Current Limit = 15A (IMON_INN)
VBAT1_DEAD = 9V (Falling) or 9.4V (Rising)
VBAT2 Charging Current Limit = 15A (IMON_OP)
VBAT2_DEAD = 9.25V (Falling) or 9.4V (Rising)
Frequency = 120kHz
VBAT1_UV to Stop Discharging = 10.5V (FBIN in FHCM)
Table of Operation Modes and Power Flow Directions
CONDITIONS
RESULTS
VBAT2
VBAT1
DIR
VBAT2_DEAD and 14.6V
>VBAT2_UV
>VBAT1_DEAD and 14.5V
>VBAT1_UV
POWER FLOW
FHCM
Power Flows from VBAT1 to VBAT2
(VBAT2 Charging)
Lo
No Power Flow
Lo
>VBAT2_UV
RHCM
Power Flows from VBAT2 to VBAT1
(VBAT1 Charging)
Hi
*For use with LT8708-1(s)
Direction Change with
VBAT1 = 13.5V and VBAT2 = 13.5V
Direction Change with
VBAT1 = 13.5V and VBAT2 = 16V
DIR
5V/DIV
IL
25A/DIV
IIN
25A/DIV
IOUT
25A/DIV
200ms/DIV
DIR
5V/DIV
DIR
5V/DIV
IL
25A/DIV
IL
25A/DIV
IOUT
25A/DIV
IIN
25A/DIV
IIN
25A/DIV
IOUT
25A/DIV
8708 TA03d
200ms/DIV
BAT2
BAT1
13
14
13
13
10
13
10
6
11
10
0
5
10
CHARGING TIME (HOURS)
15
IIN
12
3
11
0
10
16
VBAT1
6
IIN (A)
IOUT
12
VBAT1 (V)
14
IOUT (A)
15
VBAT2
8708 TA03f
VBAT2 Charging Lead Acid Battery VBAT1
16
15
3
0
8708 TA03g
56
200ms/DIV
8708 TA03e
VBAT1 Charging Lead Acid Battery VBAT2
VBAT2 (V)
Direction Change with
VBAT1 = 16V and VBAT2 = 13.5V
5
10
CHARGING TIME (HOURS)
15
0
8708 TA03h
Rev. B
For more information www.analog.com
–
+
VBAT1
24V
TO 55V
CIN3
20k
340k
*
XOR
M5
M7
18.2k
1μF
CIN1
16.9k
340k
220pF
M6
100k
LD033
68.1k
+
IIN
5mΩ
For more information www.analog.com
–
+
18.2k
FBIN
POWER FLOW
PREVENT
DISCHARGING
VBAT1 BELOW 24V
5mΩ
340k
4.7μF
127k
100k
LD033
1Ω
0.22μF
TO DIODE
DB1
1Ω
3.3nF
M2
CHARGE
VBAT2 TO
14.5V
FBOUT
LIMIT VBAT2
CHARGING
CURRENT TO 15A
2mΩ
VC
220pF
12.1k
5.6nF
RT
365k
LT8708
1.5mΩ 1Ω 0.22μF
12.1k
133k
8708 TA04b
–
+
VBAT2
10V
TO 16V
TO DIODE
DB2
SS
1μF
COUT1
4.7nF
30.1k
2mΩ
1μF
17.4k
17.4k
178k
COUT2
10nF
10nF
4.7μF
12.1k
93.1k
13.3k
17.4k
100k
681k
4.7nF
RVS (0V)
100k
LD033
VBAT1
24V
TO 55V
–
+
4.7nF
18.2k
PREVENT
DISCHARGING
VBAT2 BELOW
10.5V
16.9k FBIN CHARGE
VBAT1 TO 48V
340k
LIMIT VBAT1
CHARGING
CURRENT TO 4A
5mΩ
POWER FLOW
DB1
DB2
3.3Ω
2mΩ
12.1k
93.1k
TO
TO
BOOST1 BOOST2
23.7k
4.7μF
VOUTLOMON 17.8k
Reverse Operation (DIR = 0V)
*SEE UNI AND BIDIRECTIONAL CONDUCTION SECTION FOR MORE DETAILS.
120kHz
8708 TA04a
GATEVCC
IMON_OP
IMON_ON
ICN
ICP
IMON_INP
IMON_INN
SYNC CLKOUT
CSNOUT
EXTVCC
VOUTLOMON
FBOUT
INTVCC
10nF
1Ω
M4
GND BG2 SW2 BOOST2 TG2
CSPOUT
M3
1nF
10Ω
1nF
10Ω
L1
10μH
M3–M4: INFINEON BSC010N04LS
CIN3: 220μF, 100V
COUT3: 330μF, 40V
CIN1, COUT2, CIN2, COUT1: 10µF, 100V, X7R
M5–M7: T2N7002AK, TOSHIBA
54.9k
RVSOFF
MODE
SWEN
LDO33
DIR
CSPIN
VINCHIP
SHDN
FBIN
VINHIMON
TG1 BOOST1 SW1 BG1 CSP CSN
CSNIN
CIN2
M1
Forward Operation (DIR = 3V)
DB1, DB2: CENTRAL SEMI CMMR1U-02-LTE
L1: 10μH, SER2918H-103KL
XOR: DIODES INC. 74AHC1G86SE-7
M1–M2: INFINEON BSC026N08NS5
RVS (0V) FWD (3V)
POWER TRANFER
DECISION LOGIC
24V
TO 55V
BATTERY
VBAT1
48V to 12V Bidirectional Dual Battery System with FHCM & RHCM
VBAT2
TO 16V
8708 TA04c
–
+ 10V
12.1k
133k
–
+
COUT3
10V
TO 16V
BATTERY
(MAX
36V FOR
LOAD
DUMP
+
I
VBAT2 OUT
LT8708
APPLICATIONS INFORMATION
Rev. B
57
LT8708
APPLICATIONS INFORMATION
48V to 14V Bidirectional Dual Battery System with FHCM & RHCM Details
VBAT1 Charge Voltage = 48V (FBIN in RHCM)
VBAT2_UV to Stop Discharging = 10.5V (VOUTLOMON Falling) or 12.3V (VOUTLOMON Rising)
VBAT2 Charge Voltage = 14.5V (FBOUT in FHCM)
VBAT1 Charging Current Limit = 4A (IMON_INN)
VBAT1_DEAD = 21.3V (Falling) or 22.2V (Rising)
VBAT2 Charging Current Limit = 15A (IMON_OP)
VBAT2_DEAD = 9.25V (Falling) or 9.4V (Rising)
Frequency = 120kHz
Table of Operation Modes and Power Flow Directions
CONDITIONS
RESULTS
VBAT2
VBAT1
DIR
VBAT2_DEAD and 48V
>VBAT2_UV
>VBAT1_DEAD and 14.5V
>VBAT1_UV
POWER FLOW
FHCM
Power Flows from VBAT1 to VBAT2
(VBAT2 Charging)
Lo
No Power Flow
Lo
>VBAT2_UV
RHCM
Power Flows from VBAT2 to VBAT1
(VBAT1 Charging)
Hi
*For use with LT8708-1(s)
Direction Change with
VBAT1 = 47.5V and VBAT2 = 14V
Direction Change with
VBAT1 = 55V and VBAT2 = 14V
Direction Change with
VBAT1 = 47.5V and VBAT2 = 36V
DIR
5V/DIV
DIR
5V/DIV
DIR
5V/DIV
IL
20A/DIV
IL
20A/DIV
IL
20A/DIV
IIN
10A/DIV
IOUT
10A/DIV
IIN
5A/DIV
IOUT
20A/DIV
IIN
20A/DIV
IOUT
20A/DIV
30ms/DIV
8708 TA04d
30ms/DIV
VVBAT1
BAT2 Charging Lead Acid Battery VBAT2
16
15
97
14
13
13
10
CHARGING VBAT1
VBAT2 (V)
100
94
CHARGIN VBAT2
91
85
VBAT2
IOUT
12
6
3
11
88
10
20
30
40
VBAT1 (V)
VBAT2 (V)
50
60
10
8708 TA04f
IOUT (A)
EFFICIENCY (%)
Efficiency
EFFICIENCY
58
30ms/DIV
8708 TA04e
0
5
10
CHARGING TIME (HOURS)
15
0
8708 TA04h
8708 TA04g
For more information www.analog.com
Rev. B
For more information www.analog.com
DIN
+
VLOAD
M5
CIN1
100k
11.3k
0.73k
464k
100k
4.7μF
100k
84.5k
CIN2
5mΩ
54.9k
127k
2Ω
2Ω
RVSOFF
MODE
VC
220pF
24.9k
6.8nF
10mΩ
52V LOADS
CHARGE
VBAT TO
52.1V
LIMIT VBAT
CHARGING
CURRENT TO 5A
10mΩ
RT
294k
LT8708
5mΩ 2Ω 0.22μF
10k
422k
SS
VBAT
37.5V
TO 52.1V
8708 TA05b
–
+
TO DIODE
DB2
1μF
COUT1
6.8nF
26.7k
10mΩ
VIN
0V
DIN
COUT2
17.4k
10k
294k
22nF
DB1
4Ω
DB2
COUT3
TO
TO
BOOST1 BOOST2
17.4k
4.7μF
+
11.3k
0.73k
REGULATE
VLOAD TO 47.4V
SHDN
10k
294k
POWER FLOW
10mΩ
PREVENT
DISCHARGING
VBAT BELOW 35V
LIMIT VLOAD CURRENT
TO 5A WHEN
464k POWERED BY VBAT
10mΩ
47.4V LOADS
–
+
10k
422k
CHARGE
VOLTAGE:
52.1V
VBAT
TO 52.1V
8708 TA05c
–
VBAT
+ 36V
When VIN Is Not Applied, VLOAD Is Regulated to 47.4V
Until VBAT Drops Below 36V
6.8nF
4.7μF
6.8nF
1μF
17.4k
17.4k
CIN2, CIN3h, COUT1, COUT2: 4.7µF, 100V, X7R
M5: TOSHIBA T2N7002AK
150kHz
8708 TA05a
GATEVCC
IMON_OP
IMON_ON
ICN
ICP
IMON_INP
IMON_INN
SYNC CLKOUT
SHDN
FBOUT
INTVCC
22nF
2Ω
M4
GND BG2 SW2 BOOST2 TG2
CSPOUT
CSNOUT
VINCHIP
M3
1nF
10Ω
1nF
10Ω
L1
10μH
L1: 10μH, WURTH 701014101
M1–M4: INFINEON BSC039N06NS
CIN1: 1200μF, 100V
COUT3: 220μF, 100V
DIR
SWEN
VOUTLOMON
LDO33
When VIN Is Applied, VBAT Is Charged to 52.1V
POWER FLOW
DIN
0.22μF
TO DIODE
DB1
M2
TG1 BOOST1 SW1 BG1 CSP CSN
CSNIN
CSPIN
FBIN
EXTVCC
VINHIMON
CIN3
M1
DIN: APPROPRIATE 8A SCHOTTKY DIODE OR IDEAL DIODE
SUCH AS LTC4357.
DB1, DB2: CENTRAL SEMI CMMR1U-02-LTE
VIN
52V
VIN
52V
TO LOADS
(REGULATE TO
47.4V WHEN
IN BACKUP)
52V Battery Backup Supply Using FHCM and RHCM
LT8708
APPLICATIONS INFORMATION
Rev. B
59
LT8708
APPLICATIONS INFORMATION
52V Battery Backup Supply Using FHCM and RHCM Detail
VBAT Charge Voltage = 52.1V (FBOUT in FHCM)
VLOAD Rising to Activate VBAT Charging = 50.2V (VINHIMON Rising Activating FHCM)
VLOAD Regulation Voltage = 47.4V (FBIN in RHCM)
VLOAD Falling to Activate Backup Operation = 45.9V (VINHIMON Falling Activating RHCM)
VBAT_DEAD = 36V (Falling) or 37.5V (Rising)
VBAT Charging Current Limit = 5A (IMON_OP)
Frequency = 150kHz
VLOAD Current Limit = 5A (IMON_INN)
Table of Operation Modes and Power Flow Directions
CONDITIONS
RESULTS
VLOAD
VBAT
–
50.2V*
>52.1V
Fell Into (47.4V to 50.2V) Range*
VBAT_DEAD to 52.1V
POWER FLOW
CHIP OPERATES IN
RVSOFF
DIR
No Power Flow
Shutdown
–
–
FHCM
Lo
Hi
RHCM
Hi
Lo
Power Flows from VIN to VBAT
(VBAT Charging)
>52.1V
Fell Into (45.9V to 47.4V) Range*
Rose Into (47.4V to 50.2V) Range*
Rose Into (45.9V to 47.4V) Range
No Power Flow
>VBAT_DEAD
Power Flows from VBAT to VLOAD
(Backup Operation)
13.3V
200k
25mΩ
REGULATE
LOADS TO 11V
29k
162k
VBACKUP
LOADS
25mΩ
VOUT
POWER FLOW
1.2k
×6
8708 TA06c
When VIN Is Not Applied, VLOAD Is Regulated to 11V
22nF
47nF
100Ω
COUT1
25mΩ
Supercapacitor Backup Supply Using CCM
LT8708
APPLICATIONS INFORMATION
Rev. B
61
LT8708
APPLICATIONS INFORMATION
Supercapacitor Backup Supply Using CCM Detail
VOUT Charge Voltage = 15V (FBOUT)
VBACKUP Overvoltage Rising Threshold in Backup Operation = 13.3V (VINHIMON Rising)
VBACKUP Regulation Voltage = 11V (FBIN)
VBACKUP Overvoltage Falling Threshold in Backup Operation = 12.9V (VINHIMON Falling)
VIN_MIN = 5.42V (Falling) or 5.65V (Rising)
VOUT Charging Current Limit = 1A (IMON_OP)
Frequency = 350kHz
VIN Current Limit = 2A (IMON_INP)
Table of Operation Modes and Power Flow Directions
VBACKUP
VOUT
–
15V
>13.3V
15V
Rose Into (12.9V to 13.3V)
Range
11V and 15V
Power Flows from VIN to VOUT
(VOUT Charging)
VIN_MIN
–
Power Flows from VOUT to LOADS
(Backup Operation)
Lo
No Power Flow
CCM
Hi
*For use with LT8708-1(s)
Transient Behavior Upon VIN
Dropout (ILOAD = 4A)
Charging VOUT to 15V with 1A Current
VIN
5V/DIV
VOUT
5V/DIV
VOUT
5V/DIV
VBACKUP
5V/DIV
IL
5A/DIV
IL
5A/DIV
20s/DIV
62
8708 TA06d
3s/DIV
8708 TA06e
Rev. B
For more information www.analog.com
LT8708
PACKAGE DESCRIPTION
UHG Package
40-Lead Plastic QFN (5mm × 8mm)
(Reference LTC DWG # 05-08-1528 Rev A)
0.70 ±0.05
5.50 ±0.05
5.85 ±0.10
PACKAGE
OUTLINE
4.10 ±0.05
3.50 REF
3.10 ±0.10
0.25 ±0.05
6.50 REF
7.10 ±0.05
8.50 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
C 0.35
1.00 TYP
5.00 ±0.10
34
40
0.40 ±0.05
PIN 1
TOP MARK
33
33
1
0.25 ±0.05
0.75 TYP
×4
0.50 BSC
8.00 ±0.10
5.85 ±0.10
3.10 ±0.10
22
0.675
REF
22
14
DETAIL B
21
0.55
REF
DETAIL A
BOTTOM VIEW—EXPOSED PAD
0.20 REF
0.00 – 0.05
0.75 ±0.05
15
21
1.00 TYP
15
R = 0.125
TYP
(UHG) QFN 0417 REV A
DETAIL B
0.08 REF
DETAIL A
0.203 ±0.008
0.203 +0.058, –0.008
TERMINAL THICKNESS
0.31 REF
0.00 – 0.05
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES IN DEGREES.
2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.
COPLANARITY SHALL NOT EXCEED 0.08MM.
3. WARPAGE SHALL NOT EXCEED 0.10MM.
4. PACKAGE LENGTH / PACKAGE WIDTH ARE CONSIDERED AS SPECIAL CHARACTERISTIC(S).
5. REFER JEDEC M0-220.
Rev. B
For more information www.analog.com
63
LT8708
PACKAGE DESCRIPTION
LWE Package
64-Lead Plastic Exposed Pad LQFP (10mm × 10mm)
(Reference LTC DWG #05-08-1982 Rev A)
10.15 – 10.25
7.50 REF
1
64
49
48
0.50 BSC
5.74 ±0.05
7.50 REF
0.20 – 0.30
10.15 – 10.25
5.74 ±0.05
16
17
PACKAGE OUTLINE
33
32
1.30 MIN
RECOMMENDED SOLDER PAD LAYOUT
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
12.00 BSC
10.00 BSC
5.74 ±0.10
64
49
SEE NOTE: 3
1
64
49
48
48
1
12.00 BSC
10.00 BSC
A
5.74 ±0.10
A
33
16
33
16
C0.30 – 0.50
17
32
17
BOTTOM OF PACKAGE—EXPOSED PAD (SHADED AREA)
32
11° – 13°
R0.08 – 0.20
1.60
1.35 – 1.45 MAX
GAUGE PLANE
0.25
0° – 7°
LWE64 LQFP 0416 REV A
11° – 13°
0.50
BSC
0.09 – 0.20
1.00 REF
0.17 – 0.27
0.05 – 0.15
SIDE VIEW
0.45 – 0.75
SECTION A – A
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DIMENSIONS OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.25mm (10 MILS) BETWEEN THE LEADS AND
MAX 0.50mm (20 MILS) ON ANY SIDE OF THE EXPOSED PAD, MAX 0.77mm
(30 MILS) AT CORNER OF EXPOSED PAD, IF PRESENT
64
3. PIN-1 INDENTIFIER IS A MOLDED INDENTATION, 0.50mm DIAMETER
4. DRAWING IS NOT TO SCALE
Rev. B
For more information www.analog.com
LT8708
REVISION HISTORY
REV
DATE
DESCRIPTION
A
01/20
Added eLQFP package option.
9
Corrected the body connection of M1, changed EA7 to A7.
15
Corrected calculations.
10/21
1, 3, 4, 6, 13,
14, 64, 65
Added two arrows and corrected the 2nd y-axis of 8708 G08.
Changed RESENSE1 to RSENSE1.
B
PAGE NUMBER
Removed TR from eLQFP package option in the Ordering Information section. The eLQFP package ships in trays.
43
51, 52
4
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
more by
information
www.analog.com
65
LT8708
TYPICAL APPLICATION
Supercapacitor Backup Supply Using CCM
TO LOADS
(REGULATE TO
11V WHEN
IN BACKUP)
25mΩ
M1
DIN
VIN
12V
+
L1
2.2μH
M2
CIN1
CIN2
1µF
71.5k
20k
20k
5mΩ
CSC
×6
0.22µF
200k
150k
LD033
50k
SWEN
LDO33
RVSOFF
VC
RT
15k
220pF
DIN: APPROPRIATE 2A SCHOTTKY DIODE OR IDEAL DIODE
SUCH AS LTC4358, LTC4412, LTC4352, ETC.
DB1, DB2: CENTRAL SEMI CMMR1U-02-LTE
L1: 2.2μH, VISHAY IHLP-5050CE-01-2R2-M-01
SS
SYNC
GATEVCC
IMON_OP
ICN
ICP
IMON_INP
IMON_ON
IMON_INN
CLKOUT
8708 TA02
5.6nF
124k
4.7µF
INTVCC
LT8708
VOUTLOMON
DIR
MODE
115k
4.7µF
CSNOUT
EXTVCC
FBOUT
VINHIMON
50k
GND BG2 SW2 BOOST2 TG2
CSPOUT
CSPIN
VINCHIP
SHDN
FBIN
20k
1µF
100Ω
4.7µF
1.2k
×6
2Ω
100Ω
TG1 BOOST1 SW1 BG1 CSP CSN
CSNIN
VOUT
15V
COUT2
TO DIODE
DB2
1nF
10Ω
0.22µF
+
COUT1
1nF
2Ω
162k
M3
10Ω
TO DIODE
DB1
25mΩ
M4
1µF
4.7µF
6.8nF
22nF
17.4k
22nF
26.7k
DB1
10k
4Ω
DB2
TO
TO
BOOST1 BOOST2
17.4k
17.4k
6.8nF
350kHz
M1–M4: INFINEON BSC050NE2LS
CIN1, COUT2: 220μF, 35V 35HVP220M
CIN2, COUT1: 22µF, 25V, TDK C4532X741E226M
CSC: 60F, 2.5V COOPER BUSSMAN HB1840-2R5606-R
SEE MORE DETAILS OF THIS APPLICATION ON PAGE 61.
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT8708-1
80V Synchronous 4-Switch Buck-Boost DC/DC
Slave Controller for LT8708 Multiphase System
2.8V (Need EXTVCC > 6.4V) ≤ VIN ≤ 80V,1.3V ≤ VOUT ≤ 80V, 5mm × 8mm QFN-40
and 10mm × 10mm eLQFP-64 Packages
LT8705A
80V VIN and VOUT Synchronous 4-Switch BuckBoost DC/DC Controller
2.8V ≤ VIN ≤ 80V, Input and Output Current Monitor, 5mm × 7mm QFN-38 and
TSSOP-38 Packages
LTC®3779
150V VIN and VOUT Synchronous 4-Switch BuckBoost Controller
4.5V ≤ VIN ≤ 150V, 1.2V ≤ VOUT ≤ 150V, Up to 99% Efficiency Drives Logic-Level
or STD Threshold MOSFETs, TSSOP-38 Package
LTC7813
60V Low IQ Synchronous Boost+Buck Controller
Low EMI and Low Input/Output Ripple
4.5V (Down to 2.2V After Start-Up) ≤ VIN ≤ 60V, Boost VOUT Up to 60V,
0.8V ≤ Buck VOUT ≤ 60V, IQ = 29µA, 5mm × 5mm QFN-32 Package
LTC3899
60V, Triple Output, Buck/Buck/Boost Synchronous
Controller with 29µA Burst Mode IQ
4.5V (Down to 2.2V after Start-Up) ≤ VIN ≤ 60V, VOUT Up to 60V,
Buck VOUT Range: 0.8V to 60V, Boost VOUT Up to 60V
LTM®8056
58VIN, Buck-Boost µModule Regulator, Adjustable
Input and Output Current Limiting
5V ≤ VIN ≤ 58V, 1.2V ≤ VOUT ≤ 48V, 15mm × 15mm × 4.92mm BGA Package
LTC3895/
LTC7801
150V Low IQ, Synchronous Step-Down
DC/DC Controller with 100% Duty Cycle
4V ≤ VIN ≤ 140V, 150V ABS Max, PLL Fixed Frequency 50kHz to 900kHz,
0.8V ≤ VOUT ≤ 60V, Adjustable 5V to 10V Gate Drive, IQ = 40μA,
4mm × 5mm QFN-24, TSSOP-24, TSSOP-38(31) Packages
LTC3871
Bidirectional Multiphase DC/DC Synchronous Buck
or Boost On-Demand Controller
VIN/VOUT Up to 100V, Ideal for High Power 48V/12V Automotive Battery
Applications
LTC7103
105V, 2.3A, Low EMI Synchronous
Step-Down Regulator
4.4V ≤ VIN ≤105V, 1V ≤ VOUT ≤ VIN, IQ = 2µA, Fixed Frequency 200kHz,
5mm × 6mm QFN Package
66
Rev. B
10/21
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