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LTC2208IUP#TRPBF

LTC2208IUP#TRPBF

  • 厂商:

    AD(亚德诺)

  • 封装:

    QFN64_9X9MM_EP

  • 描述:

    IC ADC 16BIT PIPELINED 64QFN

  • 数据手册
  • 价格&库存
LTC2208IUP#TRPBF 数据手册
LTC2208 16-Bit, 130Msps ADC FEATURES DESCRIPTION n The LTC®2208 is a 130Msps, sampling 16-bit A/D converter designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 700MHz. The input range of the ADC can be optimized with the PGA front end. n n n n n n n n n n n n n Sample Rate: 130Msps 78dBFS Noise Floor 100dB SFDR SFDR >83dB at 250MHz (1.5VP-P Input Range) PGA Front End (2.25VP-P or 1.5VP-P Input Range) 700MHz Full Power Bandwidth S/H Optional Internal Dither Optional Data Output Randomizer LVDS or CMOS Outputs Single 3.3V Supply Power Dissipation: 1.25W Clock Duty Cycle Stabilizer Pin Compatible 14-Bit Version 130Msps: LTC2208 (16-Bit), LTC2208-14 (14-Bit) 64-Pin (9mm × 9mm) QFN Package APPLICATIONS n n n n n n Telecommunications Receivers Cellular Base Stations Spectrum Analysis Imaging Systems ATE The LTC2208 is perfect for demanding communications applications, with AC performance that includes 78dBFS Noise Floor and 100dB spurious free dynamic range (SFDR). Ultra low jitter of 70fsRMS allows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±4LSB INL, ±1LSB DNL (no missing codes). The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed buses running at half data rate. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 3.3V SENSE 2.2μF AIN+ 1.25V COMMON MODE BIAS VOLTAGE + ANALOG INPUT AIN– INTERNAL ADC REFERENCE GENERATOR 16-BIT PIPELINED ADC CORE S/H AMP – 64k Point FFT, FIN = 15.1MHz, –1dB, PGA = 0 0.5V TO 3.6V 1μF OUTPUT DRIVERS CORRECTION LOGIC AND SHIFT REGISTER OF CLKOUT D15 • • • D0 CMOS OR LVDS 1μF 1μF AMPLITUDE (dBFS) VCM OVDD OGND CLOCK/DUTY CYCLE CONTROL 3.3V VDD GND 1μF 2208 TA01 ENC + ENC – PGA SHDN DITH MODE LVDS RAND 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 0 10 50 20 40 30 FREQUENCY (MHz) 60 2208 TA01b ADC CONTROL INPUTS 2208fc 1 LTC2208 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION OVDD = VDD (Notes 1 and 2) 64 PGA 63 RAND 62 MODE 61 LVDS 60 OF+/OFA 59 OF–/DA15 58 D15+/DA14 57 D15–/DA13 56 D14+/DA12 55 D14–/DA11 54 D13+/DA10 53 D13–/DA9 52 D12+/DA8 51 D12–/DA7 50 OGND 49 OVDD TOP VIEW SENSE 1 GND 2 VCM 3 GND 4 VDD 5 VDD 6 GND 7 AIN+ 8 AIN– 9 GND 10 GND 11 ENC+ 12 ENC– 13 GND 14 VDD 15 VDD 16 48 D11+/DA6 47 D11–/DA5 46 D10+/DA4 45 D10–/DA3 44 D9+/DA2 43 D9–/DA1 42 D8+/DA0 41 D8–/CLKOUTA 40 CLKOUT+/CLKOUTB 39 CLKOUT –/OFB 38 D7+/DB15 37 D7–/DB14 36 D6+/DB13 35 D6–/DB12 34 D5+/DB11 33 D5–/DB10 65 VDD 17 GND 18 SHDN 19 DITH 20 – D0 /DB0 21 + DO /DB1 22 D1–/DB2 23 D1+/DB3 24 D2–/DB4 25 D2+/DB5 26 D3–/DB6 27 D3+/DB7 28 D4–/DB8 29 D4+/DB9 30 OGND 31 OVDD 32 Supply Voltage (VDD) ................................... –0.3V to 4V Digital Output Ground Voltage (OGND) ........ –0.3V to 1V Analog Input Voltage (Note 3) ...... –0.3V to (VDD + 0.3V) Digital Input Voltage..................... –0.3V to (VDD + 0.3V) Digital Output Voltage ................ –0.3V to (OVDD + 0.3V) Power Dissipation ............................................ 2000mW Operating Temperature Range LTC2208C ................................................ 0°C to 70°C LTC2208I .............................................–40°C to 85°C Storage Temperature Range ..................–65°C to 150°C Digital Output Supply Voltage (OVDD) .......... –0.3V to 4V UP PACKAGE 64-LEAD (9mm s 9mm) PLASTIC QFN TJMAX = 150°C, θJA = 20°C/W EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2208CUP#PBF LTC2208CUP#TRPBF LTC2208UP 64-Lead (9mm × 9mm) Plastic QFN 0°C to 70°C LTC2208IUP#PBF LTC2208IUP#TRPBF LTC2208UP 64-Lead (9mm × 9mm) Plastic QFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ CONVERTER CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) PARAMETER CONDITIONS Integral Linearity Error Differential Analog Input (Note 5) TA = 25°C MIN TYP MAX UNITS ±1.2 ±4.0 LSB Integral Linearity Error Differential Analog Input (Note 5) l ±1.5 ±4.5 LSB Differential Linearity Error Differential Analog Input l ±0.3 ±1 LSB Offset Error (Note 6) l ±2 ±8.5 mV Gain Error External Reference l ±0.2 Full-Scale Drift Internal Reference External Reference ±30 ±15 ppm/°C ppm/°C Transition Noise External Reference 2.9 LSBRMS Offset Drift ±10 μV/°C ±1.5 %FS 2208fc 2 LTC2208 ANALOG INPUT The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS VIN Analog Input Range (AIN+ – AIN–) 3.135V ≤ VDD ≤ 3.465V MIN VIN, CM Analog Input Common Mode Differential Input (Note 7) l 1 IIN Analog Input Leakage Current 0V ≤ AIN+, AIN– ≤ VDD l –1 ISENSE SENSE Input Leakage Current 0V ≤ SENSE ≤ VDD l –3 IMODE MODE Pin Pull-Down Current to GND ILVDS LVDS Pin Pull-Down Current to GND TYP MAX UNITS 1.5 or 2.25 1.25 Sample Mode ENC+ < ENC– Hold Mode ENC+ > ENC– VP-P 1.5 V 1 μA 3 μA 10 μA 10 μA 6.5 1.8 pF pF CIN Analog Input Capacitance tAP Sample-and-Hold Acquisition Delay Time 1 ns tJITTER Sample-and-Hold Acquisition Delay Time Jitter 70 fs RMS CMRR Analog Input Common Mode Rejection Ratio 1V < (AIN+ = AIN–)
LTC2208IUP#TRPBF 价格&库存

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