LTC2209CUP

LTC2209 16-Bit, 160Msps ADC Features Description Sample Rate: 160Msps n 77.3dBFS Noise Floor n 100dB SFDR n SFDR >84dB at 250MHz (1.5V P-P Input Range) n PGA Front End (2.25V or 1.5V P-P P-P Input Range) n 700MHz Full Power Bandwidth S/H n Optional Internal Dither n Optional Data Output Randomizer n LVDS or CMOS Outputs n Single 3.3V Supply n Power Dissipation: 1.53W n Clock Duty Cycle Stabilizer n Pin-Compatible Family: 130Msps: LTC2208 (16-Bit), LTC2208-14 (14-Bit) 105Msps: LTC2217 (16-Bit) n 64-Pin (9mm × 9mm) QFN Package The LTC®2209 is a 160Msps 16-bit A/D converter designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 700MHz. The input range of the ADC can be optimized with the PGA front end. n Applications The LTC2209 is perfect for demanding communications applications, with AC performance that includes 77.3dBFS Noise Floor and 100dB spurious free dynamic range (SFDR). Ultra low jitter of 70fsRMS allows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±5.5LSB INL, ±1LSB DNL (no missing codes). The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed busses running at half data rate. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles. Telecommunications Receivers n Cellular Base Stations n Spectrum Analysis n Imaging Systems n ATE n n L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application 3.3V 64k Point FFT, fIN = 15.1MHz, –1dBFS, PGA = 0 SENSE 2.2µF AIN + ANALOG INPUT AIN – 1.25V COMMON MODE BIAS VOLTAGE + – 16-BIT PIPELINED ADC CORE S/H AMP OVDD INTERNAL ADC REFERENCE GENERATOR 0.5V TO 3.6V 1µF OUTPUT DRIVERS CORRECTION LOGIC AND SHIFT REGISTER OF CLKOUT D15 • • • D0 CMOS OR LVDS 1µF 1µF AMPLITUDE (dBFS) VCM OGND CLOCK/DUTY CYCLE CONTROL ENC + ENC – 3.3V VDD GND PGA SHDN DITH MODE LVDS ADC CONTROL INPUTS RAND 1µF 2209 TA01 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 0 10 20 30 40 50 60 FREQUENCY (MHz) 70 80 2209 TA01b 2209fb 1 LTC2209 OVDD = VDD (Notes 1 and 2) TOP VIEW SENSE 1 GND 2 VCM 3 GND 4 VDD 5 VDD 6 GND 7 AIN + 8 AIN – 9 GND 10 GND 11 ENC+ 12 ENC– 13 GND 14 VDD 15 VDD 16 48 D11+/DA6 47 D11–/DA5 46 D10+/DA4 45 D10–/DA3 44 D9+/DA2 43 D9–/DA1 42 D8+/DA0 41 D8–/CLKOUTA 40 CLKOUT+/CLKOUTB 39 CLKOUT –/OFB 38 D7+/DB15 37 D7–/DB14 36 D6+/DB13 35 D6–/DB12 34 D5+/DB11 33 D5–/DB10 65 GND VDD 17 GND 18 SHDN 19 DITH 20 D0–/DB0 21 +/DB1 22 DO D1–/DB2 23 D1+/DB3 24 D2–/DB4 25 D2+/DB5 26 D3–/DB6 27 D3+/DB7 28 D4–/DB8 29 D4+/DB9 30 OGND 31 OVDD 32 Supply Voltage (VDD).................................... –0.3V to 4V Digital Output Ground Voltage (OGND)......... –0.3V to 1V Analog Input Voltage (Note 3)....... –0.3V to (VDD + 0.3V) Digital Input Voltage..................... –0.3V to (VDD + 0.3V) Digital Output Voltage................. –0.3V to (OVDD + 0.3V) Power Dissipation............................................. 2500mW Operating Temperature Range LTC2209C................................................. 0°C to 70°C LTC2209I..............................................–40°C to 85°C Storage Temperature Range...................–65°C to 150°C Digital Output Supply Voltage (OVDD)........... –0.3V to 4V Pin Configuration 64 PGA 63 RAND 62 MODE 61 LVDS 60 OF+/OFA 59 OF–/DA15 58 D15+/DA14 57 D15–/DA13 56 D14+/DA12 55 D14–/DA11 54 D13+/DA10 53 D13–/DA9 52 D12+/DA8 51 D12–/DA7 50 OGND 49 OVDD Absolute Maximum Ratings TJMAX = 150°C, θJA = 20°C/W EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2209CUP#PBF LTC2209CUP#TRPBF LTC2209UP 64-Lead (9mm × 9mm) Plastic QFN 0°C to 70°C LTC2209IUP#PBF LTC2209IUP#TRPBF LTC2209UP 64-Lead (9mm × 9mm) Plastic QFN –40°C to 85°C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC2209CUP LTC2209CUP#TR LTC2209UP 64-Lead (9mm × 9mm) Plastic QFN 0°C to 70°C LTC2209IUP LTC2209IUP#TR LTC2209UP 64-Lead (9mm × 9mm) Plastic QFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ Converter Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) PARAMETER CONDITIONS TYP MAX UNITS Integral Linearity Error Differential Analog Input (Note 5) l MIN ±1.5 ±5.5 LSB Differential Linearity Error Differential Analog Input l ±0.3 ±1 LSB Offset Error (Note 6) l ±2 ±10 Offset Drift ±10 Gain Error External Reference Full-Scale Drift Internal Reference External Reference ±30 ±15 ppm/°C ppm/°C Transition Noise External Reference 3 LSBRMS l ±0.2 mV µV/°C ±2 %FS 2209fb 2 LTC2209 Analog Input The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4) SYMBOL PARAMETER CONDITIONS VIN Analog Input Range (AIN+ – AIN–) 3.135V ≤ VDD ≤ 3.465V MIN TYP MAX UNITS 1.5 or 2.25 1.25 VP-P VIN, CM Analog Input Common Mode Differential Input (Note 7) l 1 1.5 V IIN Analog Input Leakage Current 0V ≤ AIN+, AIN– ≤ VDD l –1 1 µA ISENSE SENSE Input Leakage Current 0V ≤ SENSE ≤ VDD l –3 3 µA IMODE MODE Pin Pull-Down Current to GND 10 µA ILVDS LVDS Pin Pull-Down Current to GND 10 µA 6.6 1.8 pF pF Sample Mode ENC+ < ENC– Hold Mode ENC+ > ENC– CIN Analog Input Capacitance tAP Sample-and-Hold Aperture Delay Time 1.0 ns tJITTER Sample-and-Hold Acquisition Delay Time Jitter 70 fs RMS CMRR Analog Input Common Mode Rejection Ratio 1V < (AIN+ = AIN–)