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LTC2604IGN-1#TRPBF

LTC2604IGN-1#TRPBF

  • 厂商:

    AD(亚德诺)

  • 封装:

    SSOP16

  • 描述:

    IC DAC 16BIT V-OUT 16SSOP

  • 数据手册
  • 价格&库存
LTC2604IGN-1#TRPBF 数据手册
LTC2604/LTC2614/LTC2624 Quad 16-Bit Rail-to-Rail DACs in 16-Lead SSOP FEATURES DESCRIPTION n The LTC®2604/LTC2614/LTC2624 are quad 16-,14- and 12-bit 2.5V to 5.5V rail-to-rail voltage output DACs in 16-lead narrow SSOP packages. These parts have separate reference inputs for each DAC. They have built-in high performance output buffers and are guaranteed monotonic. Smallest Pin Compatible Quad 16-Bit DAC: LTC2604: 16-Bits LTC2614: 14-Bits LTC2624: 12-Bits Guaranteed 16-Bit Monotonic Over Temperature Separate Reference Inputs for each DAC Wide 2.5V to 5.5V Supply Range Low Power Operation: 250μA per DAC at 3V Individual DAC Power-Down to 1μA, Max Ultralow Crosstalk Between DACs ( 1GΩ) when the corresponding DACs are powered down. Normal operation can be resumed by executing any command which includes a DAC update, as shown in Table 1. The selected DAC is powered up as its voltage output is updated. When a DAC which is in a powered-down state is powered up and updated, normal settling is delayed. If less than four DACs are in a powered-down state prior to the update command, the power-up delay time is 5μs. If on the other hand, all four DACs are powered down, then the main bias generation circuit block has been automatically shut down in addition to the individual DAC amplifiers and reference inputs. In this case, the power up delay time is 12μs (for VCC = 5V) or 30μs (for VCC = 3V). Voltage Outputs Each of the four rail-to-rail amplifiers contained in these parts has guaranteed load regulation when sourcing or sinking up to 15mA at 5V (7.5mA at 3V). Load regulation is a measure of the amplifier’s ability to maintain the rated voltage accuracy over a wide range of load conditions. The measured change in output voltage per milliampere of forced load current change is expressed in LSB/mA. 2604fd 12 X X SDI SDO SCK CS/LD 1 X X 2 3 X 4 X X C3 SDI X 5 X DON’T CARE X C2 2 C1 3 X X 6 X X 7 COMMAND WORD 1 SCK CS/LD C0 X X 4 8 A3 A2 6 A1 7 A0 8 D15 9 D14 10 D12 12 D11 13 D10 14 24-BIT INPUT WORD D13 11 D9 15 D7 17 DATA WORD D8 16 D6 18 D5 19 C1 11 C2 C1 COMMAND WORD C2 10 C0 C0 A3 A3 A2 14 A1 15 A2 A1 ADDRESS WORD 13 A0 A0 16 17 D15 D15 PREVIOUS 32-BIT INPUT WORD 12 D14 D14 18 t2 t8 D9 D9 t4 23 PREVIOUS D15 t3 17 D10 D10 22 SDO t1 D11 D11 21 D15 D12 D12 20 SDI SCK D13 D13 19 Figure 2b. LTC2604 32-Bit Load Sequence LTC2614 SDI/SDO Data Word: 14-Bit Input Code + 2 Don’t Care Bits LTC2624 SDI/SDO Data Word: 12-Bit Input Code + 4 Don’t Care Bits C3 C3 9 Figure 2a. LTC2604 24-Bit Load Sequence (Minimum Input Word) LTC2614 SDI Data Word: 14-Bit Input Code + 2 Don’t Care Bits LTC2624 SDI Data Word: 12-Bit Input Code + 4 Don’t Care Bits ADDRESS WORD 5 24 25 D7 D3 21 18 D7 D6 D6 26 22 D2 PREVIOUS D14 D14 D8 DATA WORD D8 D4 20 27 D5 D5 D1 23 28 D4 D4 D0 24 D3 D3 29 2604 F02a D2 D2 30 D1 D1 31 2604 F02b CURRENT 32-BIT INPUT WORD D0 D0 32 LTC2604/LTC2614/LTC2624 OPERATION 2604fd 13 LTC2604/LTC2614/LTC2624 OPERATION DC output impedance is equivalent to load regulation, and may be derived from it by simply calculating a change in units from LSB/mA to Ohms. The amplifiers’ DC output impedance is 0.025Ω when driving a load well away from the rails. the device’s ground pin as possible. Ideally, the analog ground plane should be located on the component side of the board, and should be allowed to run under the part to shield it from noise. Analog ground should be a continuous and uninterrupted plane, except for necessary lead pads and vias, with signal traces on another layer. When drawing a load current from either rail, the output voltage headroom with respect to that rail is limited by the 30Ω typical channel resistance of the output devices; e.g., when sinking 1mA, the minimum output voltage = 30Ω • 1mA = 30mV. See the graph Headroom at Rails vs Output Current in the Typical Performance Characteristics section. The GND pin functions as a return path for power supply currents in the device and should be connected to analog ground. Resistance from the GND pin to system star ground should be as low as possible. When a zero scale DAC output voltage of zero is desired, the REFLO pin (pin 2) should be connected to system star ground. The amplifiers are stable driving capacitive loads of up to 1000pF. Rail-to-Rail Output Considerations In any rail-to-rail voltage output device, the output is limited to voltages within the supply range. Board Layout The excellent load regulation and DC crosstalk performance of these devices is achieved in part by keeping “signal” and “power” grounds separate. Since the analog outputs of the device cannot go below ground, they may limit for the lowest codes as shown in Figure 3b. Similarly, limiting can occur near full scale when the REF pins are tied to VCC. If REF x = VCC and the DAC full-scale error (FSE) is positive, the output for the highest codes limits at VCC as shown in Figure 3c. No full-scale limiting can occur if REF x is less than VCC – FSE. The PC board should have separate areas for the analog and digital sections of the circuit. This keeps digital signals away from sensitive analog signals and facilitates the use of separate digital and analog ground planes which have minimal capacitive and resistive interaction with each other. Offset and linearity are defined and tested over the region of the DAC transfer function where no output limiting can occur. Digital and analog ground planes should be joined at only one point, establishing a system star ground as close to VREF = VCC VREF = VCC POSITIVE FSE OUTPUT VOLTAGE OUTPUT VOLTAGE INPUT CODE OUTPUT VOLTAGE (c) 0 NEGATIVE OFFSET 0V INPUT CODE 32,768 INPUT CODE 65,535 (a) 2600 F03 (b) Figure 3. Effects of Rail-to-Rail Operation On a DAC Transfer Curve. (a) Overall Transfer Function (b) Effect of Negative Offset for Codes Near Zero Scale (c) Effect of Positive Full-Scale Error for Codes Near Full Scale 2604fd 14 LTC2604/LTC2614/LTC2624 PACKAGE DESCRIPTION GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .150 – .157** (3.810 – 3.988) .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) 2 3 4 5 6 7 .0532 – .0688 (1.35 – 1.75) 8 .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .050 (0.406 – 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) .008 – .012 (0.203 – 0.305) TYP .0250 (0.635) BSC GN16 (SSOP) 0204 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 2604fd Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC2604/LTC2614/LTC2624 TYPICAL APPLICATION 5V 5V 1k 1k 10k 10k 0.1μF 10k 0.01μF 0.1μF 10k 20Ω 49.9Ω 70MHz IN 47pF ZC830 0.01μF OUT 10pF 49.9Ω 20pF 49.9Ω ZC830 DAC A DAC B DAC C DAC D OPTIONAL 20k 0.1μF OPTIONAL 20k 0.1μF CS/LD SCK SDI LTC2604 5V 5V LO 2.74k 1% 100k 2.74k 1% 100k 2.74k 1% 90° 2.74k 1% I+Q MODULATOR Q INPUT I INPUT 5V 5V 2.74k 1% 0° 2.74k 1% RF *ZETEX 2.74k 1% 2.74k 1% 2604 F04 (516) 543-7100 Figure 4. Using DAC A and DAC B for Nearly Continuous Attenuation Control and DAC C and DAC D to Trim for Minimum LO Feedthrough in a Mixer RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1458/LTC1458L Quad 12-Bit Rail-to-Rail Output DACs with Added Functionality LTC1458: VCC = 4.5V to 5.5V, VOUT = 0V to 4.096V LTC1458L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V LTC1654 Dual 14-Bit Rail-to-Rail VOUT DAC Programmable Speed/Power LTC1655/LTC1655L Single 16-Bit VOUT DAC with Serial Interface in SO-8 VCC = 5V(3V), Low Power, Deglitched LTC1657/LTC1657L Parallel 5V/3V 16-Bit VOUT DAC Low Power, Deglitched, Rail-to-Rail VOUT LTC1660/LTC1665 Octal 8-Bit/10-Bit VOUT DAC in 16-Pin Narrow SSOP VCC = 2.7V to 5.5V, Micropower, Rail-to-Rail Output LTC1821 Parallel 16-Bit Voltage Output DAC Precision 16-Bit Settling in 2μs for 10V Step LTC2600/LTC2610/LTC2620 Octal 16-Bit/14-Bit/12-Bit Rail-to-Rail DACs in 16-Lead SSOP 250μA per DAC, 2.5V to 5.5V Supply Range LTC2602/LTC2612/LTC2622 Dual 16-Bit/14-Bit/12-Bit Rail-to-Rail DACs in 8-Lead MSOP 300μA per DAC, 2.5V to 5.5V Supply Range 2604fd 16 Linear Technology Corporation LT 0309 REV D • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2004
LTC2604IGN-1#TRPBF 价格&库存

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