Features
Four RS232 and Two RS485 Transceivers
3V to 5.5V Supply Voltage
20Mbps RS485 and 500kbps RS232
Automatic Selection of Integrated RS485 (120Ω)
and RS232 (5kΩ) Termination Resistors
Half-/Full-Duplex RS485 Switching
Logic Loopback Mode
High ESD: ±16kV on Line I/O
1.7V to 5.5V Logic Interface
Supports Up to 256 RS485 Nodes
RS485 Receiver Full Failsafe Eliminates UART Lockup
Available in 38-Pin 5mm × 7mm QFN Package
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LTC2872
RS232/RS485 Dual
Multiprotocol Transceiver
with Integrated Termination
Description
The LTC®2872 is a robust pin-configurable transceiver
that supports RS232, RS485, and RS422 standards while
operating on a single 3V to 5.5V supply. The LTC2872 can
be configured as four RS232 single-ended transceivers
or two RS485 differential transceivers, or combinations
of both, on shared I/O lines.
Pin-controlled integrated termination resistors allow
for easy interface reconfiguration, eliminating external
resistors and control relays. Half-duplex switches allow
four-wire and two-wire RS485 configurations. Loopback
mode steers the driver inputs to the receiver outputs for
diagnostic self-test. The RS485 receivers support up to
256 nodes per bus, and feature full failsafe operation for
floating, shorted or terminated inputs.
Applications
n
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Flexible RS232/RS485/RS422 Interface
Software Selectable Multiprotocol Interface Ports
Point-of-Sale Terminals
Cable Repeaters
Protocol Translators
PROFIBUS-DP Networks
An integrated DC/DC boost converter uses a small inductor and one capacitor, eliminating the need for multiple
supplies for driving RS232 levels.
L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
Typical Applications
RS485 Mode with Duplex Control
1.7V TO VCC
470nF
RS485
FULL HALF
DUPLEX
1.7V TO VCC
3V TO 5.5V
22µH
2.2µF
2.2µF
VL CAP
H/F
RS232 Mode
SW
3V TO 5.5V
22µH
1.7V TO VCC
2.2µF
2.2µF
VCC
VL CAP
LTC2872
SW
RS485
OFF ON
RA1
DY2
A1
VDD
Z1
RA1
A1
DY1
SW
VCC
LTC2872
Y1
120Ω
Z1
A1
RA1
120Ω
B1
B1
RB1
B1
Y2
DY2
Y2
DY2
Y2
DZ2
Z2
DZ2
Z2
RA2
A2
RA2
A2
RB2
B2
RB2
B2
VDD
VEE
VDD
VEE
Z2
RA2
TE485-1
TERMINATION
DY1
3V TO 5.5V
22µH
2.2µF
VL CAP
Y1
DZ1
470nF
2.2µF
VCC
LTC2872
DY1
Y1
Z1
2.2µF
470nF
Mixed Mode with RS485 Termination
A2
B2
VEE
2.2µF
2.2µF
2.2µF
2.2µF
2872 TA01
2.2µF
2872f
1
LTC2872
Absolute Maximum Ratings
Pin Configuration
(Note 1)
RB2
RA2
GND
VL
LB
RA1
RB1
TOP VIEW
38 37 36 35 34 33 32
VCC 1
31 VCC
A1 2
30 A2
B1 3
29 B2
Y1 4
28 Y2
GND 5
27 GND
Z1 6
26 Z2
39
VEE
DY1 7
25 DY2
DZ1 8
24 DZ2
RXEN1 9
23 RXEN2
DXEN1 10
22 DXEN2
21 VCC
TE485_1 11
20 VDD
TE485_2 12
SW
GND
CAP
FEN
H/F
485/232_2
13 14 15 16 17 18 19
485/232_1
Input Supplies
VCC, VL...................................................... –0.3V to 7V
Generated Supplies
VDD................................................. VCC – 0.3V to 7.5V
VEE.......................................................... 0.3V to –7.5V
VDD – VEE...............................................................15V
SW............................................ –0.3V to (VDD + 0.3V)
CAP.............................................. 0.3V to (VEE – 0.3V)
A1, A2, B1, B2, Y1, Y2, Z1, Z2.......................–15V to 15V
DY1, DY2, DZ1, DZ2, RXEN1, RXEN2, DXEN1, DXEN2,
LB, H/F, TE485_1, TE485_2,
485/232_1, 485/232_2................................. –0.3V to 7V
FEN, RA1, RA2, RB1, RB2................–0.3V to (VL + 0.3V)
Differential Enabled Terminator Voltage
(A1-B1 or A2-B2 or Y1-Z1 or Y2-Z2)......................±6V
Operating Temperature
LTC2872C................................................. 0°C to 70°C
LTC2872I..............................................–40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
UHF PACKAGE
38-LEAD (5mm × 7mm) PLASTIC QFN
TJMAX = 125°C, θJA = 34.7°C/W
EXPOSED PAD (PIN #39) IS VEE, MUST BE SOLDERED TO PCB
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2872CUHF#PBF
LTC2872CUHF#TRPBF
2872
38-Lead (5mm × 7mm) Plastic QFN
0°C to 70°C
LTC2872IUHF#PBF
LTC2872IUHF#TRPBF
2872
38-Lead (5mm × 7mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
2872f
2
LTC2872
Electrical
Characteristics
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VL = 3.3V, TE485_1 = TE485_2 = 0V, LB = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Power Supply
VCC
Supply Voltage Operating Range
l
3
VL
Logic Supply Voltage Operating Range
VCC Supply Current in Shutdown Mode
VL ≤ VCC
l
1.7
VCC
V
RXEN1 = RXEN2 = VL,
DXEN1 = DXEN2 = FEN = H/F = 0V
l
8
60
µA
VCC Supply Current in RS485 Transceiver Mode
(Outputs Unloaded) (Note 3)
485/232_1 = 485/232_2 = DXEN1 =
DXEN2 = VL, RXEN1 = RXEN2 = 0V
l
4.5
7
mA
VCC Supply Current in RS232 Transceiver Mode
(Outputs Unloaded) (Note 3)
DXEN1 = DXEN2 = VL; 485/232_1 =
485/232_2 = RXEN1 = RXEN2 = 0V
l
5.5
8
mA
l
0
5
µA
6
VCC
VCC
VCC
V
V
V
V
0.2
0.2
V
V
VL Supply Current in RS485 or RS232 Transceive DXEN1 = DXEN2 = VL, RXEN1 = RXEN2 = 0V
Mode (Outputs Unloaded)
5.5
V
RS485 Drivers
|VOD|
Differential Output Voltage
RL = ∞, VCC = 3V (Figure 1)
RL = 27Ω, VCC = 4.5V (Figure 1)
RL = 27Ω, VCC = 3V (Figure 1)
RL = 50Ω, VCC = 3.13V (Figure 1)
l
l
l
l
∆|VOD|
Difference in Magnitude of Differential Output
Voltage for Complementary Output States
RL = 27Ω, VCC = 3V (Figure 1)
RL = 50Ω, VCC = 3.13V (Figure 1)
l
l
VOC
Common Mode Output Voltage
RL = 27Ω or 50Ω (Figure 1)
l
3
V
∆|VOC|
Difference in Magnitude of Common Mode
RL = 27Ω or 50Ω (Figure 1)
Output Voltage for Complementary Output States
l
0.2
V
IOZD485
Three-State (High Impedance) Output Current
VOUT = 12V or –7V,
VCC = 0V or 3.3V (Figure 2)
l
–100
125
µA
IOSD485
Maximum Short-Circuit Current
–7V ≤ VOUT ≤ 12V (Figure 2)
l
–250
250
mA
l
–100
125
µA
2.1
1.5
2
RS485 Receiver
IIN485
Input Current
VIN = 12V or –7V, VCC = 0V or 3.3V
(Figure 3) (Note 5)
RIN485
Input Resistance
VIN = 12V or –7V, VCC = 0V or 3.3V
(Figure 3) (Note 5)
Differential Input Signal Threshold Voltage (A–B)
–7V ≤ (A or B) ≤ 12 (Note 5)
Differential Input Signal Hysteresis
B = 0V (Notes 3, 5)
Differential Input DC Failsafe Threshold Voltage
(A–B)
–7V ≤ (A or B) ≤ 12 (Note 5)
Differential Input DC Failsafe Hysteresis
B = 0V (Note 5)
Output Low Voltage
Output Low, I(RA) = 3mA (Sinking),
3V ≤ VL ≤ 5.5V
l
0.4
V
Output Low, I(RA) = 1mA (Sinking),
1.7V ≤ VL < 3V
l
0.4
V
Output High, I(RA) = –3mA (Sourcing),
3V ≤ VL ≤ 5.5V
l
VL – 0.4
V
Output High, I(RA) = –1mA (Sourcing),
1.7V ≤ VL < 3V
l
VL – 0.4
V
Three-State (High Impedance) Output Current
0V ≤ RA ≤ VL, VL = 5.5V
l
Short-Circuit Output Current
0V ≤ RA ≤ VL, VL = 5.5V
l
Terminating Resistor
TE485 = VL, A–B = 2V, B = –7V, 0V, 10V
(Figure 8) (Note 5)
l
VOL
VOH
RTERM
Output High Voltage
125
kΩ
±200
l
190
l
–200
–65
mV
0
30
0
108
120
mV
mV
mV
±5
μA
±135
mA
156
Ω
2872f
3
LTC2872
Electrical
Characteristics
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VL = 3.3V, TE485_1 = TE485_2 = 0V, LB = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VEE
V
RS232 Driver
VOLD
Output Low Voltage
RL = 3kΩ, VEE ≤ –6V
l
–5
–5.7
VOHD
Output High Voltage
RL = 3kΩ, VDD ≥ 6.5V
l
5
6.2
Three-State (High Impedance) Output Current
Y or Z = ±15V
l
Output Short-Circuit Current
Y or Z = 0V
l
VDD
V
±156
µA
±35
±90
mA
2.5
V
RS232 Receiver
Input Threshold Voltage
Input Hysteresis
l
0.6
1.5
l
0.1
0.4
1.0
V
0.4
V
Output Low Voltage
I(RA, RB) = 1mA (Sinking),
1.7V ≤ VL ≤ 5.5V
l
Output High Voltage
I(RA, RB) = –1mA (Sourcing),
1.7V ≤ VL ≤ 5.5V
l
VL – 0.4
Input Resistance
–15V ≤ (A, B) ≤ 15V, Receiver Enabled
l
3
5
7
kΩ
Three-State (High Impedance) Output Current
0V ≤ (RA, RB) ≤ VL
l
0
±5
μA
Output Short-Circuit Current
VL = 5.5V, 0V ≤ (RA, RB) ≤ VL
l
±25
±50
mA
V
Logic Inputs
Threshold Voltage
l
Input Current
l
0.4
0
0.75• VL
V
±5
µA
Power Supply Generator
VDD
Regulated VDD Output Voltage
VEE
Regulated VEE Output Voltage
RS232 Drivers Enabled, Outputs Loaded with
RL = 3kΩ to GND, DY1 = DY2 = VL,
DZ1 = DZ2 = 0V (Note 3)
7
V
–6.3
V
ESD
Interface Pins (A, B, Y, Z)
Human Body Model to GND or VCC, Powered
or Unpowered (Note 7)
±16
kV
All Other Pins
Human Body Model (Note 7)
±4
kV
2872f
4
LTC2872
Switching Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VL = 3.3V, TE485_1 = TE485_2 = 0V, LB = 0V unless otherwise
noted. VL ≤ VCC.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
RS485 AC Characteristics
20
Mbps
Maximum Data Rate
(Note 3)
l
Driver Propagation Delay
RDIFF = 54Ω, CL = 100pF (Figure 4)
l
20
70
ns
Driver Propagation Delay Difference
|tPLHD485 – tPHLD485|
RDIFF = 54Ω, CL = 100pF (Figure 4)
l
1
6
ns
tSKEWD485
Driver Skew (Y to Z)
RDIFF = 54Ω, CL = 100pF (Figure 4)
l
1.5
±8
ns
tRD485, tFD485
Driver Rise or Fall Time
RDIFF = 54Ω, CL = 100pF (Figure 4)
l
7.6
15
ns
tZLD485, tZHD485,
tLZD485, tHZD485
Driver Output Enable or Disable Time
FEN = VL, RL = 500Ω, CL = 50pF (Figure 5)
l
120
ns
tZHSD485, tZLSD485
Driver Enable from Shutdown
FEN = 0V, RL = 500Ω, CL = 50pF (Figure 5)
l
0.2
2
ms
tPLHR485, tPHLR485
Receiver Input to Output
CL = 15pF, VCM = 1.5V, |A–B| = 1.5V, (Figure 6)
(Note 5)
l
55
85
ns
tSKEWR485
Differential Receiver Skew
|tPLHR485 – tPHLR485|
CL = 15pF (Figure 6)
l
1
9
ns
tRR485, tFR485
Receiver Output Rise or Fall Time
CL = 15pF (Figure 6)
l
3
15
ns
tZLR485, tZHR485
tLZR485, tHZR485
Receiver Output Enable or Disable Time
FEN = VL, RL = 1k, CL = 15pF (Figure 7)
l
30
85
ns
tRTEN485, tRTZ485
Termination Enable or Disable Time
FEN = VL, VB = 0V, VAB = 2V (Figure 8) (Note 5)
l
100
µs
Maximum Data Rate
RL = 3kΩ, CL = 2500pF,
RL = 3kΩ, CL = 500pF (Note 3)
l
l
100
500
Driver Slew Rate (Figure 9)
RL = 3kΩ, CL = 2500pF
RL = 3kΩ, CL = 50pF
l
l
4
tPHLD232, tPLHD232
Driver Propagation Delay
RL = 3kΩ, CL = 50pF (Figure 9)
l
1
tSKEWD232
Driver Skew
RL = 3kΩ, CL = 50pF (Figure 9)
tZLD232, tZHD232
tLZD232, tHZD232
Driver Output Enable or Disable Time
FEN = VL, RL = 3kΩ, CL = 50pF (Figure 10)
l
tPHLR232, tPLHR232
Receiver Propagation Delay
CL = 150pF (Figure 11)
l
tSKEWR232
Receiver Skew
CL = 150pF (Figure 11)
tRR232, tFR232
Receiver Rise or Fall Time
tZLR232, tZHR232,
tLZR232, tHZR232
Receiver Output Enable or Disable Time
tPLHD485
tPHLD485
RS232 AC Characteristics
kbps
kbps
30
V/µs
V/µs
2
µs
0.4
2
µs
60
200
ns
50
ns
25
ns
CL = 150pF (Figure 11)
l
60
200
ns
FEN = VL, RL = 1kΩ, CL = 150pF (Figure 12)
l
0.7
2
µs
FEN =
l
0.2
2
ms
Power Supply Generator
VDD /VEE Supply Rise Time
, (Notes 3 and 4)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to device ground unless
otherwise specified.
Note 3. Guaranteed by other measured parameters and not tested directly.
Note 4. Time from FEN until VDD ≥ 5V and VEE ≤ –5V. External
components as shown in typical application.
Note 5. Condition applies to A, B for H/F = 0V, and Y, Z for H/F = VL.
Note 6. This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions.
Overtemperature protection activates at a junction temperature exceeding
150°C. Continuous operation above the specified maximum operating
junction temperature may result in device degradation or failure.
Note 7. Guaranteed by design and not subject to production test.
2872f
5
LTC2872
Typical Performance Characteristics
VCC Supply Current vs Supply
Voltage in Shutdown Mode
VCC Supply Current vs Supply
Voltage in Fast Enable Mode
4.6
30
H/F HIGH
20
15
H/F LOW
10
5
4.2
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
INPUT CURRENET (µA)
200
4.4
25
0
85°C
4.0
25°C
3.8
3.6
–40°C
3.4
3.5
3
4.5
4
INPUT VOLTAGE (V)
5
3.0
5.5
3.5
4
4.5
SUPPLY VOLTAGE (V)
5
0.5nF
30
0.05nF
25
20
2.5nF
0.5nF
0.05nF
15
0
3.5
120
80
50 100 150 200 250 300 350 400 450 500
DATA RATE (kbps)
3.5
4
4.5
SUPPLY VOLTAGE (V)
5
–25
0
25
50
TEMPERATURE (°C)
75
100
2872 G07
RL = 54Ω
1.5
VCC = 5V
VCC = 3.3V
0.5
0
–50
5.5
–25
100
50
75
100
RS485 Driver and Receiver Skew
vs Temperature
3.0
VCC = 5V
VCC = 3.3V
2.5
OUTPUT LOW
2.0
0
–50
DRIVER
1.5
1.0
RECEIVER
OUTPUT HIGH
–100
–150
–10
0
25
50
TEMPERATURE (°C)
2872 G06
SKEW (ns)
SHORT-CIRCUIT CURRENT (mA)
DELAY (ns)
10
0
–50
2.0
2872 G05
150
20
RL = 100Ω
2.5
RS485 Driver Short-Circuit Current
vs Short-Circuit Voltage
30
RL = 54Ω
3.0
1.0
85°C
25°C
–40°C
3
RL = 100Ω
4.0
140
RS485 Driver Propagation Delay
vs Temperature
40
100
4.5
100
VCC = 3.3V, VL = 1.7V
VCC = 5V, VL = 1.7V
VCC = 3.3V, VL = 3.3V
VCC = 5V, VL = 5V
10
1
DATA RATE (Mbps)
RS485 Driver Differential Output
Voltage vs Temperature
BOTH RS485 DRIVERS AND
RECEIVERS SWITCHING.
220
Y TIED TO A, Z TIED TO B
H/F = 0V
200
DRIVER AND RECEIVER
TERMINATION ENABLED
180 20Mbps, C = 100pF ON
L
Y AND Z TO GND
160
2872 G04
50
TERMINATION DISABLED
2872 G03
VOLTAGE (V)
2.5nF
35
60
0
0.1
5.5
240
VCC = 5V
VCC = 3.3V
SUPPLY CURRENT (mA)
INPUT CURRENT (mA)
40
DRIVER AND RECEIVER
TERMINATION ENABLED
80
VCC Supply Current
vs Supply Voltage for RS485
at Maximum Data Rate
ALL RS232 DRIVERS
AND RECEIVERS
SWITCHING
45
100
2872 G02
VCC Supply Current
vs RS232 Data Rate
50
120
20
3
VCC = 5V
VCC = 3.3V
ALL RS485 DRIVERS AND
180 RECEIVERS SWITCHING.
Y TIED TO A; Z TIED TO B,
160
H/F = 0V, CL = 100pF
140 ON Y AND Z TO GND
40
3.2
2872 G01
10
VCC Supply Current
vs RS485 Data Rate
0.5
–5
10
0
5
SHORT-CIRCUIT VOLTAGE (V)
15
2872 G08
0
–50
–25
50
0
25
TEMPERATURE (°C)
75
100
2872 G09
2872f
6
LTC2872
Typical Performance Characteristics
RS485 Receiver Propagation
Delay vs Temperature
60
50
4
3
2
1
40
–50
–25
50
0
25
TEMPERATURE (°C)
75
0
100
0
2
8
4
6
OUTPUT CURRENT (mA)
RS232 Receiver Output Voltage
vs Load Current
130
1.6
1.4
4
3
2
1.0
–50
126
0
2
8
4
6
OUTPUT CURRENT (mA)
10
0
25
50
TEMPERATURE (°C)
75
100
RS232 Operation at 500kbps
DY
DZ
124
Z
122
5V/DIV
Y
120
118
RA
116
RB
110
–50
2872 G15
1µs/DIV
WRAPPING DATA
DOUT LOADS: 5kΩ + 50pF
–25
50
0
25
TEMPERATURE (°C)
75
2872 G13
100
2872 G14
RS232 Driver Outputs Enabling
and Disabling
RS485 Operation at 20Mbps
DY
VDD and VEE Powering Up
DXEN
2V/DIV
Y
Z
5V/DIV
1V/DIV
Y
RA
20ns/DIV
H/F HIGH
Y, Z LOADS: 120Ω (DIFF) + 50pF
Z
Z
2872 G16
FEN
FEN = VL
Y
5V/DIV
–25
2872 G12
112
5V/DIV
VCC = 5V
VCC = 3.3V
114
1
0
INPUT LOW
1.2
VCM = –7V
VCM = 2V
VCM = 12V
128
RESISTANCE (Ω)
OUTPUT VOLTAGE (V)
INPUT HIGH
RS485 Termination Resistance
vs Temperature
VL = 5V
VL = 3.3V
VL = 1.7V
5
10
1.8
2872 G11
2872 G10
6
2.0
VL = 5V
VL = 3.3V
VL = 1.7V
5
OUTPUT VOLTAGE (V)
70
DELAY (ns)
6
VCC = 3.3V, VL = 1.7V
VCC = 5V, VL = 1.7V
VCC = 3.3V, VL = 3.3V
VCC = 5V, VL = 5V
RS232 Receiver Input Threshold
vs Temperature
THRESHOLD VOLTAGE (V)
80
RS485 Receiver Output Voltage
vs Load Current
40ns/DIV
VDD
5V/DIV
FEN = 0V
VEE
2872 G17
100µs/DIV
2872 G18
2872f
7
LTC2872
Pin Functions
VCC (Pins 1, 21, 31): Input Supply (3.0V to 5.5V). Tie all
three pins together and connect 2.2µF capacitor between
VCC and GND.
VL (Pin 35): Logic Supply (1.7V to 5.5V) for the receiver
outputs, driver inputs, and control inputs. This pin should
be bypassed to GND with a 0.1µF capacitor if it is not tied
to VCC. VL must be less than or equal to VCC for proper
operation.
VDD (Pin 20): Generated Positive Supply Voltage for RS232
Driver (7V). Connect 2.2µF capacitor between VDD and GND.
VEE (Pin 39):Generated Negative Supply Voltage for RS232
Driver (–6.3V). Tie all pins together and connect 2.2µF
capacitor between VEE and GND.
GND (Pins 5, 18, 27, 34): Ground. Tie all four pins together.
CAP (Pin 17): Charge Pump Capacitor for Generated Negative Supply Voltage. Connect a 470nF capacitor between
CAP and SW.
SW (Pin 19): Switch Pin. Connect 22µH inductor between
SW and VCC.
A1 (Pin 2): RS485 Differential Receiver #1 Positive Input
(Full-Duplex Mode) or RS232 Receiver #1a Input.
A2 (Pin 30): RS485 Differential Receiver #2 Positive Input
(Full-Duplex Mode) or RS232 Receiver #2a Input.
B1 (PIn 3): RS485 Differential Receiver #1 Negative Input
(Full-Duplex Mode) or RS232 Receiver #1b Input.
B2 (Pin 29): RS485 Differential Receiver #1 Negative Input
(Full-Duplex Mode) or RS232 Receiver #2b Input.
RA1 (Pin 37): RS485 Differential Receiver #1 Output or
RS232 Receiver #1a Output.
RA2 (Pin 33): RS485 Differential Receiver #2 Output or
RS232 Receiver #2a Output.
RB1 (Pin 38): RS232 Receiver #1b Output.
RB2 (Pin 32): RS232 Receiver #2b Output.
DY1 (Pin 7): RS485 Differential Driver #1 Input or RS232
Driver #1y Input.
DY2 (Pin 25): RS485 Differential Driver #2 Input or RS232
Driver #2y Input.
DZ1 (Pin 8): RS232 Driver #1z Input.
DZ2 (Pin 24): RS232 Driver #2z Input.
Y1 (Pin 4): RS485 Differential Driver #1 Positive Output
or RS232 Driver #1y Output, RS485 Differential Receiver
#1 Positive Input (Half-Duplex Mode).
Y2 (Pin 28): RS485 Differential Driver #2 Positive Output
or RS232 Driver #2y Output, RS485 Differential Receiver
#2 Positive Input (Half-Duplex Mode).
Z1 (Pin 6): RS485 Differential Driver #1 Negative Output
or RS232 Driver #1z Output, RS485 Differential Receiver
#1 Negative Input (Half-Duplex Mode).
Z2 (Pin 26): RS485 Differential Driver #2 Negative Output
or RS232 Driver #2z Output, RS485 Differential Receiver
#2 Negative Input (Half-Duplex Mode).
485/232_1 (Pin 13): Interface Select #1 Input. A logic low
enables RS232 mode and a high enables RS485 mode for
transceiver #1. The mode determines which transceiver
inputs and outputs are accessible at the LTC2872 pins
as well as which is controlled by the driver and receiver
enable pins.
485/232_2 (Pin 14): Interface Select #2 Input. A logic low
enables RS232 mode and a high enables RS485 mode for
transceiver #2. The mode determines which transceiver
inputs and outputs are accessible at the LTC2872 pins
as well as which is controlled by the driver and receiver
enable pins.
RXEN1 (Pin 9): Receivers #1 Enable. A logic high disables
RS232 and RS485 receivers in transceiver #1, leaving their
outputs Hi-Z. A logic low enables the RS232 or RS485
receivers in transceiver #1, depending on the state of the
Interface Select Input 485/232_1.
RXEN2 (Pin 23): Receivers #2 Enable. A logic high disables
RS232 and RS485 receivers in transceiver #2, leaving their
outputs Hi-Z. A logic low enables the RS232 or RS485
receivers in transceiver #2, depending on the state of the
Interface Select Input 485/232_2.
2872f
8
LTC2872
Pin Functions
DXEN1 (Pin 10): Drivers #1 Enable. A logic low disables the
RS232 and RS485 drivers in transceiver #1, leaving their
outputs in a Hi-Z state. A logic high enables the RS232 or
RS485 drivers in transceiver #1, depending on the state
of the Interface Select Input 485/232_1.
DXEN2 (Pin 22): Drivers #2 Enable. A logic low disables the
RS232 and RS485 drivers in transceiver #2, leaving their
outputs in a Hi-Z state. A logic high enables the RS232 or
RS485 drivers in transceiver #2, depending on the state
of the Interface Select Input 485/232_2.
TE485_1 (Pin 11): RS485 Termination Enable for Transceiver #1. A logic high enables a 120Ω resistor between
pins A1 and B1. If DZ1 is also high, a 120Ω resistor is
enabled between pins Y1 and Z1. A logic low on TE485_1
opens the resistors, leaving A1/B1 and Y1/Z1 unterminated,
independent of DZ1. The differential termination resistors
are never enabled in RS232 mode.
TE485_2 (Pin 12): RS485 Termination Enable for Transceiver #2. A logic high enables a 120Ω resistor between
pins A2 and B2. If DZ2 is also high, a 120Ω resistor is
enabled between pins Y2 and Z2. A logic low on TE485_2
opens the resistors, leaving A2/B2 and Y2/Z2 unterminated,
independent of DZ2. The differential termination resistors
are never enabled in RS232 mode.
H/F (Pin 15): RS485 Half-duplex Select Input for Transceivers #1 and #2. A logic low is used for full duplex
operation where pins A and B are the receiver inputs and
pins Y and Z are the driver outputs. A logic high is used
for half duplex operation where pins Y and Z are both the
receiver inputs and driver outputs and pins A and B do
not serve as the receiver inputs. The impedance on A and
B and state of differential termination between A and B is
independent of the state of H/F. The H/F pin has no effect
on RS232 operation.
FEN (Pin 16): Fast Enable. A logic high enables Fast Enable
Mode. In fast enable mode the integrated DC/DC converter
is active independent of the state of driver, receiver, and
termination enable pins allowing faster circuit enable
times than are otherwise possible. A logic low disables
Fast Enable Mode leaving the state of the DC/DC converter
dependent on the state of driver, receiver, and termination enable control inputs. The DC/DC converter powers
down only when FEN is low and all drivers, receivers, and
terminators are disabled (refer to Table 1).
LB (Pin 36): Loopback Enable for Transceivers #1 and #2.
A logic high enables Logic Loopback diagnostic mode,
internally routing the driver input logic levels to the receiver
output pins within the same transceiver. This applies to
both RS232 channels as well as the RS485 driver/receiver.
The targeted receiver must be enabled for the loopback
signal to be available on its output. A logic low disables
loopback mode. In loopback mode, signals are not inverted
from driver inputs to receiver outputs.
2872f
9
LTC2872
Block Diagram
1.7V TO 5.5V
(≤ VCC)
3V TO 5.5V
470nF
22µH
2.2µF
0.1µF
35
21
VL
VCC
19
SW
17
CAP
15 H/F
16 FEN
36 LB
VDD
TRANSCEIVER #1
10 DXEN
9 RXEN1
RT232
CONTROL
LOGIC
11 TE485_1
13 485/232_1
VEE
PULSE-SKIPPING
BOOST REGULATOR
f = 1.2MHz
GND
VCC
DRIVERS
DY1
2.2µF
39
18
2.2µF
RT485
GND
7
20
232
Y1
1
5
4
RT485
485
120Ω
8
DZ1
232
LOOPBACK
PATH
125k
Z1
6
125k
H/F
RECEIVERS
PORT 1
RT232
232
A1
5k
2
125k
37
RA1
RT485
485
5k
38
22
23
12
14
25
24
33
32
RB1
DXEN2
RXEN2
125k
120Ω
B1
3
232
TRANSCEIVER #2
VCC
GND
TE485_2
485/232_2
Y2
DY2
Z2
DZ2
A2
RA2
B2
RB2
34
31
27
28
26
PORT 2
30
29
GND
2872 BD
2872f
10
LTC2872
Test Circuits
Y OR Z
Y
GND
DY
OR
VL
RL
+
GND
OR
VL
VOD
DRIVER
Z
–
RL
+
DY
IOZD485, IOSD485
DRIVER
VOC
+
–
Z OR Y
VOUT
–
2872 F02
2872 F01
Figure 1. RS485 Driver DC Characteristics
Figure 2. RS485 Driver Output Short-Circuit Current
IIN485
+
–
A OR B
B OR A
VIN
RIN485 =
RECEIVER
VIN
IIN485
2872 F03
Figure 3. RS485 Receiver Input Current and Resistance (Note 5)
tPLHD485
DY
Y
DY
RDIFF
DRIVER
Z
CL
VL
tPLHD485
0V
tSKEWD485
Y, Z
½VOD
VOD
CL
Y-Z
90%
10%
0V
0V
tRD485
90%
10%
tFD485
2872 F04
Figure 4. RS485 Driver Timing Measurement
2872f
11
LTC2872
test circuits
RL
Y
VL
OR
GND
DY
GND
OR
VCC
DXEN
½VL
tZLD485,
tZLSD485
CL
Z
RL
DXEN
CL
VCC
OR
GND
VCC
0.5V
VOL
VOH
0.5V
½VCC
Z OR Y
0V
tLZD485
½VCC
Y OR Z
DRIVER
VL
½VL
0V
tHZD485
tZHD485,
tZHSD485
2872 F05
Figure 5. RS485 Driver Enable and Disable Timing Measurements
VAB
±VAB/2
A–B
A
VCM
B
0V
tPLHR485
RA
RECEIVER
CL
±VAB/2
RA
90%
10%
tPHLR485
½VL
½VL
tRR485
90%
10%
tFR485
tSKEWR485 = tPLHR485 – tPHLR485
–VAB
VCC
0V
2872 F06
Figure 6. RS485 Receiver Propagation Delay Measurements (Note 5)
RXEN
0V TO 3V
3V TO 0V
A
B
RECEIVER
RA
RL
VL
OR
GND
½VL
VL
½VL
tZLR485
½VL
RA
0.5V
½VL
RA
tZHR485
VL
0.5V
CL
RXEN
0V
tLZR485
tHZR485
VOL
VOH
0V
2872 F07
Figure 7. RS485 Receiver Enable and Disable Timing Measurements (Note 5)
2872f
12
LTC2872
test circuits
IA
RECEIVER
TE485
A
RTERM =
+
–
VAB
IA
VL
TE485
½VL
½VL
VAB
tRTEN485
B
0V
90%
IA
+
–
tRTZ485
10%
VB
2872 F08
Figure 8. RS485 Termination Resistance and Timing Measurements (Note 5)
DRIVER
INPUT
DRIVER
OUTPUT
RL
DRIVER
INPUT
CL
tPHLD232
½VL
tPLHD232
tF
3V
DRIVER
INPUT
6V
0V
tR
0V
–3V
SLEW RATE =
VL
½VL
0V
3V
–3V
VOHD
VOLD
tSKEWD232 = |tPHLD232 – tPLHD232|
tF OR tR
2872 F09
Figure 9. RS232 Driver Timing and Slew Rate Measurements
DRIVER
OUTPUT
0V OR VL
DXEN
RL
DXEN
VL
½VL
½VL
CL
DRIVER
OUTPUT
0.5V
5V
tZLD232
DRIVER
OUTPUT
0V
tHZD232
tZHD232
0V
tLZD232
5V
VOHD
0V
0.5V
VOLD
2872 F10
Figure 10. RS232 Driver Enable and Disable Times
2872f
13
LTC2872
test circuits
RECEIVER
INPUT
RECEIVER
INPUT
RECEIVER
OUTPUT
1.5V
tPHLR232
CL
+3V
1.5V
90%
RECEIVER
OUTPUT
½VL
10%
–3V
tPLHR232
½VL
VL
90%
10%
tRR232
tFR232
tSKEWR232 = |tPLHR232 – tPHLR232|
0V
2872 F11
Figure 11. RS232 Receiver Timing Measurements
RECEIVER
OUTPUT
RL
–3V OR +3V
RXEN
GND
OR VL
RXEN
VL
½VL
½VL
tZHR232
CL
RECEIVER
OUTPUT
0.5V
½VL
tZLR232
RECEIVER
OUTPUT
0V
tHZR232
0V
tLZR232
½VL
VOHR
VL
0.5V
VOLR
2872 F12
Figure 12. RS232 Receiver Enable and Disable Times
2872f
14
LTC2872
Function Tables
Table 1. Shutdown and Fast Enable Modes
485/232_1 AND RXEN1 AND DXEN1 AND
485/232_2
RXEN2
DXEN2
FEN
TE485_1 AND
TE485_2
H/F
LB
DC/DC
CONVERTER
MODE AND COMMENTS
0
X
1
0
0
X
X
OFF
Shutdown: All Main Functions Off
1
X
1
0
0
X
X
ON
Fast-Enable: DC/DC Converter On Only
Table 2. Mode Selection Table for a Given Port (FEX = X)
485/232
RXEN
DXEN
TE485
H/F
LB
DC/DC CONVERTER
0
0
1
MODE AND COMMENTS
X
1
X
X
0
ON
RS232 Drivers On
0
X
X
X
0
ON
RS232 Receivers On
X
1
X
X
0
ON
RS485 Driver On
1
0
X
X
X
0
ON
RS485 Receiver On
1
X
X
1
X
X
ON
RS485 Termination Mode (See Table 7)
1
X
X
X
0
0
X
RS485 Full Duplex Mode
1
X
X
X
1
0
X
RS485 Half Duplex Mode
1
0
X
X
X
1
ON
RS485 Loopback Mode
0
0
X
X
X
1
ON
RS232 Loopback Mode
Table 3. RS232 Receiver Mode for a Given Port (485/232 = 0)
RXEN
RECEIVER INPUT (A, B)
CONDITIONS
RECEIVER OUTPUTS (RA, RB)
RECEIVER INPUTS (A, B)
1
0
X
No Fault
Hi-Z
125kΩ
0
No Fault
1
5kΩ
0
1
No Fault
0
5kΩ
0
X
Thermal Fault
Hi-Z
5kΩ
Table 4. RS232 Driver Mode for a Given Port (485/232 = 0)
DXENX
DRIVER INPUT (DY, DZ)
CONDITIONS
DRIVER OUTPUT (Y, Z)
0
1
X
No Fault
125kΩ
0
No Fault
1
1
1
No Fault
0
X
X
Thermal Fault
125kΩ
2872f
15
LTC2872
function tables
Table 5. RS485 Driver Mode for a Given Port (485/232 = 1, TE485 = 0)
DXEN
DY
CONDITIONS
Y
Z
0
X
No Fault
125kΩ
125kΩ
1
0
No Fault
0
1
1
1
No Fault
1
0
X
X
Thermal Fault
125kΩ
125kΩ
Table 6. RS485 Receiver Mode for a Given Port (485/232 = 1, LB = 0)
RXEN
A–B (NOTE 5)
CONDITIONS
RA
1
X
No Fault
Hi-Z
0
< –200mV
No Fault
0
0
> 200mV
No Fault
1
0
Inputs Open or Shorted Together (DC)
No Fault
1
X
X
Thermal Fault
Hi-Z
Table 7. RS485 Termination for a Given Port (485/232 = 1)
TE485
DZ
H/F, LB
CONDITIONS
R(A TO B)
R(Y TO Z)
0
X
X
No Fault
Hi-Z
Hi-Z
1
0
X
No Fault
120Ω
Hi-Z
1
1
X
No Fault
120Ω
120Ω
X
X
X
Thermal Fault
Hi-Z
Hi-Z
Table 8. RS485 Duplex Control for Given Port (485/232 = 1)
H/F
RS485 DRIVER OUTPUTS
RS485 RECEIVER INPUTS
0
Y, Z
A, B
1
Y, Z
Y, Z
Table 9. Loopback Functions for a Given Port
LB
RXEN
TRANSCEIVER MODE
0
X
Not Loopback
1
1
Not Loopback
1
0
Loopback (RA = DY, RB = DZ)
2872f
16
LTC2872
Applications Information
Overview
The LTC2872 is a flexible multiprotocol transceiver supporting RS485/RS422 and RS232 protocols. It can be
powered from a single 3.0V to 5.5V supply with optional
logic interface supply as low as 1.7V. An integrated DC/
DC converter provides the positive and negative supply
rails needed for RS232 operation. Automatically selected
integrated termination resistors for both RS232 and
RS485 protocols are included, eliminating the need for
external components and switching relays. Both parts
include loopback control for self-test and debug as well
as logically-switchable half- and full-duplex control of the
RS485 bus interface.
VCC
3V TO 5.5V
VL
1.7V TO VCC
C1
470nF
L1
22µH
C4
2.2µF
21
19
VCC
SW
VDD
C5
0.1µF
BOOST
REGULATOR
VEE
34 GND
18
20
C2
2.2µF
39
GND
C3
2.2µF
2872 F13
Figure 13. DC/DC Converter with Required External Components
Inductor Selection
The LTC2872 features rugged operation with an ESD rating
of ±15kV HBM on the receiver inputs and driver outputs,
both powered and unpowered. All other pins offer protection exceeding ±4kV.
Table 10. Recommended Inductors
The on-chip DC/DC converter operates from the VCC input,
generating a 7V VDD supply and a charge pumped –6.3V
VEE supply, as shown in Figure 13. VDD and VEE power
the output stage of the RS232 drivers and are regulated
to levels that guarantee greater than ±5V output swing.
The DC/DC converter requires a 22µH inductor (L1) and a
bypass capacitor (C4) of 2.2µF or larger. The charge pump
capacitor (C1) is 470nF and the storage capacitors (C2 and
C3) are 2.2µF. Larger storage capacitors up to 4.7µF may
be used if C1 and C4 are scaled proportionately. Locate
C1-C4 close to their associated pins.
CAP
35 VL
The LTC2872 offers two ports that can be independently
configured as either two RS232 receivers and drivers or
one RS485/RS422 receiver and driver depending on the
state of its 485/232 pins. Control inputs DXEN and RXEN
provide independent control of driver and receiver operation for either RS232 or RS485 transceivers, depending
on the selected operating protocol.
DC/DC Converter
17
An inductor with a value of 22µH ±20% is required. It
must have a saturation current (ISAT) rating of at least
200mA and a DCR (copper wire resistance) of less than
1.3Ω. Some small inductors meeting these requirements
are listed in Table 10.
PART NUMBER
BRC2016T220M
CBC2518T220M
MAX
L ISAT DCR
(µH) (mA) (Ω)
SIZE (mm)
MANUFACTURER
22
22
310
320
1.3
1.0
2 × 1.6 × 1.6 Taiyo Yuden
2.5 × 1.8 × 1.8 t-yuden.com
LQH32CN220K53 22
250
0.92 3.2 × 2.5 × 1.6 Murata
murata.com
Capacitor Selection
The small size of ceramic capacitors makes them ideal for
the LTC2872. Use X5R or X7R dielectric types; their ESR is
low and they retain their capacitance over relatively wide
voltage and temperature ranges. Use a voltage rating of
at least 10V.
Bypass capacitor C5 on the logic supply pin can be omitted
if VL is connected to VCC. See the VL Logic Supply section
for more details about the VL logic supply.
2872f
17
LTC2872
Applications Information
Inrush Current and Supply Overshoot Precaution
In certain applications fast supply slew rates are generated when power is connected. If VCC’s voltage is greater
than 4.5V and its rise time is faster than 10μs, the pins
VDD and SW can exceed their Absolute Maximum values
during start-up. When supply voltage is applied to VCC, the
voltage difference between VCC and VDD generates inrush
current flowing through inductor L1 and capacitors C1 and
C2. The peak inrush current must not exceed 2A. To avoid
this condition, add a 1Ω resistor as shown in Figure 14.
This precaution is not relevant for supply voltages below
4.5V or rise times longer than 10μs.
5V
0V
≤10µs
R1
1Ω
1/8W
C4
2.2µF
INRUSH
CURRENT
19
SW
17
CAP
21
VDD
The RS485 driver provides full RS485/RS422 compatibility. When enabled, if DI is high, Y–Z is positive. When
the driver is disabled, Y and Z output resistance is greater
than 96k (typically 125k) to ground over the entire common
mode range of –7V to 12V. This resistance is equivalent
to the input resistance on these lines when the driver is
configured in half-duplex mode and Y and Z act as the
RS485 receiver inputs.
The RS232 and RS485 driver outputs are protected from
short circuits to any voltage within the Absolute Maximum
range ±15V. The maximum current in this condition is
90mA for the RS232 driver and 250mA for the RS485 driver.
VCC
20
RS485 Driver
Driver Overvoltage and Overcurrent Protection
C1
470nF
L1
22µH
by more than 1V for proper operation. Logic input pins
do not have internal biasing devices to pull them up or
down. They must be driven high or low to establish valid
logic levels; do not float.
18
GND
2872 F14
C2
2.2µF
Figure 14. Supply Current Overshoot Protection
for Input Supplies of 4.5V of Higher
VL Logic Supply
A separate logic supply pin VL allows the LTC2872 to
interface with any logic signal from 1.7V to 5.5V. All logic
I/Os use VL as their high supply. For proper operation, VL
should not be greater than VCC. During power-up, if VL
is higher than VCC, the device will not be damaged, but
behavior of the device is not guaranteed. If VL is not connected to VCC, bypass VL with a 0.1µF capacitor.
RS232 and RS485 driver outputs are undriven and the
RS485 termination resistors are disabled when VL or VCC
is grounded or VCC is disconnected.
Although all logic input pins reference VL as their high
supply, they can be driven up to 7V, independent of VL and
VCC, with the exception of FEN, which must not exceed VL
If an RS485 driver output is shorted to a voltage greater
than VCC, when active high, positive current of about
100mA can flow from the driver output back to VCC. If the
system power supply or loading cannot sink this excess
current, clamp VCC to GND with a Zener diode (e.g., 5.6V,
1W, 1N4734) to prevent an overvoltage condition on VCC.
All devices also feature thermal shutdown protection that
disables the drivers, receivers, and RS485 terminators in
case of excessive power dissipation (see Note 6).
RS485 Balanced Receiver with Full Failsafe Support
The LTC2872 RS485 receiver has a differential threshold
voltage that is about 80mV for signals that are rising
and –80mV for signals that are falling, as illustrated in
Figure 15. If a differential input signal lingers in the window between these thresholds for more than about 2µs,
the rising threshold changes from 80mV to –50mV, while
the falling threshold remains at –80mV. Thus, differential
inputs that are shorted, open, or terminated but not driven
for more than 2µs produce a high on the receiver output,
indicating a failsafe condition.
2872f
18
LTC2872
Applications Information
RA
RISING THRESHOLD
SHIFTS IF SIGNAL IS
IN WINDOW > ~2µs
TO SUPPORT
FAILSAFE
–80mV –50mV
0V
VAB
(NOTE 5)
80mV
2872 F15
Figure 15. RS485 Receiver Input Threshold
Characteristics with Typical Values Shown
The benefit of this dual threshold architecture is that
it supports full failsafe operation yet offers a balanced
threshold, centered on 0V, for normal data signals. This
balance preserves duty cycle for small input signals with
heavily slewed edges, typical of what might be seen at the
end of a very long cable. This performance is highlighted
in Figure 16, where a signal is driven through 4000 feet
of CAT5e cable at 3Mbps. Even though the differential
signal peaks at just over 100mV and is heavily slewed,
the output maintains a nearly perfect signal with almost
no duty cycle distortion.
B
0.1V/DIV
A
0.1V/DIV
5V/DIV
lines, which establishes a logic-high state when all the
transmitters on the network are disabled. The values of
the biasing resistors depend on the number and type
of transceivers on the line and the number and value of
terminating resistors. Therefore, the values of the biasing
resistors must be customized to each specific network
installation, and may change if nodes are added to or
removed from the network.
The internal failsafe feature of the LTC2872 eliminates the
need for external network biasing resistors provided they
are used in a network of transceivers with similar internal
failsafe features. This also allows the network to support a
high number of nodes, up to 256, by eliminating the bias
resistor loading. The LTC2872 transceivers will operate
correctly on biased, unbiased, or under-biased networks.
Receiver Outputs
The RS232 and RS485 receiver outputs are internally
driven high (to VL) or low (to GND) with no external pull-up
needed. When the receivers are disabled, the output pin
becomes Hi-Z with leakage of less than ±5μA for voltages
within the VL supply range.
RS485 Receiver Input Resistance
(A-B)
RA
200ns/DIV
2872 F16
Figure 16. A 3Mbps Signal Driven Down 4000ft of CAT5e
Cable. Top Traces: Received Signals After Transmission
Through Cable; Middle Trace: Math Showing Differences
of Top Two Signals; Bottom Trace: Receiver Output
An additional benefit of the balanced architecture is excellent noise immunity due to the wide effective differential
input signal hysteresis of 160mV for signals transitioning
through the window region in less than 2μs. Increasingly
slower signals will have increasingly less effective hysteresis, limited by the DC failsafe hysteresis of about 30mV.
RS485 Biasing Network Not Required
RS485 networks are often biased with a resistive divider
to generate a differential voltage of ≥200mV on the data
The RS485 receiver input resistance from A or B to GND
(Y or Z to GND in half-duplex mode with driver disabled)
is greater than 96k (typically 125k) when the integrated
termination is disabled. This permits up to a total of 256
receivers per system without exceeding the RS485 receiver
loading specification. The input resistance of the receiver
is unaffected by enabling/disabling the receiver or whether
the part is in half-duplex, full-duplex, loopback mode, or
even unpowered. The equivalent input resistance looking
into the RS485 receiver pins is shown in Figure 17.
125k
A
60Ω
TE485
125k
60Ω
B
2872 F17
Figure 17. Equivalent RS485 Receiver
Input Resistance Into A and B (Note 5)
2872f
19
LTC2872
Applications Information
Selectable RS485 Termination
Proper cable termination is important for good signal fidelity. When the cable is not terminated with its characteristic
impedance, reflections cause waveform distortion.
The LTC2872 offers integrated switchable 120Ω termination
resistors between the differential receiver inputs and also
between the differential driver outputs. This provides the
advantage of being able to easily change, through logic
control, the proper line termination for correct operation
when configuring transceiver networks. Termination should
be enabled on transceivers positioned at both ends of a
network bus.
Termination on the driver nodes is important for cases
where the driver is disabled but there is communication on
the connecting bus from another node. Driver termination
across Y and Z can be disabled independently from the
termination across A and B by setting DZ low. See Table 7
for details.
The termination resistance is maintained over the entire
RS485 common mode range of –7V to 12V as shown in
Figure 18. The voltage across pins with the terminating
resistor enabled should not exceed 6V as indicated in the
Absolute Maximum Ratings table.
126
VCC = 5.0V
VCC = 3.3V
Logic Loopback
A loopback mode connects the driver inputs to the receiver outputs (noninverting) for self test. This applies
to both RS232 and RS485 transceivers. Loopback mode
is entered when the LB pin is set to a logic-high and the
relevant receiver is enabled.
In loopback mode, the drivers function normally. They
can be disabled with output in a Hi-Z state or left enabled
to allow loopback testing in normal operation. Loopback
works in half- or full-duplex modes and does not affect
the termination resistors.
RS485 Cable Length vs Data Rate
Many factors contribute to the maximum cable length
that can be used for for RS485 or RS422 communication,
including driver transition times, receiver threshold, duty
cycle distortion, cable properties and data rate. A typical
curve of cable length versus maximum data rate is shown
in Figure 19. Various regions of this curve reflect different
performance limiting factors in data transmission.
122
10k
120
118
116
–10
–5
0
5
VOLTAGE (V)
10
15
2872 F18
CABLE LENGTH (FT)
RESISTANCE (Ω)
124
the differential receiver inputs. With the H/F pin set to
a logic-high, the Y and Z pins serve as the differential
inputs. In either configuration, the RS485 driver outputs
are always on Y and Z. The impedance looking into the
A and B pins is not affected by H/F control, including the
differential termination resistance. The H/F control does
not affect RS232 operation.
1k
LTC2872
MAX DATA RATE
100
Figure 18. Typical Resistance of the Enabled RS485
Terminator vs Common Mode Voltage of A and B
RS485 Half- and Full-Duplex Control
The LTC2872 is equipped with a control to change the RS485
transceiver operation from full-duplex to half-duplex. With
the H/F pin set to a logic-low, the A and B pins serve as
RS485/RS422
MAX DATA RATE
10
10k
100k
1M
10M
DATA RATE (bps)
100M
2872 F19
Figure 19. Cable Length vs Data Rate (RS485/RS422
Standard Shown in Vertical Solid Line)
2872f
20
LTC2872
Applications Information
At frequencies below 100kbps, the maximum cable length
is determined by DC resistance in the cable. In this example, a cable longer than 4000ft will attenuate the signal
at the far end to less than what can be reliably detected
by the receiver.
For data rates above 100kbps, the capacitive and inductive
properties of the cable begin to dominate this relationship. The attenuation of the cable is frequency and length
dependent, resulting in increased rise and fall times at
the far end of the cable. At high data rates or long cable
lengths, these transition times become a significant part
of the signal bit time. Jitter and intersymbol interference
aggravate this so that the time window for capturing valid
data at the receiver becomes impossibly small.
The boundary at 20Mbps in Figure 19 represents the
guaranteed maximum operating rate of the LTC2872. The
dashed vertical line at 10Mbps represents the specified
maximum data rate in the RS485 standard. This boundary
is not a limit, but reflects the maximum data rate that the
specification was written for.
It should be emphasized that the plot in Figure 19 shows
a typical relation between maximum data rate and cable
length. Results with the LTC2872 will vary, depending on
cable properties such as conductor gauge, characteristic
impedance, insulation material, and solid versus stranded
conductors.
Layout Considerations
All VCC pins must be connected together and all ground
pins must be connected together on the PC board with
very low impedance traces or dedicated planes. A 2.2µF,
or larger, bypass capacitor should be placed less than
0.7cm away from VCC Pin 21. This VCC pin, as well as GND
Pin 18, mainly service the DC/DC converter. Additional
bypass capacitors of 0.1µF or larger, can be added to VCC
Pins 1 and 31 if the traces back to the 2.2µF capacitor
are indirect or narrow. These VCC pins mainly service the
transceivers #1 and #2, respectively. Table 11 summarizes
the bypass capacitor requirements. The capacitors listed
in the table should be placed closest to their respective
supply and ground pin.
Table 11. Bypass Capacitor Requirements
CAPACITOR
SUPPLY (PIN)
RETURN (PIN)
COMMENT
2.2µF
VCC (21)
GND (18)
Required
2.2 µF
VDD (20)
GND (18)
Required
2.2uF
VEE (39)
GND (18)
Required
0.1µF
VL (35)
GND (34)
Required*
0.1µF
VCC (1)
GND (5)
Optional
0.1µF
VCC (31)
GND (27)
Optional
* If VL is not connected to VCC.
Place the charge pump capacitor, C1, directly adjacent to
the SW and CAP pins, with no more than one centimeter
of total trace length to maintain low inductance. Close
placement of the inductor, L1, is of secondary importance
compared to the placement of C1 but should include no
more than two centimeters of total trace length.
The PC board traces connected to high speed signals A/B
and Y/Z should be symmetrical and as short as possible
to minimize capacitive imbalance and to maintain good
differential signal integrity. To minimize capacitive loading
effects, the differential signals should be separated by
more than the width of a trace and should not be routed
on top of each other if they are on different signal planes.
Care should be taken to route outputs away from any sensitive inputs to reduce feedback effects that might cause
noise, jitter, or even oscillations. For example, DI and A/B
should not be routed near the driver or receiver outputs.
2872f
21
LTC2872
Typical Applications
VCC = 3V to 5.5V, VL = 1.7V to VCC. Logic input pins not shown are tied to a valid logic
state. External components necessary for operation are not shown.
VL
VL
LTC2872
LTC2872
485/232_1
485/232_2
LB
DY1
Y1
DZ1
Z1
RA1
A1
RB1
B1
485/232_2
DY1
485/232_1
A1
RB1
B1
DY2
Z2
RA2
A2
DY2
RB2
DZ2
Z2
RA2
A2
RA2
B2
B2
H/F
LB
GND
Y1
DY1
Z1
Z1
A1
A1
RA1
B1
B1
Y2
Y2
DY2
Y2
DZ2
485/232_1
485/232_2
Y1
DY1
Z1
RB1
LTC2872
485/232_2
H/F
LB
GND
Y1
DZ1
Y2
LTC2872
485/232_1
H/F
LB
GND
RA1
DY2
VL
RB2
Z2
Z2
A2
A2
RA2
B2
B2
2872 F20
PORT 1: RS232
PORT 2: RS232
PORT 1: RS232
PORT 2: RS485
PORT 1: RS485
PORT 2: RS232
PORT 1: RS485
PORT 2: RS485
Figure 20. LTC2872 in Various Basic Port Configurations
VL
VL
LTC2872
LB
485/232_2
485/232_1
RXEN1
RXEN2
H/F
GND
DY1
Y1
DZ1
Z1
RA1
A1
VL
H/F
TE485_1
TE485_2
485/232_1
485/232_2
DZ1
DZ2
LTC2872
LB
GND
TE485_1
TE485_2
DZ1
485/232_1
485/232_2
LTC2872
DZ2
H/F
LB
GND
Y1
Y1
RB1
B1
DY1
RA1
120Ω
120Ω
B1
RA2
Z2
Y2
DY2
A2
B2
2872 F21
Figure 21. Loopback in
RS232 and RS485 Modes
RA2
120Ω
120Ω
Z1
A1
Y2
DY2
DY1
RA1
120Ω
A2
2872 F22
Figure 22. Half-Duplex RS485
Mode with Driver and Receiver Line
Termination on Each Port
B1
Y2
DY2
Z2
Z2
120Ω
B2
Z1
A1
A2
RA2
120Ω
B2
2872 F23
Figure 23. Full-Duplex RS485 Mode
with Driver and Receiver Line
Termination on Port 1, and ReceiverOnly Termination on Port 2
2872f
22
LTC2872
typical
Applications CC = 3V to 5.5V, VL = 1.7V to VCC. Logic input pins not shown are tied to a valid logic
V
state. External components necessary for operation are not shown.
½ LTC2872
VL
H/F
TE485
½ LTC2872
½ LTC2872
120Ω
120Ω
VL
VL
TE485
DZ
H/F
TE485
DZ
H/F
2872 F24
Figure 24. Typical RS485 Half Duplex Network
½ LTC2872
TE485
H/F
MASTER
SLAVE
½ LTC2872
½ LTC2872
120Ω
120Ω
120Ω
VL
TE485
DZ
H/F
VL
TE485
DZ
H/F
2872 F25
Figure 25. Typical RS485 Full Duplex Network
2872f
23
LTC2872
typical Applications
VCC = 3V to 5.5V, VL = 1.7V to VCC. Logic input pins not shown are tied to a valid logic
state. External components necessary for operation are not shown.
LTC2872
H/F
S3
Y1
RS485
INTERFACE
Z1
INPUT1
RA1
OUTPUT
A1
RXEN1
S1
H/F
B1
INPUT2
Y2
Z2
INPUT3
RA2
A2
RXEN2
S2
B2
INPUT4
2872 F26
S1
S2
S3
SELECTED INPUT
0
1
1
INPUT1
0
1
0
INPUT2
1
0
1
INPUT3
1
0
0
INPUT4
1
1
X
NONE/Hi-Z
0
0
X
INVALID
Figure 26. RS485 Receiver with 4-Way Selectable Inputs
2872f
24
LTC2872
typical
Applications CC = 3V to 5.5V, VL = 1.7V to VCC. Logic input pins not shown are tied to a valid logic
V
state. External components necessary for operation are not shown.
LTC2872
OUT1
S1
OUT2
S2
LTC2872
RA1
A1
RS232
INPUT
RXEN1
RB2
OUT2
RXEN2
RS232
INPUT
RIN
–OR–
A2
B1
RXEN1
S1
RIN
RA2
RB1
OUT1
B2
RXEN2
S2
2872 F27
S1
S2
RIN
ACTIVE OUTPUT
0
1
5k
OUT1
1
0
5k
OUT2
1
1
62.5k
NONE (Hi-Z)
0
0
2.5k*
OUT1, OUT2
* DOES NOT MEET RS232 SPECIFICATIONS
Figure 27. Sharing RS232 Receiver Inputs
3V TO 5.5V
1.7V TO VCC
VCC
LTC2872
VL
µP
LOGIC
LEVEL
SIGNALS
LINE
LEVEL
SIGNALS
RS232
AND/OR
RS485
GND
2872 F28
Figure 28. Low Voltage Microprocessor Interface
2872f
25
LTC2872
typical Applications
VCC = 3V to 5.5V, VL = 1.7V to VCC. Logic input pins not shown are tied to a valid logic
state. External components necessary for operation are not shown.
RA1
LTC2872
DY2
Y2
RS232
IN
A1
RS232
OUT
Y1
Z2
RS485
OUT
A2
120Ω
DY1
B2
RS485
IN
RA2
2872 F29
Figure 29. RS232 ↔ RS485 Conversion
RA1
LTC2872
DY2
Y2
A1
B1
120Ω
120Ω
A2
Y1
Z1
Z2
120Ω
120Ω
DY1
B2
RA2
2872 F29
Figure 30. RS485 Repeater
2872f
26
LTC2872
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
UHF Package
38-Lead Plastic QFN (5mm × 7mm)
(Reference LTC DWG # 05-08-1701 Rev C)
0.70 ± 0.05
5.50 ± 0.05
5.15 ± 0.05
4.10 ± 0.05
3.00 REF
3.15 ± 0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
5.5 REF
6.10 ± 0.05
7.50 ± 0.05
RECOMMENDED SOLDER PAD LAYOUT
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
5.00 ± 0.10
0.75 ± 0.05
PIN 1 NOTCH
R = 0.30 TYP OR
0.35 × 45° CHAMFER
3.00 REF
37
0.00 – 0.05
38
0.40 ±0.10
PIN 1
TOP MARK
(SEE NOTE 6)
1
2
5.15 ± 0.10
5.50 REF
7.00 ± 0.10
3.15 ± 0.10
(UH) QFN REF C 1107
0.200 REF 0.25 ± 0.05
0.50 BSC
R = 0.125
TYP
R = 0.10
TYP
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE
OUTLINE M0-220 VARIATION WHKD
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
2872f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTC2872
Typical Application
5V
2.2µF
1.8V
0.1µF
VCC
3.3V
470nF
22µH
SW
2.2µF
CAP
VL
485/232_2
485/232_1
TE485_2
TE485_1
LB
LTC2872
DZ1
GND
H/F
RS485
Z1
CAT5e
CABLE
A1
RA1
SW
CAP
DZ2
LB
GND
Y1
120Ω
Z1
1.8V
INTERFACE
VCC
VL
485/232_1
485/232_2
LTC2872
TE485_1
TE485_2
DZ1
H/F
Y1
DY1
470nF
22µH
120Ω
A1
DYI
RA1
120Ω
120Ω
B1
B1
DY2
Y2
Y2
DZ2
Z2
Z2
RA2
A2
3.3V
INTERFACE
DY2
RS232
A2
RA2
120Ω
RA2
A2
VDD
VEE
B2
VDD
VEE
2872 F31
2.2µF
2.2µF
2.2µF
2.2µF
Figure 31. LTC2872 on Left: RS485 Half-Duplex and Terminated, Plus RS232.
LTC2872 on Right: Dual RS485 Half-Duplex and Terminated. All External Components Shown
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LTC2870/LTC2871
RS232/RS485 Multiprotocol Transceivers with
Integrated Termination
3V to 5.5V Supply, Automatic Selection of Termination Resistors,
Duplex Control, Logic Supply Pin, ±26kV ESD
LTC1334
Single 5V RS232/RS485 Multiprotocol Transceiver Dual Port, Single 5V Supply, Configurable, ±10kV ESD
LTC1387
Single 5V RS232/RS485 Multiprotocol Transceiver Single Port, Configurable
LTC2801/LTC2802/
LTC2803/LTC2804
1.8V to 5.5V RS232 Single and Dual Transceivers
Up to 1Mbps, ±10kV ESD, Logic Supply Pin, Tiny DFN Packages
LTC2854/LTC2855
3.3V 20Mbps RS485 Transceiver with Integrated
Switchable Termination
3.3V Supply, Integrated, Switchable, 120Ω Termination Resistor, ±25kV ESD
LTC2859/LTC2861
20Mbps RS485 Transceiver with Integrated
Switchable Termination
5V Supply, Integrated, Switchable, 120Ω Termination Resistor, ±15kV ESD
LTM2881
Complete Isolated RS485/RS422 μModule®
Transceiver + Power
20Mbps, 2500VRMS Isolation with Integrated DC/DC Converter,
Integrated Switchable 120Ω Termination Resistor, ±15kV ESD
LTM2882
Dual Isolated RS232 µModule Transceiver + Power 1Mbps, 2500VRMS Isolation with Integrated DC/DC Converter, ±10kV ESD
2872f
28 Linear Technology Corporation
LT 0312 • PRINTED IN USA
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