LTC7803
40V Low IQ, 3MHz Synchronous Step-Down
Controller with Spread Spectrum
FEATURES
DESCRIPTION
Low Operating IQ: 12µA (14V VIN to 3.3V VOUT)
n Wide Input Voltage Range: 4.5V to 40V
n Output Voltage Up to 40V
n Spread Spectrum Operation
n R
SENSE or DCR Current Sensing
n PassThru™/100% Duty Cycle Capable
n Programmable Fixed Frequency (100kHz to 3MHz)
n Phase-Lockable Frequency (100kHz to 3MHz)
n Selectable Continuous, Pulse-Skipping, or Low
Ripple Burst Mode® Operation at Light Loads
n Low Shutdown I : 1.2μA
Q
n Thermally Enhanced 16-Pin 3mm × 3mm QFN and
MSOP Packages
n AEC-Q100 Qualification in Progress
The LTC®7803 is a high performance, 100% Duty Cycle
Capable, synchronous step-down DC/DC switching
regulator controller that drives an all N-channel power
MOSFET stage. Synchronous rectification increases efficiency, reduces power losses and eases thermal requirements. A constant frequency current mode architecture
allows a phase-lockable switching frequency of up to
3MHz. The LTC7803 operates from a wide 4.5V to 40V
input supply range.
n
The very low no-load quiescent current extends operating
runtime in battery powered systems. OPTI-LOOP compensation allows the transient response to be optimized
over a wide range of output capacitance and ESR values.
The MODE pin selects among Burst Mode operation,
pulse-skipping mode, or continuous inductor current
mode at light loads.
APPLICATIONS
The LTC7803 additionally features spread spectrum operation which significantly reduces the peak radiated and
conducted noise on both the input and output supplies,
making it easier to comply with electromagnetic interference (EMI) standards.
Automotive and Transportation
n Industrial
n Military/Avionics
n Telecommunications
n
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. Patents including 5481178, 5705919, 5929620, 6144194, 6177787, 6580258.
TYPICAL APPLICATION
High Efficiency Wide Input Range 375kHz 3.3V/20A Step-Down Regulator
Efficiency vs Output Current
Efficiency vs Output Current
RUN
TRACK//SS
0.1µF
6.19k
LTC7803
39pF
×2
TG
BOOST
ITH
0.68µH
0.1µF
SW
10µF
×4
+
56µF
×2
100
VIN
5V TO 38V
1mΩ
+
×2
BG
470µF
4.7nF
INTVCC
100µF
×4
4.7µF
PLLIN/SPREAD
SENSE+
MODE
SENSE–
FREQ
GND
EXTVCC
VOUT
3.3V
20A
1k
80
100
70
60
10
VIN = 12V
VIN = 24V
VIN = 36V
50
40
215k
VFB
7803 TA01a
10k
VOUT = 3.3V
90
EFFICIENCY (%)
VIN
30
0.0001
1
BURST MODE OPERATION
FIGURE 11 CIRCUIT
0.001
0.01
0.1
1
OUTPUT CURRENT (A)
10
0.1
7803 TA01b
68.1k
Rev. A
Document Feedback
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1
LTC7803
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Input Supply Voltage (VIN).......................... –0.3V to 40V
BOOST........................................................ –0.3V to 46V
SW ................................................................ –5V to 40V
RUN............................................................ –0.3V to 40V
SENSE+, SENSE– ........................................ –0.3V to 40V
EXTVCC Voltage.......................................... –0.3V to 30V
INTVCC, (BOOST-SW)................................... –0.3V to 6V
TRACK/SS, FREQ.......................................... –0.3V to 6V
ITH................................................................ –0.3V to 2V
PLLIN/SPREAD, MODE, VFB.......................... –0.3V to 6V
BG, TG................................................................ (Note 9)
Operating Junction Temperature Range (Note 2,8)
LTC7803E, LTC7803I.......................... –40°C to 125°C
LTC7803H, LTC7803J......................... –40°C to 150°C
Storage Temperature Range............... –65°C to 150°C
PIN CONFIGURATION
EXTVCC
16 15 14 13
SW
TG
BOOST
BG
VIN
EXTVCC
INTVCC
MODE
TG 1
12 INTVCC
SW 2
TJMAX = 125°C, θJA = 40°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
4
9
5
6
7
8
RUN
MSE PACKAGE
16-LEAD PLASTIC MSOP
10 PLLIN/SPREAD
ITH
SENSE
+
11 MODE
17
GND
TRACK/SS 3
VFB
17
GND
16
15
14
13
12
11
10
9
SENSE–
1
2
3
4
5
6
7
8
VIN
TOP VIEW
TRACK/SS
SENSE+
SENSE–
VFB
ITH
RUN
FREQ
PLLIN/SPREAD
BG
BOOST
TOP VIEW
FREQ
UD PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFN
TJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
Rev. A
2
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LTC7803
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC7803EMSE#PBF
LTC7803EMSE#TRPBF
7803
16-Lead Plastic MSOP
–40°C to 125°C
LTC7803IMSE#PBF
LTC7803IMSE#TRPBF
7803
16-Lead Plastic MSOP
–40°C to 125°C
LTC7803JMSE#PBF
LTC7803JMSE#TRPBF
7803
16-Lead Plastic MSOP
–40°C to 150°C
LTC7803HMSE#PBF
LTC7803HMSE#TRPBF
7803
16-Lead Plastic MSOP
–40°C to 150°C
LTC7803EUD#PBF
LTC7803EUD#TRPBF
LHGT
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LTC7803IUD#PBF
LTC7803IUD#TRPBF
LHGT
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LTC7803JUD#PBF
LTC7803JUD#TRPBF
LHGT
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 150°C
LTC7803HUD#PBF
LTC7803HUD#TRPBF
LHGT
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 150°C
LTC7803EMSE#WPBF
LTC7803EMSE#WTRPBF
7803
16-Lead Plastic MSOP
–40°C to 125°C
LTC7803IMSE#WPBF
LTC7803IMSE#WTRPBF
7803
16-Lead Plastic MSOP
–40°C to 125°C
LTC7803JMSE#WPBF
LTC7803JMSE#WTRPBF
7803
16-Lead Plastic MSOP
–40°C to 150°C
LTC7803HMSE#WPBF
LTC7803HMSE#WTRPBF
7803
16-Lead Plastic MSOP
–40°C to 150°C
LTC7803EUD#WPBF
LTC7803EUD#WTRPBF
LHGT
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LTC7803IUD#WPBF
LTC7803IUD#WTRPBF
LHGT
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LTC7803JUD#WPBF
LTC7803JUD#WTRPBF
LHGT
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 150°C
LTC7803HUD#WPBF
LTC7803HUD#WTRPBF
LHGT
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 150°C
AUTOMOTIVE PRODUCTS**
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
these models.
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C, VIN = 12V, RUN = 12V, EXTVCC = 0V, unless otherwise noted.
(Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Supply
VIN
Input Supply Operating Range
IVIN
VIN Current in Regulation
4.5
Front Page Circuit, 14V to 3.3V
No Load
40
12
V
µA
Controller Operation
VOUT
Output Voltage Operating Range
VFB
Regulated Feedback Voltage
gm
VSENSE(MAX)
0.8
(Note 4) VIN = 4.5V to 40V,
ITH Voltage = 0.6V to 1.2V
0°C to 85°C, All Grades
Feedback Current
(Note 4)
Feedback Overvoltage Protection Threshold
Measured at VFB Relative to Regulated VFB
Transconductance Amplifier gm
(Note 4) ITH = 1.2V, Sink/Source = 5μA
Maximum Current Sense Threshold
VFB = 0.7V, VSENSE– = 3.3V
l
40
V
0.788
0.792
0.800
0.800
0.812
0.808
V
V
±5
±50
nA
7
10
13
%
2
l
45
50
mmho
55
mV
Rev. A
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3
LTC7803
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C, VIN = 12V, RUN = 12V, EXTVCC = 0V, unless otherwise noted.
(Note 2)
SYMBOL
PARAMETER
CONDITIONS
ISENSE+
SENSE+ Pin Current
VSENSE+ = 3.3V
MIN
TYP
MAX
ISENSE–
SENSE1– Pin Current
VSENSE– < 2.9V
3.2V ≤ VSENSE– < INTVCC – 0.5V
VSENSE– > INTVCC + 0.5V
Soft-Start Charge Current
VTRACK/SS = 0V
RUN Pin ON Threshold
VRUN Rising
RUN Pin Hysteresis
VRUN Falling
100
mV
VIN Shutdown Current
RUN = 0V
1.2
µA
VIN Sleep Mode Current
SENSE– < 2.9V, EXTVCC = 0V
SENSE– ≥ 3.2V
14
±1
2
30
685
l
UNITS
µA
µA
µA
µA
10
12.5
15
µA
1.15
1.2
1.25
V
DC Supply Current (Note 5)
VIN Current, EXTVCC = 0V
VIN Current, EXTVCC ≥ 4.8V
EXTVCC Current, EXTVCC ≥ 4.8V
SENSE– Current
Pulse-Skipping or Forced Continuous Mode VIN
or EXTVCC Current (Note 3)
28
µA
5
1
4
9
µA
µA
µA
µA
µA
2
mA
Gate Drivers
tON(MIN)
TG or BG On-Resistance
Pull-up
Pull-down
3
1.5
Ω
Ω
TG or BG Transition Time
Rise Time
Fall Time
(Note 6)
CLOAD = 3300pF
CLOAD = 3300pF
25
15
ns
ns
TG Off to BG On Delay Synchronous Switch-On CLOAD = 3300pF Each Driver
Delay Time
15
ns
BG Off to TG On Delay Top Switch-On Delay
Time
CLOAD = 3300pF Each Driver
15
ns
TG Minimum On-Time
(Note 7)
40
ns
Maximum Duty Factor for TG
FREQ = 0V
100
%
Maximum Duty Factor for BG
Output Overvoltage
BOOST Charge Pump Available Output Current
VBOOST = 16V, VSW = 12V, FREQ = 0V,
Forced Continuous Mode
100
%
30
65
µA
4.95
5.15
5.35
V
1
1
2
2
%
%
4.7
4.8
INTVCC Low Dropout (LDO) Linear Regulator
INTVCC Regulation Point
UVLO
INTVCC Load Regulation
ICC = 0mA to 50mA, VIN ≥ 6V
ICC = 0mA to 50mA, VEXTVCC ≥ 6V
EXTVCC LDO Switchover Voltage
EXTVCC Rising
EXTVCC Switchover Hysteresis
EXTVCC Falling
Undervoltage Lockout
INTVCC Rising
l
4.15
4.25
4.35
V
INTVCC Falling
l
3.75
3.85
3.95
V
4.6
250
V
mV
Rev. A
4
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LTC7803
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C, VIN = 12V, RUN = 12V, EXTVCC = 0V, unless otherwise noted.
(Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
340
375
410
kHz
2.0
2.25
2.5
MHz
450
100
500
3
550
kHz
kHz
MHz
3
MHz
Spread Spectrum Oscillator and Phase-Locked Loop
fOSC
fSYNC
Low Fixed Frequency
VFREQ = 0V, PLLIN/SPREAD = 0V
High Fixed Frequency
VFREQ = INTVCC, PLLIN/SPREAD = 0V
Programmable Frequency
RFREQ = 374kΩ, PLLIN/SPREAD = 0V
RFREQ =75kΩ, PLLIN/SPREAD = 0V
RFREQ = 12.5kΩ, PLLIN/SPREAD = 0V
Synchronizable Frequency Range
PLLIN/SPREAD = External Clock
PLLIN Input High Level
PLLIN Input Low Level
Spread Spectrum Frequency Range
(Relative to fOSC)
PLLIN/SPREAD = INTVCC
Minimum Frequency
Maximum Frequency
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC7803 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC7803E is guaranteed to meet specifications over a 0°C
to 125°C operating junction temperature range. Specifications down to
–40°C operating junction temperature for the LTC7803E is assured by
design, characterization and correlation with statistical process controls.
The LTC7803I is guaranteed over the –40°C to 125°C operating junction
temperature range. The LTC7803J and LTC7803H are guaranteed over
the –40°C to 150°C operating junction temperature range. High junction
temperatures degrade operating lifetimes; operating lifetime is derated
for junction temperatures greater than 125°C. Note that the maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors. The junction
temperature (TJ, in °C) is calculated from the ambient temperature (TA, in
°C) and power dissipation (PD, in Watts) according to the formula: TJ = TA
+ (PD • θJA), where θJA (in °C/W) is the package thermal impedance.
Note 3: When SENSE– ≥ 3.2V or EXTVCC ≥ 4.8V, VIN supply current is
transferred to these pins to reduce the total input supply quiescent current.
SENSE– bias current is reflected to the input supply by the formula IVIN =
ISENSE– • VOUT/(VIN • h), where h is the efficiency. EXTVCC bias current is
similarly reflected to the input supply when biased by an output greater
than the EXTVCC LDO Switchover Voltage (4.7V typical).
l
l
0.1
l
l
2.2
0.5
0
20
V
V
%
%
Note 4: The LTC7803 is tested in a feedback loop that servos VITH to a
specified voltage and measures the resultant VFB. The specification at 85°C
is not tested in production and is assured by design, characterization and
correlation to production testing at other temperatures (125°C for the
LTC7803E/LTC7803I, 150°C for the LTC7803J/LTC7803H).
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 6: Rise and fall times are measured using 10% and 90% levels.
Delay times are measured using 50% levels.
Note 7: The minimum on-time condition is specified for an inductor
peak-to-peak ripple current >40% of IMAX (See Minimum On-Time
Considerations in the Applications Information section).
Note 8: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device.
Note 9: Do not apply a voltage or current source to these pins. They must
be connected to capacitive loads only, otherwise permanent damage may
occur.
Rev. A
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5
LTC7803
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiencyand
andPower
PowerLoss
Loss
Efficiency
vsOutput
OutputCurrent
Current
vs
Efficiency
EfficiencyvsvsOutput
OutputCurrent
Current
100
100k
BURST EFFICIENCY
90
PULSE–SKIPPING
EFFICIENCY
FCM EFFICIENCY
60
1k
50
40
30
20
PULSE–SKIPPING
LOSS
BURST LOSS
VIN = 12V
VOUT = 3.3V
FIGURE 11 CIRCUIT
10
0
0.001
0.01
0.1
1
OUTPUT CURRENT (A)
10 20
100
10
1
100
1k
95
80
EFFICIENCY (%)
70
10k
FCM LOSS
POWER LOSS (mW)
EFFICIENCY (%)
80
VOUT = 3.3V
90
Efficiencyvs
vsInput
InputVoltage
Voltage
Efficiency
10k
100
70
60
10
VIN = 12V
VIN = 24V
VIN = 36V
50
40
30
0.0001
BURST MODE OPERATION
FIGURE 11 CIRCUIT
0.001
0.01
0.1
1
OUTPUT CURRENT (A)
10
EFFICIENCY (%)
100
1
90
85
ILOAD = 1mA
80
75
0.1
70
VOUT = 3.3V
FIGURE 11 CIRCUIT
0
5
7803 G02
7803 G01
LOAD STEP
5A/DIV
LOAD STEP
5A/DIV
INDUCTOR
CURRENT
5A/DIV
INDUCTOR
CURRENT
5A/DIV
INDUCTOR
CURRENT
5A/DIV
VOUT
200mV/DIV
VOUT
200mV/DIV
VOUT
200mV/DIV
7803 G04
Inductor
CurrentatatLight
LightLoad
Load
Inductor Current
15 20 25 30
INPUT VOLTAGE (V)
35
40
Load Step
Load Step
Forced Continuous
Mode
Forced
Continuous
Mode
LOAD STEP
5A/DIV
VIN = 12V
100µs/DIV
VOUT=3.3V
200mA TO 10A LOAD STEP
FIGURE 11 CIRCUIT
10
7803 G03
Load Step
Load Step Pulse-Skipping
Mode
Pulse–Skipping
Mode
Load Step
Load
Mode Operation
Burst Step
ModeBurst
Operation
VIN = 12V
100µs/DIV
VOUT=3.3V
200mA TO 10A LOAD STEP
FIGURE 11 CIRCUIT
ILOAD = 10A
VIN = 12V
100µs/DIV
VOUT=3.3V
200mA TO 10A LOAD STEP
FIGURE 11 CIRCUIT
7803 G05
7803 G06
RegulatedFeedback
FeedbackVoltage
Voltage vs
Regulated
Temperature
vs
Temperature
Soft Start–Up
Start-Up
Soft
REGULATED FEFEDBACK VOLTAGE (V)
0.808
FORCED
CONTINUOUS
MODE
VOUT
1V/DIV
5A/DIV
Burst MODE
OPERATION
PULSE–
SKIPPING
MODE
0V
VIN = 6V
5µs/DIV
VOUT=3.3V
ILOAD=200uA
FIGURE 11 CIRCUIT
7803 G07
VIN = 12V
2ms/DIV
VOUT=3.3V
FIGURE 11 CIRCUIT
0.806
0.804
0.802
0.800
0.798
0.796
0.794
0.792
–55
7803 G08
25
5
35
65
95
TEMPRATURE (°C)
125
155
7803 G09
Rev. A
6
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LTC7803
TYPICAL PERFORMANCE CHARACTERISTICS
Shutdown Current
Shutdown Current vs Temperature
10
14.5
9
14.0
8
13.5
13.0
12.5
12.0
11.5
11.0
10.5
Shutdown
Current vs Input Voltage
vs Input Voltage
3.0
7
6
5
4
3
2
–25
5
35
65
95
TEMPRATURE (°C)
125
0
–55
155
–25
5
35
65
95
TEMPRATURE (°C)
125
0
155
0
5
10
15 20 25 30
INPUT VOLTAGE (V)
35
40
7803 G12
Undervoltage Lockout Threshold
vs Temperature
RUN Pin Threshold
RUN
Pin Thresholds vs Temperature
vs Temperature
50
5.0
1.30
4.8
45
1.25
35
30
25
20
15
10
4.6
RUN RISING
1.20
INTVCC VOLTAGE (V)
40
RUN PIN VOLTAGE (v)
QUIESCENT CURRENT (µA)
1.0
7803 G11
Quiescent Current vs Temperature
1.15
RUN FALLING
1.10
0
–55
–25
5
35
65
95
TEMPRATURE (°C)
125
155
–25
5.2
5.1
5.1
INTVCC VOLTAGE (V)
5.2
4.7
4.6
5
35
65
95
TEMPRATURE (°C)
125
5
10
15 20 25 30
INPUT VOLTAGE (V)
35
40
7803 G16
INTVCC FALLING
3.6
25
5
35
65
95
TEMPERATURE (°C)
INTVCC and EXTVCC
5.0
4.9
4.8
4.7
4.75
5
5.25 5.50
INPUT VOLTAGE (V)
155
INTV
EXTVCC vs Load Current
vs Load
Current
CC and
NO LOAD
4.5
4.50
125
7803 G15
INTV
INTVCC
Line Regulation
Regulation
CC Line
4.6
0
3.8
3.0
–55
155
INTVCC VOLTAGE (V)
5.3
NO LOAD
4.8
4.0
7804 G14
INTVCC Line Regulation
4.9
INTVCC RISING
4.2
3.2
1.00
–55
7803 G13
5.0
4.4
3.4
1.05
5
INTVCC VOLTAGE (V)
1.5
0.5
7803 G10
4.5
2.0
1
10.0
–55
5.3
VIN = VBIAS
2.5
SHUTDOWN CURRENT (µA)
15.0
SHUTDOWN CURRENT (µA)
SOFT–START CURRENT (µA)
Soft-Start Pull-Up
Soft–Start
Pull–up Current
Current
vs Temperature
Temperature
vs
5.75
6
7803 G17
5.3
5.2
EXTVCC = 0V
5.1
5.0
EXTVCC = 8.5V
4.9
4.8
4.7
4.6
4.5
EXTVCC = 5V
4.4
4.3
4.2
4.1 VBIAS = 12V
4.0
0
10 20 30 40 50 60
LOAD CURRENT (mA)
70
80
7803 G18
Rev. A
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7
LTC7803
TYPICAL PERFORMANCE CHARACTERISTICS
5.6
INTVCC
INTVCC VOLTAGE (V)
5.2
5.0
EXTVCC RISING
4.8
4.6
4.4
EXTVCC FALLING
4.2
4.0
3.8
–55
25
5
35
65
95
TEMPERATURE (°C)
125
155
50
PULSE–SKIPPING MODE
40
BURST MODE
OPERATION
30
20
10
0
–10
–20
–30
FORCED CONTINUOUS MODE
0
0.2
0.4
7803 G19
800
750
SENSE– = 12V
700
650
600
550
500
450
400
350
300
+
250 SENSE PIN
200
SENSE– < 2.9V
150
100
SENSE– = 3.2V
50
0
–55 –25
5
35
65
95 125
TEMPRATURE (°C)
SENSE CURRENT (µA)
SENSE CURRENT (µA)
SENSE Pin Input Current
vs Temperature
155
800
750
700
650
600
550
500
450
400
350
300
250
200
150
100
50
0
CHANGE IN FREQUENCY (%)
6
5
4
3
SENSE– = 3.2V
0.4
1
0
–1
–2
–3
–4
–25
5
35
65
95
TEMPERATURE (°C)
0.6 0.8 1.0
ITH VOLTAGE (V)
1.2
125
155
VBOOST – VSW = 4V
60
50
40
30
20
10
0
T = 155°C
T = –55°C
40
0
0
600
1200
1800
2400
OPERATING FREQUENCY (kHz)
3000
7803 G26
7803 G25
100 200 300 400 500 600 700 800
FEEDBACK VOLTAGE (mV)
7803 G24
100
60
30
40
Charge Pump Charging Current vs
Switch
Voltage
vs
Switch
Voltage
T = 25°C
50
5
10 15 20 25 30 35
VSENSE COMMON MODE VOLTAGE (V)
70
7803 G23
80
70
0
7803 G21
1.4
VSW = 12V
90
SENSE+ PIN
Foldback Current Limit
SENSE– < 2.9V
0.2
SENSE– PIN
Foldback Current Limit
SENSE+ PIN
0
pin Input Current vs
SENSE Pin
VSENSE
Voltage
vs
VSENSE
Voltage
7803 G20
SENSE−=12V
100
RFREQ=374k(100kHz)
RFREQ=75k(500kHz)
RFREQ=12.5k(3MHz)
RFREQ=GND(375kHz)
RFREQ=INTVCC(2.25MHz)
2
–5
–55
1.4
Charge Pump Charging Current
vs Operating Frequency
CHARGE PUMP CHARGING CURRENT (µA)
7
1.2
800
750
700
650
600
550
500
450
400
350
300
250
200
150
100
50
0
SENSE Pin Input Current vs ITH
Voltage
vs
ITH Voltage
7803 G22
Oscillator Frequency vs
Temperature
vs
Temperature
0.6 0.8 1.0
ITH VOLTAGE (V)
CHARGE PUMP CHARGING CURRENT (µA)
5.4
60
MAXIMUM CURRENT SENSE THRESHOLD (mV)
MAXIMUM CURRENT SENSE VOLTAGE (mV)
5.8
Maximum Current Sense
Threshold vs ITH Voltage
SENSE CURRENT (µA)
EXTVCC Switchover and INTVCC
Voltage vsvsTemperature
Voltages
Temperature
VBOOST – VSW = 4V
90
80
FREQ = GND
70
60
FREQ = INTVCC
50
40
30
20
10
0
0
5
10 15 20 25 30
SWITCH VOLTAGE (V)
35
40
7803 G27
Rev. A
8
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LTC7803
PIN FUNCTIONS
(MSOP/QFN)
TRACK/SS (Pin 1/Pin 3): External Tracking and Soft-Start
Input. The LTC7803 regulates the VFB voltage to the lesser
of 0.8V or the voltage on the TRACK/SS pin. An internal
12.5µA pull-up current source is connected to this pin.
A capacitor to ground at this pin sets the ramp time to
the final regulated output voltage. The ramp time is equal
to 0.65ms for every 10nF of capacitance. Alternatively, a
resistor divider on another voltage supply connected to
the TRACK/SS pin allows the LTC7803 output to track the
other supply during start-up.
SENSE+ (Pin 2/Pin 4): The Positive (+) Input to the
Differential Current Comparators. The ITH pin voltage and
controlled offsets between the SENSE– and SENSE+ pins
in conjunction with RSENSE set the current trip threshold.
SENSE– (Pin 3/Pin 5): The Negative (–) Input to the
Differential Current Comparators. When SENSE – is
greater than INTVCC, the SENSE– pin supplies current to
the current comparator. When SENSE– is 3.2V or greater,
it supplies the majority of the sleep mode quiescent current instead of VIN, further reducing the input-referred
quiescent current.
VFB (Pin 4/Pin 6): Error Amplifier Feedback Input. Connect
an external resistor divider between the output voltage
and the VFB pin to set the regulated output voltage.
ITH (Pin 5/Pin 7): Error Amplifier Output and Switching
Regulator Compensation Point. The current comparator
trip point increases with this control voltage. Place compensation components between the ITH pin and GND.
RUN (Pin 6/Pin 8): Run Control Input. Forcing this pin
below 1.2V disables switching of the corresponding
controller. Forcing this pin below 0.7V shuts down the
LTC7803, reducing quiescent current to approximately
1.2µA. This pin can be tied to VIN for always-on operation.
FREQ (Pin 7/Pin 9): Frequency Control pin for the internal VCO. Connecting the pin to GND forces the VCO to
a fixed low frequency of 375kHz. Connecting the pin
to INTVCC forces the VCO to a fixed high frequency of
2.25MHz. Frequencies between 100kHz and 3MHz can
be programmed using a resistor between FREQ and GND.
Minimize the capacitance on this pin.
PLLIN/SPREAD (Pin 8/Pin 10): External Synchronization
Input and Spread Spectrum Selection. When an external
clock is applied to this pin, the phase-locked loop will
force the rising TG signal to be synchronized with the
rising edge of the external clock. When an external clock
is present, the regulators operate in pulse-skipping mode
if it is selected by the MODE pin, or in forced continuous
mode otherwise. When not synchronizing to an external
clock, tie this input to INTVCC to enable spread spectrum
dithering of the oscillator or to ground to disable spread
spectrum.
MODE (Pin 9/Pin 11): Mode Select Input. This input
determines how the LTC7803 operates at light loads.
Pulling this pin to ground selects Burst Mode operation.
An internal 100k resistor to ground also invokes Burst
Mode operation when the pin is floating. Tying this pin
to INTVCC forces continuous inductor current operation.
Tying this pin to INTVCC through a 100k resistor selects
pulse-skipping operation.
INTVCC (Pin 10/Pin 12): Output of the Internal 5.15V Low
Dropout Regulator (LDO). The driver and control circuits
are powered by this supply. Must be decoupled to GND
with a minimum of 4.7μF ceramic or tantalum capacitor.
EXTVCC (Pin 11/Pin 13): External Power Input to an
Internal LDO Connected to INTVCC. This LDO supplies
INTVCC power, bypassing the internal LDO powered from
VIN whenever EXTVCC is higher than 4.7V. See INTVCC
Regulators in the Applications Information section. Do not
exceed 30V on this pin. Tie this pin to GND if the EXTVCC
LDO is not used.
VIN (Pin 12/Pin 14): Main Bias Input Supply Pin. A bypass
capacitor should be tied between this pin and GND.
BG (Pin 13/Pin 15): High Current Gate Drive for Bottom
(Synchronous) N-Channel MOSFET. Voltage swing at this
pin is from GND to INTVCC.
BOOST(Pin 14/Pin 16): Bootstrapped Supply to the Top
Side Floating Driver. Connect a capacitor between the
BOOST and SW pin. Also connect a low leakage Schottky
diode between the BOOST and INTVCC pins.
Rev. A
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9
LTC7803
PIN FUNCTIONS
(MSOP/QFN)
TG(Pin 15/Pin 1): High Current Gate Drive for the Top
N-Channel MOSFET. This is the output of floating driver
with a voltage swing of INTVCC superimposed on the
switch node voltage SW.
GND (Exposed Pad Pin 17/Exposed Pad Pin 17): Ground.
Connects to the source of the bottom (main) N-channel
MOSFET and the (–) terminal(s) of CIN and COUT. All
small-signal components and compensation components
should also connect to this ground. The exposed pad must
be soldered to the PCB for rated thermal performance.
SW(Pin 16/Pin 2): Switch Node Connection to the
Inductor.
FUNCTIONAL DIAGRAM
INTVCC
DB
BOOST
VIN
CHARGE PUMP
DROP
OUT
DET
FREQ
SPREAD SPECTRUM
OSCILLATOR
AND PLL
PLLIN/SPREAD
S
Q
R
Q
1.2V
RUN
CIN
SW
TOP ON
SWITCH
LOGIC BOT
SHDN
INTVCC
BG
+
–
0.425V
MODE
+
ICMP
+
–
–+
+–
IR
–
SENSE+
+
2.7V
0.65V
SENSE–
EXTVCC
SLOPE COMP
5.15V
VFB
5.15V
LDO
EN
+
EA
–
LDO
EN
+
–
INTVCC
SHDN
RST
2(VFB)
0.80V
TRACK/SS
RB
RA
+
OV
–
GND
VOUT
COUT
2mV
VIN
RSENSE
L
SLEEP
–
100k
4.7V
CB
TG
TOP
0.88V
ITH
12.5µA
TRACK/SS
FOLDBACK
SHDN
RC
CC2
CC
CSS
7803 FD
Rev. A
10
For more information www.analog.com
LTC7803
OPERATION
Main Control Loop
The LTC7803 uses a constant frequency, peak current
mode step-down architecture. During normal operation,
the external top MOSFET is turned on when the clock for
that channel sets the RS latch, and is turned off when the
main current comparator, ICMP, resets the RS latch. The
peak inductor current at which ICMP trips and resets the
latch is controlled by the voltage on the ITH pin, which is
the output of the error amplifier, EA. The error amplifier
compares the output voltage feedback signal at the VFB
pin (which is generated with an external resistor divider
connected across the output voltage, VOUT, to ground)
to the internal 0.800V reference voltage. When the load
current increases, it causes a slight decrease in VFB relative to the reference, which causes the EA to increase the
ITH voltage until the average inductor current matches
the new load current.
After the top MOSFET is turned off each cycle, the bottom MOSFET is turned on until either the inductor current
goes to far negative (or starts to reverse in Burst or pulse
skipping mode as indicated by the current comparator IR)
or the beginning of the next clock cycle.
INTVCC/EXTVCC Power
Power for the top and bottom MOSFET drivers and most
other internal circuitry is derived from the INTVCC pin.
When the EXTVCC pin is tied to a voltage less than 4.7V,
the VIN LDO (low dropout linear regulator) supplies 5.15V
from VIN to INTVCC. If EXTVCC is taken above 4.7V, the VIN
LDO is turned off and an EXTVCC LDO is turned on. Once
enabled, the EXTVCC LDO supplies 5.15V from EXTVCC to
INTVCC. Using the EXTVCC pin allows the INTVCC power to
be derived from a high efficiency external source.
Boost Supply and Dropout (BOOST and SW pins)
The top MOSFET driver is biased from the floating bootstrap capacitor, CB, which normally recharges during each
cycle through an external low leakage Schottky diode or
PN Junction diode, DB, diode when the top MOSFET turns
off. If the input voltage, VIN, decreases to a voltage close
to VOUT, the loop may enter dropout and attempt to turn
on the top MOSFET continuously. The LTC7803 has an
internal charge pump that allows the top MOSFET to be
turned on continuously at 100% duty cycle.
Shutdown and Start-Up (RUN, TRACK/SS Pins)
The LTC7803 can be shutdown using the RUN pin. Pulling
this pin below 1.1V shuts down the main control loop.
Pulling the RUN pin below 0.7V disables the controller and
most internal circuits, including the INTVCC LDOs. In this
state, the LTC7803 draws only 1μA of quiescent current.
The RUN pin needs to be externally pulled up or driven
directly by logic. It can also be implemented as an undervoltage lockout (UVLO) by connecting it to the output of an
external resistor divider network off VIN (see Applications
Information section).
The start-up of the controller’s output voltage VOUT is
controlled by the voltage on the TRACK/SS pin. When
the voltage on the TRACK/SS pin is less than the 0.8V
internal reference, the LTC7803 regulates the VFB voltage to the TRACK/SS pin voltage instead of the 0.8V
reference. This allows the TRACK/SS pin to be used to
program a soft-start by connecting an external capacitor from the TRACK/SS pin to SGND. An internal 12.5μA
pull-up current charges this capacitor creating a voltage
ramp on the TRACK/SS pin. As the TRACK/SS voltage
rises linearly from 0V to 0.8V (and beyond), the output
voltage VOUT rises smoothly from zero to its final value.
Alternatively the TRACK/SS pin can be used to cause the
start-up of VOUT to track that of another supply. Typically,
this requires connecting to the TRACK/SS pin an external resistor divider from the other supply to ground (see
Applications Information section).
Light Load Current Operation: Burst Mode Operation,
Pulse-Skipping or Forced Continuous Mode (MODE
Pin)
The LTC7803 can be enabled to enter high efficiency
Burst Mode operation, constant frequency pulse-skipping
mode, or forced continuous conduction mode at low load
currents.
To select Burst Mode operation, tie the MODE pin to GND.
To select forced continuous operation, tie the MODE pin
Rev. A
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11
LTC7803
OPERATION
to INTVCC. To select pulse-skipping mode, tie the MODE
pin to a DC voltage greater than 1.2V and less than
INTVCC – 1.3V. An internal 100k resistor to GND invokes
Burst Mode operation when the MODE pin is floating and
pulse-skipping mode when the MODE pin is tied to INTVCC
through an external 100k resistor.
When the controller is enabled for Burst Mode operation, the minimum peak current in the inductor is set to
approximately 25% of the maximum sense voltage even
though the voltage on the ITH pin indicates a lower value.
If the average inductor current is higher than the load current, the error amplifier, EA, will decrease the voltage on
the ITH pin. When the ITH voltage drops below 0.425V,
the internal sleep signal goes high (enabling sleep mode)
and both external MOSFETs are turned off. The ITH pin is
then disconnected from the output of the EA and parked
at 0.45V.
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current that the LTC7803 draws
to only 14μA. When VOUT is 3.2V or higher, the majority
of this quiescent current is supplied by the SENSE– pin,
which further reduces the input-referred quiescent current by the ratio of VIN/VOUT multiplied by the efficiency.
In sleep mode, the load current is supplied by the output
capacitor. As the output voltage decreases, the EA’s output begins to rise. When the output voltage drops enough,
the ITH pin is reconnected to the output of the EA, the
sleep signal goes low, and the controller resumes normal
operation by turning on the top external MOSFET on the
next cycle of the internal oscillator.
When the controller is enabled for Burst Mode operation, the inductor current is not allowed to reverse. The
reverse current comparator, IR, turns off the bottom external MOSFET just before the inductor current reaches zero,
preventing it from reversing and going negative. Thus, the
controller operates in discontinuous operation.
In forced continuous operation or clocked by an external
clock source to use the phase-locked loop (see Frequency
Selection and Phase-Locked Loop section), the inductor
current is allowed to reverse at light loads or under large
transient conditions. The peak inductor current is determined by the voltage on the ITH pin, just as in normal
operation. In this mode, the efficiency at light loads is
lower than in Burst Mode operation. However, continuous operation has the advantage of lower output voltage
ripple and less interference to audio circuitry. In forced
continuous mode, the output ripple is independent of load
current.
When the MODE pin is connected for pulse-skipping
mode, the LTC7803 operates in PWM pulse-skipping
mode at light loads. In this mode, constant frequency
operation is maintained down to approximately 1% of
designed maximum output current. At very light loads, the
current comparator, ICMP, may remain tripped for several
cycles and force the external top MOSFET to stay off for
the same number of cycles (i.e., skipping pulses). The
inductor current is not allowed to reverse (discontinuous operation). This mode, like forced continuous operation, exhibits low output ripple as well as low audio noise
and reduced RF interference as compared to Burst Mode
operation. It provides higher low current efficiency than
forced continuous mode, but not nearly as high as Burst
Mode operation.
Unlike forced continuous mode and pulse-skipping mode,
Burst Mode cannot be synchronized to an external clock.
Therefore, if Burst Mode is selected and PLLIN/SPREAD
pin is clocked to use the phase-locked loop, the LTC7803
switches from Burst Mode to forced continuous mode.
Frequency Selection, Spread Spectrum and PhaseLocked Loop (FREQ and PLLIN/SPREAD Pins)
The selection of switching frequency is a trade-off between
efficiency and component size. Low frequency operation increases efficiency by reducing MOSFET switching
losses, but requires larger inductance and/or capacitance
to maintain low output ripple voltage.
The free running switching frequency of the LTC7803 is
selected using the FREQ pin. If the PLLIN/SPREAD pin is
not being driven by an external clock source, the FREQ
pin can be tied to GND, tied to INTVCC or programmed
Rev. A
12
For more information www.analog.com
LTC7803
OPERATION
through an external resistor. Tying FREQ to GND selects
375kHz while tying FREQ to INTVCC selects 2.25MHz.
Placing a resistor between FREQ and GND allows the frequency to be programmed between 100kHz and 3MHz,
as shown in Figure 8.
The PLLIN/SPREAD pin is TTL compatible with thresholds
of 1.6V (rising) and 1.1V (falling) and is guaranteed to
operate with a clock signal swing of 0.5V to 2.5V.
Switching regulators can be particularly troublesome for
applications where electromagnetic interference (EMI) is
a concern. To improve EMI, the LTC7803 can operate in
spread spectrum mode, which is enabled by tying the
PLLIN/SPREAD pin to INTVCC. This feature varies the
switching frequency with typical boundaries of 0% to
+20% of the frequency set by the FREQ pin.
An overvoltage comparator guards against transient
overshoots as well as other more serious conditions that
may overvoltage the output. When the VFB pin rises by
more than 10% above its regulation point of 0.8V, the top
MOSFET is turned off and the bottom MOSFET is turned
on until the overvoltage condition is cleared.
A phase-locked loop (PLL) is available on the LTC7803
to synchronize the internal oscillator to an external clock
source that is connected to the PLLIN/SPREAD pin. The
LTC7803’s phase detector (PFD) and low pass filter adjust
the voltage) of the VCO input to align the turn-on of the
controller’s external top MOSFET to the rising edge of the
synchronizing signal.
The VCO input voltage is prebiased to the free running
frequency set by the FREQ pin before the external clock
is applied. If prebiased near the external clock frequency,
the PLL loop only needs to make slight changes to the
VCO input in order to synchronize the rising edge of the
external clock to the rising edge of TG. For more rapid
lock-in to the external clock, use the FREQ pin to set the
internal oscillator to approximately the frequency of the
external clock. The LTC7803’s PLL is guaranteed to lock
to an external clock source whose frequency is between
100kHz and 3MHz.
Output Overvoltage Protection
Foldback Current
When the output voltage falls to less than 50% of its
nominal level, foldback current limiting is activated, progressively lowering the peak current limit in proportion to
the severity of the overcurrent or short-circuit condition.
Foldback current limiting is disabled during the soft-start
interval (as long as the VFB voltage is keeping up with the
TRACK/SS voltage).
BOOST Supply Refresh and Internal Charge Pump
The top MOSFET driver is biased from the floating bootstrap capacitor, CB, which normally recharges during each
cycle through an external diode when the bottom MOSFET
turns on. There is an internal charge pump that keeps the
required bias on BOOST. The charge pump always operates in both forced continuous mode and pulse-skipping
mode. In Burst Mode operation, the charge pump is turned
off during sleep and enabled when the chip wakes up. The
internal charge pump can normally supply a charging current of 65μA.
Rev. A
For more information www.analog.com
13
LTC7803
APPLICATIONS INFORMATION
The Typical Application on the first page is a basic
LTC7803 application circuit. LTC7803 can be configured
to use either DCR (inductor resistance) sensing or low
value resistor sensing. The choice between the two current sensing schemes is largely a design trade-off between
cost, power consumption and accuracy. DCR sensing is
becoming popular because it saves expensive current
sensing resistors and is more power efficient, especially
in high current applications. However, current sensing
resistors provide the most accurate current limits for the
controller. Other external component selection is driven
by the load requirement, and begins with the selection of
RSENSE (if RSENSE is used) and inductor value. Next, the
power MOSFETs and Schottky diodes are selected. Finally,
input and output capacitors are selected.
SENSE+ and SENSE– Pins
programmed current limit unpredictable. If inductor DCR
sensing is used (Figure 2b), sense resistor R1 should be
placed close to the switching node, to prevent noise from
coupling into sensitive small-signal nodes.
The maximum current limit threshold voltage of the current comparator is programmed to be 50mV.
TO SENSE FILTER,
NEXT TO THE CONTROLLER
COUT
INDUCTOR OR RSENSE
Figure 1. Sense Lines Placement with Inductor or Sense Resistor
VIN
INTVCC
The SENSE+ and SENSE– pins are the inputs to the current
comparators. The common mode voltage range on these
pins is 0V to 40V (abs max), enabling the LTC7803 to
regulate output voltages up to a maximum of 40V.
The SENSE+ pin is high impedance, drawing less than
≈ 1μA. This high impedance allows the current comparators to be used in inductor DCR sensing.
The impedance of the SENSE– pin changes depending on
the common mode voltage. When SENSE– is less than
2.9V, it is relatively high impedance, drawing about 2µA.
When SENSE– is greater than 3.2V but is less than INTVCC
– 0.5V, the pin draws about 30μA to bias internal circuitry
from VOUT, thereby reducing the effective input supply
current. When SENSE– is above INTVCC + 0.5V, a higher
current (~500μA) flows into the pin. Between INTVCC –
0.5V and INTVCC + 0.5V, the current transitions from the
smaller current to the higher current.
Filter components mutual to the sense lines should be
placed close to the LTC7803, and the sense lines should
run close together to a Kelvin connection underneath the
current sense element (shown in Figure 1). Sensing current elsewhere can effectively add parasitic inductance
and capacitance to the current sense element, degrading
the information at the sense terminals and making the
7803 F01
VIN
SENSE RESISTOR
WITH PARASITIC
INDUCTANCE
RSENSE ESL
BOOST
TG
SW
LTC7803
VOUT
RF*CF = ESL/RSENSE
POLE-ZERO
CANCELLATION
BG
RF
SENSE+
CF
SENSE–
PLACE RF AND CF NEAR
SENSE PINS
GND
7803 F02a
(2a) Using a Resistor to Sense Current
VIN
INTVCC
VIN
BOOST
INDUCTOR
TG
L
SW
LTC7803
DCR
VOUT
BG
R1
SENSE+
C1
R2
SENSE–
GND
PLACE C1 NEAR
SENSE PINS
(R1||R2) • C1 =
L
DCR
RSENSE(EQ) = DCR
R2
R1 + R2
7803 F02b
(2b) Using the Inductor DCR to Sense Current
Figure 2. Current Sensing Methods
Rev. A
14
For more information www.analog.com
LTC7803
APPLICATIONS INFORMATION
Low Value Resistor Current Sensing
Inductor DCR Sensing
A typical sensing circuit using a discrete resistor is shown
in Figure 2a. RSENSE is chosen based on the required output current.
For applications requiring the highest possible efficiency
at high load currents, the LTC7803 is capable of sensing
the voltage drop across the inductor DCR, as shown in
Figure 2b. The DCR of the inductor represents the small
amount of DC resistance of the copper wire, which can
be less than 1mΩ for today’s low value, high current
inductors. In a high current application requiring such
an inductor, power loss through a sense resistor would
cost several points of efficiency compared to inductor
DCR sensing.
The current comparator has a maximum threshold
VSENSE(MAX) of 50mV. The current comparator threshold
voltage sets the peak of the inductor current, yielding
a maximum average output current, IMAX, equal to the
peak value less half the peak-to-peak ripple current, ∆IL.
To calculate the sense resistor value, use the equation:
RSENSE =
VSENSE(MAX)
ΔI
IL(MAX) + L
2
To ensure that the application will deliver full load current over the full operating temperature range, choose
the minimum value for VSENSE(MAX) in the Electrical
Characteristics table and account for tolerances in switching frequency, inductance, and RSENSE resistance, as
well as applicable voltage ranges.
To avoid potential jitter or instability due to PCB noise coupling into the current sense signal, the AC current sensing
ripple of ΔVSENSE = ΔIL •RSENSE should also be checked to
ensure a good signal-to-noise ratio. In general, for a reasonably good PCB layout, a target VSENSE AC ripple range
of 10mV to 20mV at 50% duty cycle is recommended for
both RSENSE and DCR sensing applications.
The parasitic inductance (ESL) of the sense resistor introduces significant error in the current sense signal, particularly for lower inductor value (< 3μH) or higher current
(> 5A) applications. This error may be compensated for
with an RC filter into the sense pins as shown in Figure 2a.
Set the RC filter time constant RF • CF = ESL/RSENSE for
optimal cancellation of the ESL. Surface mount sense
resistors in low ESL wide footprint geometries are recommended to minimize this error. If not specified on the
manufacturer’s data sheet, the ESL can be approximated
as 0.4nH for a resistor with a 1206 footprint and 0.2nH
for a 1225 footprint.
If the external (R1||R2) • C1 time constant is chosen to
be exactly equal to the L/DCR time constant, the voltage
drop across the external capacitor is equal to the drop
across the inductor DCR multiplied by R2/(R1 + R2). R2
scales the voltage across the sense terminals for applications where the DCR is greater than the target sense
resistor value. To properly dimension the external filter
components, the DCR of the inductor must be known. It
can be measured using a good RLC meter, but the DCR
tolerance is not always the same and varies with temperature; consult the manufacturers’ data sheets for detailed
information.
Using the inductor ripple current value from the Inductor
Value Calculation section, the target sense resistor value
is:
RSENSE =
VSENSE(MAX)
ΔI
IL(MAX) + L
2
To ensure that the application will deliver full load current over the full operating temperature range, choose
the minimum value for VSENSE(MAX) in the Electrical
Characteristics table.
Next, determine the DCR of the inductor. When provided,
use the manufacturer’s maximum value, usually given at
20°C. Increase this value to account for the temperature
coefficient of copper resistance, which is approximately
0.4%/°C. A conservative value for TL(MAX) is 100°C.
Rev. A
For more information www.analog.com
15
LTC7803
APPLICATIONS INFORMATION
To scale the maximum inductor DCR to the desired sense
resistor value (RD), use the divider ratio:
RD =
RSENSE(EQUIV)
DCRMAX at TL(MAX)
C1 is usually selected to be in the range of 0.1μF to
0.47μF. This forces R1 || R2 to around 2k, reducing error
that might have been caused by the SENSE+ pin’s ±1μA
current.
The target equivalent resistance R1 || R2 is calculated
from the nominal inductance, C1 value, and DCR:
The equivalent resistance R1 || R2 is scaled to the temperature inductance and maximum DCR:
R1|| R2 =
L
(DCR at 20°C) • C1
The sense resistor values are:
The maximum power loss in R1 is related to duty cycle,
and will occur in continuous mode at the maximum input
voltage:
The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because
of MOSFET switching and gate charge losses. In addition to this basic trade-off, the effect of inductor value
on ripple current and low current operation must also be
considered.
The maximum average inductor current IL(MAX) is equal
to the maximum output current. The peak current is equal
to the average inductor current plus half of the inductor
ripple current, ΔIL, which decreases with higher inductance or higher frequency and increases with higher VIN:
R1|| R2
R1• RD
R1=
; R2 =
RD
1− RD
PLOSS R1=
Inductor Value Calculation
(VIN(MAX) − VOUT) • VOUT
R1
Ensure that R1 has a power rating higher than this value.
If high efficiency is necessary at light loads, consider this
power loss when deciding whether to use DCR sensing
or sense resistors. Light load power loss can be modestly higher with a DCR network than with a sense resistor, due to the extra switching losses incurred through
R1. However, DCR sensing eliminates a sense resistor,
reduces conduction losses and provides higher efficiency
at heavy loads. Peak efficiency is about the same with
either method.
ΔIL =
1
⎛ V
⎞
VOUT ⎜ 1− OUT ⎟
⎝
(f)(L)
VIN ⎠
Accepting larger values of ∆IL allows the use of low inductances, but results in higher output voltage ripple and
greater core losses. A reasonable starting point for setting
ripple current is ∆IL = 0.3(IMAX). The maximum ∆IL occurs
at the maximum input voltage.
The inductor value also has secondary effects. The transition to Burst Mode operation begins when the average
inductor current required results in a peak current below
25% of the current limit determined by RSENSE. Lower
inductor values (higher ∆IL) will cause this to occur at
lower load currents, which can cause a dip in efficiency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Rev. A
16
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APPLICATIONS INFORMATION
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or molypermalloy cores. Actual core loss is independent of core size
for a fixed inductor value, but it is very dependent on
inductance value selected. As inductance increases, core
losses go down. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
to the gate charge curve specified VDS. When the IC is
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
V
Main Switch Duty Cycle = OUT
VIN
V −V
Synchronous Switch Duty Cycle = IN OUT
VIN
The MOSFET power dissipations at maximum output current are given by:
Ferrite designs have very low core loss and are preferred
for high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite
core material saturates hard, which means that inductance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Power MOSFET and Schottky Diode (Optional)
Selection
Two external power MOSFETs must be selected for the
LTC7803 controller: one N-channel MOSFET for the top
(main) switch, and one N-channel MOSFET for the bottom
(synchronous) switch.
The peak-to-peak drive levels are set by the INTVCC
voltage. This voltage is typically 5.15V during start-up
(see EXTVCC Pin Connection). Consequently, logic-level
threshold MOSFETs must be used in most applications.
Pay close attention to the BVDSS specification for the
MOSFETs as well.
Selection criteria for the power MOSFETs include the on
resistance, RDS(ON), Miller capacitance, CMILLER, input
voltage and maximum output current. Miller capacitance,
CMILLER, can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data
sheet. CMILLER is equal to the increase in gate charge
along the horizontal axis while the curve is approximately
flat divided by the specified change in VDS. This result is
then multiplied by the ratio of the application applied VDS
V
PMAIN = OUT (IMAX ) 2 (1+ δ) RDS(ON) +
VIN
⎛I
⎞
( VIN) 2 ⎜ MAX ⎟ (RDR +RG ) (CMILLER) •
⎝ 2 ⎠
⎡
1
1 ⎤
+
⎢⎣ V
⎥( f)
INTVCC – VTHMIN VTHMIN ⎦
V –V
PSYNC = IN OUT (IMAX ) 2 (1+ δ) RDS(ON)
VIN
where d is the temperature dependency of RDS(ON) ,RG
is the internal gate resistance of the MOSFET and RDR
(approximately 2Ω) is the effective driver resistance at the
MOSFET’s Miller threshold voltage. VTHMIN is the typical
MOSFET minimum threshold voltage.
Both MOSFETs have I2R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages and high switching frequencies. For VIN < 20V and frequencies less than
500KHz the high current efficiency generally improves
with larger MOSFETs, while for VIN > 20V and frequencies above 500KHz the transition losses rapidly increase
to the point that the use of a higher RDS(ON) device with
lower CMILLER actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1+ d) is generally given for a MOSFET in the
form of a normalized RDS(ON) vs Temperature curve, but
d = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
Rev. A
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LTC7803
APPLICATIONS INFORMATION
A Schottky diode can be inserted in parallel with the bottom MOSFET to conduct during the dead-time between
the conduction of the two power MOSFETs. This prevents
the body diode of the bottom MOSFET from turning on,
storing charge during the dead-time and requiring a
reverse recovery period that could cost as much as 3%
in efficiency at high VIN. A 1A to 3A Schottky is generally
a good compromise for both regions of operation due to
the relatively small average current. Larger diodes result
in additional transition losses due to their larger junction
capacitance.
A small (0.1μF to 1μF) bypass capacitor between the chip
VIN pin and ground, placed close to the LTC7803, is also
suggested. A small (≤10Ω) resistor placed between CIN
(C1) and the VIN pin provides further isolation.
CIN and COUT Selection
where f is the operating frequency, COUT is the output
capacitance and ∆IL is the ripple current in the inductor.
The output ripple is highest at maximum input voltage
since ∆IL increases with input voltage.
The selection of CIN is usually based off the worst-case
RMS input current. The highest (VOUT)(IOUT) product
needs to be used in the formula shown in Equation 1
to determine the maximum RMS capacitor current
requirement.
The selection of COUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering. The
output ripple (∆V) is approximated by:
1
⎛
⎞
ΔVOUT ≈ ΔIL ⎜ ESR +
⎟
⎝
8 • f • COUT ⎠
Setting Output Voltage
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (VOUT)/(VIN). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
The LTC7803 output voltage is set by an external feedback resistor divider carefully placed across the output,
as shown in Figure 3. The regulated output voltage is
determined by:
I
1/ 2
CIN Required IRMS ≈ MAX ⎡⎣( VOUT ) ( VIN − VOUT )⎤⎦
VIN
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do
not offer much relief. Note that capacitor manufacturers’
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the capacitor, or to choose a capacitor rated at a higher temperature
than required. Several capacitors may be paralleled to
meet size or height requirements in the design. Due to
the high operating frequency of the LTC7803, ceramic
capacitors can also be used for CIN. Always consult the
manufacturer if there is any question.
⎛ R ⎞
VOUT = 0.8V ⎜ 1+ B ⎟
⎝ RA ⎠
To improve the frequency response, a feedforward capacitor, CFF, may be used. Great care should be taken to route
the VFB line away from noise sources, such as the inductor
or the SW line.
VOUT
LTC7803
RB
CFF
VFB
RA
7803 F03
Figure 3. Setting Output Voltage
Rev. A
18
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LTC7803
APPLICATIONS INFORMATION
RUN Pin
Tracking and Soft-Start (TRACK/SS Pin)
The LTC7803 is enabled using the RUN pin. It has a rising
threshold of 1.2V with 50mV of hysteresis. Pulling the
RUN pin below 1.1V shuts down the main control loop.
Pulling it below 0.7V disables the controller and most
internal circuits, including the INTVCC LDOs. In this state,
the LTC7803 draws only 1.2μA of quiescent current.
The start-up of VOUT is controlled by the voltage on the
TRACK/SS pin. When the voltage on the TRACK/SS pin is
less than the internal 0.8V reference, the LTC7803 regulates the VFB pin voltage to the voltage on the TRACK/SS
pin instead of 0.8V. The TRACK/SS pin can be used to
program an external soft-start function or to allow VOUT
to track another supply during start-up.
The RUN pin is high impedance and must be externally
pulled up/down or driven directly by logic. The RUN pin
can tolerate up to 40V (abs max), so it can be conveniently
tied to VIN in always-on applications where the controller
is enabled continuously and never shut down. Do not
float the RUN pin.
The RUN pin can be implemented as a UVLO by connecting it to the output of an external resistor divider network
off VIN, as shown in Figure 4.
Soft-start is enabled by simply connecting a capacitor
from the TRACK/SS pin to ground, as shown in Figure 5.
An internal 12.5μA current source charges the capacitor,
providing a linear ramping voltage at the TRACK/SS pin.
The LTC7803 will regulate the VFB pin (and hence VOUT)
according to the voltage on the TRACK/SS pin, allowing
VOUT to rise smoothly from 0V to its final regulated value.
The total soft-start time will be approximately:
The rising and falling UVLO thresholds are calculated
using the RUN pin thresholds:
⎛ R ⎞
VUVLO(RISING) = 1.2V ⎜1+ B ⎟
⎝ RA ⎠
⎛ R ⎞
VUVLO(FALLING) = 1.1V ⎜1+ B ⎟
⎝ RA ⎠
The resistor values should be carefully chosen such that
the absolute maximum ratings of the RUN pin do not get
violated over the entire VIN voltage range.
For applications that do not require a precise UVLO the
RUN pin can be tied to VIN. In this configuration, the UVLO
threshold is limited to the internal INTVCC UVLO threshold
as shown in the Electrical Characteristics table.
VIN
LTC7803
RB
LTC7803
TRACK/SS
CSS
SGND
7803 F05
Figure 5. Using the TRACK/SS Pin to Program Soft-Start
7803 F04
Figure 4. Using the RUN Pin as a UVLO
0.8V
12.5µA
Alternatively, the TRACK/SS pin can be used to track
another supply during start-up, as shown qualitatively in
Figures 6a and 6b. To do this, a resistor divider should
be connected from the master supply (VX) to the TRACK/
SS pin of the slave supply (VOUT), as shown in Figure 7.
During start-up VOUT will track VX according to the ratio
set by the resistor divider:
RUN
RA
t SS = C SS •
VX
RA
R
+R
=
• TRACKA TRACKB
VOUT RTRACKA
RA + RB
For coincident tracking (VOUT = VX during start-up):
RA = RTRACKA
RB = RTRACKB
Rev. A
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19
LTC7803
APPLICATIONS INFORMATION
INTVCC Regulators
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maximum junction temperature rating for the LTC7803 to be
exceeded. The INTVCC current, which is dominated by
the gate charge current, may be supplied by either the
VIN LDO or the EXTVCC LDO. When the voltage on the
EXTVCC pin is less than 4.7V, the VIN LDO is enabled.
Power dissipation for the IC in this case is highest and is
equal to VIN • INTVCC. The gate charge current is dependent on operating frequency as discussed in the Efficiency
Considerations section. The junction temperature can
be estimated by using the equations given in Note 2 of
the Electrical Characteristics. For example, the LTC7803
INTVCC current is limited to less than 20mA from a 40V
supply when not using the EXTVCC supply at a 70°C ambient temperature:
OUTPUT VOLTAGE
VX(MASTER)
7803 F06a
TIME
(6a) Coincident Tracking
VX(MASTER)
VOUT(SLAVE)
7803 F06b
TIME
(6b) Ratiometric Tracking
Figure 6. Two Different Modes of Output Voltage Tracking
Vx VOUT
RB
LTC7803
VFB
RA
RTRACKB
TJ = 70°C + (20mA)(40V)(68°C/W for QFN) = 125°C
TRACK/SS
RTRACKA
In the MSOP package, the INTVCC current is limited to less
than 34mA from a 40V supply:
TJ = 70°C + (34mA)(40V)(40°C/W for MSOP) = 125°C
VOUT(SLAVE)
OUTPUT VOLTAGE
The LTC7803 features two separate internal P-channel
low dropout linear regulators (LDO) that supply power
at the INTVCC pin from either the VIN supply pin or the
EXTVCC pin depending on the connection of the EXTVCC
pin. INTVCC powers the gate drivers and much of the
LTC7803’s internal circuitry. The VIN LDO and the EXTVCC
LDO regulate INTVCC to 5.15V. Each of these can supply
a peak current of at least 100mA and must be bypassed
to ground with a minimum of 2.2μF ceramic capacitor,
placed as close as possible to the pin. No matter what
type of bulk capacitor is used, an additional 1μF ceramic
capacitor placed directly adjacent to the INTVCC and GND
pins is highly recommended. Good bypassing is needed
to supply the high transient currents required by the
MOSFET gate drivers.
7803 F07
Figure 7. Using the TRACK/SS Pin for TrackingTracking
To prevent the maximum junction temperature from being
exceeded, the input supply current must be checked while
operating in forced continuous mode (MODE = INTVCC)
at maximum VIN.
Rev. A
20
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LTC7803
APPLICATIONS INFORMATION
When the voltage applied to EXTVCC rises above 4.7V, the
VIN LDO is turned off and the EXTVCC LDO is enabled. The
EXTVCC LDO remains on as long as the voltage applied to
EXTVCC remains above 4.5V. The EXTVCC LDO attempts
to regulate the INTVCC voltage to 5.15V, so while EXTVCC
is less than 5.15V, the LDO is in dropout and the INTVCC
voltage is approximately equal to EXTVCC. When EXTVCC
is greater than 5.15V, up to an absolute maximum of 30V,
INTVCC is regulated to 5.15V.
Using the EXTVCC LDO allows the MOSFET driver and
control power to be derived from one of the LTC7803’s
switching regulator outputs (4.7V ≤ VOUT ≤ 30V) during
normal operation and from the VIN LDO when the output
is out of regulation (e.g., start-up, short-circuit). If more
current is required through the EXTVCC LDO than is specified, an external Schottky diode can be added between the
EXTVCC and INTVCC pins. In this case, do not apply more
than 6V to the EXTVCC pin.
Significant efficiency and thermal gains can be realized
by powering INTVCC from the output, since the VIN current resulting from the driver and control currents will be
scaled by a factor of (Duty Cycle)/(Switcher Efficiency).
This is accomplished by tying the EXTVCC pin directly to
an output voltage that is greater than the INTVCC regulation point. EXTVCC may also be connected to any other
supply in the system that is higher than the INTVCC regulation point and capable of providing the MOSFET gate
drive current.
For the previous example, Tying the EXTVCC pin to an 8.5V
supply reduces the junction temperature in the previous
example from 125°C to:
TJ = 70°C + (20mA)(8.5V)(68°C/W) = 82°C
and from 125°C to 82°C in an MSOP package
TJ = 70°C + (34mA)(8.5V)(40°C/W) = 82°C
However, for 3.3V and other low voltage outputs, where
the output is less than the INTVCC regulation point and no
other supply available in the system, additional circuitry is
required to derive INTVCC power from the output.
Using the EXTVCC LDO allows the MOSFET driver and
control power to be derived from the LTC7803’s switching regulator output during normal operation and from
the VIN LDO when the output is out of regulation (e.g.,
start-up, short-circuit).
The following list summarizes the four possible connections for EXTVCC:
1. EXTVCC Grounded. This will cause INTVCC to be powered from the internal 5.15V regulator resulting in an
efficiency penalty of up to 10% at high input voltages.
2. EXTVCC Connected Directly to VOUT. This is the normal
connection for a 5V to 30V regulator and provides the
highest efficiency.
3. EXTVCC Connected to an External Supply. If an external
supply is available in the 5V to 30V range, it may be
used to power EXTVCC providing it is compatible with
the MOSFET gate drive requirements. The supply may
be higher or lower than VIN, however, a lower EXTVCC
voltage results in higher efficiency.
4. EXTVCC Connected to an Output-Derived Boost
Network. For regulators where the output is below
5V, efficiency gains can still be realized by connecting EXTVCC to an output-derived voltage that has been
boosted to greater than 5V.
Topside MOSFET Driver Supply CB
An external bootstrap capacitor, CB, connected to the
BOOST pin supplies the gate drive voltage for the topside
MOSFET. Capacitor CB in the Block Diagram is charged
through external diode DB from INTVCC when the SW pin
is low. When the topside MOSFET is to be turned on, the
driver places the CB voltage across the gate-source of
the MOSFET. This enhances the top MOSFET switch and
turns it on. The switch node voltage, SW, rises to VIN and
the BOOST pin follows. With the topside MOSFET on, the
boost voltage is above the input supply: VBOOST = VIN +
VINTVCC. The value of the boost capacitor, CB, needs to be
100 times that of the total input capacitance of the topside
Rev. A
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21
LTC7803
APPLICATIONS INFORMATION
MOSFET. For a typical application, a value of CB = 0.1µF
is generally sufficient.
The external diode DB can be a Schottky diode or P-N
Junction diode, but in either case it should have low leakage and fast recovery. Pay close attention to the reverse
leakage at high temperatures, where it generally increases
substantially.
The topside MOSFET driver includes an internal charge
pump that delivers current to the bootstrap capacitor
when the top MOSFET is on continuously, such as when
the output is in dropout (100% duty cycle). The boost
diode should have a reverse leakage less than the available output current the charge pump can supply. Curves
displaying the available charge pump current under different operating conditions can be found in the Typical
Performance Characteristics section.
Phase-Locked Loop and Frequency Synchronization
The LTC7803 has an internal phase-locked loop (PLL)
comprised of a phase frequency detector, a lowpass filter,
and a voltage-controlled oscillator (VCO). This allows the
turn-on of the top MOSFET to be locked to the rising edge
of an external clock signal applied to the PLLIN/SPREAD
pin. The phase detector is an edge sensitive digital type
that provides zero degrees phase shift between the external and internal oscillators. This type of phase detector
does not exhibit false lock to harmonics of the external
clock.
If the external clock frequency is greater than the internal oscillator’s frequency, fOSC, then current is sourced
continuously from the phase detector output, pulling up
the VCO input. When the external clock frequency is less
than fOSC, current is sunk continuously, pulling down the
VCO input.
If the external and internal frequencies are the same but
exhibit a phase difference, the current sources turn on for
an amount of time corresponding to the phase difference.
The voltage at the VCO input is adjusted until the phase
and frequency of the internal and external oscillators are
identical. At the stable operating point, the phase detector
output is high impedance and the internal filter capacitor,
CLP, holds the voltage at the VCO input. Note that the
LTC7803 can only be synchronized to an external clock
whose frequency is within range of the LTC7803’s internal
VCO, which is nominally 100kHz to 3MHz.
This is guaranteed to be between 100kHz and 3MHz.
Typically, the external clock (on the PLLIN/MODE pin)
input high threshold is 1.6V, while the input low threshold is 1.1V.
Rapid phase locking can be achieved by using the FREQ
pin to set a free-running frequency near the desired synchronization frequency. The VCO’s input voltage is prebiased at a frequency corresponding to the frequency set
by the FREQ pin. Once prebiased, the PLL only needs
to adjust the frequency slightly to achieve phase lock
and synchronization. Although it is not required that the
free-running frequency be near external clock frequency,
doing so will prevent the operating frequency from passing through a large range of frequencies as the PLL locks.
When synchronized to an external clock, the LTC7803
operates in forced continuous mode if the MODE pin is
set to Burst Mode operation or forced continuous operation. If the MODE pin is set to pulse-skipping operation,
the LTC7803 maintains pulse-skipping operation when
synchronized.
Rev. A
22
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APPLICATIONS INFORMATION
Setting the Operating Frequency
10M
FREQUENCY (Hz)
The switching frequency is set using the FREQ and PLLIN/
SPREAD pins as shown in Table 1.
Table 1.
FREQ PIN
PLLIN/SPREAD PIN
FREQUENCY
0V
0V
375kHz
INTVCC
0V
2.25MHz
Resistor
0V
100kHz to 3MHz
Any of the Above
External Clock
100kHz to 3MHz
Phase Locked to
External Clock
INTVCC
Spread Spectrum fOSC
modulated 0% to 20%
Any of the Above
Tying the FREQ pin to ground selects 375kHz while tying
FREQ to INTVCC selects 2.25MHz. Placing a resistor
between FREQ and ground allows the frequency to be programmed anywhere between 100kHz and 3MHz. Choose a
FREQ pin resistor from Figure 8 or the following equation:
RFREQ (in kΩ) =
37MHz
f OSC
Switching regulators can be particularly troublesome for
applications where electromagnetic interference (EMI) is
a concern. To improve EMI, spread spectrum mode can
optionally be selected by tying the PLLIN/SPREAD pin to
INTVCC. When spread spectrum in enabled, the switching frequency varies within 0% to +20% of the frequency
selected by the FREQ pin. Spread spectrum may be used
in any operating mode selected by the MODE pin (Burst
Mode, pulse-skipping, or forced continuous mode).
Selecting the Light-Load Operating Mode
The LTC7803 can be set to enter high efficiency Burst
Mode operation, constant frequency pulse-skipping mode
or forced continuous conduction mode at light load currents. To select Burst Mode operation, tie the MODE to
ground. To select forced continuous operation, tie the
MODE pin to INTVCC. To select pulse-skipping mode, tie
1M
100k
10k
100k
FREQ PIN RESISTOR (Ω)
500k
7803 F08
Figure 8. Relationship Between Oscillator Frequency
and Resistor Value at the FREQ Pin
the MODE pin to INTVCC through a 100k resistor. An internal 100k resistor from the MODE pin to ground selects
Burst Mode if the pin is floating. When synchronized to
an external clock through the PLLIN/SPREAD pin, the
LTC7803 operates in pulse skipping mode if it is selected,
or in forced continuous mode otherwise. Table 2 summarizes the use of the MODE pin to select the light load
operating mode.
Table 2.
MODE PIN
LIGHT-LOAD
OPERATING MODE
MODE WHEN
SYNCHRONIZED
0V or Floating
Burst Mode
Forced Continuous
100k to INTVCC
Pulse-Skipping
Pulse-Skipping
INTVCC
Forced Continuous
Forced Continuous
In general, the requirements of each application will dictate
the appropriate choice for light-load operating mode. In
Burst Mode operation, the inductor current is not allowed
to reverse. The reverse current comparator turns off the
bottom MOSFET just before the inductor current reaches
zero, preventing it from reversing and going negative.
Thus, the regulator operates in discontinuous operation.
Rev. A
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23
LTC7803
APPLICATIONS INFORMATION
In addition, when the load current is very light, the inductor current will begin bursting at frequencies lower than
the switching frequency, and enter a low current sleep
mode when not switching. As a result, Burst Mode operation has the highest possible efficiency at light load.
charge required to turn on the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that:
In forced continuous mode, the inductor current is
allowed to reverse at light loads and switches at the same
frequency regardless of load. In this mode, the efficiency
at light loads is considerably lower than in Burst Mode
operation. However, continuous operation has the advantage of lower output voltage ripple and less interference
to audio circuitry. In forced continuous mode, the output
ripple is independent of load current.
In pulse-skipping mode, constant frequency operation
is maintained down to approximately 1% of designed
maximum output current. At very light loads, the PWM
comparator may remain tripped for several cycles and
force the top MOSFET to stay off for the same number of
cycles (i.e., skipping pulses). The inductor current is not
allowed to reverse (discontinuous operation). This mode,
like forced continuous operation, exhibits low output ripple as well as low audio noise and reduced RF interference
as compared to Burst Mode operation. It provides higher
light load efficiency than forced continuous mode, but not
nearly as high as Burst Mode operation. Consequently,
pulse-skipping mode represents a compromise between
light load efficiency, output ripple and EMI.
In some applications, it may be desirable to change light
load operating mode based on the conditions present in
the system. For example, if a system is inactive, one might
select high efficiency Burst Mode operation by keeping the
MODE pin set to 0V. When the system wakes, one might
send an external clock to PLLIN/SPREAD, or tie MODE to
INTVCC to switch to low noise forced continuous mode.
Such on-the-fly mode changes can allow an individual
application to benefit from the advantages of each light
load operating mode.
Minimum On-Time Considerations
Minimum on-time, tON(MIN), is the smallest time duration
that the LTC7803 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
V
tON(MIN) < OUT
VIN • f
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
The minimum on-time for the LTC7803 is approximately
40ns. However, as the peak sense voltage decreases the
minimum on-time gradually increases up to about 60ns.
This is of particular concern in forced continuous applications with low ripple current at light loads. If the duty cycle
drops below the minimum on-time limit in this situation,
a significant amount of cycle skipping can occur with correspondingly larger current and voltage ripple.
Fault Conditions: Current Limit and Current Foldback
The LTC7803 includes current foldback to help limit load
current when the output is shorted to ground. If the output voltage falls below 70% of its nominal output level,
then the maximum sense voltage is progressively lowered from 100% to 40% of its maximum selected value.
Under short-circuit conditions with very low duty cycles,
the LTC7803 will begin cycle skipping in order to limit the
short-circuit current. In this situation the bottom MOSFET
will be dissipating most of the power but less than in
normal operation. The short-circuit ripple current is determined by the minimum on-time, tON(MIN), of the LTC7803
(≈40ns), the input voltage and inductor value:
⎛V ⎞
ΔIL(SC) = t ON(MIN)⎜ IN ⎟
⎝ L ⎠
The resulting average short-circuit current is:
1
IL(SC) = 40% •ILIM(MAX) – ΔIL(SC)
2
Rev. A
24
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LTC7803
APPLICATIONS INFORMATION
Fault Conditions: Overvoltage Protection (Crowbar)
Efficiency Considerations
The overvoltage crowbar is designed to blow a system
input fuse when the output voltage of the regulator rises
much higher than nominal levels. The crowbar causes
huge currents to flow, that blow the fuse to protect against
a shorted top MOSFET if the short occurs while the controller is operating.
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
A comparator monitors the output for overvoltage conditions. The comparator detects faults greater than 10%
above the nominal output voltage. When this condition
is sensed, the top MOSFET is turned off and the bottom
MOSFET is turned on until the overvoltage condition is
cleared. The bottom MOSFET remains on continuously
for as long as the overvoltage condition persists; if VOUT
returns to a safe level, normal operation automatically
resumes.
%Efficiency = 100% – (L1 + L2 + L3 + ...)
A shorted top MOSFET will result in a high current condition which will open the system fuse. The switching
regulator will regulate properly with a leaky top MOSFET
by altering the duty cycle to accommodate the leakage.
1. The VIN current is the DC supply current given in the
Electrical Characteristics table, which excludes MOSFET
driver and control currents. VIN current typically results
in a small ( 125°C) should be avoided as it can
degrade the performance or shorten the life of the part.
where L1, L2, etc. are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC7803 circuits: 1) IC VIN current, 2) INTVCC
regulator current, 3) I2R losses, 4) topside MOSFET transition losses.
2. INTVCC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge, dQ, moves
from INTVCC to ground. The resulting dQ/dt is a current
out of INTVCC that is typically much larger than the
control circuit current. In continuous mode, IGATECHG
= f(QT + QB), where QT and QB are the gate charges of
the topside and bottom side MOSFETs.
Supplying INTVCC from an output-derived source power
through EXTVCC will scale the VIN current required for
the driver and control circuits by a factor of (Duty
Cycle)/(Efficiency). For example, in a 20V to 5V application, 10mA of INTVCC current results in approximately
2.5mA of VIN current. This reduces the mid-current loss
from 10% or more (if the driver was powered directly
from VIN) to only a few percent.
Rev. A
For more information www.analog.com
25
LTC7803
APPLICATIONS INFORMATION
3. I2R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, current sense resistor and input and output capacitor ESR. In continuous
mode the average output current flows through L and
RSENSE, but is chopped between the topside MOSFET
and the synchronous MOSFET. If the two MOSFETs
have approximately the same RDS(ON), then the resistance of one MOSFET can simply be summed with the
resistances of L, RSENSE and ESR to obtain I2R losses.
For example, if each RDS(ON) = 30mΩ, RL = 50mΩ,
RSENSE = 10mΩ and RESR = 40mΩ (sum of both input
and output capacitance losses), then the total resistance is 130mΩ. This results in losses ranging from
3% to 13% as the output current increases from 1A to
5A for a 5V output, or a 4% to 20% loss for a 3.3V output. This percentage loss varies as the inverse square
of VOUT for the same external components and output
power level. The combined effects of increasingly lower
output voltages and higher currents required by high
performance digital systems is not doubling but quadrupling the importance of loss terms in the switching
regulator system!
4. Transition losses apply only to the top MOSFET and
become significant only when operating at higher output
voltages (typically 15V or greater) or higher frequencies
(typically in the MHz range). Transition losses can be
estimated from the equation for the main switch power
dissipation in the Power MOSFET Selection section.
Other hidden losses such as copper trace and internal
battery resistances can account for an additional 5% to
10% efficiency degradation in portable systems. It is very
important to include these system level losses during the
design phase. The internal battery and fuse resistance
losses can be minimized by making sure that CIN has
adequate charge storage and very low ESR at the switching frequency. A 25W supply will typically require a minimum of 20μF to 40μF of capacitance having a maximum
of 20mΩ to 50mΩ of ESR. Other losses including body
diode conduction losses during dead-time and inductor
core losses generally account for less than 2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive)
load current. When a load step occurs, VOUT shifts by an
amount equal to ∆ILOAD(ESR), where ESR is the effective
series resistance of COUT. ∆ILOAD also begins to charge or
discharge COUT generating the feedback error signal that
forces the regulator to adapt to the current change and
return VOUT to its steady-state value. During this recovery
time VOUT can be monitored for excessive overshoot or
ringing, which would indicate a stability problem. OPTILOOP compensation allows the transient response to be
optimized over a wide range of output capacitance and
ESR values. The availability of the ITH pin not only allows
optimization of control loop behavior, but it also provides
a DC coupled and AC filtered closed-loop response test
point. The DC step, rise time and settling at this test point
truly reflects the closed-loop response. Assuming a predominantly second order system, phase margin and/or
damping factor can be estimated using the percentage
of overshoot seen at this pin. The bandwidth can also be
estimated by examining the rise time at the pin. The ITH
external components shown in the first page circuit will
provide an adequate starting point for most applications.
The ITH series RC-CC filter sets the dominant pole-zero
loop compensation. The values can be modified slightly
to optimize transient response once the final PC layout is
done and the particular output capacitor type and value
have been determined. The output capacitors need to be
selected because the various types and values determine
the loop gain and phase. An output current pulse of 20%
to 80% of full-load current having a rise time of 1μs to
10μs will produce output voltage and ITH pin waveforms
that will give a sense of the overall loop stability without
breaking the feedback loop.
Placing a power MOSFET directly across the output
capacitor and driving the gate with an appropriate signal
generator is a practical way to produce a realistic load step
condition. The initial output voltage step resulting from
the step change in output current may not be within the
Rev. A
26
For more information www.analog.com
LTC7803
APPLICATIONS INFORMATION
bandwidth of the feedback loop, so this signal cannot be
used to determine phase margin. This is why it is better to
look at the ITH pin signal which is in the feedback loop and
is the filtered and compensated control loop response.
The gain of the loop will be increased by increasing
RC and the bandwidth of the loop will be increased by
decreasing CC. If RC is increased by the same factor that
CC is decreased, the zero frequency will be kept the same,
thereby keeping the phase shift the same in the most
critical frequency range of the feedback loop. The output
voltage settling behavior is related to the stability of the
closed-loop system and will demonstrate the actual overall supply performance.
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If the ratio of
CLOAD to COUT is greater than 1:50, the switch rise time
should be controlled so that the load rise time is limited
to approximately 25 • CLOAD. Thus a 10μF capacitor would
require a 250μs rise time, limiting the charging current
to about 200mA.
Design Example
As a design example, assume VIN = 12V (nominal), VIN =
22V (Max), VOUT = 3.3V, IMAX = 20A, VSENSE(MAX) = 50mV
and f = 1MHz.
The frequency is not one of the internal preset values, so
a resistor from the FREQ pin to GND is required, with a
value of:
RFREQ (in kΩ) =
37MHz
= 37kΩ
1MHz
The inductance value is chosen based on a 30% ripple
current target. The highest value of ripple current occurs
at the maximum input voltage. The minimum inductance
for 25% ripple current is:
V
VOUT ⎞
⎛
ΔIL = OUT ⎜ 1–
(f)(L) ⎝ VIN(NOM) ⎟⎠
A 0.47μH inductor will produce 25% ripple current. The
peak inductor current will be the maximum DC value plus
one half the ripple current, or 22.5A. Increasing the ripple
current will also help ensure that the minimum on-time
of 40ns is not violated. The minimum on-time occurs at
maximum VIN:
t ON(MIN) =
VOUT
VIN(MAX)(f)
=
3.3V
= 150ns
22V(1MHz)
The equivalent RSENSE resistor value can be calculated by
using the minimum value for the maximum current sense
threshold (50mV):
R SENSE ≤
45mV
= 0.002Ω
22.5A
To allow for additional margin, a lower value RSENSE may
be used (for example, 1.8mΩ); however, be sure that the
inductor saturation current has sufficient margin above
VSENSE(MAX)/RSENSE, where the maximum value of 55mV
is used for VSENSE(MAX).
Choosing 1% resistors: RA = 24.9k and RB = 78.7k yields
an output voltage of 3.33V.
The best way to evaluate MOSFET performance in a particular application is to build and test the circuit on the
bench, facilitated by an LTC7803 demo board. However,
an educated guess about the application is helpful to initially select MOSFETs. Since this is a high current, low
voltage application, I2R losses will likely dominate over
transition losses for the top MOSFET. Therefore, choose
a MOSFET with lower RDS(ON) as opposed to lower gate
charge to minimize the combined loss terms. The bottom
MOSFET does not experience transition losses, and its
power loss is generally dominated by I2R losses. For this
reason, the bottom MOSFET is typically chosen to be of
lower RDS(ON) and subsequently higher gate charge than
the top MOSFET.
Rev. A
For more information www.analog.com
27
LTC7803
APPLICATIONS INFORMATION
Due to the high current in this application, two MOSFETs
may needed in parallel to more evenly balance the dissipated power and to lower the RDS(ON). Be sure to select
logic-level threshold MOSFETs, since the gate drive voltage is limited to 5.15V (INTVCC).
CIN is chosen for an RMS current rating of at least 10A
(IOUT/2, with margin) at temperature. COUT is chosen with
an ESR of 0.03Ω for low output ripple. Multiple capacitors
connected in parallel may be required to reduce the ESR
to this level. The output ripple in continuous mode will be
highest at the maximum input voltage. The output voltage
ripple due to ESR is approximately:
VORIPPLE = RESR(∆IL) = 0.03Ω(5A) = 15mVP-P
On the 3.3V output, this is equal to 0.45% of peak to peak
voltage ripple
Determine the bias supply components. Since the regulated output is not greater than the EXTVCC switchover threshold (4.7V), it cannot be used to bias INTVCC.
However, if another supply is available, connect that
supply to EXTVCC to improve the efficiency. For an 8ms
soft start, select a 0.1μF capacitor for the TRACK/SS pin.
As a first pass estimate for the bias components, select
CINTVCC = 4.7μF, boost supply capacitor CB = 0.1μF.
Determine and set application-specific parameters. Set
the MODE pin based on the trade-off of light load efficiency and constant frequency operation. Set the PLLIN/
SPREAD pin based on whether a fixed, spread spectrum,
or phase-locked frequency is desired. The RUN pin can
be used to control the minimum input voltage for regulator operation or can be tied to VIN for always-on operation. Use ITH compensation components from the typical
applications as a first guess, check the transient response
for stability, and modify as necessary.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 9. Figure 10 illustrates the current waveforms present in the various branches the synchronous regulator operating in the continuous mode.
Check the following in your layout:
1. Are the signal and power grounds kept separate? The
LTC7803 ground pin and the ground return of CINTVCC
must return to the combined COUT (–) terminals. The
area of the “hot loop” formed by the top N-channel
MOSFET, bottom N-channel MOSFET and the high-frequency (ceramic) input capacitors should be minimized
with short leads, planar connections, and multiple paralleled vias where needed. The output capacitor (–)
terminals should be connected as close as possible to
the (–) terminals of the input capacitor.
2. Does the LTC7803 VFB pin’s resistive divider connect to
the (+) terminal of COUT? The resistive divider must be
connected between the (+) terminal of COUT and signal
ground. The feedback resistor connections should not
be along the high current input feeds from the input
capacitor(s).
3. Are the SENSE– and SENSE+ leads routed together
with minimum PC trace spacing? The filter capacitor
between SENSE+ and SENSE– should be as close as
possible to the IC. Ensure accurate current sensing
with Kelvin connections at the SENSE resistor.
4. Is the INTVCC decoupling capacitor connected close
to the IC, between the INTVCC and the GND pin? This
capacitor carries the MOSFET drivers’ current peaks.
An additional 1μF ceramic capacitor placed immediately next to the INTVCC and GND pins can help improve
noise performance substantially. The boost diodes
should have separate routes directly to the INTVCC
capacitor near the IC, not shared with any signal connections to INTVCC.
5. Keep the SW, TG, and BOOST nodes away from sensitive
small-signal nodes. All of these nodes have very large
and fast moving signals and therefore should be kept on
the output side of the LTC7803 and occupy minimum
external layer PC trace area. Minimize the inductance
of the TG and BG gate drive traces and their respective
return paths to the controller IC (SW and GND) by using
short wide traces and multiple parallel vias.
Rev. A
28
For more information www.analog.com
LTC7803
APPLICATIONS INFORMATION
6. Use a modified star ground technique: a low impedance, large copper area central grounding point on the
same side of the PC board as the input and output
capacitors with tie-ins for the bottom of the INTVCC
decoupling capacitor, the bottom of the voltage feedback resistive divider and the GND pin of the IC.
For more detailed layout guidance, see Analog Devices
Application Notes AN136 “PCB Layout Considerations
for Non-Isolated Switching Power Supplies” and AN139
“Power Supply Layout and EMI”.
PC Board Layout Debugging
It is helpful to use a DC-50MHz current probe to monitor the current in the inductor while testing the circuit.
Monitor the output switching node (SW pin) to synchronize the oscilloscope to the internal oscillator and probe
the actual output voltage as well. Check for proper performance over the operating voltage and current range
expected in the application. The frequency of operation
should be maintained over the input voltage range down
to dropout and until the output load drops below the low
current operation threshold—typically 25% of the maximum designed current level in Burst Mode operation.
The duty cycle percentage should be maintained from
cycle to cycle in a well-designed, low noise PCB implementation. Variation in the duty cycle at a subharmonic
rate can suggest noise pickup at the current or voltage sensing inputs or inadequate loop compensation.
Overcompensation of the loop can be used to tame a
poor PC layout if regulator bandwidth optimization is not
required.
Reduce VIN from its nominal level to verify operation
of the regulator in dropout. Check the operation of the
undervoltage lockout circuit by further lowering VIN while
monitoring the outputs to verify operation.
Investigate whether any problems exist only at higher output currents or only at higher input voltages. If problems
coincide with high input voltages and low output currents,
look for capacitive coupling between the BOOST, SW, TG,
and possibly BG connections and the sensitive voltage
and current pins. The capacitor placed across the current
sensing pins needs to be placed immediately adjacent to
the pins of the IC. This capacitor helps to minimize the
effects of differential noise injection due to high frequency
capacitive coupling. If problems are encountered with
high current output loading at lower input voltages, look
for inductive coupling between CIN, top MOSFET and the
bottom MOSFET components to the sensitive current and
voltage sensing traces. In addition, investigate common
ground path voltage pickup between these components
and the GND pin of the IC.
An embarrassing problem, which can be missed in an
otherwise properly working switching regulator, results
when the current sensing leads are hooked up backwards.
The output voltage under this improper hookup will still
be maintained but the advantages of current mode control
will not be realized. Compensation of the voltage loop
will be much more sensitive to component selection. This
behavior can be investigated by temporarily shorting out
the current sensing resistor—don’t worry, the regulator
will still maintain control of the output voltage.
Rev. A
For more information www.analog.com
29
LTC7803
APPLICATIONS INFORMATION
LTC7803
VIN
TRACK/SS
VIN
GND
CIN
GND
+
FREQ
MODE
EXTVCC
PLLIN/SPREAD
1µF
CERAMIC
CINTVCC
COUT
+
INTVCC
BG
RUN
SENSE–
C1*
M1
BOOST
SENSE+
M2
SW
R1*
L1
D1*
RSENSE
VOUT
TG
VFB
ITH
7803 F09
*R1, C1 AND D1 ARE OPTIONAL
Figure 9. Recommended Printed Circuit Layout Diagram
SW
VIN
RIN
CIN
HOT
LOOP
D1
L1
RSENSE
VOUT
COUT
RL1
7803 F10
BOLD LINES INDICATE HIGH SWITCHING
CURRENT. KEEP LINES TO A MINIMUM LENGTH.
Figure 10. Branch Current Waveforms
Rev. A
30
For more information www.analog.com
LTC7803
TYPICAL APPLICATIONS
RUN
MTOP1,2
VIN
TG
TRACK/SS
BOOST
ITH
LTC7803
39pF
6.19k
+
VIN
CINB 5V TO 38V
56µF
×2
L, 0.68µH
0.1µF
SW
COUTA
100µF
×4
RSENSE
1mΩ
BG
4.7nF
D
30.1Ω
+
COUTB
470µF
VOUT
3.3V
20A
MBOT1,2
INTVCC
4.7µF
PLLIN/SPREAD
SENSE+
MODE
SENSE–
FREQ
GND
1nF
215k
EXTVCC
VFB
68.1k
7803 F11a
MTOP1,2: INFINEON BSC059N04LS6
MBOT1,2: INFINEON BSC022N04LS6
L: WURTH 7843320068
CINA: SAMSUNG CL32B106KMVNNWE
CINB: SUNCON 50HVH56M
COUTA: MURATA GRM31CR60J107ME39L
COUTB: PANASONIC 6TPE470MI
D: INFINEON BAS140W
No-Load
No–LoadBurst
BurstMode
ModeInput
Input
Current
vs
Input
Current vs Input Voltage
Voltage
Efficiency
Efficiency vs
vs Output
Output Current
Current
100
25
VOUT = 3.3V
BURST MODE OPERATION
VIN CURRENT (µA)
90
85
80
VOUT = 3.3V
BURST MODE OPERATION
20
95
EFFICIENCY (%)
0.1µF
CINA
10µF
×4
5
10
15
OUTPUT CURRENT (A)
10
5
VIN = 12V
VIN = 24V
VIN = 36V
0
15
20
0
5
10
7803 F11b
15
20
25
30
VIN VOLTAGE (V)
35
40
7803 F11c
Figure 11. High Efficiency Wide Input Range 375kHz 3.3V/20A Step-Down Regulator
Rev. A
For more information www.analog.com
31
LTC7803
TYPICAL APPLICATIONS
RUN
MTOP1,2
VIN
TG
TRACK/SS
0.1µF
BOOST
ITH
LTC7803
47pF
4.02k
L, 0.12µH
0.1µF
SW
CINA
10µF
×3
RSENSE
2mΩ
+
CINB
47µF
VIN
5V TO 38V
COUTA
22µF
×2
BG
330pF
D
100Ω
INTVCC
VOUT
3.3V
15A
MBOT1,2
4.7µF
INTVCC
PLLIN/SPREAD
SENSE+
MODE
SENSE–
FREQ
1nF
EXTVCC
GND
357k
3.3pF
VFB
115k
7803 F12a
MTOP1,2: ONSEMI NVMFS5C682NL
MBOT1,2: INFINEON BSC059N04LS6
L: COILCRAFT SLC1175-121
CINA: SAMSUNG CL32B106KMVNNWE
CINB: SUNCON 50CE47LX
COUT: KEMET C1206C226M9RAC
D: CENTRAL SEMI CMDSH-4E
Efficiency
Efficiency vs
vs Output
Output Current
Current
100
Output Voltage Noise Spectrum
Output Voltage Noise Spectrum
–20
VOUT = 3.3V
FORCED CONTINUOUS OPERATION
–30
–40
AMPLITUDE (dBm)
EFFICIENCY (%)
90
80
70
60
3
6
9
12
OUTPUT CURRENT (A)
PLLIN/SPREAD = GND
–50
PLLIN/SPREAD = INTVCC
–60
–70
–80
VIN = 8V
VIN = 16V
VIN = 24V
0
FIGURE 12 CIRCUIT
VIN = 12V, VOUT = 3.3V
DETECTOR=PEAK–HOLD
RBW=9.1kHz
–90
15
–100
1
2
7803 F12b
3
4
5
6
7
FREQUENCY (MHz)
8
9
10
7803 F12c
Figure 12. High Efficiency 2.25MHz Wide Input Range 3.3V/15A Step-Down Regulator with Spread Spectrum
Rev. A
32
For more information www.analog.com
LTC7803
TYPICAL APPLICATIONS
RUN
0.1µF
11k
TRACK/SS
VIN
ITH
TG
BOOST
100pF
LTC7803
3.3nF
INTVCC
0.1µF
SW
PLLIN/SPREAD
FREQ
GND
L, 1.8µH
+
VIN
CINB 4.5V TO 38V
56µF
×2
COUTA
100µF
×2
MBOT
BG
MODE
fSW = 375KHz
MTOP
CINA
10µF
×3
RSENSE
3mΩ
D
+
COUTB
330µF
VOUT*
5V
10A
INTVCC
4.7µF
SENSE+
SENSE–
1nF
EXTVCC
357k
VFB
68.1k
7803 F13a
MTOP: INFINEON BSC059N04LS6
MBOT: INFINEON BSC022N04LS6
L: WURTH 744313180
D: CENTRAL SEMI CMDSH-4E
CINA: SAMSUNG CL32B106KMVNNWE
CINB: SUNCON 50HVH56M
COUTA: MURATA GRM31CR60J107ME39L
COUTB: SUNCON 16CE330LX
*VOUT FOLLOWS VIN WHEN VIN < 5V
Figure 13. High Efficiency 5V Step-Down Regulator with Spread Spectrum
Rev. A
For more information www.analog.com
33
LTC7803
TYPICAL APPLICATIONS
RUN
0.1µF
TRACK/SS
VIN
ITH
TG
BOOST
100pF
5.5k
LTC7803
3.3nF
INTVCC
MTOP
0.1µF
SW
MODE
FREQ
GND
+
CINB
47µF
VIN
9V TO 38V
COUT
22µF
×2
MBOT
BG
PLLIN/SPREAD
L, 1.2µH
CINA
10µF
×3
RSENSE
9mΩ
D
VOUT
8.5V
3A
50Ω
INTVCC
4.7µF
SENSE+
SENSE–
1nF
EXTVCC
200k
VFB
7803 F14a
MTOP: INFINEON BSC059N04LS6
MBOT: INFINEON BSC022N04LS6
L: COILCRAFT XAL5030-122ME
D: CENTRAL SEMI CMDSH-4E
20.8k
CINA: SAMSUNG CL32B106KMVNNWE
CINB: SUNCON 50CE47LX
COUT: AVX 12103C226KAT2A
Figure 14. High Efficiency 2.25MHz 8.5V Step-Down Regulator with Spread Spectrum
Rev. A
34
For more information www.analog.com
LTC7803
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691 Rev Ø)
0.70 ±0.05
3.50 ±0.05
1.45 ±0.05
2.10 ±0.05 (4 SIDES)
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(4 SIDES)
BOTTOM VIEW—EXPOSED PAD
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
R = 0.115
TYP
0.75 ±0.05
15
PIN 1
TOP MARK
(NOTE 6)
16
0.40 ±0.10
1
1.45 ± 0.10
(4-SIDES)
2
(UD16) QFN 0904
0.200 REF
0.00 – 0.05
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.25 ±0.05
0.50 BSC
Rev. A
For more information www.analog.com
35
LTC7803
PACKAGE DESCRIPTION
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
5.10
(.201)
MIN
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
8
1
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102 3.20 – 3.45
(.065 ±.004) (.126 – .136)
0.305 ±0.038
(.0120 ±.0015)
TYP
16
0.50
(.0197)
BSC
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
9
NO MEASUREMENT PURPOSE
0.280 ±0.076
(.011 ±.003)
REF
16151413121110 9
DETAIL “A”
0° – 6° TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
1234567 8
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0213 REV F
Rev. A
36
For more information www.analog.com
LTC7803
REVISION HISTORY
REV
DATE
DESCRIPTION
A
05/21
Update RD formula: Change VSENSE to RSENSE
PAGE NUMBER
16
Update Block diagram: Change RSENSE from 3mΩ to 1mΩ
31
Change 20A to 15A in the caption of Figure 12
32
Change 2.25KHz to 2.25MHz in the caption of Figure 14
34
Rev. A
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Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
moreby
information
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37
LTC7803
TYPICAL APPLICATION
High Efficiency 200KHz 12V Step-Down Regulator
RUN
VIN
0.1µF
BOOST
ITH
5.9k
LTC7803
100pF
MTOP
TG
TRACK/SS
+
VIN
16V TO 38V
CINB
100µF
RSENSE
2mΩ
COUTA
10µF
×3
MBOT
BG
10nF
L, 4.7µH
0.1µF
SW
CINA
10µF
D
+
COUTB
330µF
VOUT
12V
15A
INTVCC
4.7µF
PLLIN/SPREAD
INTVCC
SENSE+
MODE
SENSE–
FREQ
EXTVCC
1nF
185k
10pF
GND
10k
7803 TA02
MTOP: VISHAY SIJA72ADP
MBOT: VISHAY SIR640ADP
L: COILCRAFT XAL1510-472MEB
D: CENTRAL SEMI CMDSH-4E
140k
VFB
CINA: SAMSUNG CL32B106KMVNNWE
CINB: SUNCON 50HVH56M
COUTA: MURATA GRM31CR60J107ME39L
COUTB: SUNCON 26HVH330M
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PART NUMBER
DESCRIPTION
COMMENTS
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PLL Fixed Frequency 200kHz to 2MHz, 4.5V ≤ VIN ≤ 38V, 0.6V ≤ VOUT ≤ 5.5V
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Rev. A
38
05/21
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