LTC7804
Low IQ Synchronous Boost Controller
with Spread Spectrum
FEATURES
DESCRIPTION
Synchronous Operation for Highest Efficiency and
Reduced Heat Dissipation
n Wide V Range: 4.5V to 40V and Operates Down to
IN
1V After Start-Up
n Output Voltage Up to 40V
n Low Operating I : 14μA
Q
n Spread Spectrum Operation
n Pass-Thru™/100% Duty Cycle Capability for
Synchronous MOSFET
n R
SENSE or Inductor DCR Current Sensing
n Programmable Fixed Frequency (100kHz to 3MHz)
n Phase-Lockable Frequency (100kHz to 3MHz)
n Selectable Continuous, Pulse-Skipping, or Low
Ripple Burst Mode® Operation at Light Loads
n Low Shutdown I : 1.2μA
Q
n Thermally Enhanced 16-Pin 3mm × 3mm QFN and
MSOP Packages
n AEC-Q100 Qualification in Progress
The LTC®7804 is a high performance synchronous boost
DC/DC switching regulator controller that drives an all
N-channel power MOSFET stage. Synchronous rectification increases efficiency, reduces power losses and eases
thermal requirements. A constant frequency current mode
architecture allows a phase-lockable switching frequency
of up to 3MHz. The LTC7804 operates from a wide 4.5V
to 40V input supply range. When biased from the boost
converter output , the LTC7804 can operate from an input
supply as low as 1V after startup.
n
APPLICATIONS
Automotive and Transportation
Industrial
n Military/Avionics
n Telecommunications
n
n
The very low no-load quiescent current extends operating
runtime in battery powered systems. OPTI-LOOP compensation allows the transient response to be optimized
over a wide range of output capacitance and ESR values.
The MODE pin selects among Burst Mode operation,
pulse-skipping mode, or continuous inductor current
mode at light loads.
The LTC7804 additionally features spread spectrum operation which significantly reduces the peak radiated and
conducted noise on both the input and output supplies,
making it easier to comply with electromagnetic interference (EMI) standards.
All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. patents, including 5481178, 5705919,5929620, 6144194, 6177787, 6580258.
TYPICAL APPLICATION
High Efficiency Wide Input Range 375kHz 24V/6A Boost Converter
VIN
4.5V TO 38V
10µF
RUN
VBIAS
VOUT
24V
6A
SENSE+
10µF
×2
SENSE–
BG
SS
220pF
22nF
TG
SW
0.1µF
0.1µF
BOOST
EXTVCC
FREQ
INTVCC
604k
PLLIN/SPREAD
GND
VFB
7804 TA01a
80
31.6k
BURST EFFICIENCY
1k
70
60
50
BURST LOSS
30
10
100
10
40
20
4.7µF
MODE
90
150µF
VOUT FOLLOWS VIN
FOR VIN > 24V
LTC7804
10k
100
VIN = 12V
VOUT = 24V
Burst Mode OPERATION
FIGURE 9 CIRCUIT
0
0.00001 0.0001 0.001 0.01
0.1
OUTPUT CURRENT (A)
1
POWER LOSS (mW)
ITH
8.06k
Efficiency and Power Loss
vs Output Current
2µH
EFFICIENCY (%)
2mΩ
1
10
0.1
7804 TA01b
Rev. A
Document Feedback
For more information www.analog.com
1
LTC7804
TABLE OF CONTENTS
Features...................................................... 1
Applications................................................. 1
Typical Application ......................................... 1
Description.................................................. 1
Absolute Maximum Ratings............................... 3
Pin Configuration........................................... 3
Order Information........................................... 4
Electrical Characteristics.................................. 5
Typical Performance Characteristics.................... 7
Pin Functions............................................... 10
Block Diagram.............................................. 11
Operation................................................... 12
Main Control Loop................................................... 12
INTVCC/EXTVCC Power............................................ 12
Shutdown and Start-Up (RUN, SS Pins) ................. 12
Light Load Current Operation: Burst Mode Operation,
Pulse-Skipping or Forced Continuous Mode
(MODE Pin).............................................................. 12
Frequency Selection, Spread Spectrum and PhaseLocked-Loop (FREQ and PLLIN/SPREAD Pins)....... 13
Operation When VIN > VOUT............................................... 14
Operation at Low Input Voltage............................... 14
BOOST Supply Refresh and Internal Charge Pump.. 14
Applications Information................................. 15
SENSE+ and SENSE– Pins........................................ 15
Low Value Resistor Current Sensing........................ 16
Inductor DCR Sensing............................................. 16
Inductor Value Calculation....................................... 17
Inductor Core Selection........................................... 17
Power MOSFET Selection........................................ 18
CIN and COUT Selection............................................ 18
Setting Output Voltage............................................ 19
RUN Pin................................................................... 19
Soft-Start (SS Pin)...................................................20
INTVCC Regulators...................................................20
Topside MOSFET Driver Supply (CB, DB)................. 21
Phase-Locked Loop and Frequency
Synchronization ...................................................... 21
Setting the Operating Frequency.............................22
Selecting the Light-Load Operating Mode................23
Minimum On-Time Considerations.......................... 24
Fault Conditions: Overtemperature Protection......... 24
Efficiency Considerations........................................ 24
Checking Transient Response..................................25
Design Example.......................................................25
PC Board Layout Checklist......................................26
PC Board Layout Debugging.................................... 27
Typical Applications....................................... 28
Package Description...................................... 32
Revision History........................................... 33
Typical Application........................................ 34
Related Parts............................................... 34
Rev. A
2
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LTC7804
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Bias Input Supply Voltage (VBIAS)............... −0.3V to 40V
BOOST........................................................ −0.3V to 46V
SW ................................................................ −5V to 40V
RUN............................................................ −0.3V to 40V
SENSE+, SENSE− ........................................ −0.3V to 40V
EXTVCC Voltage.......................................... −0.3V to 30V
INTVCC, (BOOST-SW)................................... −0.3V to 6V
ITH................................................................ −0.3V to 2V
SS, FREQ...................................................... −0.3V to 6V
PLLIN/SPREAD, MODE, VFB.......................... −0.3V to 6V
BG, TG................................................................ (Note 8)
Operating Junction Temperature Range (Notes 2, 7)
LTC7804E, LTC7804I.......................... −40°C to 125°C
LTC7804H .......................................... −40°C to 150°C
Storage Temperature Range................... −65°C to 150°C
PIN CONFIGURATION
TOP VIEW
EXTVCC
VBIAS
16 15 14 13
SW
TG
BOOST
BG
VBIAS
EXTVCC
INTVCC
MODE
TG 1
12 INTVCC
SW 2
11 MODE
17
GND
SS 3
10 PLLIN/SPREAD
SENSE– 4
6
7
8
RUN
MSE PACKAGE
16-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 40°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
9
5
ITH
17
GND
16
15
14
13
12
11
10
9
VFB
1
2
3
4
5
6
7
8
SENSE+
SS
SENSE–
SENSE+
VFB
ITH
RUN
FREQ
PLLIN/SPREAD
BG
BOOST
TOP VIEW
FREQ
UD PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFN
TJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
Rev. A
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3
LTC7804
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC7804EMSE#PBF
LTC7804EMSE#TRPBF
7804
16-Lead Plastic MSOP
–40°C to 125°C
LTC7804IMSE#PBF
LTC7804IMSE#TRPBF
7804
16-Lead Plastic MSOP
–40°C to 125°C
LTC7804HMSE#PBF
LTC7804HMSE#TRPBF
7804
16-Lead Plastic MSOP
–40°C to 150°C
LTC7804EUD#PBF
LTC7804EUD#TRPBF
LHHM
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LTC7804IUD#PBF
LTC7804IUD#TRPBF
LHHM
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LTC7804HUD#PBF
LTC7804HUD#TRPBF
LHHM
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 150°C
LTC7804EMSE#WPBF
LTC7804EMSE#WTRPBF
7804
16-Lead Plastic MSOP
–40°C to 125°C
LTC7804IMSE#WPBF
LTC7804IMSE#WTRPBF
7804
16-Lead Plastic MSOP
–40°C to 125°C
LTC7804HMSE#WPBF
LTC7804HMSE#WTRPBF
7804
16-Lead Plastic MSOP
–40°C to 150°C
LTC7804EUD#WPBF
LTC7804EUD#WTRPBF
LHHM
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LTC7804IUD#WPBF
LTC7804IUD#WTRPBF
LHHM
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 125°C
LTC7804HUD#WPBF
LTC7804HUD#WTRPBF
LHHM
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 150°C
AUTOMOTIVE PRODUCTS**
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
these models.
Rev. A
4
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LTC7804
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are for TA = 25°C, VBIAS = 12V, RUN = 12V, EXTVCC = 0V, unless otherwise noted.
(Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Supply
VBIAS
Bias Input Supply Operating Range
VIN
Boost Converter Input Supply Operating Range VBIAS ≥ 4.5V
Output Voltage Operating Range
VOUT
4.5
40
V
1
40
V
40
V
1.2
1.212
V
±5
±50
nA
10
13
Controller Operation
VFB
Regulated Feedback Voltage
Feedback Current
(Note 3) VBIAS = 4.5V to 40V,
ITH Voltage = 0.6V to 1.2V
l
1.188
(Note 3)
Feedback Overvoltage Protection Threshold
Measured at VFB Relative to Regulated VFB
gm
Transconductance Amplifier gm
(Note 3) ITH = 1.2V, Sink/Source = 5μA
VSENSE(MAX)
Maximum Current Sense Threshold
VFB = 1.1V, VSENSE+ = 12V
ISENSE+
ISENSE+ Pin Current
VSENSE+ < 2.9V
3.2 ≤ VSENSE+ ≤ INTVCC −0.5V
VSENSE+ > INTVCC + 0.5V
ISENSE−
SENSE− Pin Current
VSENSE− = 12V
Soft-Start Charge Current
VSS = 0V
RUN Pin ON Threshold
VRUN Rising
RUN Pin Hysteresis
7
2
l
45
50
55
2
30
650
l
%
mmho
mV
μA
μA
μA
±1
μA
10
12.5
15
µA
1.15
1.2
1.25
V
100
mV
μA
DC Supply Current (Note 4)
IQ
VBIAS Shutdown Current
RUN = 0V
1.2
VBIAS Sleep Mode Current
VSENSE+ < 2.9V, EXTVCC = 0V
14
VSENSE+ ≥ 3.2V
VBIAS Current, EXTVCC = 0V
VBIAS Current, EXTVCC ≥ 4.8V
EXTVCC Current, EXTVCC ≥ 4.8V
SENSE+ Current
5
1
4
9
μA
μA
μA
μA
Pulse-Skipping or Forced Continuous Mode
VBIAS or EXTVCC Current
VFB = 1.25V
2
mA
TG or BG On-Resistance
Pull-Up
Pull-Down
3.0
1.5
Ω
Ω
TG or BG Transition Time
Rise Time
Fall Time
(Note 5)
CLOAD = 3300pF
CLOAD = 3300pF
25
15
ns
ns
TG Off to BG On Delay
Bottom Switch-On Delay Time
CLOAD = 3300pF Each Driver
15
ns
BG Off to TG On Delay
Synchronous Switch-On Delay Time
CLOAD = 3300pF Each Driver
15
ns
BG Minimum On-Time
(Note 6)
80
ns
Maximum Duty Factor for TG
Overvoltage
100
%
Maximum Duty Factor for BG
VFREQ = 0V
93
%
28
μA
Gate Drivers
tON(MIN)
Rev. A
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5
LTC7804
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are for TA = 25°C, VBIAS = 12V, RUN = 12V, EXTVCC = 0V, unless otherwise noted.
(Note 2)
SYMBOL
PARAMETER
CONDITIONS
BOOST Charge Pump Available Output Current
VBOOST = 16V, VSW = 12V, FREQ = 0V,
Forced Continuous Mode
MIN
TYP
MAX
UNITS
30
65
4.95
5.15
5.35
V
1
1
2
2
%
%
4.6
4.7
4.8
V
µA
INTVCC Low Dropout (LDO) Linear Regulator
INTVCC Regulation Point
INTVCC Load Regulation
ICC = 0mA to 50mA, VBIAS ≥ 6V
ICC = 0mA to 50mA, VEXTVCC ≥ 6V
EXTVCC LDO Switchover Voltage
EXTVCC Rising
EXTVCC Switchover Hysteresis
UVLO
Undervoltage Lockout
250
mV
INTVCC Rising
l
4.15
4.25
4.35
V
INTVCC Falling
l
3.80
3.90
4.00
V
340
375
410
kHz
2.0
2.25
2.5
MHz
450
100
500
3
550
kHz
kHz
MHz
3
MHz
Spread Spectrum Oscillator and Phase-Locked Loop
fOSC
Low Fixed Frequency
VFREQ = 0V, PLLIN/SPREAD = 0V
High Fixed Frequency
VFREQ = INTVCC, PLLIN/SPREAD = 0V
Programmable Frequency
RFREQ = 374kΩ, PLLIN/SPREAD = 0V
RFREQ = 75kΩ, PLLIN/SPREAD = 0V
RFREQ = 12.4kΩ, PLLIN/SPREAD = 0V
Synchronizable Frequency Range
PLLIN/SPREAD = External Clock
PLLIN Input High Level
PLLIN Input Low Level
Spread Spectrum Frequency Range
(Relative to fOSC)
PLLIN/SPREAD = INTVCC
Minimum Frequency
Maximum Frequency
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC7804 is tested under pulsed load conditions such
that TJ ≈ TA. The LTC7804E is guaranteed to meet specifications from
0°C to 85°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC7804I is guaranteed over the –40°C to 125°C operating junction
temperature range and the LTC7804H is guaranteed over the –40°C to
150°C operating junction temperature range and is tested at 150°C. High
junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors. The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in Watts) according
to the formula: TJ = TA + (PD • JA), where θJA (in °C/W) is the package
thermal impedance.
l
l
0.1
l
l
2.2
0.5
0
20
V
V
%
%
Note 3: The LTC7804 is tested in a feedback loop that servos VITH to a
specified voltage and measures the resultant VFB.
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications information.
Note 5: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
Note 6: The minimum on-time condition is specified for an inductor
peak-to-peak ripple current >40% of IL(MAX) (See Minimum On-Time
Considerations in the Applications Information section).
Note 7: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device.
Note 8: Do not apply a voltage or current source to these pins. They must
be connected to capacitive loads only, otherwise permanent damage
may occur.
Rev. A
6
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LTC7804
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency and Power Loss
vs Output
Current
Output Current
100k
100
BURST EFFICIENCY
FCM EFFICIENCY
10k
FCM LOSS
1k
50
PULSE–SKIPPING 100
LOSS
40
30
20
BURST
LOSS
10
0
0.001
10
VIN = 12V
VOUT = 24V
FIGURE 9 CIRCUIT
0.01
0.1
1
OUTPUT CURRENT (A)
BURST EFFICIENCY
80
BURST LOSS
50
10
40
30
VIN = 12V
VOUT = 24V
Burst Mode OPERATION
FIGURE 9 CIRCUIT
20
10
10
1
7804 G01
0
0.00001 0.0001 0.001 0.01
0.1
OUTPUT CURRENT (A)
1
98
97
96
95
1
10
VOUT = 24V
94
0.1
93
0
5
10
15
INPUT VOLTAGE (V)
7804 G02
Load Step Burst Mode Operation
LOAD STEP
2A/DIV
INDUCTOR
CURRENT
5A/DIV
INDUCTOR
CURRENT
5A/DIV
VOUT
500mV/DIV
VOUT
500mV/DIV
Inductor Current at Light Load
25
Load Step Forced
Continuous Mode
Forced Continuous Mode
LOAD STEP
2A/DIV
INDUCTOR
CURRENT
5A/DIV
VOUT
500mV/DIV
VIN = 12V
200µs/DIV
VOUT = 24V
LOAD STEP FROM 200mA TO 2.5A
FIGURE 9 CIRCUIT
7804 G04
20
7804 G03
Load Step Pulse-Skipping Mode
LOAD STEP
2A/DIV
VIN = 12V
200µs/DIV
VOUT = 24V
LOAD STEP FROM 200mA TO 2.5A
FIGURE 9 CIRCUIT
100
ILOAD = 3A
FIGURE 9 CIRCUIT
99
1k
70
60
100
POWER LOSS (mW)
PULSE–
70 SKIPPING
EFFICIENCY
60
POWER LOSS (mW)
EFFICIENCY (%)
80
90
EFFICIENCY (%)
90
Efficiency vs Input Voltage
10k
100
EFFICIENCY (%)
Efficiency and Power Loss
vs Output Current
VIN = 12V
200µs/DIV
VOUT = 24V
LOAD STEP FROM 200mA TO 2.5A
FIGURE 9 CIRCUIT
7804 G05
7804 G06
Regulated Feedback Voltage
vs
vs Temperature
Temperature
Soft Start-Up
REGULATED FEFEDBACK VOLTAGE (V)
1.212
FORCED
CONTINUOUS
MODE
VOUT
5V/DIV
5A/DIV
Burst Mode
OPERATION
PULSE–
SKIPPING
MODE
0V
VIN = 12V
5µs/DIV
VOUT = 24V
ILOAD = 200μA
FIGURE 9 CIRCUIT
7804 G07
VIN = 12V
2ms/DIV
VOUT = 24V
FIGURE 9 CIRCUIT
1.209
1.206
1.203
1.200
1.197
1.194
1.191
1.188
–55
7804 G08
25
5
35
65
95
TEMPERATURE (°C)
125
155
7804 G09
Rev. A
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7
LTC7804
TYPICAL PERFORMANCE CHARACTERISTICS
Shutdown Current
vs Input Voltage
Shutdown Current vs Temperature
10
14.5
9
14.0
8
13.5
13.0
12.5
12.0
11.5
11.0
10.5
3.0
7
6
5
4
3
2
–25
5
35
65
95
TEMPERATURE (°C)
125
0
–55
155
–25
5
35
65
95
TEMPERATURE (°C)
125
0
155
15
10
35
40
4.8
4.6
RUN RISING
1.20
INTVCC VOLTAGE (V)
RUN PIN VOLTAGE (v)
20
15 20 25 30
INPUT VOLTAGE (V)
5.0
1.25
40
25
10
Undervoltage Lockout Thresholds
45
30
5
vs Temperature
1.30
35
0
7804 G12
RUN Pin Thresholds
vs Temperature
50
QUIESCENT CURRENT (µA)
1.0
7804 G11
Quiescent Current vs Temperature
1.15
RUN FALLING
1.10
4.4
INTVCC RISING
4.2
4.0
INTVCC FALLING
3.8
3.6
3.4
1.05
5
3.2
0
–55
–25
5
35
65
95
TEMPERATURE (°C)
125
155
1.00
–55
–25
5
35
65
95
TEMPERATURE (°C)
125
7804 G13
5.3
NO LOAD
5.2
5.2
5.1
5.1
4.9
4.8
4.7
4.6
5
10
15 20 25 30
INPUT VOLTAGE (V)
35
40
NO LOAD
5.0
4.9
4.8
4.7
7804 G16
4.5
4.50
4.75
5
5.25 5.50
INPUT VOLTAGE (V)
5
35
65
95
TEMPERATURE (°C)
125
155
INTVCC and EXTVCC
vs Load Curent
Current
INTVCC Line Regulation
4.6
0
25
7804 G15
INTVCC VOLTAGE (V)
INTVCC Line Regulation
5.0
3.0
–55
155
7804 G14
INTVCC VOLTAGE (V)
INTVCC VOLTAGE (V)
1.5
0.5
7804 G10
4.5
2.0
1
10.0
–55
5.3
VIN = VBIAS
2.5
SHUTDOWN CURRENT (µA)
15.0
SHUTDOWN CURRENT (µA)
SOFT–START CURRENT (µA)
SS Pin Pull-Up Current
vs Temperature
5.75
6
7804 G17
5.3
5.2
EXTVCC = 0V
5.1
EXTVCC = 8.5V
5.0
4.9
4.8
4.7
EXTVCC = 5V
4.6
4.5
4.4
4.3
4.2
4.1 V
BIAS = 12V
4.0
0
10 20 30 40 50 60
LOAD CURRENT (mA)
70
80
7804 G18
Rev. A
8
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LTC7804
TYPICAL PERFORMANCE CHARACTERISTICS
Maximum Current Sense
5.4
INTVCC
5.2
5.0
4.8
EXTVCC RISING
4.6
EXTVCC FALLING
4.4
4.2
4.0
3.8
–55
25
5
35
65
95
TEMPERATURE (°C)
125
155
50
PULSE–SKIPPING MODE
40
Burst Mode
OPERATION
30
20
10
0
–10
–20
–30
FORCED CONTINUOUS MODE
0
0.2
0.4
7804 G19
800
750
700
SENSE+ = 12V
650
600
550
500
450
400
350
300
–
250 SENSE PIN
200
SENSE+ < 2.9V
150
100
SENSE+ = 3.2V
50
0
–55 –25
5
35
65
95 125
TEMPERATURE (°C)
SENSE CURRENT (µA)
SENSE CURRENT (µA)
SENSE Pin Input Current
vs Temperature
155
800
750
700
650
600
550
500
450
400
350
300
250
200
150
100
50
0
100
T = 155°C
80
T = 25°C
70
60
T = –55°C
50
40
30
0
600
1200
1800
2400
OPERATING FREQUENCY (kHz)
3000
80
1.2
5
4
3
2
1
0
–1
–2
–3
–5
–55
1.4
60
7804 G24
–30
–40
–50
–80
–90
35
40
7804 G26
7804 G25
PLLIN/SPREAD = INTVCC
–70
10
10 15 20 25 30
SWITCH VOLTAGE (V)
PLLIN/SPREAD = GND
–60
20
5
155
FIGURE 12 CIRCUIT
–10 VIN = 18V, VOUT = 24V
DETECTOR = PEAK–HOLD
–20 RBW = 5.1kHz
30
0
125
Output Voltage Noise Spectrum
40
0
5
35
65
95
TEMPERATURE (°C)
0
FREQ = INTVCC
50
–25
7804 G23
FREQ = GND
70
40
–4
VBOOST – VSW = 4V
90
5
10 15 20 25 30 35
VSENSE COMMON MODE VOLTAGE (V)
RFREQ = 374k (100kHz)
RFREQ = 75k (500kHz)
RFREQ = 12.5k (3MHz)
RFREQ = GND (375kHz)
RFREQ = INTVCC (2.25MHz)
6
SENSE+ = 3.2V
0.6 0.8 1.0
ITH VOLTAGE (V)
0
7
SENSE+ < 2.9V
0.4
SENSE– PIN
Oscillator Frequency
vs Temperature
SENSE– PIN
0.2
SENSE+ PIN
7804 G21
VSENSE = 12V
0
SENSE Pin Input Current
vs VSENSE Voltage
7804 G20
Charge Pump Charging Current
VSW = 12V
VBOOST – VSW = 4V
90
1.4
vs Switch Voltage
CHARGE PUMP CHARGING CURRENT (µA)
CHARGE PUMP CHARGING CURRENT (µA)
100
1.2
800
750
700
650
600
550
500
450
400
350
300
250
200
150
100
50
0
SENSE Pin Input Current vs ITH
Voltage
TH
7804 G22
Charge Pump Charging Current
vs Operating Frequency
0.6 0.8 1.0
ITH VOLTAGE (V)
AMPLITUDE (dBm)
INTVCC OR EXTVCC VOLTAGE (V)
5.6
60
SENSE CURRENT (µA)
MAXIMUM CURRENT SENSE VOLTAGE (mV)
5.8
Voltage
Threshold vs IITH
TH Voltage
CHANGE IN FREQUENCY (%)
EXTVCC Switchover and INTVCC
Voltage
VoltagesvsvsTemperature
Temperature
–100
1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5
FREQUENCY (MHz)
7804 G27
Rev. A
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9
LTC7804
PIN FUNCTIONS
(MSOP/QFN)
SS (Pin 1/Pin 3): Output Soft-Start Input. The LTC7804
regulates the VFB voltage to the lesser of 1.2V or the voltage
on the SS pin. An internal 12.5µA pull-up current source is
connected to this pin. A capacitor to ground at this pin sets
the ramp time to the final regulated output voltage. The ramp
time is equal to 1ms for every 10nF of capacitance.
SENSE– (Pin 2/Pin 4): The Negative (−) Input to the
Differential Current Comparator. The ITH pin voltage and
controlled offsets between the SENSE– and SENSE+ pins
in conjunction with RSENSE set the current trip threshold.
SENSE+
(Pin 3/Pin 5): The Positive (+) Input to the
Differential Current Comparator. When SENSE+ is greater
than INTVCC, the SENSE+ pin supplies current to the current comparator.
VFB (Pin 4/Pin 6): Error Amplifier Feedback Input. Connect
an external resistor divider between the output voltage
and the VFB pin to set the regulated output voltage.
ITH (Pin 5/Pin 7): Error Amplifier Outputs and Switching
Regulator Compensation Point. The current comparator
trip point increases with this control voltage. Place compensation components between the ITH pin and GND.
RUN (Pin 6/Pin 8): Run Control Input. Forcing this pin
below 1.2V disables switching of the corresponding
controller. Forcing this pin below 0.7V shuts down the
LTC7804, reducing quiescent current to approximately
1.2µA. This pin can be tied to VIN for always-on operation.
FREQ (Pin 7/Pin 9): Frequency Control Pin for the
Internal VCO. Connecting the pin to GND forces the VCO
to a fixed low frequency of 375kHz. Connecting the pin
to INTVCC forces the VCO to a fixed high frequency of
2.25MHz. Frequencies between 100kHz and 3MHz can
be programmed using a resistor between FREQ and GND.
Minimize the capacitance on this pin.
PLLIN/SPREAD (Pin 8/Pin 10): External Synchronization
Input and Spread Spectrum Selection. When an external
clock is applied to this pin, the phase-locked loop will force
the rising BG signal to be synchronized with the rising edge
of the external clock. When an external clock is present, the
regulators operate in pulse-skipping mode if it is selected
by the MODE pin, or in forced continuous mode otherwise.
When not synchronizing to an external clock, tie this input
to INTVCC to enable spread spectrum dithering of the oscillator or to ground to disable spread spectrum.
MODE (Pin 9/Pin 11): Mode Select Input. This input determines how the LTC7804 operates at light loads. Pulling this
pin to ground selects Burst Mode operation. An internal
100k resistor to ground also invokes Burst Mode operation
when the pin is floating. Tying this pin to INTVCC forces continuous inductor current operation. Tying this pin to INTVCC
through a 100k resistor selects pulse-skipping operation.
INTVCC (Pin 10/Pin 12): Output of the Internal 5.15V Low
Dropout Regulator (LDO). The driver and control circuits
are powered by this supply. Must be decoupled to GND
with a minimum of 4.7μF ceramic or tantalum capacitor.
EXTVCC (Pin 11/Pin 13): External Power Input to an Internal
LDO Connected to INTVCC. This LDO supplies INTVCC power,
bypassing the internal LDO powered from VBIAS whenever
EXTVCC is higher than 4.7V. See INTVCC Regulators in the
Applications Information section. Do not exceed 30V on
this pin. Tie this pin to GND if the EXTVCC LDO is not used.
VBIAS (Pin 12/Pin 14): Main Bias Supply Pin. A bypass
capacitor should be tied between this pin and GND. It is
normally tied to the input supply VIN or the output of the
boost converter.
BG (Pin 13/Pin 15): High Current Gate Drives for Bottom
N-Channel MOSFET. Voltage swing at this pin is from GND
to INTVCC.
BOOST (Pin 14/Pin 16): Bootstrapped Supply to the Top
Side Floating Driver. Connect a capacitor between the
BOOST and SW pin. Also connect a low-leakage Schottky
diode between the BOOST and INTVCC pins.
TG (Pin 15/Pin 1): High Current Gate Drive for the Top
N-Channel MOSFET. This is the output of floating driver
with a voltage swing of INTVCC superimposed on the
switch node voltage SW.
SW (Pin 16/Pin 2): Switch Node Connection to the Inductor.
GND (Exposed Pad Pin 17/Exposed Pad Pin 17): Ground.
Connects to the source of the bottom (main) N-channel
MOSFET and the (−) terminal(s) of CIN and COUT. All
small-signal components and compensation components
should also connect to this ground. The exposed pad must
be soldered to the PCB for rated thermal performance.
Rev. A
10
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LTC7804
BLOCK DIAGRAM
INTVCC
DB
BOOST
CHARGE PUMP
SPREAD SPECTRUM
OSCILLATOR
AND PLL
PLLIN/SPREAD
S
Q
R
Q
1.2V
RUN
VOUT
SW
TOP ON
SWITCH
LOGIC BOT
SHDN
CB
TG
TOP
FREQ
INTVCC
COUT
BG
+
–
0.425V
+
SLEEP
–
MODE
ICMP
+
–
100k
–+
+–
IR
L
–
SENSE –
+
2mV
SENSE+
RSENSE
VIN
VBIAS
SLOPE COMP
–
EA
+
5.15V
LDO
EN
OV
–
LDO
EN
1.2V
+
EXTVCC
5.15V
1.32V
ITH
+
4.7V
–
12.5µA
GND
INTVCC
CIN
VFB
SHDN
CC
CC2
RC
SS
CSS
7804 FD
Rev. A
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11
LTC7804
OPERATION
Main Control Loop
The LTC7804 uses a constant frequency, peak current
mode step-up architecture. During normal operation, the
external bottom MOSFET is turned on when the clock
sets the RS latch, and is turned off when the main current
comparator, ICMP, resets the RS latch. The peak inductor current at which ICMP trips and resets the latch is
controlled by the voltage on the ITH pin, which is the
output of the error amplifier, EA. The error amplifier compares the output voltage feedback signal at the VFB pin
(which is generated with an external resistor divider connected across the output voltage, VOUT, to ground) to the
internal 1.200V reference voltage. When the load current
increases, it causes a slight decrease in VFB relative to
the reference, which causes the EA to increase the ITH
voltage until the average inductor current matches the
new load current.
After the bottom MOSFET is turned off each cycle, the
top MOSFET is turned on until either the inductor current
starts to reverse, as indicated by the current comparator
IR, or the beginning of the next clock cycle.
INTVCC/EXTVCC Power
Power for the top and bottom MOSFET drivers and most
other internal circuitry is derived from the INTVCC pin.
When the EXTVCC pin is tied to a voltage less than 4.7V,
the VBIAS LDO (low dropout linear regulator) supplies
5.15V from VBIAS to INTVCC. If EXTVCC is taken above
4.7V, the VBIAS LDO is turned off and an EXTVCC LDO is
turned on. Once enabled, the EXTVCC LDO supplies 5.15V
from EXTVCC to INTVCC. Using the EXTVCC pin allows the
INTVCC power to be derived from a high efficiency external
source such as a downstream switching regulator output.
Shutdown and Start-Up (RUN, SS Pins)
The LTC7804 can be shut down using the RUN pin. Pulling
this pin below 1.1V shuts down the main control loop.
Pulling the RUN pin below 0.7V disables the controller and
most internal circuits, including the INTVCC LDOs. In this
state, the LTC7804 draws only 1.2μA of quiescent current.
NOTE: Do not apply a heavy load for an extended time
while the chip is in shutdown. The top MOSFETs are
turned off during shutdown and the output load may
cause excessive dissipation in the body diodes.
The RUN pin needs to be externally pulled up or driven
directly by logic. It can also be implemented as an undervoltage lockout (UVLO) by connecting it to the output of an
external resistor divider network off VIN (see Applications
Information section).
The start-up of the controller’s output voltage VOUT is
controlled by the voltage on the SS pin. When the voltage
on the SS pin is less than the 1.2V internal reference, the
LTC7804 regulates the VFB voltage to the SS pin voltage
instead of the 1.2V reference. This allows the SS pin to
be used to program a soft-start by connecting an external
capacitor from the SS pin to GND. An internal 12.5μA
pull-up current charges this capacitor creating a voltage
ramp on the SS pin. As the SS voltage rises linearly from
0V to 1.2V (and beyond), the output voltage VOUT rises
smoothly to its final value.
Light Load Current Operation: Burst Mode Operation,
Pulse-Skipping or Forced Continuous Mode (MODE Pin)
The LTC7804 can be enabled to enter high efficiency
Burst Mode operation, constant frequency pulse-skipping
mode, or forced continuous conduction mode at low load
currents.
To select Burst Mode operation, tie the MODE pin to
GND. To select forced continuous operation, tie the
MODE pin to INTVCC. To select pulse-skipping mode,
tie the MODE pin to a DC voltage greater than 1.2V and
less than INTVCC – 1.3V. An internal 100k resistor to
GND invokes Burst Mode operation when the MODE pin
is floating and pulse-skipping mode when the MODE pin
is tied to INTVCC through an external 100k resistor.
When the controller is enabled for Burst Mode operation,
the minimum peak current in the inductor is set to approximately 25% of the maximum sense voltage even though
the voltage on the ITH pin indicates a lower value. If the
average inductor current is higher than the load current,
or if VIN > VOUT, the error amplifier, EA, will decrease the
voltage on the ITH pin. When the ITH voltage drops below
Rev. A
12
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LTC7804
OPERATION
0.425V, the internal sleep signal goes high (enabling
sleep mode) and both external MOSFETs are turned off.
The ITH pin is then disconnected from the output of the
EA and parked at 0.45V. In the case of VIN > VOUT, the
LTC7804 will remain in sleep mode regardless of the load
current through the body diode of the top MOSFET, which
could then overheat, as discussed in the Operation When
VIN > VOUT section.
for the same number of cycles (i.e., skipping pulses). The
inductor current is not allowed to reverse (discontinuous
operation). This mode, like forced continuous operation,
exhibits low output ripple as well as low audio noise and
reduced RF interference as compared to Burst Mode
operation. It provides higher low current efficiency than
forced continuous mode, but not nearly as high as Burst
Mode operation.
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current that the LTC7804 draws
to only 14μA.
Unlike forced continuous mode and pulse-skipping mode,
Burst Mode cannot be synchronized to an external clock.
Therefore, if Burst Mode is selected and PLLIN/SPREAD
pin is clocked to use the phase-locked loop, the LTC7804
switches from Burst Mode to forced continuous mode.
In sleep mode, the load current is supplied by the output
capacitor. As the output voltage decreases, the EA’s output begins to rise. When the output voltage drops enough,
the ITH pin is reconnected to the output of the EA, the
sleep signal goes low, and the controller resumes normal
operation by turning on the bottom external MOSFET on
the next cycle of the internal oscillator.
When the controller is enabled for Burst Mode operation,
the inductor current is not allowed to reverse. The reverse
current comparator, IR, turns off the top external MOSFET
just before the inductor current reaches zero, preventing
it from reversing and going negative. Thus, the controller
operates in discontinuous operation.
In forced continuous operation or clocked by an external
clock source to use the phase-locked loop, the inductor
current is allowed to reverse at light loads or under large
transient conditions. The peak inductor current is determined by the voltage on the ITH pin, just as in normal
operation. In this mode, the efficiency at light loads is
lower than in Burst Mode operation. However, continuous
operation has the advantage of lower output voltage ripple
and less interference to audio circuitry. In forced continuous mode, the inductor current ripple is independent of
load current.
When the MODE pin is connected for pulse-skipping
mode, the LTC7804 operates in PWM pulse-skipping
mode at light loads. In this mode, constant frequency
operation is maintained down to approximately 1% of
designed maximum output current. At very light loads, the
current comparator, ICMP, may remain tripped for several
cycles and force the external bottom MOSFET to stay off
Frequency Selection, Spread Spectrum and PhaseLocked-Loop (FREQ and PLLIN/SPREAD Pins)
The selection of switching frequency is a trade-off between
efficiency and component size. Low frequency operation increases efficiency by reducing MOSFET switching
losses, but requires larger inductance and/or capacitance
to maintain low output ripple voltage.
The free running switching frequency of the LTC7804 is
selected using the FREQ pin. If the PLLIN/SPREAD pin is
not being driven by an external clock source, the FREQ
pin can be tied to GND, tied to INTVCC or programmed
through an external resistor. Tying FREQ to GND selects
375kHz while tying FREQ to INTVCC selects 2.25MHz.
Placing a resistor between FREQ and GND allows the frequency to be programmed between 100kHz and 3MHz,
as shown in Figure 6.
Switching regulators can be particularly troublesome
for applications where electromagnetic interference
(EMI) is a concern. To improve EMI, the LTC7804 can
operate in spread spectrum mode, which is enabled by
tying the PLLIN/SPREAD pin to INTVCC. This feature varies the switching frequency with typical boundaries of
0% to +20% of the frequency set by the FREQ pin.
A phase-locked loop (PLL) is available on the LTC7804
to synchronize the internal oscillator to an external clock
source that is connected to the PLLIN/SPREAD pin. The
LTC7804’s phase detector (PFD) and low pass filter adjust
the voltage) of the VCO input to align the turn-on of the
Rev. A
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13
LTC7804
OPERATION
controller’s external bottom MOSFET to the rising edge
of the synchronizing signal.
The VCO input voltage is prebiased to the free running
frequency set by the FREQ pin before the external clock
is applied. If prebiased near the external clock frequency,
the PLL loop only needs to make slight changes to the
VCO input in order to synchronize the rising edge of the
external clock to the rising edge of BG. For more rapid
lock-in to the external clock, use the FREQ pin to set the
internal oscillator to approximately the frequency of the
external clock. The LTC7804’s PLL is guaranteed to lock
to an external clock source whose frequency is between
100kHz and 3MHz.
The PLLIN/SPREAD pin is TTL compatible with thresholds
of 1.6V (rising) and 1.1V (falling) and is guaranteed to
operate with a clock signal swing of 0.5V to 2.5V.
Operation When VIN > VOUT
When the input voltage VIN rises above the regulated VOUT
voltage, the boost controller behaves differently depending on the mode, inductor current and VIN voltage. When
VIN exceeds the regulated VOUT in forced continuous
mode, the loop works to keep the top MOSFET on continuously. An internal charge pump delivers current to
the boost capacitor from the BOOST pin to maintain a
sufficiently high TG voltage.
If VIN is between 100% and 110% of the regulated VOUT
voltage and pulse-skipping mode is selected, TG turns
on if the inductor current rises above approximately 3%
of the programmed current limit. If Burst Mode operation is selected, TG remains off regardless of the inductor
current.
If VOUT is above 110% of the regulated VOUT voltage
setpoint in forced continuous or pulse-skipping mode,
the controller turns on TG continuously regardless of the
inductor current. Note that a rising VIN must exceed the
110% threshold by an offset voltage equal to the body
diode of the high-side MOSFET. In Burst Mode, the controller also attempts to turn on TG when VOUT exceeds
the 110% threshold. However, the internal charge pump
is disabled if the chip is asleep due to burst mode operation. With the charge pump off, the boost capacitor may
discharge, resulting in the TG voltage being insufficient
to keep the top MOSFET completely on. To prevent excessive power dissipation across the body diode of the top
MOSFET in this situation, the chip can be switched over
to forced continuous or pulse-skipping mode to enable
the charge pump, or a Schottky diode can also be placed
in parallel to the top MOSFET.
Operation at Low Input Voltage
The LTC7804 features a rail-to-rail current comparator
which functions down to zero volts. The minimum boost
converter input voltage is therefore determined by the
practical limitations of the boost converter architecture.
Since the input voltage could be lower than the 4.5V VBIAS
limit, VBIAS can be connected to the output of the boost
controller, as illustrated in the typical application circuit
in Figure 11. This allows the boost controller to handle
very low input voltage transients while maintaining output
voltage regulation.
BOOST Supply Refresh and Internal Charge Pump
The top MOSFET driver is biased from the floating bootstrap capacitor, CB, which normally recharges during each
cycle through an external low-leakage Schottky or PN
Junction diode, DB, when the bottom MOSFET turns on.
There are two considerations to keep the BOOST supply
at the required bias level. During start-up, if the bottom
MOSFET is not turned on within 100µs after UVLO goes
low, the bottom MOSFET will be forced to turn on for a
cumulative on-time of ~400ns. This forced refresh generates enough BOOST-SW voltage to allow the top MOSFET
to be fully enhanced instead of waiting for the initial few
cycles to charge the bootstrap capacitor, CB. There is also
an internal charge pump that keeps the required bias on
BOOST. The charge pump always operates in both forced
continuous mode and pulse-skipping mode. In Burst
Mode operation, the charge pump is turned off during
sleep and enabled when the chip wakes up. The internal
charge pump can normally supply a charging current of
65µA.
Rev. A
14
For more information www.analog.com
LTC7804
APPLICATIONS INFORMATION
The Typical Application on the first page is a basic
LTC7804 application circuit. LTC7804 can be configured to use either DCR (inductor resistance) sensing or
low value resistor sensing. The choice between the two
current sensing schemes is largely a design trade-off
between cost, power consumption and accuracy. DCR
sensing is becoming popular because it saves expensive
current sensing resistors and is more power efficient,
especially in high current and lower frequency applications. However, current sensing resistors provide the
most accurate current limits for the controller. Other external component selection is driven by the load requirement, and begins with the selection of RSENSE (if RSENSE
is used) and inductor value. Next, the power MOSFETs
and Schottky diodes are selected. Finally, input and output
capacitors are selected.
placed close to the switching node, to prevent noise from
coupling into sensitive small-signal nodes.
The maximum current limit threshold voltage of the current comparator is programmed to be 50mV.
TO SENSE FILTER,
NEXT TO THE CONTROLLER
VIN
INDUCTOR OR RSENSE
Figure 1. Sense Lines Placement with Inductor or Sense Resistor
VIN
VBIAS
LTC7804
SENSE+
CF
SENSE+ and SENSE– Pins
SENSE–
The SENSE+ and SENSE– pins are the inputs to the current comparators. The common mode voltage range on
these pins is 0V to 40V (abs max), enabling the LTC7804
to operate from input voltages up to a maximum of 40V.
RF
SENSE RESISTOR WITH
PARASITIC INDUCTANCE
RF • CF = ESL/RSENSE
POLE-ZERO CANCELLATION.
ESL
PLACE RF AND CF
NEAR SENSE PINS.
BOOST
TG
VOUT
SW
BG
GND
7804 F02a
The impedance of the SENSE+ pin changes depending on
the common mode voltage. When SENSE+ is less than
Filter components mutual to the sense lines should be
placed close to the LTC7804, and the sense lines should
run close together to a Kelvin connection underneath the
current sense element (shown in Figure 1). Sensing current elsewhere can effectively add parasitic inductance
and capacitance to the current sense element, degrading
the information at the sense terminals and making the
programmed current limit unpredictable. If inductor DCR
sensing is used (Figure 2b), sense resistor R1 should be
RSENSE
INTVCC
The SENSE– pin is high impedance drawing less
than ≈±1μA. This high impedance allows the current comparators to be used in inductor DCR sensing.
2.9V, it is relatively high impedance, drawing about 2μA.
When SENSE+ is greater than 3.2V but is less than INTVCC
– 0.5V, the pin draws about 30μA to bias internal circuitry.
When SENSE+ is above INTVCC + 0.5V, a higher current
(~650μA) flows into the pin. Between INTVCC – 0.5V and
INTVCC + 0.5V, the current transitions from the smaller
current to the higher current.
7804 F01
(2a) Using a Resistor to Sense Current
LTC7804
VIN
VBIAS
SENSE+
C1
R2
DCR
SENSE–
INTVCC
R1
L
INDUCTOR
BOOST
TG
VOUT
SW
BG
GND
7804 F02b
PLACE C1 NEAR SENSE PINS (R1||R2) • C1 =
L
DCR
RSENSE(EQ) = DCR •
R2
R1 + R2
(2b) Using the Inductor DCR to Sense Current
Figure 2. Current Sensing Methods
Rev. A
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15
LTC7804
APPLICATIONS INFORMATION
Low Value Resistor Current Sensing
A typical sensing circuit using a discrete resistor is shown
in Figure 2a. RSENSE is chosen based on the required output current.
The current comparator has a maximum threshold
VSENSE(MAX) of 50mV. The current comparator threshold
voltage sets the peak of the inductor current, yielding a
maximum average inductor current, IL(MAX), equal to the
peak value less half the peak-to-peak ripple current, ∆IL.
To calculate the sense resistor value, use the equation:
RSENSE =
VSENSE(MAX)
ΔI
IL(MAX) + L
2
The actual value of IL(MAX) depends on the required output
current IOUT(MAX) and can be calculated using:
⎛V ⎞
IL(MAX) = IOUT(MAX) • ⎜ OUT ⎟
⎝ VIN ⎠
To ensure that the application will deliver full load current over the full operating temperature range, choose
the minimum value for VSENSE(MAX) in the Electrical
Characteristics table and account for tolerances in switching frequency, inductance, and RSENSE resistance, as well
as applicable voltage ranges.
To avoid potential jitter or instability due to PCB noise coupling into the current sense signal, the AC current sensing
ripple of ΔVSENSE = ΔIL • RSENSE should also be checked to
ensure a good signal-to-noise ratio. In general, for a reasonably good PCB layout, a target VSENSE AC ripple range
of 10mV to 20mV at 50% duty cycle is recommended for
both RSENSE and DCR sensing applications.
The parasitic inductance (ESL) of the sense resistor introduces significant error in the current sense signal, particularly for lower inductor value (< 3µH) or higher current
(> 5A) applications. This error may be compensated for
with an RC filter into the sense pins as shown in Figure 2a.
Set the RC filter time constant RF • CF = ESL/RSENSE for
optimal cancellation of the ESL. Surface mount sense
resistors in low ESL wide footprint geometries are recommended to minimize this error. If not specified on the
manufacturer’s data sheet, the ESL can be approximated
16
as 0.4nH for a resistor with a 1206 footprint and 0.2nH
for a 1225 footprint.
Inductor DCR Sensing
For applications requiring the highest possible efficiency
at high load currents, the LTC7804 is capable of sensing
the voltage drop across the inductor DCR, as shown in
Figure 2b. The DCR of the inductor represents the small
amount of DC resistance of the copper wire, which can
be less than 1mΩ for today’s low value, high current
inductors. In a high current application requiring such
an inductor, power loss through a sense resistor would
cost several points of efficiency compared to inductor
DCR sensing.
If the external (R1||R2) • C1 time constant is chosen to
be exactly equal to the L/DCR time constant, the voltage
drop across the external capacitor is equal to the drop
across the inductor DCR multiplied by R2/(R1 + R2). R2
scales the voltage across the sense terminals for applications where the DCR is greater than the target sense
resistor value. To properly dimension the external filter
components, the DCR of the inductor must be known. It
can be measured using a good RLC meter, but the DCR
tolerance is not always the same and varies with temperature; consult the manufacturers’ data sheets for detailed
information.
Using the inductor ripple current value from the Inductor
Value Calculation section, the target sense resistor value is:
RSENSE ≤
VSENSE(MAX)
ΔIL
IL(MAX) +
2
To ensure that the application will deliver full load current over the full operating temperature range, choose the
minimum value for the maximum current sense threshold
VSENSE(MAX) in the Electrical Characteristics table.
Next, determine the DCR of the inductor. When provided,
use the manufacturer’s maximum value, usually given at
20°C. Increase this value to account for the temperature
coefficient of copper resistance, which is approximately
0.4%/°C. A conservative value for TL(MAX) is 100°C.
For more information www.analog.com
Rev. A
LTC7804
APPLICATIONS INFORMATION
To scale the maximum inductor DCR to the desired sense
resistor value (RD), use the divider ratio:
RD =
RSENSE(EQUIV)
DCRMAX at TL(MAX)
C1 is usually selected to be in the range of 0.1μF to
0.47μF. This forces R1 || R2 to around 2k, reducing error
that might have been caused by the SENSE− pin’s ±1μA
current.
The target equivalent resistance R1 || R2 is calculated
from the nominal inductance, C1 value, and DCR:
R1|| R2 =
L
(DCR at 20°C) • C1
The sense resistor values are:
R1=
R1|| R2
R1• RD
; R2 =
RD
1– RD
The maximum power loss in R1 is related to duty cycle,
and will occur in continuous mode at VIN = 1/2VOUT:
PLOSS_R1 =
( VOUT – VIN ) • VIN
R1
of MOSFET switching and gate charge losses. In addition to this basic trade-off, the effect of inductor value
on ripple current and low current operation must also be
considered.
The maximum average inductor current in continuous
conduction mode is equal to the maximum average output current multiplied by a factor of VOUT/VIN, or IL(MAX)
= IOUT(MAX)•VOUT/VIN. Be aware that the maximum output current decreases with decreasing VIN. The choice of
IL(MAX) therefore depends on the maximum load current
for a regulated VOUT at the minimum normal operating
VIN. If the load current limit for a given VIN is exceeded,
VOUT will decrease until the IL(MAX) = IOUT(MAX)•VOUT/VIN
equation is satisfied. Additionally, when the output is in
overvoltage (VIN >VOUT), the top switch is on continuously
and the maximum load current is equal to IL(MAX). The
inductor ripple current ΔIL for a boost regulator is:
ΔIL =
⎛
1
V ⎞
VIN ⎜ 1– IN ⎟
f • L ⎝ VOUT ⎠
Accepting larger values of ∆IL allows the use of low inductances, but results in higher output voltage ripple and
greater core losses. A reasonable starting point for setting ripple current is ∆IL = 0.3 IL(MAX). The maximum ∆IL
occurs at VIN = 1/2VOUT.
Ensure that R1 has a power rating higher than this value.
If high efficiency is necessary at light loads, consider this
power loss when deciding whether to use DCR sensing
or sense resistors. Light load power loss can be modestly higher with a DCR network than with a sense resistor, due to the extra switching losses incurred through
R1. However, DCR sensing eliminates a sense resistor,
reduces conduction losses and provides higher efficiency
at heavy loads. Peak efficiency is about the same with
either method.
The inductor value also has secondary effects. The transition to Burst Mode operation begins when the average
inductor current required results in a peak current below
25% of the current limit determined by RSENSE. Lower
inductor values (higher ∆IL) will cause this to occur at
lower load currents, which can cause a dip in efficiency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Inductor Value Calculation
Inductor Core Selection
The operating frequency and inductor selection are interrelated in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or molypermalloy cores. Actual core loss is independent of core size for a
fixed inductor value, but it is very dependent on inductance
Rev. A
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17
LTC7804
APPLICATIONS INFORMATION
value selected. As inductance increases, core losses go
down. Unfortunately, increased inductance requires more
turns of wire and therefore copper losses will increase.
The MOSFET power dissipations at maximum output current are given by:
Ferrite designs have very low core loss and are preferred
for high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite
core material saturates hard, which means that inductance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate! The inductor saturation
design margin should account for the tolerance and temperature effects on the saturation current.
PMAIN =
Power MOSFET Selection
Two external power MOSFETs must be selected for the
LTC7804 controller: one N-channel MOSFET for the bottom (main) switch, and one N-channel MOSFET for the
top (synchronous) switch.
The peak-to-peak drive levels are set by the INTVCC
voltage. This voltage is typically 5.15V during start-up
(see EXTVCC Pin Connection). Consequently, logic-level
threshold MOSFETs must be used in most applications.
Pay close attention to the BVDSS specification for the
MOSFETs as well.
Selection criteria for the power MOSFETs include the
onresistance, RDS(ON), Miller capacitance, CMILLER, input
voltage and maximum output current. Miller capacitance,
CMILLER, can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data
sheet. CMILLER is equal to the increase in gate charge
along the horizontal axis while the curve is approximately
flat divided by the specified change in VDS. This result is
then multiplied by the ratio of the application applied VDS
to the gate charge curve specified VDS. When the IC is
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
Main Switch Duty Cycle =
VOUT – VIN
VOUT
Synchronous Switch Duty Cycle =
VIN
VOUT
( VOUT – VIN ) VOUT • I
( OUT(MAX) )2 • (1+ δ )
VIN2
⎛ V 3 ⎞ ⎛ I OUT(MAX) ⎞
•RDS(ON) + ⎜ OUT ⎟ ⎜
⎟⎠ •
2
⎝ VIN ⎠ ⎝
⎛
1
1 ⎞
+
⎟ •f
INTVCC − VTHMIN VTHMIN ⎠
(RDR +RG )(CMILLER ) • ⎜⎝ V
PSYNC =
(
VOUT
I
VIN OUT(MAX)
)2 (1+ δ )RDS(ON)
where δ is the temperature dependency of RDS(ON)
(δ ≈ 0.005/°C), RG is the internal gate resistance of the
MOSFET and RDR is the effective driver resistance at the
MOSFET’s Miller threshold voltage (RDR ≈ 2Ω). VTHMIN is
the typical MOSFET minimum threshold voltage.
Both MOSFETs have I2R losses while the bottom N-channel
equation includes an additional term for transition losses,
which are highest at high output voltages. For VOUT <
20V and moderate switching frequencies, the high current
efficiency generally improves with larger MOSFETs, while
for VOUT > 20V the transition losses rapidly increase to the
point that the use of a higher RDS(ON) device with lower
CMILLER actually provides higher efficiency. The synchronous MOSFET losses are greatest at high output voltage
when the bottom switch duty factor is low or during a
short-circuit when the synchronous switch is on close to
100% of the period.
CIN and COUT Selection
The input ripple current in a boost converter is relatively
low (compared to the output ripple current) because this
current is continuous. The boost input capacitor CIN voltage rating should comfortably exceed the maximum input
voltage. Although ceramic capacitors can be relatively
tolerant of overvoltage conditions, aluminum electrolytic
capacitors are not. Be sure to characterize the input voltage for any possible overvoltage transients that could
apply excess stress to the input capacitors.
Rev. A
18
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LTC7804
APPLICATIONS INFORMATION
The value of CIN is a function of the source impedance, and
in general, the higher the source impedance, the higher
the required input capacitance. The required amount of
input capacitance is also greatly affected by the duty cycle.
High output current applications that also experience high
duty cycles can place great demands on the input supply,
both in terms of DC current and ripple current.
The output current in a boost converter is discontinuous, so COUT should be selected to meet output voltage
ripple requirements. The effects of ESR (equivalent series
resistance) and the bulk capacitance must be considered
when choosing the right capacitor for a given output
ripple voltage. The peak-to-peak ripple due to charging
and discharging the bulk capacitance of COUT is given by:
VRIPPLE =
(
IOUT(MAX) • VOUT – VIN(MIN)
COUT • VOUT • f
) V
The ripple due to the voltage drop across the ESR is
given by:
1 ⎞
⎛
∆VESR = ⎜ IL(MAX) + ∆IL ⎟ •ESR
⎝
2 ⎠
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, aluminum electrolytic and
ceramic capacitors are all available in surface mount
packages. Ceramic capacitors have excellent low ESR
characteristics but can have a high voltage coefficient.
Capacitors are now available with low ESR and high ripple
current ratings such as OS-CON and POSCAP.
Setting Output Voltage
The LTC7804 output voltage is set by an external feedback resistor divider carefully placed across the output,
as shown in Figure 3. The regulated output voltage is
determined by:
VOUT
RB
LTC7804
CFF
VFB
RA
7804 F03
Figure 3. Setting Output Voltage
the VFB line away from noise sources, such as the inductor
or the SW line.
RUN Pin
The LTC7804 is enabled using the RUN pin. It has a rising
threshold of 1.2V with 100mV of hysteresis. Pulling the
RUN pin below 1.1V shuts down the main control loop.
Pulling it below 0.7V disables the controller and most
internal circuits, including the INTVCC LDOs. In this state,
the LTC7804 draws only 1.2μA of quiescent current.
The RUN pin is high impedance and must be externally
pulled up/down or driven directly by logic. The RUN pin
can tolerate up to 40V (abs max), so it can be conveniently
tied to VIN in always-on applications where the controller
is enabled continuously and never shut down. Do not
float the RUN pin.
VIN
LTC7804
RB
RUN
RA
7804 F04
Figure 4. Using the RUN Pin as a UVLO
The RUN pin can be configured as a UVLO by connecting
it to the output of an external resistor divider network off
VIN, as shown in Figure 4.
The rising and falling UVLO thresholds are calculated
using the RUN pin thresholds:
⎛ R ⎞
VOUT = 1.2V ⎜ 1+ B ⎟
⎝ RA ⎠
⎛ R ⎞
VUVLO(RISING) = 1.2V ⎜ 1+ B ⎟
⎝ RA ⎠
To improve the frequency response, a feedforward capacitor, CFF, may be used. Great care should be taken to route
⎛ R ⎞
VUVLO(FALLING) = 1.1V ⎜ 1+ B ⎟
⎝ RA ⎠
Rev. A
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19
LTC7804
APPLICATIONS INFORMATION
The current that flows through the RA−RB divider directly
adds to the shutdown, sleep, and active current of the
LTC7804, and care should be taken to minimize the impact
of this current on the overall efficiency of the application
circuit. Resistor Values in the MΩ range may be required
to keep the impact on quiescent shutdown and sleep currents low.
For applications that do not require a precise UVLO the
RUN pin can be tied to VIN. In this configuration, the UVLO
threshold is limited to the internal INTVCC UVLO threshold
as shown in the Electrical Characteristics table.
Soft-Start (SS Pin)
The start-up of VOUT is controlled by the voltage on the
SS pin. When the voltage on the SS pin is less than the
internal 1.2V reference, the LTC7804 regulates the VFB
pin voltage to the voltage on the SS pin instead of 1.2V.
Soft-start is enabled by simply connecting a capacitor
from the SS pin to ground, as shown in Figure 5. An internal 12.5μA current source charges the capacitor, providing a linear ramping voltage at the SS pin. The LTC7804
will regulate the VFB pin (and hence VOUT) according to
the voltage on the SS pin, allowing VOUT to rise smoothly
to its final regulated value. The total soft-start time will
be approximately:
1.2V
tSS = CSS •
12.5µA
the EXTVCC LDO regulate INTVCC to 5.15V. Each of these
can supply a peak current of at least 50mA and must be
bypassed to ground with a minimum of 2.2μF ceramic
capacitor, placed as close as possible to the pin. No matter what type of bulk capacitor is used, an additional 1μF
ceramic capacitor placed directly adjacent to the INTVCC
and GND pins is highly recommended to supply the high
frequency transient currents required by the MOSFET
gate drivers.
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maximum junction temperature rating for the LTC7804 to be
exceeded. The INTVCC current, which is dominated by
the gate charge current, may be supplied by either the
VBIAS LDO or the EXTVCC LDO. When the voltage on the
EXTVCC pin is less than 4.7V, the VBIAS LDO is enabled.
Power dissipation for the IC in this case is highest and
is equal to VBIAS • IINTVCC. The gate charge current is
dependent on operating frequency as discussed in the
Efficiency Considerations section. The junction temperature can be estimated by using the equations given in
Note 2 of the Electrical Characteristics. For example, the
LTC7804 INTVCC current is limited to less than 20mA in
the QFN package from a 40V supply when not using the
EXTVCC supply at a 70°C ambient temperature:
TJ = 70°C + (20mA)(40V)(68°C/W for QFN) = 125°C
In the MSOP package, the INTVCC current is limited to less
than 34mA from a 40V supply:
TJ = 70°C + (34mA)(40V)(40°C/W for MSOP) = 125°C
LTC7804
SS
CSS
GND
7804 F05
Figure 5. Using the SS Pin to Program Soft-Start
INTVCC Regulators
The LTC7804 features two separate internal P-channel
low dropout linear regulators (LDOs) that supply power
at the INTVCC pin from either the VBIAS supply pin or
the EXTVCC pin depending on the connection of the
EXTVCC pin. INTVCC powers the gate drivers and much
of the LTC7804’s internal circuitry. The VBIAS LDO and
To prevent the maximum junction temperature from being
exceeded, the input supply current must be checked while
operating in forced continuous mode (MODE = INTVCC)
at maximum VBIAS.
When the voltage applied to EXTVCC rises above 4.7V, the
VBIAS LDO is turned off and the EXTVCC LDO is enabled.
The EXTVCC LDO remains on as long as the voltage applied
to EXTVCC remains above 4.5V. The EXTVCC LDO attempts
to regulate the INTVCC voltage to 5.15V, so while EXTVCC
is less than 5.15V, the LDO is in dropout and the INTVCC
voltage is approximately equal to EXTVCC. When EXTVCC
is greater than 5.15V, up to an absolute maximum of 30V,
INTVCC is regulated to 5.15V.
Rev. A
20
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APPLICATIONS INFORMATION
Significant thermal gains can be realized by powering
INTVCC from an external supply, and efficiency is also
improved if the external supply is derived from another
switching regulator. This is accomplished by tying the
EXTVCC pin directly to an external supply that is greater
than the INTVCC regulation point.
Tying the EXTVCC pin to an 8.5V supply reduces the junction temperature in the previous examples from 125°C
to 82°C:
TJ = 70°C + (20mA)(8.5V)(68°C/W) = 82°C
and from 125°C to 82°C in an MSOP package
TJ = 70°C + (34mA)(8.5V)(40°C/W) = 82°C
The following list summarizes the three possible connections for EXTVCC:
1. EXTVCC Grounded. This will cause INTVCC to be powered from the internal 5.15V regulator resulting in an
efficiency penalty of up to 10% at high input voltages.
2. EXTVCC Connected Directly to VIN. This can be used
if VBIAS is tied to VOUT and the maximum regulator
input voltage is 30V or less. This approach allows the
regulator to ride through very low input voltage conditions (VIN 4.7V.
follows. With the topside MOSFET on, the boost voltage
is above the output voltage: VBOOST = VOUT + VINTVCC. The
value of the boost capacitor CB needs to be 100 times that
of the total input capacitance of the topside MOSFET(s).
For typical applications, a suitable value of CB is in the
0.1µF to 0.47µF range. The reverse breakdown of the
external diode DB must be greater than VOUT(MAX).
The external diode DB can be a Schottky diode or silicon
diode, but in either case it should have low leakage and
fast recovery. Pay close attention to the reverse leakage
at high temperatures, where it generally increases substantially. A leaky diode not only increases the quiescent
current of the boost converter, but it can create a current path from the BOOST pin to INTVCC. This will cause
INTVCC to rise if the diode leakage exceeds the current
consumption on INTVCC, which is primarily a concern in
Burst Mode operation where the load on INTVCC can be
very small. There is an internal voltage clamp on INTVCC
that prevents the INTVCC voltage from running away, but
this clamp should be regarded as a failsafe only.
3. EXTVCC Connected to an External Supply. This can
be used if an external supply compatible with the
MOSFET gate drive requirements is available in the
5V to 30V range. The supply may be higher or lower
than VBIAS, however, a lower EXTVCC voltage results
in higher efficiency.
The topside MOSFET driver includes an internal charge
pump that delivers current to the bootstrap capacitor from
the BOOST pin. This charge current maintains the bias
voltage required to keep the top MOSFET on continuously
during pass-through/overvoltage conditions. In applications supporting pass-through or overvoltage conditions,
the Schottky or PN-junction diode selected for the topside
driver should have a reverse leakage less than the available output current the charge pump can supply. Curves
displaying the available charge pump current under different operating conditions can be found in the Typical
Performance Characteristics section.
Topside MOSFET Driver Supply (CB, DB)
Phase-Locked Loop and Frequency Synchronization
An external bootstrap capacitor CB connected to the
BOOST pin supplies the gate drive voltage for the topside
MOSFET. Capacitor CB in the Block Diagram is charged
though external diode DB from INTVCC when the SW pin
is low. When the topside MOSFET is to be turned on, the
driver places the CB voltage across the gate and source
of the desired MOSFET. This enhances the MOSFET and
turns on the topside switch. For typical applications, a
suitable value of CB is in the 0.1µF to 0.47µF range. The
switch node voltage, SW, rises to VOUT and the BOOST pin
The LTC7804 has an internal phase-locked loop (PLL) comprised of a phase frequency detector, a lowpass filter, and a
voltage-controlled oscillator (VCO). This allows the turn-on
of the bottom MOSFET to be locked to the rising edge of
an external clock signal applied to the PLLIN/SPREAD pin.
The phase detector is an edge sensitive digital type that
provides zero degrees phase shift between the external and
internal oscillators. This type of phase detector does not
exhibit false lock to harmonics of the external clock.
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Rev. A
21
LTC7804
APPLICATIONS INFORMATION
Rapid phase locking can be achieved by using the FREQ
pin to set a free-running frequency near the desired synchronization frequency. The VCO’s input voltage is prebiased at a frequency corresponding to the frequency set
by the FREQ pin. Once prebiased, the PLL only needs
to adjust the frequency slightly to achieve phase lock
and synchronization. Although it is not required that the
free-running frequency be near external clock frequency,
doing so will prevent the operating frequency from passing through a large range of frequencies as the PLL locks.
When synchronized to an external clock, the LTC7804 operates in forced continuous mode if the MODE pin is set to
Burst Mode operation or forced continuous operation. If the
MODE pin is set to pulse-skipping operation, the LTC7804
maintains pulse-skipping operation when synchronized.
RFREQ (in kΩ) =
1M
100k
10k
95
90
85
80
77.5% AT 2.25MHz
75
70
The switching frequency is set using the FREQ and PLLIN/
SPREAD pins as shown in Table 1.
PLLIN/SPREAD PIN
FREQUENCY
0V
0V
375kHz
INTVCC
0V
2.25MHz
Resistor
0V
100kHz to 3MHz
Any of the Above
External Clock
100kHz to 3MHz
Phase-Locked to
External Clock
Any of the Above
INTVCC
Spread Spectrum fOSC
Modulated 0% to +20%
500k
100
65
0.1
FREQ PIN
100k
FREQ PIN RESISTOR (Ω)
(a) Relationship Between Oscillator
Frequency and Resistor Value at the FREQ Pin
Setting the Operating Frequency
Table 1.
37MHz
fOSC
10M
FREQUENCY (Hz)
If the external and internal frequencies are the same but exhibit
a phase difference, the current sources turn on for an amount
of time corresponding to the phase difference. The voltage
at the VCO input is adjusted until the phase and frequency of
the internal and external oscillators are identical. At the stable
operating point, the phase detector output is high impedance
and an the internal filter capacitor, holds the voltage at the
VCO input. Note that the LTC7804 can only be synchronized
to an external clock whose frequency is within range of the
LTC7804’s internal VCO, which is nominally 100kHz to 3MHz.
Tying the FREQ pin to ground selects 375kHz while tying
FREQ to INTVCC selects 2.25MHz. Placing a resistor
between FREQ and ground allows the frequency to be programmed anywhere between 100kHz and 3MHz. Choose a
FREQ pin resistor from Figure 6a or the following equation:
MAXIMUM DUTY CYCLE (%)
If the external clock frequency is greater than the internal
oscillator’s frequency, fOSC, then current is sourced continuously from the phase detector output, pulling up the VCO
input. When the external clock frequency is less than fOSC,
current is sunk continuously, pulling down the VCO input.
1
FREQUENCY (MHz)
3
7804 F06
(b) Relationship Between Maximum Duty
Cycle and Operating Frequency
Figure 6. Setting the Operating Frequency
A further constraint on the operating frequency is due to
the maximum duty cycle of the boost converter. The maximum duty cycle, which can be approximated as DCMAX = (1
– VIN(MIN)/VOUT) • 100%, is limited as shown in Figure 6b.
At low frequencies, the output will lose regulation if the
required duty cycle is higher than 93%. At high frequencies,
Rev. A
22
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LTC7804
APPLICATIONS INFORMATION
the maximum duty cycle available to maintain constant frequency operation is reduced further. In this region, if a higher
duty cycle is required to keep the output voltage in regulation,
the controller will skip the top MOSFET (TG) turn-on and keep
the bottom MOSFET (BG) on for more than one clock cycle to
achieve the higher duty cycle at an effectively lower frequency.
Choose a frequency that limits the maximum duty cycle to a
value lower than the curve shown in Figure 6b.
top MOSFET just before the inductor current reaches zero,
preventing it from reversing and going negative. Thus,
the regulator operates in discontinuous conduction. In
addition, when the load current is very light, the inductor
current will begin bursting at frequencies lower than the
switching frequency, and enter a low current sleep mode
when not switching. As a result, Burst Mode operation
has the highest possible efficiency at light load.
Switching regulators can be particularly troublesome for
applications where electromagnetic interference (EMI) is
a concern. To improve EMI, spread spectrum mode can
optionally be selected by tying the PLLIN/SPREAD pin to
INTVCC. When spread spectrum in enabled, the switching frequency varies within 0% to +20% of the frequency
selected by the FREQ pin. Spread spectrum may be used
in any operating mode selected by the MODE pin (Burst
Mode, pulse-skipping, or forced continuous mode).
In forced continuous mode, the inductor current is
allowed to reverse at light loads and switches at the same
frequency regardless of load. In this mode, the efficiency
at light loads is considerably lower than in Burst Mode
operation. However, continuous operation has the advantage of lower output voltage ripple and less interference to
audio circuitry. In forced continuous mode, the inductor
current ripple is independent of load current.
Selecting the Light-Load Operating Mode
The LTC7804 can be set to enter high efficiency Burst
Mode operation, constant frequency pulse-skipping mode
or forced continuous conduction mode at light load currents. To select Burst Mode operation, tie the MODE to
ground. To select forced continuous operation, tie the
MODE pin to INTVCC. To select pulse-skipping mode, tie
the MODE pin to INTVCC through a 100k resistor. An internal 100k resistor from the MODE pin to ground selects
Burst Mode operation if the pin is floating. When synchronized to an external clock through the PLLIN/SPREAD
pin, the LTC7804 operates in pulse‑skipping mode if it is
selected, or in forced continuous mode otherwise. Table 2
summarizes the use of the MODE pin to select the light
load operating mode.
Table 2.
MODE PIN
LIGHT-LOAD
OPERATING MODE
MODE WHEN SYNCHRONIZED
0V or Floating
Burst Mode
Forced Continuous
100k to INTVCC
Pulse-Skipping
Pulse-Skipping
INTVCC
Forced Continuous
Forced Continuous
In general, the requirements of each application will dictate
the appropriate choice for light-load operating mode. In
Burst Mode operation, the inductor current is not allowed
to reverse. The reverse current comparator turns off the
In pulse-skipping mode, constant frequency operation is
maintained down to approximately 1% of designed maximum output current. At very light loads, the PWM comparator may remain tripped for several cycles and force the
bottom MOSFET to stay off for the same number of cycles
(i.e., skipping pulses). The inductor current is not allowed
to reverse (discontinuous operation). This mode, like forced
continuous operation, exhibits low output ripple as well as
low audio noise and reduced RF interference as compared
to Burst Mode operation. It provides higher light load efficiency than forced continuous mode, but not nearly as high
as Burst Mode operation. Consequently, pulse-skipping mode
represents a compromise between light load efficiency, output ripple and EMI.
In some applications, it may be desirable to change light
load operating mode based on the conditions present in
the system. For example, if a system is inactive, one might
select high efficiency Burst Mode operation by keeping
the MODE pin set to 0V. When the system wakes, one
might send an external clock to PLLIN/SPREAD, or tie
MODE to INTVCC to switch to low noise forced continuous mode. Such on-the-fly mode changes can allow an
individual application to benefit from the advantages of
each light‑load operating mode.
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Rev. A
23
LTC7804
APPLICATIONS INFORMATION
Minimum On-Time Considerations
Minimum on-time, tON(MIN), is the smallest time duration
that the LTC7804 is capable of turning on the bottom
MOSFET. It is determined by internal timing delays and
the gate charge required to turn on the bottom MOSFET.
Low duty cycle applications may approach this minimum
on-time limit and care should be taken to ensure that:
tON(MIN) <
VOUT − VIN
VOUT • f
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated, but
the ripple voltage and current will increase. More cycles
will be skipped when VIN increases. Once VIN rises above
VOUT, the loop keeps the top MOSFET continuously on. The
minimum on-time for the LTC7804 is approximately 80ns.
Fault Conditions: Overtemperature Protection
At higher temperatures, or in cases where the internal
power dissipation causes excessive self-heating on chip,
the overtemperature shutdown circuitry will shut down
the LTC7804. When the junction temperature exceeds
approximately 180˚C, the overtemperature circuitry disables the INTVCC LDO, causing the INTVCC supply to collapse and effectively shut down the entire LTC7804 chip.
When the junction temperature drops back to approximately 160˚C, the INTVCC LDO turns back on. Long-term
overstress (TJ > 125˚C) should be avoided as it can
degrade the performance or shorten the life of the part.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC7804 circuits: 1) IC VBIAS current, 2) INTVCC
regulator current, 3) I2R losses, 4) bottom side MOSFET
transition losses.
1. The VBIAS current is the DC supply current given in
the Electrical Characteristics table, which excludes
MOSFET driver and control currents. VBIAS current
typically results in a small (1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If the ratio of
CLOAD to COUT is greater than 1:50, the switch rise time
should be controlled so that the load rise time is limited
to approximately 25 • CLOAD. Thus a 10μF capacitor would
require a 250μs rise time, limiting the charging current
to about 200mA.
Design Example
As a design example, assume VIN = 12V (nominal), VIN
= 22V (max), VOUT = 24V, IOUT(MAX) = 4A and f = 1MHz.
The frequency is not one of the internal preset values, so
a resistor from the FREQ pin to GND is required, with a
value of:
RFREQ (in kΩ) ≤
37MHz
= 37kΩ
1MHz
Rev. A
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25
LTC7804
APPLICATIONS INFORMATION
The inductance value is chosen based on a 30% ripple
current assumption. The minimum inductance for 30%
ripple current is:
L=
VIN ⎛
V ⎞
1– IN ⎟
⎜
f • ΔIL ⎝ VOUT ⎠
The largest ripple happens when VIN = 1/2VOUT = 12V,
where the average maximum inductor current is IL(MAX)
= IOUT(MAX) • (VOUT/VIN) = 8A. A 2.4μH inductor will produce 31% ripple current. The peak inductor current will
be the maximum DC value plus one half the ripple current,
or 9.25A.
over I2R losses for the bottom MOSFET. Therefore, choose
a MOSFET with higher RDS(ON) as opposed to lower gate
charge to minimize the combined loss terms. The top
MOSFET does not experience transition losses, and its
power loss is generally dominated by I2R losses. For
this reason, the top MOSFET is typically chosen to be of
lower RDS(ON) and subsequently higher gate charge than
the bottom MOSFET. Be sure to select logic-level threshold MOSFETs, since the gate drive voltage is limited to
5.15V (INTVCC).
COUT is chosen to filter the square current in the output.
The maximum output capacitor current peak is:
⎛ RIPPLE% ⎞
I OUT(PEAK) =IL(MAX) • ⎜ 1+
⎟⎠ –IOUT(MAX)
⎝
2
The minimum on-time occurs at maximum VIN:
tON(MIN) <
VOUT − VIN(MAX)
VOUT • f
=
2V
= 83ns
24V • 1MHz
If the minimum on time of 80ns is violated, the LTC7804
skips pulses at high input voltage, resulting in lower frequency operation and higher inductor current ripple than
desired. If undesirable, this behavior can be avoided by
decreasing the frequency (with the inductor value accordingly adjusted) to avoid operation near the minimum
on-time.
The equivalent RSENSE resistor value can be calculated by
using the minimum value for the maximum current sense
threshold (50mV):
RSENSE ≤
45mV
≈ 0.004Ω
9.25A
To allow for additional margin, a lower value RSENSE
may be used; however, be sure that the inductor saturation current has sufficient margin above VSENSE(MAX)/
RSENSE, where the maximum value of 55mV is used for
VSENSE(MAX).
Choosing 1% resistors: RA = 11.3k and RB = 215k yields
an output voltage of 24.032V.
The best way to evaluate MOSFET performance in a particular application is to build and test the circuit on the
bench, facilitated by an LTC7804 demo board. However, an
educated guess about the application is helpful to initially
select MOSFETs. Transition losses will likely dominate
⎛ 31% ⎞
= 8 • ⎜ 1+
⎟ – 4 = 5.24A
⎝
2 ⎠
A low ESR (5m) capacitor is suggested. This capacitor
will limit output voltage ripple to 26.2mV (assuming
ESR‑dominant ripple).
For an 10ms soft start, select a 0.1μF capacitor for the
SS pin. As a first pass estimate for the bias components,
select CINTVCC = 4.7μF, boost supply capacitor CB = 2.2μF.
The TG gate drive voltage (relative to SW) should be
around 4.5~5V. If it is too low, increase CB or use a boost
diode with a lower forward voltage drop.
Determine and set application-specific parameters. Set
the MODE pin based on the trade-off of light load efficiency and constant frequency operation. Set the PLLIN/
SPREAD pin based on whether a fixed, spread spectrum,
or phase-locked frequency is desired. The RUN pin can
be used to control the minimum input voltage for regulator operation or can be tied to VIN for always-on operation. Use ITH compensation components from the typical
applications as a first guess, check the transient response
for stability, and modify as necessary.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
Rev. A
26
For more information www.analog.com
LTC7804
APPLICATIONS INFORMATION
layout diagram of Figure 7. Figure 8 illustrates the current waveforms present in the various branches of the
synchronous regulator operating in the continuous mode.
Check the following in your layout:
1. Are the signal and power grounds kept separate? The
LTC7804 ground pin and the ground return of CINTVCC
must return to the combined COUT (–) terminals. The
area of the loop formed by the top N-channel MOSFET,
bottom N-channel MOSFET and the high frequency
(ceramic) COUT capacitor(s) should be minimized with
short leads, planar connections and multiple paralleled vias where needed.
2. Does the LTC7804 VFB pin’s resistive divider connect to the (+) terminal of COUT? The resistive divider
must be connected between the (+) terminal of COUT
and signal ground. The feedback resistor connections
should not be along the high current input feeds from
the input capacitor(s).
3. Are the SENSE– and SENSE+ leads routed together
with minimum PC trace spacing? The filter capacitor
between SENSE+ and SENSE– should be as close as
possible to the IC. Ensure accurate current sensing
with Kelvin connections at the SENSE resistor.
4. Is the INTVCC decoupling capacitor connected close
to the IC, between the INTVCC and the GND pin? This
capacitor carries the MOSFET drivers’ current peaks.
An additional 1μF ceramic capacitor placed immediately next to the INTVCC and GND pins can help
improve noise performance substantially.
5. Keep the SW, TG, and BOOST nodes away from sensitive small-signal nodes. All of these nodes have very
large and fast-moving signals and therefore should be
kept on the output side of the LTC7804 and occupy
minimum external layer PC trace area. Minimize the
loop inductance of the TG and BG gate drive traces
and their respective return paths to the controller IC
(SW and GND) by using wide, preferably inner-layer,
traces and multiple parallel vias.
6. Use a modified star ground technique: a low impedance, large copper area central grounding point on
the same side of the PC board as the input and output
capacitors with tie-ins for the bottom of the INTVCC
decoupling capacitor, the bottom of the voltage feedback resistive divider and the GND pin of the IC.
7. Use separate traces and vias to connect the INTVCC
capacitor to the BOOST diodes versus the connections to the controller, bias, and pull-up connections.
PC Board Layout Debugging
It is helpful to use a DC − 50MHz current probe to monitor the current in the inductor while testing the circuit.
Monitor the output switching node (SW pin) to synchronize the oscilloscope to the internal oscillator and probe
the actual output voltage as well. Check for proper performance over the operating voltage and current range
expected in the application. The frequency of operation
should be maintained over the input voltage range down
to dropout and until the output load drops below the low
current operation threshold—typically 25% of the maximum designed current level in Burst Mode operation.
The duty cycle percentage should be maintained from cycle
to cycle in a well-designed, low noise PCB implementation.
Variation in the duty cycle at a subharmonic rate can suggest noise pickup at the current or voltage sensing inputs
or inadequate loop compensation. Overcompensation of
the loop can be used to tame a poor PC layout if regulator
bandwidth optimization is not required.
Reduce VBIAS from its nominal level to verify operation of
the regulator at the maximum duty cycle. Check the operation of the undervoltage lockout circuit by further lowering
VBIAS while monitoring the outputs to verify operation.
Investigate whether any problems exist only at higher output
currents or only at higher input voltages. If problems coincide with high input voltages and low output currents, look
for capacitive coupling between the BOOST, SW, TG, and possibly BG connections and the sensitive voltage and current
pins. The capacitor placed across the current sensing pins
needs to be placed immediately adjacent to the pins of the
IC. This capacitor helps to minimize the effects of differential
noise injection due to high frequency capacitive coupling. If
problems are encountered with high current output loading
at lower input voltages, look for inductive coupling between
COUT, top MOSFET and the bottom MOSFET components to
Rev. A
For more information www.analog.com
27
LTC7804
APPLICATIONS INFORMATION
the sensitive current and voltage sensing traces. In addition,
investigate common ground path voltage pickup between
these components and the GND pin of the IC.
An embarrassing problem, which can be missed in an
otherwise properly working switching regulator, results
when the current sensing leads are hooked up backwards.
The output voltage under this improper hookup will still
be maintained but the advantages of current mode control
will not be realized. Compensation of the voltage loop
will be much more sensitive to component selection. This
behavior can be investigated by temporarily shorting out
the current sensing resistor—don’t worry, the regulator
will still maintain control of the output voltage.
TYPICAL APPLICATIONS
SENSE–
RUN
SENSE+
SW
LTC7804
fIN
L1
TG
PLLIN/SPREAD
FREQ
VIN
CB
BOOST
M2
BG
MODE
RSENSE
+
M1
RUN
VBIAS
VFB
+
GND
ITH
GND
INTVCC
SS
VIN
VOUT
7804 F07
Figure 7. Recommended Printed Circuit Layout Diagram
RSENSE
VIN
L1
VOUT
SW
RIN
COUT
CIN
RL
7804 F08
BOLD LINES INDICATE HIGH SWITCHING CURRENT.
KEEP LINES TO A MINIMUM LENGTH
Figure 8. Branch Current Waveforms
Rev. A
28
For more information www.analog.com
LTC7804
TYPICAL APPLICATIONS
RUN
LTC7804
VBIAS
SENSE+
EXTVCC
SENSE–
MODE
RSENSE
2mΩ
1nF
200Ω
L
2µH
PLLIN/SPREAD
TG
FREQ
CSS
0.1µF
SW
SS
CITH
22nF
RITH
8.06k
CB
0.1µF
D
BG
RA
31.6k
COUTA
10µF
×2
MTOP
BOOST
ITH
CITHA
220pF
VIN
4.5V TO 38V
CIN
10µF
INTVCC
VFB
VOUT
24V
6A*
COUTB
100µF
MBOT
CINT
4.7µF
GND
RS
604k
+
7804 F09
CIN, COUTA: MURATA GCM32EC71H106KA03
COUTB: SUNCON 63HVPF100M
D: INFINEON BAS140W
L: COILCRAFT SER2011-202MLD
MBOT, MTOP: INFINEON BSC059N04LS6
*WHEN VIN > 24V, VOUT FOLLOWS VIN; WHEN VIN < 9V, MAXIMUM LOAD CURRENT AVAILABLE IS REDUCED.
Figure 9. High Efficiency Wide Input Range 375kHz 24V/6A Boost Converter
RUN
EXTVCC
VBIAS
MODE
PLLIN/SPREAD
FREQ
CSS
0.1µF
CITH
10nF
SS
RITH
45.3k
ITH
CITHA
100pF
SENSE+
SENSE–
BOOST
TG
SW
LTC7804
BG
INTVCC
RA
12.1k
VFB
GND
RSENSE
7mΩ
L
33µH
VIN
9V TO 38V
CIN
10µF
×2
D
MBOT
COUTA
10µF
×3
+
COUTB
68µF
VOUT*
80V
1.5A
CINT
4.7µF
RS
806k
7804 F10
CIN: MURATA GCM32EC71H106KA03
COUTA: TDK C5750X7S2A106K230KE
COUTB: SUNCON100CE68LX
D: VISHAY VS-12CWQ10FN-M3
L: COILCRAFT XAL1510-333MEB
MBOT: INFINEON BSC159N10LSF-G
*WHEN VIN < 24V, MAXIMUM LOAD CURRENT AVAILABLE IS DERATED BY INPUT CURRENT LIMIT.
Figure 10. Low IQ Nonsynchronous 80V/120W Boost Converter
Rev. A
For more information www.analog.com
29
LTC7804
TYPICAL APPLICATIONS
VBIAS
LTC7804
RUN
SENSE+
100k
INTVCC
RSENSE
2mΩ
1nF
EXTVCC
100Ω
SENSE–
MODE
L
0.47µH
PLLIN/SPREAD
INTVCC
FREQ
TG
CSS
0.1µF
SW
CB
0.1µF
SS
CITH
4.7nF
RITH
4.99k
CITHA
100pF
COUTA
10µF
×5
MTOP
BOOST
+
COUTB
150µF
VOUT*
10V
6A
MBOT
BG
ITH
D
INTVCC
RA
73.2k
VIN
4.5V TO 24V START-UP
AND OPERATION THROUGH
TRANSIENTS DOWN TO 1V
CIN
10µF
×2
CINT
4.7µF
GND
VFB
RB
549k
7804 F11a
CIN, COUTA: MURATA GCM32EC71H106KA03
COUTB: SUNCON 50HVPF150M
L: WURTH 744355047
MBOT, MTOP: INFINEON BSC059N04LS6
D: INFINEON BAS140W
*WHEN VIN > 10V, VOUT FOLLOWS VIN; WHEN VIN < 4.5V, MAXIMUM LOAD CURRENT AVAILABLE IS REDUCED.
100
98
EFFICIENCY (%)
96
94
92
90
88
86
84
82
80
VIN=12V
VIN=9V
VIN=6V
VIN=5V
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
OUTPUT CURRENT (A)
7804 F11b
Figure 11. High Efficiency 2.25MHz, 10V Boost Converter
Rev. A
30
For more information www.analog.com
LTC7804
TYPICAL APPLICATIONS
RUN
LTC7804
VBIAS
SENSE+
EXTVCC
1nF
100Ω
SENSE–
MODE
CITH
3.3nF
CSS
0.1µF
TG
FREQ
SW
SS
RITH
27.4k
CITHA
220pF
RA
12.1k
VIN**
5V TO 24V
CIN
10µF
×2
L
0.68µH
PLLIN/SPREAD
INTVCC
RSENSE
3mΩ
CB
0.1µF
COUTA
10µF
×5
MTOP
BOOST
ITH
D
BG
INTVCC
VFB
COUTB
150µF
VOUT
24V
4A*
MBOT
CINT
4.7µF
GND
RS
232k
+
7804 F12a
CIN, COUTA: MURATA GCM32EC71H106KA03
COUTB: SUNCON 50HVPF150M
D: INFINEON BAS140W
L: WURTH 7443330068
MBOT, MTOP: INFINEON BSC059N04LS6
*WHEN VIN < 8V, MAXIMUM LOAD CURRENT AVAILABLE IS DERATED BY INPUT CURRENT LIMIT
**CONSTANT FREQUENCY OPERATION WHEN VIN > 6V (SEE FIGURE 6B RELATIONSHIP BETWEEN
MAXIUM DUTY CYCLE AND OPERATING FREQUENCY)
100
98
VIN = 12V
EFFICIENCY (%)
96
94
92
90
88
86
84
82
80
0
0.5
1 1.5 2 2.5 3
OUTPUT CURRENT (A)
3.5
4
7804 F12b
Figure 12. High Efficiency 2.25MHz, 24V Boost Converter with Spread Spectrum
Rev. A
For more information www.analog.com
31
LTC7804
PACKAGE DESCRIPTION
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
5.10
(.201)
MIN
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
8
1
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102 3.20 – 3.45
(.065 ±.004) (.126 – .136)
0.305 ±0.038
(.0120 ±.0015)
TYP
16
0.50
(.0197)
BSC
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
9
NO MEASUREMENT PURPOSE
0.280 ±0.076
(.011 ±.003)
REF
16151413121110 9
DETAIL “A”
0° – 6° TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
1234567 8
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0213 REV F
Rev. A
32
For more information www.analog.com
LTC7804
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691 Rev Ø)
0.70 ±0.05
3.50 ±0.05
1.45 ±0.05
2.10 ±0.05 (4 SIDES)
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(4 SIDES)
BOTTOM VIEW—EXPOSED PAD
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
R = 0.115
TYP
0.75 ±0.05
15
PIN 1
TOP MARK
(NOTE 6)
16
0.40 ±0.10
1
1.45 ± 0.10
(4-SIDES)
2
(UD16) QFN 0904
0.200 REF
0.00 – 0.05
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.25 ±0.05
0.50 BSC
REVISION HISTORY
REV
DATE
A
10/20
DESCRIPTION
Update top mark from for UD package from 7804 to LHHM
PAGE NUMBER
1
Update Foot note for Shutdown Current vs Input Voltage Plot (Change from 3897 to 7804)
8
Remove “Drop Out Det” from block diagram
11
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license For
is granted
implication or
otherwise under any patent or patent rights of Analog Devices.
more by
information
www.analog.com
33
LTC7804
TYPICAL APPLICATION
High Efficiency 35V Boost Converter with DCR Current Sensing
LTC7804
EXTVCC
RUN
VBIAS
SENSE+
MODE
C1
0.47µF
PLLIN/SPREAD
FREQ
CSS
0.1µF
SENSE–
TG
SW
SS
CITH
15nF
RITH
7.5k
RS2
7.15k RS1
1% 3.74k
1%
CB
0.1µF
L
2.2µH
MTOP
BOOST
ITH
INTVCC
CITHA
330pF
GND
RA
8.25k
RB
232k
COUTA
10µF
×5
+
COUTB
150µF
VOUT
35V
6A*
D
CINT
4.7µF
BG
VFB
VIN
6V TO 38V
CIN
10µF
×2
MBOT1
MBOT2
7804 TA02
CIN, COUTA: TDK C3225X5R1H106M250AB
COUTB: SUNCON 50HVPF150M
D: INFINEON BAS140W
L: COILCRAFT SER2915H-222KL
MBOT1, MBOT2: INFINEON BSC059N04LS6
MTOP: INFINEON BSC014N04LSI
*WHEN VIN > 35V, VOUT FOLLOWS VIN; WHEN VIN < 9V, MAXIMUM LOAD CURRENT AVAILABLE IS REDUCED.
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC3787
Single Output, Low IQ Multiphase Synchronous 4.5V (Down to 2.5V After Start-Up) ≤ VIN ≤ 38V, VOUT Up to 60V, 50kHz to
Boost Controller
900kHz Fixed Operating Frequency, 4mm × 5mm QFN-28, SSOP-28
LTC3788/LTC3788-1
Dual Output, Low IQ Multiphase Synchronous
Boost Controller
4.5V (Down to 2.5V After Start-Up) ≤ VIN ≤ 38V, VOUT Up to 60V, 50kHz to
900kHz Fixed Operating Frequency, 5mm × 5mm QFN-32, SSOP-28
LTC3786
Low IQ Synchronous Step-Up Controller
4.5V (Down to 2.5V After Start-Up) ≤ VIN ≤ 38V, VOUT Up to 60V, 50kHz to
900kHz Fixed Operating Frequency, 3mm × 3mm QFN-16, MSOP-16E
LTC3769
60V Low IQ Synchronous Boost Controller
4.5V (Down to 2.3V After Start-Up) ≤ VIN ≤ 60V, VOUT Up to 60V, 50kHz to
900kHz Fixed Operating Frequency, 4mm × 4mm QFN-24, TSSOP-20
LTC3784
60V Single Output, Low IQ Multiphase
Synchronous Boost Controller
4.5V (Down to 2.3V After Start-Up) ≤ VIN ≤ 60V, VOUT Up to 60V, 50kHz to
900kHz Fixed Operating Frequency, 4mm × 5mm QFN-28, SSOP-28
LTC3897
PolyPhase® Synchronous Boost Controller
with Input/ Output Protection
4.5V ≤ VIN ≤ 65V, 5V to 10V Gate Drive, 100kHz to 750kHz Fixed Operating
Frequency, TSSOP-38, 5mm × 7mm QFN-38
LTC3862/LTC3862-1
Single Output, Multiphase Current Mode
Step-Up DC/DC Controller
4V ≤ VIN ≤ 36V, 5V or 10V Gate Drive, 75kHz to 500kHz Fixed Operating
Frequency, SSOP-24, TSSOP-24, 5mm × 5mm QFN-24
LT3757A/LT3758
Boost, Flyback, SEPIC and Inverting Controller 2.9V ≤ VIN ≤ 40V/100V, 100kHz to 1MHz Fixed Operating Frequency, 3mm ×
3mm DFN-10 and MSOP-10E
LTC7818
Low IQ, 3MHz, Triple Output, Buck/Buck/Boost
Synchronous Controller
All Outputs Remain in Regulation Through Cold Crank, 4.5V (Down to 1V After
Start-Up) ≤ VIN ≤ 40V, VOUT(BUCKS) Up to 40V, VOUT(BOOST) Up to 40V, IQ = 14µA
LTC3789
High Efficiency Synchronous 4-Switch BuckBoost DC/DC Controller
4V ≤ VIN ≤ 38V, 0.8V ≤ VOUT ≤ 38V, SSOP-28, 4mm × 5mm QFN-28, SSOP-28
Rev. A
34
10/20
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