LTM8008
72VIN, 6 Output DC/DC
SEPIC µModule Regulator
Features
Description
One SEPIC Converter with Six Linear Regulators
Wide Input Voltage Range: 3V to 72V, 6V Start
n Wide Operating Temperature: –40°C to 150°C
(H-Grade)
n Current Mode Control Provides Excellent Transient
Response
n Programmable Operating Frequency
(100kHz to 1MHz) with One External Resistor
n Synchronizeable to an External Clock
n Programmable Input Undervoltage Lockout with
Hysteresis
n Programmable Soft-Start
n Small 15mm × 15mm × 2.82mm LGA Package
The LTM®8008 is a 72VIN, µModule® SEPIC converter with
six post regulators. The SEPIC controller’s fixed frequency,
current-mode architecture results in stable operation over
a wide range of supply and output voltages and features
soft-start and frequency foldback functions to limit inductor
current during start-up and output short-circuit.
Applications
The LTM8008 is packaged in a thermally enhanced, compact
(15mm × 15mm) and low profile (2.82mm) over-molded
land grid array (LGA) package suitable for automated
assembly by standard surface mount equipment. The
LTM8008 is Pb-free and RoHS compliant.
n
n
The LTM8008 also includes six high performance, fixed
output LDOs for post-regulation: one 5V at 500mA, one
3.3V at 300mA, and four 5V at 150mA. The output of the
SEPIC controller is internally set to 5.6V for optimal efficiency. In addition to providing these outputs, the SEPIC
converter can supply up to an additional 500mA to the
system load.
Automotive Converters
Industrial Converters
n Telecom Power Supplies
n
n
L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
Typical Application
Six Output DC/DC µModule Regulator
L1A
4.7µH
VIN
3V TO 72V
10µF
VIN
SW
SPV
5V AT 500mA
VOUT2
5V AT 150mA
VOUT3
5V AT 150mA
RT
VOUT4
5V AT 150mA
VC
VOUT5
5V AT 150mA
SYNC
VOUT6
3.3V AT 300mA
RUN
42.2k
LTM8008
INTVCC
GND
4.99k
22nF
L1B
4.7µH
VOUT1
SS
4.7µF
SBR3U100LP-7
10µF
22µF
4.7µF
L1: COUPLED INDUCTOR, COILCRAFT MSD1278T-472ML
10µF
10µF
10µF
10µF
8008 TA01
8008fa
1
LTM8008
Absolute Maximum Ratings
Pin Configuration
(Note 1)
TOP VIEW
VIN, SW......................................................................80V
RUN..................................................................... INTVCC
SYNC, SPV, INTVCC.....................................................8V
VC, SS..........................................................................3V
RT.............................................................................1.5V
VOUT1,2,3,4,5,6 Relative to SPV....................................±20
Operating Internal Temperature
(Note 2)................................................... –40°C to 150°C
Storage Temperature Range................... –55°C to 150°C
Maximum Solder Temperature............................... 245°C
VOUT1
SPV
11
VOUT2
10
BANK 2
BANK 3
SW
9
VOUT3
8
7
BANK 1
VOUT4
6
VOUT5
5
VOUT6
SPV
GND
4
VIN
3
SYNC
2
1
A
B
C
D
E
F
G
INTVCC RUN VC
H
J
SS
RT
K
L
LGA PACKAGE
121-LEAD (15mm × 15mm × 2.82mm)
TJMAX = 150°C, θJA = 9.6°C/W, θJCtop = 12.2°C/W,
θJCbottom = 0.5°C/W, θJCboard = 1.6°C/W
VALUES DETERMINED PER JESD51-9, MAX OUTPUT POWER
WEIGHT = 1.4 GRAMS
Order Information
LEAD FREE FINISH
TRAY
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTM8008HV#PBF
LTM8008HV#PBF
LTM8008V
121-Lead (15mm × 15mm × 2.82mm) LGA
–40°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
Electrical
Characteristics l denotes specifications that apply over the full operating temperature
The
range, VIN = 14V, RUN = 14V, otherwise specifications are at TA = 25°C (Note 2)
PARAMETER
CONDITIONS
Minimum VIN Operating Voltage
MIN
TYP
MAX
3
l
Minimum VIN Start Voltage
VIN Rising
VIN Shutdown IQ
RUN = 0V
70
6
VIN Operating IQ
VC = 0.3V, RT = 41.2k
1.6
l
UNITS
V
V
µA
2.2
mA
SPV Regulation Voltage
5.6
V
SPV Overvoltage Threshold
6.1
V
VC Source Current
SPV = 0V, VC = 1.5V
–15
µA
VC Sink Current
SPV = 6V, VC = 1.5V
12
µA
8008fa
2
LTM8008
Electrical Characteristics
The l denotes specifications that apply over the full operating temperature
range, VIN = 14V, RUN = 14V, otherwise specifications are at TA = 25°C (Note 2)
PARAMETER
CONDITIONS
Switching Frequency
RT = 140k to GND
RT = 10.5k to GND
MIN
TYP
MAX
UNITS
100
1
kHz
MHz
Minimum Off Time
220
ns
Minimum On Time
220
ns
SYNC Input Low
0.4
SYNC Input High
1.5
SS Sourcing Current
SS = 0V
SS Sink Current Under Fault
SS = 1V
1.15
l
7.4
l
4.95
4.9
8.2
ΔILOAD = 1mA to 500mA
RT = 41.2k, ILOAD = 500mA, BW = 100Hz to 100kHz
VOUT1 Current Limit
VOUT1 Reverse Output Current
SPV = 0, VOUT1 = 5V
VOUT2,3,4,5 Output Voltage
1mA < ILOAD < 150mA
VOUT2,3,4,5 Load Regulation
9.0
A
520
l
4.95
4.9
ΔILOAD = 1mA to 150mA
RT = 41.2k, ILOAD = 150mA, BW = 100Hz to 100kHz
VOUT2,3,4,5 Reverse Output Current
SPV = 0, VOUT2,3,4,5 = 5V
VOUT6 Output Voltage
1mA < ILOAD < 300mA
VOUT6 Load Regulation
ΔILOAD = 1mA to 300mA
VOUT6 RMS Output Noise
RT = 41.2k, ILOAD = 300mA, BW = 100Hz to 100kHz
VOUT6 Current Limit
12
25
50
160
l
3.267
3.234
l
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
V
V
mV
mV
µVRMS
mA
µA
5
5.05
5.1
9
25
50
20
l
V
V
mV
mV
µVRMS
mA
10
20
µA
3.3
3.333
3.366
V
V
7
15
33
20
l
SPV = 0, VOUT1 = 5V
mΩ
5.05
5.1
10
VOUT2,3,4,5 Current Limit
VOUT6 Reverse Output Current
µA
5
l
VOUT2,3,4,5 RMS Output Noise
µA
20
l
V
0.1
35
1mA < ILOAD < 500mA
l
VOUT1 RMS Output Noise
mA
1.26
2
SW RDS(ON)
VOUT1 Load Regulation
1.21
RUN = 1.3V
SW Current Limit
VOUT1 Output Voltage
µA
0.7
l
RUN Bias Current Low
RUN Bias Current High
V
–10
RUN Threshold to Stop Switching
V
mV
mV
µVRMS
320
mA
10
20
µA
Note 2: The LTM8008HV is guaranteed to meet performance specifications
from –40°C to 150°C internal operating temperature range. Note that
the maximum internal temperature is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
8008fa
3
LTM8008
Typical Performance Characteristics
VOUT1 vs Load
5.022
5.016
VOUT (V)
5.010
5.008
5.006
3.298
5.016
5.014
5.012
0
100
200
300
400
LOAD CURRENT (mA)
5.006
500
3.294
3.290
5.008
5.002
3.296
3.292
5.010
5.004
VOUT6 vs Load
3.300
5.018
5.012
VOUT1 (V)
3.302
5.020
5.014
5.000
VOUT2,3,4,5 vs Load
VOUT6 (V)
5.018
0
50
100
LOAD CURRENT (mA)
8008 G01
3.288
150
0
50
100
150
200
LOAD CURRENT (mA)
250
8008 G02
SPV vs Percentage of LDO Load
5.050
5.625
300
8008 G03
VOUT2,3,4,5 vs Temperature
Full Load
VOUT1 vs Temperature Full Load
5.05
5.04
5.615
5.02
VOUT (V)
VOUT1 (V)
SPV (V)
5.03
5.025
5.620
5.000
5.01
5.00
4.99
4.98
5.610
4.975
5.605
4.950
–40 –20 0
4.97
4.96
25
50
75
MAXIMUM RATED LDO LOAD (%)
100
3.32
SPV (V)
VOUT6 (V)
3.31
5.67
1600
5.65
1400
5.61
NO LDO LOAD
5.59
FULL RATED LDO LOAD
5.57
3.28
3.27
–40
VOUT1 Current Limit
vs Temperature
5.63
3.29
5.55
5.53
–40
10
60
110
TEMPERATURE (°C)
8008 G07
8008 G06
SPV vs Temperature
(Front Page Schematic)
VOUT6 vs Temperature Full Load
3.30
10
60
110
TEMPERATURE (°C)
8008 G05
8008 G04
3.33
4.95
–40
20 40 60 80 100 120 140
TEMPERATURE (°C)
CURRENT LIMIT (mA)
0
1200
1000
SHORT-CIRCUIT
VOUT DROPS 1%
800
600
400
200
0
–40 –20 0
10
60
110
TEMPERATURE (°C)
8008 G08
20 40 60 80 100 120 140
TEMPERATURE (°C)
8008 G09
8008fa
4
LTM8008
Typical Performance Characteristics
VOUT2,3,4,5 Current Limit
vs Temperature
VOUT6 Current Limit
vs Temperature
1000
150
900
CURRENT LIMIT (mA)
400
VOUT DROPS 1%
300
200
100
0
–40 –20 0
700
VOUT DROPS 1%
600
500
400
300
120
110
100
90
200
80
100
70
12VIN
60
–40 –20 0
20 40 60 80 100 120 140
TEMPERATURE (°C)
8008 G10
20 40 60 80 100 120 140
TEMPERATURE (°C)
8008 G11
RUN Threshold vs Temperature
8008 G12
Run Current vs Run Voltage
1.210
25
20
1.205
RUN CURRENT (µA)
THRESHOLD VOLTAGE (V)
24VIN
130
0
–40 –20 0
20 40 60 80 100 120 140
TEMPERATURE (°C)
140
SHORT-CIRCUIT
800
SHORT-CIRCUIT
1.200
1.195
15
10
5
1.190
–40 –20 0
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
0
2
4
6
RUN VOLTAGE (V)
8
8008 G13
Temperature Rise vs Percentage
of LDO Load (Front Page
Schematic, Measured on
DC1630A Demo Board)
900
35
800
30
TEMPERATURE RISE (°C)
700
12VIN
600
500
400
300
200
24VIN
0
20
40
60
80
MAXIMUM RATED LDO LOAD (%)
25
12VIN
20
24VIN
15
10
5
100
0
10
8008 G14
Input Current vs Percentage of
LDO Load (Front Page Schematic)
INPUT CURRENT (mA)
CURRENT LIMIT (mA)
500
INPUT CURRENT (µA)
600
VIN Pin Current vs Temperature
(No Load)
100
8008 G15
0
0
20
40
60
80
MAXIMUM RATED LDO LOAD (%)
100
8008 G16
8008fa
5
LTM8008
Pin Functions
VIN (K4, L4): Input Supply Pin. Must be locally bypassed
with a 0.22μF or larger capacitor placed close to the pin.
RUN (F1, F2): Shutdown and Undervoltage Detect Pin.
An accurate 1.21V (nominal) falling threshold with externally programmable hysteresis detects when power is
okay to enable switching. Rising hysteresis is generated
by the external resistor divider and an accurate internal
2μA pull-down current. An undervoltage condition resets
soft-start. Tie to 0.4V or less to disable the device and
reduce VIN quiescent current below 70μA. Tie to INTVCC
if this function is not used.
GND (Bank 1): Ground. Tie these GND pins to a local ground
plane under the LTM8008 and the circuit components.
In most applications, the bulk of the heat flow out of the
LTM8008 is through these pads, so the printed circuit
design has a large impact on the thermal performance of
the part. See the PCB Layout and Thermal Considerations
sections for more details.
SYNC (K3, L3): Frequency Synchronization Pin. It is used
to synchronize the switching frequency to an external clock.
If this feature is used, an RT resistor should be chosen to
program a switching frequency 20% lower than the SYNC
pulse frequency. Tie the SYNC pin to GND if this feature is
not used. See the Synchronization section in Applications
Information.
set with an external capacitor. The pin has a 10μA (typical)
pull-up current source to an internal 2.5V rail. The softstart pin is reset to GND by an undervoltage condition at
RUN, an INTVCC undervoltage or overvoltage condition or
an internal thermal lockout.
VC (G1, G2): Error Amplifier Compensation Pin. This is used
to stabilize the voltage loop with an external RC network.
INTVCC (E1, E2): Regulated Supply for Internal Loads. This
is derived from VIN and SPV; it must be bypassed with at
least a 4.7μF capacitor placed close to the pin.
SPV (A1, B1, A11, B11): SEPIC Output Voltage. This is
connected to the internal SEPIC feedback network and is
used to power the six post regulators. It must be locally
bypassed by at least 22µF. Apply a bypass capacitor at
each set of pins.
VOUT1 (Bank 2): Output of the 5V, 500mA Linear Post
Regulator. It must be locally bypassed with at least 22µF.
VOUT2 (A10, B10): Output of One of the Four 5V, 150mA
Linear Post Regulators. It must be bypassed with at
least 10µF.
VOUT3 (A8, B8): Output of One of the Four 5V, 150mA Linear
Post Regulators. It must be bypassed with at least 10µF.
VOUT4 (A6, B6): Output of One of the Four 5V, 150mA Linear
Post Regulators. It must be bypassed with at least 10µF.
RT (J1, J2): The RT pin is used to program the switching
frequency of the LTM8008 by connecting a resistor from
this pin to ground. Table 1 gives the resistor values that
correspond to the resultant switching frequency. Minimize
the capacitance at this pin.
VOUT6 (A2, A3, B2): Output of the 3.3V, 300mA Linear Post
Regulator. It must be bypassed by at least 10µF.
SS (H1, H2): Soft-Start Pin. This pin modulates the compensation pin voltage (VC) clamp. The soft-start interval is
SW (Bank 3): SEPIC Converter Switch. This is the drain
of the internal power switching MOSFET.
VOUT5 (A5, B5): Output of One of the Four 5V, 150mA Linear
Post Regulators. It must be bypassed with at least 10µF.
8008fa
6
LTM8008
•
Simplified Block Diagram
EXTERNAL
POWER
COMPONENTS
•
SW
VIN
LINEAR
PRE-REGULATOR
INTVCC
SPV
5.6V
Q1
VOUT1
5V AT 500mA
RUN
VOUT6
3.3V AT 300mA
SS
SYNC
RT
VOUT2
5V AT 150mA
SEPIC
CONTROLLER
VC
LINEAR
POST
REGULATORS
VOUT3
5V AT 150mA
VOUT4
5V AT 150mA
VOUT5
5V AT 150mA
GND
8008 BD
Operation
The LTM8008 is a SEPIC equipped with six high performance linear post regulators. The device contains the SEPIC
power MOSFET, controller, linear regulators and optimized
support circuitry. The current limit for the SEPIC converter
is internally set to 8.2A. The output of the SEPIC converter
is internally set to 5.6V, which is the optimal voltage for
running the six post regulators at the best combination
of efficiency, ripple rejection and thermal performance.
The SEPIC converter is equipped with several control pins.
These include RUN for enabling and sequencing, SS for
soft-start control, SYNC for frequency synchronization, RT
for setting the operating frequency and VC for frequency
compensation. There are also power ports, VIN, INTVCC,
SPV and the six post regulator outputs, VOUT1,2,3,4,5,6, as
well as the SEPIC converter switch node, SW.
Of the six linear post regulators, one produces 5V at 500mA,
a second produces 3.3V at 300mA and the remaining
four provide 5V at 150mA each. Each one is individually
equipped with overcurrent, reverse voltage and thermal
protection.
8008fa
7
LTM8008
Applications Information
Running Input Voltage Versus Start Voltage
In normal operation the LTM8008 SEPIC Converter output
SPV is used to run the INTVCC internal biasing through
a rectifying diode (see the Block Diagram). This allows
the internal MOSFET driver Q1 and other circuitry to be
properly biased even when the input voltage falls as low
as 3V. At start-up, however, the SPV voltage is low and
INTVCC is derived from VIN through a linear regulator. In
order to properly bias the LTM8008 internal circuitry at
start-up, VIN must rise to at least 6V.
Main Control Loop
The LTM8008 uses a fixed frequency, current mode control scheme to provide excellent line and load regulation.
At the start of each oscillator cycle, a latch turns on the
internal power MOSFET switch. The switch current flows
through an internal current sensing resistor and generates
a voltage proportional to the switch current. This current
sense voltage is added to a stabilizing slope compensation
ramp and the resulting sum is compared with the voltage
on the VC pin. When the stabilized current sense voltage
exceeds the level of the VC pin, the internal latch is reset,
turning off the power switch. The level at the VC pin is an
amplified version of the difference between the feedback
voltage and the reference voltage. In this manner, the error
amplifier sets the correct peak switch current level to keep
the output in regulation. The LTM8008 is also equipped
with a switch current limit function. If the detected current
is higher than 8.2A, typical, the internal circuitry will turn
off Q1 for the rest of the switching cycle.
The LTM8008 has overvoltage protection functions to protect the converter from excessive output voltage overshoot
during start-up or recovery from a short-circuit condition.
If the output voltage exceeds the targeted set point by
8%, internal circuitry will actively inhibit switching for the
duration of an output overvoltage condition.
Programming Turn-On and Turn-Off Thresholds with
the RUN Pin
The RUN pin controls whether the LTM8008 is enabled
or shut down. Low power circuitry allows the user to accurately program the supply voltage at which the SEPIC
converter turns on and off. The falling value can be ac-
curately set by the resistor divider network composed of
R3 and R4 shown in Figure 1.
VIN
R3
LTM8008
RUN
R4
8008 F01
Figure 1. The LTM8008 Turn-On and Turn-Off Thresholds Are Set
by a Simple Resistor Network
If RUN is above 1.21V, the LTM8008 is running. Below
1.21V and above 0.7V, the LTM8008 is off and the RUN
pin sinks a hysteresis current (typically 2μA). Below 0.7V,
the LTM8008 is not switching and is in a low power state,
drawing less than 70µA at VIN. The typical falling threshold
voltage and rising threshold voltage can be calculated by
the following equations:
VVIN,FALLING = 1.21•
(R3 + R4)
R4
VVIN,RISING = 2µA • R3 + VIN,FALLING
For applications where the RUN pin is not used, the RUN
pin can be connected directly to the input voltage INTVCC
for always-on operation.
INTVCC Regulator Bypassing and Operation
An internal, low dropout (LDO) voltage regulator produces
the INTVCC supply which powers the internal circuitry during
start-up or whenever SPV is low. The LTM8008 contains
an undervoltage lockout comparator and an overvoltage
lockout comparator for the INTVCC supply. The INTVCC
undervoltage (UV) function protects the internal circuitry
from attempting to operate in a brown-out condition, while
the overvoltage (OV) function protects the gate of the
power MOSFET and excessive power dissipation within
the LTM8008 in the case of a fault. When INTVCC is below
the UV threshold, or above the OV threshold, switching
stops and the soft-start operation will be triggered.
The INTVCC regulator must be bypassed to ground immediately adjacent to the LTM8008 pins with a minimum
of a 4.7μF ceramic capacitor. Good bypassing is necessary to supply the high transient currents required by the
MOSFET gate driver.
8008fa
8
LTM8008
Applications Information
In an actual application, most of the INTVCC supply current
is used to drive the gate capacitance of the power MOSFET.
The power dissipation can be a significant concern when
the internal MOSFET is being driven at a high frequency and
the VIN voltage is high. It is important to limit the power
dissipation of the MOSFET and/or adjust the operating
frequency so the LTM8008 does not exceed its maximum
junction temperature rating.
Operating Frequency and Synchronization
The choice of operating frequency may be determined
by on-chip power dissipation, otherwise it is a trade-off
between efficiency and component size. Low frequency
operation improves efficiency by reducing gate drive current and MOSFET and diode switching losses. However,
lower frequency operation requires a physically larger
inductor. Switching frequency also has implications for loop
compensation. The LTM8008 uses a constant-frequency
architecture that can be programmed over a 100kHz to
1MHz range with a single external resistor from the RT
pin to GND. The RT pin must have an external resistor
to GND for proper operation of the LTM8008. A table for
selecting the value of RT for a given operating frequency
is shown in Table 1.
Table 1. Timing Resistor (RT) Value
OSCILLATOR FREQUENCY (kHz)
RT (kΩ)
100
140
200
63.4
300
41.2
400
30.9
500
24.3
600
19.6
700
16.5
800
14
900
12.1
1000
10.5
The operating frequency of the LTM8008 can be synchronized to an external clock source. By providing a digital
clock signal into the SYNC pin, the LTM8008 will operate
at the SYNC clock frequency. If this feature is used, an RT
resistor should be chosen to program a switching frequency
20% slower than SYNC pulse frequency. The SYNC pulse
should have a minimum pulse width of 200ns. Tie the
SYNC pin to GND if this feature is not used.
Duty Cycle Considerations
Switching duty cycle is a key variable defining converter
operation. As such, its limits must be considered. Minimum
on-time is the smallest time duration that the LTM8008
is capable of turning on the power MOSFET. This time is
generally about 220ns (typical) (see Minimum On-Time
in the Electrical Characteristics table). In each switching
cycle, the LTM8008 keeps the power switch off for at least
220ns (typical) (see Minimum Off-Time in the Electrical
Characteristics table).
Soft-Start
The LTM8008 contains several features to limit peak switch
currents and output voltage (VOUT) overshoot during
start-up or recovery from a fault condition. The primary
purpose of these features is to prevent damage to external
components or the load. High peak switch currents during
start-up may occur in switching regulators. Since VOUT
is far from its final value, the feedback loop is saturated
and the regulator tries to charge the output capacitor
as quickly as possible, resulting in large peak currents.
A large surge current may cause inductor saturation or
power switch failure.
The LTM8008 addresses this mechanism with the SS pin.
The SS circuit reduces the power MOSFET current by pulling down the VC pin. In this way the SS allows the output
capacitor to charge gradually toward its final value while
limiting the start-up peak currents. The inductor current
slew rate is limited by the soft-start function.
Besides start-up, soft-start can also be invoked by the
following faults:
1. INTVCC overvoltage
2. INTVCC undervoltage
3. Thermal lockout
Any of these three faults will cause the LTM8008 to stop
switching immediately and discharge the SS pin. When
all faults are cleared and the SS pin has been discharged
below 0.2V, a 10μA current source will start charging the
8008fa
9
LTM8008
Applications Information
SS pin, initiating a soft-start operation. The soft-start interval is set by the soft-start capacitor selection according
to the equation:
1.25V
TSS = CSS •
10µA
Thermal Lockout
If LTM8008 internal temperature reaches 165°C (typical),
the part will go into thermal lockout. The power switch
will be turned off. A soft-start operation will be triggered.
The part will be enabled again when the die temperature
has dropped by 5°C (nominal).
Loop Compensation
Loop compensation determines the stability and transient
performance. The LTM8008 uses current mode control to
regulate the output which simplifies loop compensation.
The optimum values depend on the converter topology, the
component values and the operating conditions (including
the input voltage, load current, etc.). To compensate the
feedback loop of the LTM8008, a series resistor-capacitor
network is usually connected from the VC pin to GND.
Figure 2 shows the typical VC compensation network. For
most applications, the capacitor CC1 should be in the range
of 1nF to 47nF, and the resistor RC should be in the range
of 2.5k to 50k. A small capacitor CC2 is often connected in
parallel with the RC compensation network to attenuate the
VC voltage ripple induced from the output voltage ripple
through the internal error amplifier. The parallel capacitor
usually ranges in value from 10pF to 100pF. A practical
approach to design the compensation network is to start
with one of the circuits in this data sheet that is similar
to your application, and tune the compensation network
to optimize the performance. Stability should then be
VC
CC2
RC
CC1
8008 F02
checked across all operating conditions, including load
current, input voltage and temperature.
Board Layout
The high speed operation of the LTM8008 demands careful
attention to board layout and component placement. The
GND pads of the package are the primary heat path of the
device, and are important for thermal management. Therefore, it is crucial to achieve a good electrical and thermal
contact between the GND pads and the ground plane of
the board. For the LTM8008 to deliver its full output power,
it is imperative that a good thermal path be provided to
dissipate the heat generated within the package.
It is recommended that multiple vias in the printed circuit
board be used to conduct heat away from the LTM8008
and into a copper plane with as much area as possible. To
prevent radiation and high frequency resonance problems,
proper layout of the components connected to the LTM8008
is essential, especially the power paths with higher di/dt. The
high di/dt loop should be kept as tight as possible to reduce
inductive ringing. In the SEPIC configuration, the high
di/dt loop contains the power MOSFET, sense resistor,
output capacitor, Schottky diode and the coupling capacitor.
Keep the circuit path among these components as short
as possible.
The LTM8008 is a switching power supply, so care must
be taken to minimize EMI and ensure proper operation.
Even with the high level of integration, you may fail to
achieve specified operation with a haphazard or poor
layout. See Figure 3 for a suggested layout. Ensure that
the grounding and heat-sinking are acceptable. Here are
additional tips to follow:
1. Place the L1, RT and VC components as close as possible to their respective pins.
2. Place the CIN, CINTVCC, SPV and COUT capacitors as close
as possible to their respective pins. If more than one
capacitor is required in parallel, place as many of the
electrically paralleled capacitors as close as possible
to their respective pin.
3. Place the CIN and COUT capacitors such that their ground
currents follow a path as short as possible.
Figure 2. A Typical Compensation Network
8008fa
10
LTM8008
Applications Information
4. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8008.
5. For good heatsinking, use vias to connect the GND copper area to the board’s internal ground planes. Liberally
distribute these GND vias to provide both a good ground
connection and thermal path to the internal planes of the
printed circuit board. Pay attention to the location and
density of the thermal vias in Figure 3. The LTM8008
can benefit from the heat-sinking afforded by vias that
connect to internal GND planes at these locations, due to
their proximity to internal power handling components.
The optimum number of thermal vias depends upon
the printed circuit board design. For example, a board
might use very small via holes. It should employ more
thermal vias than a board that uses larger holes.
Post Regulator Output Capacitance and Transient
Response
The LTM8008 linear post regulators are designed to be
stable with a wide range of output capacitors. The ESR
of the output capacitor affects stability, most notably with
small capacitors. The output transient response will be a
function of output capacitance. Larger values of output
capacitance decrease the peak deviations and provide improved transient response for larger load current changes.
Bypass capacitors, used to decouple individual components
powered by the post regulators, will increase the effective
output capacitor value. Extra consideration must be given
to the use of ceramic capacitors. Ceramic capacitors are
manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage.
The most common dielectrics used are specified with EIA
temperature characteristic codes of Z5U, Y5V, X5R and
LDO OUTPUT CAPACITOR
GND
VIN
L1
SPV
COUPLED
INDUCTOR
SW
LDO
OUTPUT
CAPACITORS
CIN
FLYING
CAPACITOR
POWER
DIODE
VIN
SPV
SPV
COUT
GND
COUT
CINTVCC
CONTROL DISCRETES
Figure 3. Layout Showing Suggested External Components, GND Plane and Interconnect/Thermal Vias
8008fa
11
LTM8008
Applications Information
X7R. The Z5U and Y5V dielectrics are good for providing
high capacitances in a small package, but they tend to
have strong voltage and temperature coefficients. When
used with a 5V regulator, a 16V 10μF Y5V capacitor can
exhibit an effective value as low as 1μF to 2μF for the DC
bias voltage applied and over the operating temperature
range. The X5R and X7R dielectrics result in more stable
characteristics and are more suitable for use as the output
capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in
higher values. Care still must be exercised when using X5R
and X7R capacitors; the X5R and X7R codes only specify
operating temperature range and maximum capacitance
change over temperature. Capacitance change due to DC
bias with X5R and X7R capacitors is better than Y5V and
Z5U capacitors, but can still be significant enough to drop
capacitor values below appropriate levels. Capacitor DC
bias characteristics tend to improve as component case
size increases, but expected capacitance at operating
voltage should be verified.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor, the stress can be
induced by vibrations in the system or thermal transients.
The resulting voltages produced can cause appreciable
amounts of noise, especially when a ceramic capacitor is
used for noise bypassing.
Post Regulator Thermal Considerations
The power handling capability of the post regulators will
be limited by the maximum rated junction temperature
(150°C). The power dissipated by each post regulator is
approximately the output current multiplied by the input/
output voltage differential: (IOUT) • (SPV – VOUT).
The post regulators have internal thermal limiting designed to protect the device during overload conditions.
For continuous normal conditions, the maximum junction
temperature rating of 150°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction-to-ambient. Additional
heat sources mounted nearby must also be considered.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat generated by power devices.
Protection Features
The linear post regulators incorporate several protection
features. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input. Current limit
protection and thermal overload protection are intended
to protect the device against current overload conditions
at the output of the device. For normal operation, the
junction temperature should not exceed 150°C.
When any of the VOUT pins are forced above the SPV pin
of the LTM8008, input current to the corresponding post
regulator will typically drop to less than 2μA. The output
of the linear post regulators can be pulled below ground
without damaging the device. If the input is left open-circuit or grounded, the output can be pulled below ground
by 20V. The outputs will act like a large resistor, typically
500k or higher, limiting current flow to less than 100μA.
In the case of a short circuit, the output will source the
short-circuit current of the device and will protect itself
by thermal limiting.
8008fa
12
LTM8008
Package Description
Pin Assignment Table
(Arranged by Pin Number)
PIN NAME
PIN NAME
PIN NAME
PIN NAME
PIN NAME
PIN NAME
A1
SPV
C1
GND
E1
INTVCC
G1
VC
J1
RT
L1
GND
A2
VOUT6
C2
GND
E2
INTVCC
G2
VC
J2
RT
L2
GND
A3
VOUT6
C3
GND
E3
GND
G3
GND
J3
GND
L3
SYNC
A4
GND
C4
GND
E4
GND
G4
GND
J4
GND
L4
VIN
A5
VOUT5
C5
GND
E5
GND
G5
GND
J5
GND
L5
GND
A6
VOUT4
C6
GND
E6
GND
G6
GND
J6
GND
L6
GND
A7
GND
C7
GND
E7
GND
G7
GND
J7
GND
L7
GND
A8
VOUT3
C8
GND
E8
GND
G8
GND
J8
SW
L8
SW
A9
GND
C9
GND
E9
GND
G9
GND
J9
SW
L9
SW
A10
VOUT2
C10
GND
E10
VOUT1
G10
GND
J10
SW
L10
SW
A11
SPV
C11
GND
E11
VOUT1
G11
GND
J11
SW
L11
SW
B1
SPV
D1
GND
F1
RUN
H1
SS
K1
GND
B2
GND
D2
GND
F2
RUN
H2
SS
K2
GND
B3
VOUT6
D3
GND
F3
GND
H3
GND
K3
SYNC
B4
GND
D4
GND
F4
GND
H4
GND
K4
VIN
B5
VOUT5
D5
GND
F5
GND
H5
GND
K5
GND
B6
VOUT4
D6
GND
F6
GND
H6
GND
K6
GND
B7
GND
D7
GND
F7
GND
H7
GND
K7
GND
B8
VOUT3
D8
GND
F8
GND
H8
GND
K8
SW
B9
GND
D9
GND
F9
GND
H9
GND
K9
SW
B10
VOUT2
D10
VOUT1
F10
GND
H10
GND
K10
SW
B11
SPV
D11
VOUT1
F11
GND
H11
GND
K11
SW
Package Photo
8008fa
13
0.955
1.585
4
PACKAGE TOP VIEW
15
BSC
2.540
SUGGESTED PCB LAYOUT
TOP VIEW
2.540
3.810
5.080
6.350
X
15
BSC
Y
DETAIL A
0.27 – 0.37
SUBSTRATE
eee S X Y
DETAIL B
DIA (0.630) 121x
aaa Z
2.45 – 2.55
MOLD
CAP
DETAIL B
2.72 – 2.92
(Reference LTC DWG# 05-08-1861 Rev A)
6. THE TOTAL NUMBER OF PADS: 121
SYMBOL TOLERANCE
aaa
0.15
bbb
0.10
eee
0.05
5. PRIMARY DATUM -Z- IS SEATING PLANE
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
4
6.350
LAND DESIGNATION PER JESD MO-222, SPP-010
3
5.080
3.810
2.540
1.270
1.27
BSC
12.70
BSC
3
11
TRAY PIN 1
BEVEL
10
DETAIL A
COMPONENT
PIN “A1”
PADS
SEE NOTES
2. ALL DIMENSIONS ARE IN MILLIMETERS
3.810
0.000
5.080
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
6.350
1.270
2.540
3.810
5.080
6.350
PAD 1
CORNER
1.270
aaa Z
0.000
0.955
1.585
1.270
// bbb Z
14
Z
LGA Package
121-Lead (15mm × 15mm × 2.82mm)
9
7
12.70
BSC
6
5
4
3
2
1
LGA 121 1010 REV A
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
PACKAGE BOTTOM VIEW
8
L
K
J
H
G
F
E
D
C
B
A
PAD 1
DIA (0.630)
LTM8008
Package Description
8008fa
LTM8008
Revision History
REV
DATE
DESCRIPTION
PAGE NUMBER
A
2/11
Removed “RUN Threshold to IQ to Fall Below 1µA” spec
3
8008fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTM8008
Typical Application
Six Output DC/DC µModule Regulator
L1A
4.7µH
VIN
3V TO 72V
10µF
SW
VIN
SPV
5V AT 500mA
VOUT2
5V AT 150mA
VOUT3
5V AT 150mA
RT
VOUT4
5V AT 150mA
VC
VOUT5
5V AT 150mA
SYNC
VOUT6
3.3V AT 300mA
LTM8008
RUN
42.2k
L1B
4.7µH
VOUT1
SS
4.7µF
SBR3U100LP-7
INTVCC
GND
4.99k
10µF
22µF
22nF
4.7µF
L1: COUPLED INDUCTOR, COILCRAFT MSD1278T-472ML
10µF
10µF
10µF
10µF
8008 TA02
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LTM8027
60V, 4A DC/DC µModule Regulator
4.5V ≤ VIN ≤ 60V, 2.5V ≤ VOUT ≤ 24V, 15mm × 15mm × 4.32mm
LTC3824
60V, 40µA IQ DC/DC Regulator
4V ≤ VIN ≤ 60V, 100% Duty Cycle, 200kHz to 600kHz
For an H-Grade Product Portfolio go to: http://cds.linear.com/docs/Information%20Card/LTC_H_Grade_Products_Web.pdf
8008fa
16 Linear Technology Corporation
LT 0211 REV A• PRINTED IN USA
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(408) 432-1900 ● FAX: (408) 434-0507
●
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