FEATURES
LTM8052/LTM8052A
36VIN, 5A, 2-Quadrant
CVCC Step-Down
µModule Regulator
DESCRIPTION
Complete Step-Down Switch Mode Power Supply
n CVCC: Constant-Voltage Constant-Current
n 2-Quadrant: Sources and Sinks Output Current
n Adjustable Output Current
n Wide Input Voltage Range: 6V to 36V
n 1.2V to 24V Output Voltage
n Forced Continuous Operation
n Selectable Switching Frequency: 100kHz to 1MHz
n (e4) RoHS Compliant Package with Gold Pad Finish
n Programmable Soft-Start
n Compact (11.25mm × 15mm × 2.82mm) Surface
Mount LGA and (11.25mm × 15mm × 3.42mm)
BGA Packages
The LTM®8052/LTM8052A is a 36VIN, 5A, 2-quadrant
constant-voltage, constant-current (CVCC) step-down
μModule® regulator. Included in the package are the
switching controller, power switches, inductor and support
components. Operating over an input voltage range of 6V to
36V, the LTM8052/LTM8052A supports an output voltage
range of 1.2V to 24V. The LTM8052/LTM8052A is able to
sink or source current to maintain voltage regulation up to
the positive and negative current limits. This output current
limit can be set by a control voltage, a single resistor or a
thermistor. LTM8052 features a 125% output overvoltage
protection, while LTM8052A does not, allowing operation
when the output is above the target regulation point.
n
The LTM8052/LTM8052A is packaged in a compact
(11.25mm × 15mm × 2.82mm) overmolded land grid array (LGA) and ball grid array (BGA) package suitable for
automated assembly by standard surface mount equipment. The LTM8052/LTM8052A are available with SnPb
(BGA) or RoHS compliant terminal finish.
APPLICATIONS
Constant-Frequency Voltage Regulation Even at
No Load
n Peltier Driver
n Battery Tester
n Battery/Supercap Charging and Cell Balancing
n Motor Drive Power Regulator
n High Power LED Drive
n
PART NUMBER
BEST FOR
LTM8052
Sinking and sourcing output current for voltage
regulation primarily.
Sinking and sourcing output current for current
regulation primarily.
Sourcing more than 3A of output current.
(Less than 3A maximum consider LTM8025.)
LTM8052A
L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 7199560, 7321203 and others pending.
LTM8026
Click to view associated TechClip Videos.
TYPICAL APPLICATION
Output Voltage vs Output Current
±5A, 2.5V (2-Quadrant) µModule Voltage Regulator
10µF
510k
VIN
RUN
VREF
100µF
SYNC
CTL_I
COMP
CTL_T
GND ADJ
+
SS
OPTIONAL
INPUT
PROTECTION
VOUT
2.5V
±5A
LTM8052
VOUT
RT
90.9k
9.09k
*INPUT VOLTAGE PROTECTION MAY BE NECESSARY WHEN THE
LTM8052 IS SINKING CURRENT (SEE APPLICATIONS INFORMATION)
330µF
3.0
OUTPUT VOLTAGE (V)
VIN*
6V TO 36V
3.5
2.5
LTM8052A MAINTAINS CURRENT
REGULATION
LTM8052 TURNS OFF AT
OUTPUT OVERVOLTAGE
2.0
1.5
1.0
0.5
8052 TA01a
0
–10
–5
0
LOAD CURRENT (A)
5
10
8052 TA01b
8052fg
For more information www.linear.com/LTM8052
1
LTM8052/LTM8052A
ABSOLUTE MAXIMUM RATINGS
(Note 1)
VIN.............................................................................40V
ADJ, RT, COMP, CTL_I, CTL_T, VREF............................3V
VOUT...........................................................................25V
RUN, SYNC, SS............................................................6V
Current Into RUN Pin.............................................100µA
Internal Operating Temperature Range... –40°C to 125°C
Peak Solder Reflow Body Temperature.................. 245°C
Storage Temperature.............................. –55°C to 125°C
PIN CONFIGURATION
8
ADJ
SS
COMP
RT
VREF
8
7
BANK 2 GND
6
SYNC
7
RUN
6
5
SYNC
BANK 2 GND
RUN
5
4
4
BANK 1
3
A
B
C
D
E
F
G
H
J
BANK 3
VOUT
2
VIN
1
BANK 1
3
BANK 3
VOUT
2
VIN
1
K
L
LGA PACKAGE
81-LEAD (15mm × 11.25mm × 2.82mm)
TJMAX = 125°C, θJA = 18.6°C/W, θJC(bottom) = 5.4°C/W, θJB = 5.6°C/W, θJC(top) = 10.8°C/W
PCB WEIGHT = 1.4 GRAMS, θ VALUES DERIVED FROM A 4-LAYER 7.62cm × 7.62cm
2
CTL_I
CTL_T
ADJ
SS
TOP VIEW
COMP
RT
VREF
CTL_I
CTL_T
TOP VIEW
A
B
C
D
E
F
G
H
J
K
L
BGA PACKAGE
81-LEAD (15mm × 11.25mm × 3.42mm)
TJMAX = 125°C, θJA = 18.6°C/W, θJC(bottom) = 5.4°C/W, θJB = 5.6°C/W, θJC(top) = 10.8°C/W
PCB WEIGHT = 1.4 GRAMS, θ VALUES DERIVED FROM A 4-LAYER 7.62cm × 7.62cm
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
ORDER INFORMATION
http://www.linear.com/product/LTM8052#orderinfo
PART MARKING*
PART NUMBER
PAD OR BALL FINISH
LTM8052EV#PBF
Au (RoHS)
DEVICE
FINISH CODE
PACKAGE
TYPE
MSL
RATING
LTM8052V
e4
LGA
3
TEMPERATURE RANGE
(SEE NOTE 3)
–40°C to 125°C
LTM8052IV#PBF
Au (RoHS)
LTM8052V
e4
LGA
3
–40°C to 125°C
LTM8052MPV#PBF
Au (RoHS)
LTM8052V
e4
LGA
3
–55°C to 125°C
LTM8052AEV#PBF
Au (RoHS)
LTM8052AV
e4
LGA
3
–40°C to 125°C
LTM8052AIV#PBF
Au (RoHS)
LTM8052AV
e4
LGA
3
–40°C to 125°C
LTM8052AMPV#PBF
Au (RoHS)
LTM8052AV
e4
LGA
3
–55°C to 125°C
LTM8052EY#PBF
SAC305 (RoHS)
LTM8052Y
e1
BGA
3
–40°C to 125°C
LTM8052IY#PBF
SAC305 (RoHS)
LTM8052Y
e1
BGA
3
–40°C to 125°C
LTM8052MPY#PBF
SAC305 (RoHS)
LTM8052Y
e1
BGA
3
–55°C to 125°C
LTM8052AEY#PBF
SAC305 (RoHS)
LTM8052AY
e1
BGA
3
–40°C to 125°C
LTM8052AIY#PBF
SAC305 (RoHS)
LTM8052AY
e1
BGA
3
–40°C to 125°C
LTM8052AMPY#PBF
SAC305 (RoHS)
LTM8052AY
e1
BGA
3
–55°C to 125°C
LTM8052IY
SnPb (63/67)
LTM8052Y
e0
BGA
3
–40°C to 125°C
LTM8052MPY
SnPb (63/67)
LTM8052Y
e0
BGA
3
–55°C to 125°C
LTM8052AIY
SnPb (63/67)
LTM8052AY
e0
BGA
3
–40°C to 125°C
LTM8052AMPY
SnPb (63/67)
LTM8052AY
e0
BGA
3
–55°C to 125°C
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
• Terminal Finish Part Marking:
www.linear.com/leadfree
• LGA and BGA Package and Tray Drawings:
www.linear.com/packaging
8052fg
For more information www.linear.com/LTM8052
3
LTM8052/LTM8052A
ELECTRICAL
CHARACTERISTICS
The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at TA = 25°C. RUN = 3V, unless otherwise noted. (Note 3)
PARAMETER
Minimum Input Voltage
Output DC Voltage
Output DC Current
Quiescent Current Into VIN
Line Regulation
Load Regulation
Output RMS Voltage Ripple
Switching Frequency
Voltage at ADJ Pin
Current Out of ADJ Pin
RUN Pin Current
RUN Threshold Voltage (Falling)
RUN Input Hysteresis
CTL_I Control Range
CTL_I Pin Current
CTL_I Positive Current Limit
CTL_I Negative Current Limit
CTL_T Control Range
CTL_T Pin Current
CTL_T Positive Current Limit
CTL_T Negative Current Limit
VREF Voltage
SS Pin Current
SYNC Input Low Threshold
SYNC Input High Threshold
SYNC Bias Current
CONDITIONS
TYP
l
IOUT = 1A, RADJ Open
IOUT = 1A, RADJ = 499Ω
CTL_T, CTL_I = 1.5V
VIN = 12V, RUN = 0V
VIN = 12V, No Load
6V < VIN < 36V, IOUT = 1A
VIN = 12V, 0A < IOUT < 5A
VIN = 12V, IOUT = 4.5A
RT = 40.2k
RT = 453k
MAX
6
1.2
24
–6
l
1.16
ADJ = 0V, VOUT = 1V
RUN = 1.45V
1.49
0.1
17
0.1
0.7
10
1000
100
1.19
100
5.5
1.55
160
0
CTL_I = 1.5V
CTL_I = 0.75V
CTL_I = 1.5V
CTL_I = 0.75V
5.1
2.24
–8.5
–5.7
0
5.6
2.8
–7.7
–5.1
CTL_T = 1.5V
CTL_T = 0.75V
CTL_T = 1.5V
CTL_T = 0.75V
0.5mA Load
5.1
2.24
–8.5
–5.5
1.93
5.6
2.8
–7.7
–4.9
2
11
fSYNC = 400kHz
fSYNC = 400kHz
SYNC = 0V
1.2
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: This µModule regulator includes overtemperature protection that
is intended to protect the device during momentary overload conditions.
Internal temperature will exceed 125°C when overtemperature protection
is active. Continuous operation above the specified maximum internal
operating junction temperature may impair device reliability.
4
MIN
5
3
30
1.22
1.61
1.5
1.5
6.1
3.36
–6.9
–4.5
1.5
1.5
6.1
3.36
–6.9
–4.3
2.04
0.6
1
UNITS
V
V
V
A
µA
mA
%
%
mV
kHz
kHz
V
µA
µA
V
mV
V
µA
A
A
A
A
V
µA
A
A
A
A
V
µA
V
V
µA
Note 3: The LTM8052E/LTM8052AE is guaranteed to meet performance
specifications from 0°C to 125°C internal operating temperature.
Specifications over the full –40°C to 125°C internal operating temperature
range are assured by design, characterization and correlation with
statistical process controls. The LTM8052I/LTM8052AI is guaranteed
to meet specifications over the full –40°C to 125°C internal operating
temperature range. The LTM8052MP/LTM8052AMP is guaranteed to meet
specifications over the full –55°C to 125°C internal operating temperature
range. Note that the maximum internal temperature is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal resistance and other environmental factors.
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
TYPICAL PERFORMANCE CHARACTERISTICS
1.5VOUT Efficiency
95
85
85
90
80
80
85
75
70
65
50
0
1
2
4
3
OUTPUT CURRENT (A)
75
70
65
60
6VIN
12VIN
24VIN
36VIN
55
EFFICIENCY (%)
90
60
6VIN
12VIN
24VIN
36VIN
55
50
5
0
1
2
4
3
OUTPUT CURRENT (A)
8052 G01
75
70
65
55
50
5
3.3VOUT Efficiency
90
90
95
85
85
65
6VIN
12VIN
24VIN
36VIN
60
55
50
0
1
2
4
3
OUTPUT CURRENT (A)
80
75
70
65
6VIN
12VIN
24VIN
36VIN
60
55
50
5
0
1
2
4
3
OUTPUT CURRENT (A)
8VOUT Efficiency
80
75
70
65
55
50
5
12VOUT Efficiency
95
90
90
85
85
85
10VIN
12VIN
24VIN
36VIN
55
50
0
1
2
4
3
OUTPUT CURRENT (A)
EFFICIENCY (%)
95
90
EFFICIENCY (%)
95
65
80
75
70
65
60
8052 G07
2
4
3
OUTPUT CURRENT (A)
50
0
1
5
2
4
3
OUTPUT CURRENT (A)
80
75
70
65
60
15VIN
24VIN
36VIN
55
5
1
18VOUT Efficiency
100
60
0
8052 G06
100
70
8VIN
12VIN
24VIN
36VIN
60
100
75
5
85
8052 G05
8052 G04
80
2
4
3
OUTPUT CURRENT (A)
90
EFFICIENCY (%)
70
1
5VOUT Efficiency
100
75
0
8052 G03
95
80
6VIN
12VIN
24VIN
36VIN
60
95
EFFICIENCY (%)
EFFICIENCY (%)
80
8052 G02
2.5VOUT Efficiency
EFFICIENCY (%)
1.8VOUT Efficiency
90
EFFICIENCY (%)
EFFICIENCY (%)
1.2VOUT Efficiency
TA = 25°C, unless otherwise noted.
22VIN
24VIN
36VIN
55
5
8052 G08
50
0
1
2
4
3
OUTPUT CURRENT (A)
5
8052 G09
8052fg
For more information www.linear.com/LTM8052
5
LTM8052/LTM8052A
TYPICAL PERFORMANCE CHARACTERISTICS
24VOUT Efficiency
TA = 25°C, unless otherwise noted.
–3.3VOUT Efficiency
–5VOUT Efficiency
90
90
95
85
85
80
80
90
EFFICIENCY (%)
EFFICIENCY (%)
85
80
75
70
65
75
70
65
60
60
0
1
2
50
4
3
OUTPUT CURRENT (A)
0
1
2
4
3
OUTPUT CURRENT (A)
50
85
85
0.8
80
80
0.6
70
65
50
1
2
4
3
OUTPUT CURRENT (A)
75
70
65
60
12VIN
24VIN
28VIN
0
INPUT CURRENT (A)
1.0
75
55
50
5
0
1
2
4
3
OUTPUT CURRENT (A)
0.8
2
0
–2
OUTPUT CURRENT (A)
–4
4
–8
0.6
0.4
0.2
0
–0.2
12VIN
24VIN
36VIN
–0.6
6
8052 G16
–6
2
0
–2
OUTPUT CURRENT (A)
–4
4
–0.8
6
1.5
INPUT CURRENT (A)
INPUT CURRENT (A)
–6
12VIN
24VIN
36VIN
2.0
–0.4
12VIN
24VIN
36VIN
–8
–0.2
Input Current vs Output Current
2.5VOUT
0.8
0
–0.6
0
8052 G15
1.0
–0.4
0.2
–0.6
5
1.2
1.0
–0.2
0.4
Input Current vs Output Current
1.8VOUT
0.2
5
8052 G14
Input Current vs Output Current
1.5VOUT
0.4
2
4
3
OUTPUT CURRENT (A)
–0.4
12VIN
24VIN
8052 G13
0.6
1
Input Current vs Output Current
1.2VOUT
90
55
0
8052 G12
90
60
12VIN
24VIN
31VIN
–12VOUT Efficiency
EFFICIENCY (%)
EFFICIENCY (%)
65
8052 G11
–8VOUT Efficiency
INPUT CURRENT (A)
70
55
5
8052 G10
6
75
60
12VIN
24VIN
32.5VIN
55
28VIN
36VIN
55
50
EFFICIENCY (%)
100
–8
–6
0
–2
–4
2
OUTPUT CURRENT (A)
0.5
0
–0.5
12VIN
24VIN
36VIN
–1.0
6
4
1.0
8052 G17
–1.5
–8
–6
0
–2
2
–4
OUTPUT CURRENT (A)
4
6
8052 G18
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
Input Current vs Output Current
5VOUT
Input Current vs Output Current
3.3VOUT
5
3
2
Input Current vs Output Current
8VOUT
4
0
–1
12VIN
24VIN
36VIN
–2
–8
–6
2
–4
–2
0
OUTPUT CURRENT (A)
4
3
INPUT CURRENT (A)
1
INPUT CURRENT (A)
INPUT CURRENT (A)
2
1
0
–1
–3
6
–8
–6
0
–2
2
–4
OUTPUT CURRENT (A)
4
8052 G19
INPUT CURRENT (A)
INPUT CURRENT (A)
3
–1
–3
24VIN
36VIN
–6
–4
2
0
–2
OUTPUT CURRENT (A)
4
5
4
4
3
3
2
2
1
0
–1
–4
6
–6
–4
–2
0
2
OUTPUT CURRENT (A)
600
1.0
400
300
200
100
30
–1
–2
–5 –4 –3 –2 –1 0 1
2 3
OUTPUT CURRENT (A)
40
INPUT VOLTAGE (V)
8052 G25
Input Current vs Output Current
–5VOUT
0.5
0
–0.5
–1.5
5
4
2
–1.0
20
36VIN
0
8052 G24
INPUT CURRENT (A)
1.5
INPUT CURRENT (A)
INPUT CURRENT (mA)
700
10
1
–4
6
4
6
4
Input Current vs Output Current
24VOUT
Input Current vs Output Current
–3.3VOUT
500
0
–2
–4
2
OUTPUT CURRENT (A)
–6
8052 G23
Input Current vs Input Voltage
(Output Shorted)
0
–8
–3
24VIN
36VIN
–3
8052 G22
0
12VIN
24VIN
36VIN
8052 G21
–2
–2
–2
–5
6
INPUT CURRENT (A)
4
0
–1
–4
Input Current vs Output Current
18VOUT
1
0
8052 G20
Input Current vs Output Current
12VOUT
2
1
–3
12VIN
24VIN
36VIN
–2
2
24VIN
12VIN
–6 –5 –4 –3 –2 –1 0 1 2
OUTPUT CURRENT (A)
3
4
5
8052 G26
1
0
–1
–2
24VIN
12VIN
–6
–4
0
2
–2
OUTPUT CURRENT (A)
4
8052 G27
8052fg
For more information www.linear.com/LTM8052
7
LTM8052/LTM8052A
TYPICAL PERFORMANCE CHARACTERISTICS
Input Current vs Output Current
–8VOUT
3
Minimum Required Input Running
Voltage vs Negative Output Voltage
25
IOUT = 4A
IOUT = 3A
IOUT = 2A
IOUT = 1A
1.5
20
1
0
–1
0.5
INPUT VOLTAGE (V)
1.0
INPUT CURRENT (A)
INPUT CURRENT (A)
Input Current vs Output Current
–12VOUT
2.0
2
24VIN
0
–0.5
–1.0
–1.5
–2
–3
TA = 25°C, unless otherwise noted.
24VIN
12VIN
–6
–4
5
–2.5
–6
–4
0
–2
OUTPUT CURRENT (A)
0
4
2
0
–15
–5
–10
OUTPUT VOLTAGE (V)
8052 G29
8052 G28
30
10
–2.0
4
–2
0
2
OUTPUT CURRENT (A)
15
Minimum Required Input Running
Voltage vs Output Voltage,
IOUT = 5A
8052 G30
Minimum Required Input Voltage
vs Load 3.3VOUT and Below
6.4
7.2
6.2
7.0
Minimum Required Input Voltage
vs Load 5VOUT
20
15
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
25
6.0
6.8
6.6
5.8
5
0
0
5
10
15
20
OUTPUT VOLTAGE (V)
25
5.6
30
0
1
3
2
LOAD CURRENT (A)
4
14.4
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
9.6
9.4
9.2
0
1
3
2
LOAD CURRENT (A)
4
5
14.0
13.8
13.6
13.2
1
3
2
LOAD CURRENT (A)
4
5
8052 G33
Minimum Required Input Voltage
vs Load 18VOUT
21.0
20.5
20.0
19.5
13.4
8052 G34
8
21.5
14.2
9.8
9.0
Minimum Required Input Voltage
vs Load 12VOUT
INPUT VOLTAGE (V)
10.0
0
8052 G32
8052 G31
Minimum Required Input Voltage
vs Load 8VOUT
6.4
5
0
1
2
3
LOAD CURRENT (A)
5
4
8052 G35
19.0
0
1
2
3
LOAD CURRENT (A)
4
5
8052 G36
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Required Input Voltage
vs Load –3.3VOUT
Minimum Required Input Voltage
vs Load 24VOUT
35
26.5
26.0
25
20
15
10
5
0
1
2
3
LOAD CURRENT (A)
0
5
4
30
10
5
1
2
3
4
60
1
0
2
3
2
3
4
5
LOAD CURRENT (A)
20
0
1
30
20
3
4
5
8052 G42
Temperature Rise vs Load Current
8VOUT
36VIN
24VIN
12VIN
80
40
2
LOAD CURRENT (A)
90
70
60
50
40
30
20
10
0
1
2
3
5
4
LOAD CURRENT (A)
8052 G43
5
8052 G39
30
8052 G41
10
1
4
40
0
4
36VIN
24VIN
12VIN
7VIN
50
0
3
36VIN
24VIN
12VIN
6VIN
50
Temperature Rise vs Load Current
5VOUT
TEMPERATURE RISE (°C)
10
2
LOAD CURRENT (A)
60
LOAD CURRENT (A)
60
20
1
10
70
30
0
Temperature Rise vs Load Current
2.5VOUT
10
8052 G40
40
0
10
8052 G38
15
0
5
36VIN
24VIN
12VIN
6VIN
50
15
0
5
4
20
Temperature Rise vs Load Current
3.3VOUT
TEMPERATURE RISE (°C)
3
5
LOAD CURRENT (A)
0
2
TO START
TO RUN
25
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
30
15
0
20
Minimum Required Input Voltage
vs Load –12VOUT
20
0
1
LOAD CURRENT (A)
TO START
TO RUN
25
0
8052 G37
Minimum Required Input Voltage
vs Load –8VOUT
25
5
TEMPERATURE RISE (°C)
25.5
TO START
TO RUN
30
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
27.0
35
TO START
TO RUN
30
27.5
Minimum Required Input Voltage
vs Load –5VOUT
TEMPERATURE RISE (°C)
28.0
TA = 25°C, unless otherwise noted.
8052 G44
0
0
1
3
2
LOAD CURRENT (A)
4
5
8052 G45
8052fg
For more information www.linear.com/LTM8052
9
LTM8052/LTM8052A
TYPICAL PERFORMANCE CHARACTERISTICS
Temperature Rise vs Load Current
12VOUT
120
36VIN
24VIN
15VIN
80
60
40
40
0
0
1
2
3
5
4
80
70
60
50
40
30
20
10
1
0
LOAD CURRENT (A)
2
3
0
5
4
0
1
LOAD CURRENT (A)
3
2
LOAD CURRENT (A)
4
5
8052 G46
8052 G47
8052 G48
Temperature Rise vs Load Current
–3.3VOUT
Temperature Rise vs Load Current
–5VOUT
Temperature Rise vs Load Current
–8VOUT
80
32.5VIN
24VIN
12VIN
70
TEMPERATURE RISE (°C)
60
50
40
30
20
50
40
30
20
10
0
0
1
2
3
5
4
1
0
2
3
LOAD CURRENT (A)
Temperature Rise vs Load Current
–12VOUT
40
30
20
4
5
0
0
1
3
2
LOAD CURRENT (A)
4
5
8052 G51
Switching Frequency vs RT Value
500
24VIN
12VIN
450
400
350
80
RT VALUE (kΩ)
TEMPERATURE RISE (°C)
50
8052 G50
8052 G49
100
70
60
10
LOAD CURRENT (A)
120
28VIN
24VIN
12VIN
80
60
10
0
90
31VIN
24VIN
12VIN
TEMPERATURE RISE (°C)
70
TEMPERATURE RISE (°C)
36VIN
28VIN
90
60
20
0
100
80
20
Temperature Rise vs Load Current
24VOUT
36VIN
24VIN
100
TEMPERATURE RISE (°C)
100
TEMPERATURE RISE (°C)
Temperature Rise vs Load Current
18VOUT
TEMPERATURE RISE (°C)
120
TA = 25°C, unless otherwise noted.
60
40
300
250
200
150
100
20
50
0
0
1
2
3
4
LOAD CURRENT (A)
0
0
0.2
0.6
0.8
0.4
SWITCHING FREQUENCY (MHz)
8052 G52
10
1.0
8052 G53
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
TYPICAL PERFORMANCE CHARACTERISTICS
CTL_T Voltage vs Maximum
Output Current, CTL_I = 2V
6
6
4
4
MAXIMUM CURRENT (A)
MAXIMUM CURRENT (A)
CTL_I Voltage vs Maximum
Output Current, CTL_T = 2V
2
0
–2
–4
2
0
–2
–4
–6
–6
–8
TA = 25°C, unless otherwise noted.
0
0.25
1
0.75
0.5
CTL_I VOLTAGE (V)
1.25
1.5
–8
0
0.25
1
0.75
0.5
CTL_T VOLTAGE (V)
1.25
1.5
8052 G55
8052 G54
PIN FUNCTIONS
VOUT (Bank 1): Power Output Pins. Apply the output filter
capacitor and the output load between these pins and
GND pins. When reverse current is being driven into the
LTM8052/LTM8052A’s output by the load, the energy is
delivered back through the LTM8052/LTM8052A and out
to the VIN pins. Care must be taken to prevent excessive
voltage if other devices on the VIN bus cannot absorb this
energy. See Input Precautions in the Applications Information section for more details and circuit suggestions.
GND (Bank 2): Tie these GND pins to a local ground plane
below the LTM8052/LTM8052A and the circuit components. In most applications, the bulk of the heat flow out
of the LTM8052/LTM8052A is through these pads, so the
printed circuit design has a large impact on the thermal
performance of the part. See the PCB Layout and Thermal Considerations sections for more details. Return the
feedback divider (RADJ) to this net.
VIN (Bank 3): The VIN pins supply current to the LTM8052/
LTM8052A’s internal regulator and to the internal power
switches. This pin must be locally bypassed with an external, low ESR capacitor; see Table 1 for recommended
values.
CTL_T (Pin D8): Connect a resistor/NTC thermistor network
to the CTL_T pin to reduce the maximum regulated output
current of the LTM8052/LTM8052A in response to temperature. The maximum control voltage is 1.5V. If this
function is not used, tie this pin to VREF .
CTL_I (Pin E8): The CTL_I pin reduces the maximum
regulated output current of the LTM8052/LTM8052A. The
maximum control voltage is 1.5V. If this function is not
used, tie this pin to VREF .
VREF (Pin F8): Buffered 2V Reference Capable of 0.5mA
Drive. It is valid when VIN > 6V and RUN is active high.
RT (Pin G8): The RT pin is used to program the switching
frequency of the LTM8052/LTM8052A by connecting a resistor from this pin to ground. The Applications Information
section of the data sheet includes a table to determine the
resistance value based on the desired switching frequency.
When using the SYNC function, apply a resistor value
equivalent to 20% lower than the clock frequency applied
to the SYNC pin. Do not leave this pin open.
COMP (Pin H8): Compensation Pin. This pin is generally
not used. The LTM8052/LTM8052A is internally compensated, but some rare situations may arise that require a
modification to the control loop. This pin connects directly
to the input PWM comparator of the LTM8052/LTM8052A.
In most cases, no adjustment is necessary. If this function
is not used, leave this pin open.
8052fg
For more information www.linear.com/LTM8052
11
LTM8052/LTM8052A
PIN FUNCTIONS
SS (Pin J8): Soft-Start Pin. Place an external capacitor to
ground to ramp the output voltage during start-up conditions. The soft-start pin has an 11µA charging current.
ADJ (Pin K8): The LTM8052/LTM8052A regulates its ADJ
pin to 1.19V. Connect the adjust resistor from this pin to
ground. The value of RADJ is given by the equation:
R ADJ =
11.9
VOUT – 1.19
where RADJ is in kΩ.
RUN (Pin L6): The RUN pin acts as an enable pin and turns
on the internal circuitry. It may also be used to implement a precision UVLO. See the Applications Information
section for details. The RUN pin is internally clamped, so
it may be pulled up to a voltage source that is higher than
the absolute maximum voltage of 6V through a resistor,
provided the pin current does not exceed 100µA. Do not
leave this pin open.
SYNC (Pin L7): Frequency Synchronization Pin. This pin
allows the switching frequency to be synchronized to an
external clock. The RT resistor should be chosen to operate the internal clock at 20% lower than the SYNC pulse
frequency. This pin should be grounded when not in use.
Do not leave this pin floating. When laying out the board,
avoid noise coupling to or from the SYNC trace. See the
Synchronization section in Applications Information.
BLOCK DIAGRAM
2.2µH
VIN
0.2µF
RSENSE
VOUT
10k
2.2µF
RUN
SS
SYNC
CURRENT
MODE
CONTROLLER
VREF
VIN
CTL_I
INTERNAL
REGULATOR
CTL_T
COMP
10k
2.2nF
GND
RT
ADJ
8026 BD
12
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
OPERATION
The LTM8052/LTM8052A is a standalone nonisolated
constant-voltage, constant-current step-down switching
DC/DC power supply that can deliver up to 5A of positive
or 6A of negative output current. This µModule regulator
provides a precisely regulated output voltage programmable via one external resistor from 1.2V to 24V. The
input voltage range is 6V to 36V. Given that the LTM8052/
LTM8052A is a step-down converter, make sure that the
input voltage is high enough to support the desired output
voltage and load current.
The LTM8052/LTM8052A is a 2-quadrant device, meaning
that it can both source and sink current in order to regulate its output voltage. Most traditional voltage regulators
are one quadrant; that is, they only source current. If the
load, for whatever reason, forces current into a traditional
regulator, the output voltage will typically rise. In a similar
situation, the LTM8052/LTM8052A will sink current to
keep the output voltage in regulation.
It should be clear that the above situation is only possible
if the load is providing energy to the LTM8052/LTM8052A
output. The LTM8052/LTM8052A will be able to maintain
the output voltage at the target regulation point as long
as the current from the load does not exceed its negative current limit. If the current does exceed the negative
current limit, the LTM8052/LTM8052A output will start
to rise. If the output continues to rise, the LTM8052/
LTM8052A’s output overvoltage protection circuitry will
turn off the internal power switches, and the output will
be free to rise. The LTM8052A does not respond to an
output overvoltage. If the output voltage of either the
LTM8052 or the LTM8052A rises above the input, current
will flow through an internal power diode. The output will
be clamped to a diode drop above the input, and current
regulation will be lost.
When the LTM8052/LTM8052A is sinking current, it
maintains its output voltage regulation by power conversion, not power dissipation. This means that the energy
provided to the LTM8052/LTM8052A is in turn delivered
to its input power bus. There must be something on this
power bus to accept or use the energy, or the LTM8052/
LTM8052A’s input voltage will rise. Left unchecked, the
energy can raise the input voltage above the absolute
maximum voltage and damage the LTM8052/LTM8052A.
Please see the Input Precautions section for further details.
For applications where only sourcing current (one quadrant
operation) is desired, use LTM8026.
The LTM8052/LTM8052A operates in forced continuous
mode. This means that the part will not skip cycles when
the load approaches zero amps. This may be particularly
useful in applications where the synchronization function
is used, or any time discontinuous switching is undesirable. The LTM8052/LTM8052A will not operate in forced
continuous mode when an input UVLO, output OVLO or
minimum duty cycle violation occurs.
As shown in the Block Diagram, the LTM8052/LTM8052A
contains a current mode controller, power switches,
power inductor, and a modest amount of input and output
capacitance.
The LTM8052/LTM8052A utilizes fixed frequency, average
current mode control to accurately regulate the inductor
current, independent from the output voltage. This is an
ideal solution for applications requiring a regulated current source. The control loop will regulate the current in
the internal inductor. Once the output has reached the
regulation voltage determined by the resistor from the
ADJ pin to ground, the inductor current will be reduced
by the voltage regulation loop.
The output current loop has two control inputs, determined by the voltage at the analog control pins, CTL_I
and CTL_T . CTL_I is typically used to set the maximum
allowable current output of the LTM8052/LTM8052A, while
CTL_T is typically used with a NTC thermistor to reduce
the output current in response to temperature. The lower
of the two analog voltages on CTL_I and CTL_T determines
the regulated output current. The analog control range
of both the CTL_I and CTL_T pin is from 0V to 1.5V. As
shown in the Typical Performance Characteristics section,
the positive and negative currents are not symmetric. The
negative current limit is offset by approximately 2A.
The RUN pin functions as a precision shutdown pin. When
the voltage at the RUN pin is lower than 1.55V, switching is terminated. Below the turn-on threshold, the RUN
pin sinks 5.5µA. This current can be used with a resistor
between RUN and VIN to set a hysteresis. During startup, the SS pin is held low until the part is enabled, after
8052fg
For more information www.linear.com/LTM8052
13
LTM8052/LTM8052A
OPERATION
which the capacitor at the soft-start pin is charged with
an 11µA current source.
The LTM8052/LTM8052A is equipped with a thermal shutdown to protect the device during momentary overload
conditions. It is set above the 125°C absolute maximum
internal temperature rating to avoid interfering with
normal specified operation, so internal device temperatures will exceed the absolute maximum rating when the
overtemperature protection is active. So, continuous or
repeated activation of the thermal shutdown may impair
device reliability. During thermal shutdown, all switching
is terminated and the SS pin is driven low.
The switching frequency is determined by a resistor at the
RT pin. The LTM8052/LTM8052A may also be synchronized
to an external clock through the use of the SYNC pin.
APPLICATIONS INFORMATION
For most applications, the design process is straight
forward, summarized as follows:
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
2. Apply the recommended CIN, COUT, RADJ and RT
values.
While these component combinations have been tested for
proper operation, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions. Bear in mind that the maximum
output current is limited by junction temperature, the
relationship between the input and output voltage magnitude and polarity and other factors. Please refer to the
graphs in the Typical Performance Characteristics section
for guidance.
The maximum frequency (and attendant RT value) at which
the LTM8052/LTM8052A should be allowed to switch is
given in Table 1 in the fMAX column, while the recommended
frequency (and RT value) for optimal efficiency over the
given input condition is given in the fOPTIMAL column.
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
Capacitor Selection Considerations
The CIN and COUT capacitor values in Table 1 are the
minimum recommended values for the associated operating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
14
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
necessary. Again, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions.
Ceramic capacitors are small, robust and have very low ESR.
However, not all ceramic capacitors are suitable. X5R and
X7R types are stable over temperature, applied voltage and
give dependable service. Other types, including Y5V and
Z5U have very large temperature and voltage coefficients
of capacitance. In an application circuit they may have only
a small fraction of their nominal capacitance resulting in
much higher output voltage ripple than expected.
Many of the output capacitances given in Table 1 specify
an electrolytic capacitor. Ceramic capacitors may also be
used in the application, but it may be necessary to use
more of them. Many high value ceramic capacitors have a
large voltage coefficient, so the actual capacitance of the
component at the desired operating voltage may be only
a fraction of the specified value. Also, the very low ESR of
ceramic capacitors may necessitate additional capacitors
for acceptable stability margin.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8052/
LTM8052A. A ceramic input capacitor combined with trace
or cable inductance forms a high Q (under damped) tank
circuit. If the LTM8052/LTM8052A circuit is plugged into a
live supply, the input voltage can ring to twice its nominal
value, possibly exceeding the device’s rating. This situation is easily avoided; see the Hot Plugging Safely section.
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
APPLICATIONS INFORMATION
Table 1. Recommended Component Values and Configuration.
(TA = 25°C. See Typical Performance Characteristics for Load Conditions)
RADJ
fOPTIMAL RT(OPTIMAL)
fMAX
RT(MIN)
6V to 36V
VIN
VOUT
1.2 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
CIN
COUT CERAMIC
COUT ELECTROLYTIC
Open
200kHz
210k
250kHz
169k
6V to 36V
1.5 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
38.3k
300kHz
140k
350kHz
118k
6V to 36V
1.8 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
19.6k
350kHz
118k
400kHz
102k
6V to 36V
2.5 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
9.09k
450kHz
90.9k
525kHz
78.7k
6V to 36V
3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
5.62k
550kHz
75.0k
625kHz
64.9k
7V to 36V
5
10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
3.09k
600kHz
68.1k
700kHz
57.6k
10V to 36V
8
10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.74k
625kHz
64.9k
750kHz
53.6k
15V to 36V
12
10µF, 50V, 1210
650kHz
61.9k
800kHz
49.9k
22V to 36V
18
10µF, 50V, 1210
22µF, 25V, 1210
47µF, 20V, 45mΩ, OS-CON, 20SVPS47M
604
675kHz
59.0k
900kHz
44.2k
28V to 36V
24
4.7µF, 50V, 1210
10µF, 50V, 1206
47µF, 35V, 30mΩ, OS-CON, 35SVPC47M
523
700kHz
57.6k
1MHz
39.2k
9V to 15V
1.2 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
Open
200kHz
210k
525kHz
78.7k
9V to 15V
1.5 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
38.3k
300kHz
140k
650kHz
61.9k
9V to 15V
1.8 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
19.6k
350kHz
118k
800kHz
49.9k
9V to 15V
2.5 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
9.09k
450kHz
90.9k
1MHz
39.2k
9V to 15V
3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
47µF, 16V, 1210
120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.10k
5.62k
550kHz
75.0k
1MHz
39.2k
9V to 15V
5
10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 3.09k
600kHz
68.1k
1MHz
39.2k
10V to 15V
8
10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.74k
625kHz
64.9k
1MHz
39.2k
18V to 36V 1.2 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
Open
200kHz
210k
250kHz
169k
18V to 36V 1.5 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
38.3k
300kHz
140k
350kHz
118k
18V to 36V 1.8 10µF, 50V, 1210 100µF, 6.3V, 1210 470µF, 6.3V, 9mΩ, Chemi-Con,
APXF6R3ARA471MH80G
19.6k
350kHz
118k
400kHz
102k
18V to 36V 2.5 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
9.09k
450kHz
90.9k
525kHz
78.7k
18V to 36V 3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
5.62k
550kHz
75.0k
625kHz
64.9k
5
10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 3.09k
600kHz
68.1k
700kHz
57.6k
18V to 36V
8
10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.74k
625kHz
64.9k
750kHz
53.6k
18V to 36V
12
10µF, 50V, 1210
1.10k
650kHz
61.9k
800kHz
49.9k
5.62k
550kHz
75.0k
625kHz
64.9k
600kHz
68.1k
700kHz
57.6k
18V to 36V
2.7V to
32.5V*
47µF, 16V, 1210
120µF, 16V, 27mΩ, OS-CON, 16SVPC120M
–3.3 10µF, 50V, 1210 100µF, 6.3V, 1210 330µF, 4V, 27mΩ, OS-CON, 4SVPC330M
2V to 31V*
–5
10µF, 50V, 1210 100µF, 6.3V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 3.09k
2V to 28V*
–8
10µF, 50V, 1210 100µF, 10V, 1210 120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.74k
3V to 24V* –12 10µF, 50V, 1210
47µF, 16V, 1210
120µF, 16V, 27mΩ, OS-CON, 16SVPC120M 1.10k
625kHz
64.9k
750kHz
53.6k
650kHz
61.9k
800kHz
49.9k
*Running voltage. See the Typical Performance Characteristics section for starting requirements.
Note: An input bulk capacitor is required.
8052fg
For more information www.linear.com/LTM8052
15
LTM8052/LTM8052A
APPLICATIONS INFORMATION
Programming Switching Frequency
Switching Frequency Synchronization
The LTM8052/LTM8052A has an operational switching frequency range between 100kHz and 1MHz. This
frequency is programmed with an external resistor from
the RT pin to ground. Do not leave this pin open under
any circumstance. See Table 2 for resistor values and the
corresponding switching frequencies.
The nominal switching frequency of the LTM8052/
LTM8052A is determined by the resistor from the RT pin
to GND and may be set from 100kHz to 1MHz. The internal
oscillator may also be synchronized to an external clock
through the SYNC pin. The external clock applied to the
SYNC pin must have a logic low below 0.6V, a logic high
greater than 1.2V and frequency between 100kHz and
1MHz. The input frequency must be 20% higher than the
frequency determined by the resistor at the RT pin. Input
signals outside of these specified parameters may cause
erratic switching behavior and subharmonic oscillations.
The SYNC pin must be tied to GND if synchronization to
an external clock is not required. When SYNC is grounded,
the switching frequency is determined by the resistor at
the RT pin.
Table 2. RT Resistor Values and Their Resultant Switching
Frequencies
SWITCHING FREQUENCY (MHz)
1
0.75
0.5
0.3
0.2
0.1
RT (kΩ)
39.2
53.6
82.5
140
210
453
In addition, the Typical Performance Characteristics section contains a graph that shows the switching frequency
versus RT value.
Switching Frequency Trade-Offs
It is recommended that the user apply the optimal RT
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8052/LTM8052A is flexible enough to accommodate
a wide range of operating frequencies, a haphazardly
chosen one may result in undesirable operation under
certain operating or fault conditions. A frequency that is
too high can reduce efficiency, generate excessive heat
or even damage the LTM8052/LTM8052A in some fault
conditions. A frequency that is too low can result in a final
design that has too much output ripple or too large of an
output capacitor.
16
Switching Mode
The LTM8052/LTM8052A operates in forced continuous
mode. This means that the part will not skip cycles when
the load approaches zero amps. This may be particularly
useful in applications where the synchronization function
is used, or any time discontinuous switching is undesirable. The LTM8052/LTM8052A will not operate in forced
continuous mode when an input UVLO, output OVLO or
minimum duty cycle violation occurs.
Soft-Start
The soft-start function controls the slew rate of the power
supply output voltage during start-up. A controlled output
voltage ramp minimizes output voltage overshoot, reduces
inrush current from the VIN supply, and facilitates supply
sequencing. A capacitor connected from the SS pin to
GND programs the slew rate. The capacitor is charged
from an internal 11µA current source to produce a ramped
output voltage.
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
APPLICATIONS INFORMATION
Maximum Output Current Adjust
To adjust the regulated load current, an analog voltage
is applied to the CTL_I pin or CTL_T pins. Varying the
voltage between 0V and 1.5V adjusts the maximum
current between the minimum and the maximum current,
typically 5.6A positive and 7.7A negative. Graphs of the
output current vs CTL_I and CTL_T voltages are given
in the Typical Performance Characteristics section. The
LTM8052/LTM8052A provides a 2V reference voltage for
conveniently applying resistive dividers to set the current
limit. The current limit can be set as shown in Figure 1
with the following equation:
I MAX =
resistor network with a temperature dependant resistance
(Figure 2). When the board/load temperature rises, the
CTL_T voltage will decrease. To reduce the regulated
current, the CTL_T voltage must be lower than the voltage
at the CTL_I pin. VCTL_T may be higher than VCTL_I, but
then it will have no effect.
RV
R1
VREF
LTM8052
LTM8052
RNTC
RNTC
RX
RNTC
RNTC
RX
CTL_T
8052 F02
R2
(OPTION A TO D)
7.467 • R2
Amps (Positive Current )
R1+ R2
7.467 • R2
I MAX = −
+ 2.1 Amps (Negative Current )
R1+ R2
RV
VREF
A
C
B
D
Figure 2. Load Current Derating vs
Temperature Using NTC Resistor
Voltage Regulation and Output Overvoltage Protection
The LTM8052/LTM8052A uses the ADJ pin to regulate the
output voltage and to provide a high speed overvoltage
lockout to avoid high voltage conditions. If the output
voltage exceeds 125% of the regulated voltage level (1.5V
at the ADJ pin), the LTM8052 terminates switching and
shuts down switching for a brief time before restarting.
The LTM8052A does not. The regulated output voltage
must be greater than 1.19V and is set by the equation:
2V
R1
CTL_I OR CTL_T
R2
8052 F01
Figure 1. Setting the Output Current Limit
⎛
10k ⎞
VOUT = 1.19V ⎜ 1+
⎝ R ADJ ⎟⎠
Load Current Derating Using the CTL_T Pin
In high current applications, derating the maximum current
based on operating temperature may prevent damage
to the load. In addition, many applications have thermal
limitations that will require the regulated current to be
reduced based on the load and/or board temperature. To
achieve this, the LTM8052/LTM8052A uses the CTL_T
pin to reduce the effective regulated current in the load.
While CTL_I programs the regulated current in the load,
CTL_T can be configured to reduce this regulated current
based on the analog voltage at the CTL_T pin. The load/
board temperature derating is programmed using a
where RADJ is shown in Figure 3.
VOUT
VOUT
LTM8052
ADJ
RADJ
8052 F03
Figure 3. Voltage Regulation and Overvoltage Protection
Feedback Connections
8052fg
For more information www.linear.com/LTM8052
17
LTM8052/LTM8052A
APPLICATIONS INFORMATION
In situations where the output of the LTM8052/LTM8052A
is required to sink current (that is, the load is driving current into the LTM8052/LTM8052A output), the μModule
regulator will maintain voltage regulation as long as the
negative current limit is not exceeded. If the current limit
is exceeded, the output voltage may begin to rise. If the
output voltage rises more than 125% of the target regulation
voltage, the output overvoltage protection will engage, and
the LTM8052 will stop switching. In this situation, the load
will be free to pull up the LTM8052 output. The LTM8052A
does not have the output overvoltage protection, making
it ideal for applications where the current must remain
in regulation even if the output rises above the voltage
regulation target. For example, in a thermo-electric cooling
(TEC) application, the voltage is not particularly important
and an output overvoltage cut-off function could be more
of a nuisance than a benefit, so the LTM8052A is a good
choice. In a voltage regulation application, output OVP is
a nice feature to have to protect the load. In a LED drive,
even though it is primarily a current regulation application, choose the LTM8052 in order to use the OVP as an
open LED protection.
If the output voltage of either the LTM8052 or the LTM8052A
rises above the input, current will flow through an internal
power diode. The output will be clamped to a diode drop
above the input, and current regulation will be lost.
Thermal Shutdown
If the part is too hot, the LTM8052/LTM8052A engages its
thermal shutdown, terminates switching and discharges
the soft-start capacitor. When the part has cooled, the
part automatically restarts. This thermal shutdown is
set to engage at temperatures above the 125°C absolute
maximum internal operating rating to ensure that it does
not interfere with functionality in the specified operating range. This means that internal temperatures will
exceed the 125°C absolute maximum rating when the
overtemperature protection is active, possibly impairing
the device’s reliability.
18
UVLO and Shutdown
The LTM8052/LTM8052A has an internal UVLO that
terminates switching, resets all logic, and discharges
the soft-start capacitor when the input voltage is below
6V. The LTM8052/LTM8052A also has a precision RUN
function that enables switching when the voltage at the
RUN pin rises to 1.68V and shuts down the LTM8052/
LTM8052A when the RUN pin voltage falls to 1.55V. There
is also an internal current source that provides 5.5μA of
pull-down current to program additional UVLO hysteresis.
For RUN rising, the current source is sinking 5.5µA until
RUN = 1.68V, after which the current source turns off.
For RUN falling, the current source is off until the RUN =
1.55V, after which it sinks 5.5µA. The following equations
determine the voltage divider resistors for programming
the falling UVLO voltage and rising enable voltage (VENA)
as configured in Figure 4.
R1=
1.55V •R2
UVLO– 1.55V
R2 =
VENA – 1.084 •UVLO
5.5µA
The RUN pin has an absolute maximum voltage of 6V.
To accommodate the largest range of applications, there
is an internal Zener diode that clamps this pin, so that it
can be pulled up to a voltage higher than 6V through a
resistor that limits the current to less than 100µA. For
applications where the supply range is greater than 4:1,
size R2 greater than 375k.
VIN
LTM8052
VIN
R2
RUN
R1
8052 F04
Figure 4. UVLO Configuration
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
APPLICATIONS INFORMATION
Input Precautions
When the LTM8052/LTM8052A is sinking current, it maintains its output voltage regulation by power conversion, not
power dissipation. This means that the energy provided to
the LTM8052/LTM8052A is in turn delivered to its input
power bus. There must be something on this power bus
to accept or use the energy, or the LTM8052/LTM8052A’s
input voltage will rise. Left unchecked, the energy can raise
the input voltage above the absolute maximum voltage
rating and damage the LTM8052/LTM8052A.
In many cases, the system load on the LTM8052/LTM8052A
input bus will be sufficient to absorb the energy delivered
by the μModule regulator. The power required by other
devices will consume more than enough to make up for
what the LTM8052/LTM8052A delivers. In cases where
the LTM8052/LTM8052A is the largest or only power
converter, this may not be true and some means may need
to be devised to prevent the LTM8052/LTM8052A’s input
from rising too high. Figure 5a shows a passive crowbar
circuit that will dissipate energy during momentary input
overvoltage conditions. The breakdown voltage of the
zener diode is chosen in conjunction with the resistor
R to set the circuit’s trip point. The trip point is typically
set well above the maximum VIN voltage under normal
operating conditions. This circuit does not have a precision threshold, and is subject to both part-to-part and
temperature variations, so it is not suitable for applications
where high accuracy is required or large voltage margins
are not available.
The circuit in Figure 5b also dissipates energy during momentary overvoltage conditions, but is more precise than
that in Figure 5a. It uses an inexpensive comparator and
the VREF output of the LTM8052/LTM8052A to establish
a reference voltage. The optional hysteresis resistor in
the comparator circuit avoids MOSFET chatter. Figure 5c
shows a circuit that latches on and crowbars the input
in an overvoltage event. The SCR latches when the input
voltage threshold is exceeded, so this circuit should be
used with a fuse, as shown, or employ some other method
to interrupt current from the load.
As mentioned, the LTM8052/LTM8052A sinks current by
energy conversion and not dissipation. Thus, no matter
what protection circuit that is used, the amount of power
that the protection circuit must absorb depends upon the
amount of power at the input. For example, if the output
voltage is 2.5V and can sink 5A, the input protection circuit
should be designed to absorb at least 7.5W. In Figures 5a
and 5b, let us say that the protection activation threshold
is 30V. Then the circuit must be designed to be able to
dissipate 7.5W and accept 7.5W/30V = 250mA.
LOAD
CURRENT
VIN
ZENER
DIODE
Q
VOUT
LTM8052
GND
SOURCING
LOAD
R
8052 F05a
Figure 5a. The MOSFET Q Dissipates Momentary Energy to
GND. The Zener Diode and Resistor Are Chosen to Ensure That
the MOSFET Turns On Above the Maximum VIN Voltage Under
Normal Operation
LOAD
CURRENT
OPTIONAL
HYSTERESIS
RESISTOR
Q
+
–
VIN
VOUT
LTM8052
VREF GND
SOURCING
LOAD
8052 F05b
Figure 5b. The Comparator in This Circuit Activates the Q
MOSFET at a More Precise Voltage Than the One Shown in
Figure 5a. The Reference for the Comparator is Derived from
the VREF Pin of the LTM8052/LTM8052A
8052fg
For more information www.linear.com/LTM8052
19
LTM8052/LTM8052A
APPLICATIONS INFORMATION
must absorb is 1/2 LI2 = 27.5μJ. Suppose the comparator
circuit in Figure 5d is set to pull the RUN pin down when
VTRIP = 15V. The input voltage will rise according to the
capacitor energy equation:
Figures 5a through 5c are crowbar circuits, which attempt
to prevent the input voltage from rising above some level
by clamping the input to GND through a power device. In
some cases, it is possible to simply turn off the LTM8052/
LTM8052A when the input voltage exceeds some threshold. This is possible when the voltage power source that
drives current into VOUT never exceeds VIN. An example
of this circuit is shown in Figure 5d. When the power
source on the output drives VIN above a predetermined
threshold, the comparator pulls down on the RUN pin
and stops switching in the LTM8052/LTM8052A. When
this happens, the input capacitance needs to absorb the
energy stored within the LTM8052/LTM8052A’s internal
inductor, resulting in an additional voltage rise. As shown
in the Block Diagram, the internal inductor value is 2.2μH.
If the LTM8052/LTM8052A negative current limit is set
to 5A, for example, the energy that the input capacitance
1
C (VIN 2− VTRIP 2) = 27.5µJ
2
If the total input capacitance is 10μF, the input voltage
will rise to:
1
27.5µJ = 10µF(VIN 2− 15V 2)
2
VIN = 15.2V
For applications where only sourcing current (one quadrant
operation) is desired, use LTM8026.
LOAD
CURRENT
VIN
SCR
ZENER
DIODE
VOUT
FUSE
LTM8052
GND
SOURCING
LOAD
8052 F05a
Figure 5c. The SCR Latches On When the Activation Threshold is
Reached, So a Fuse or Some Other Method of Disconnecting the
Load Should be Used
LOAD
CURRENT
VIN
VOUT
LTM8052
RUN
10µF
–
+
GND
SOURCING
LOAD
EXTERNAL
REFERENCE
VOLTAGE
8052 F05d
Figure 5d. This Comparator Circuit Turns Off the LTM8052/LTM8052A
if the Input Rises Above a Predetermined Threshold. When the
LTM8052/LTM8052A Turns Off, the Energy Stored in the Internal
Inductor Will Raise VIN a Small Amount Above the Threshold.
20
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
APPLICATIONS INFORMATION
No Output Current Sharing
3. Place the COUT capacitor as close as possible to the
VOUT and GND connection of the LTM8052/LTM8052A.
The LTM8052/LTM8052A is a two quadrant device, able to
both sink and source current to maintain voltage regulation.
It is therefore not suitable for current sharing.
4. Place the CIN and COUT capacitors such that their
ground currents flow directly adjacent or underneath
the LTM8052/LTM8052A.
PCB Layout
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8052/LTM8052A.
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8052/LTM8052A. The LTM8052/
LTM8052A is nevertheless a switching power supply, and
care must be taken to minimize EMI and ensure proper
operation. Even with the high level of integration, you may
fail to achieve specified operation with a haphazard or poor
layout. See Figure 6 for a suggested layout. Ensure that
the grounding and heat sinking are acceptable.
1. Place the RADJ and RT resistors as close as possible to
their respective pins.
•
•
•
•
GND
•
•
•
•
•
•
•
•
•
COUT
VREF
RT
CTL_I
CTL_T
2. Place the CIN capacitor as close as possible to the VIN
and GND connection of the LTM8052/LTM8052A.
•
•
•
•
•
•
•
•
•
•
•
•
SYNC
RUN
•
•
•
•
•
•
•
•
•
•
•
•
•
VIN
VOUT
GND
SS
ADJ
A few rules to keep in mind are:
COMP
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 6. The LTM8052/LTM8052A can
benefit from the heat sinking afforded by vias that connect to internal GND planes at these locations, due to
their proximity to internal power handling components.
The optimum number of thermal vias depends upon
the printed circuit board design. For example, a board
might use very small via holes. It should employ more
thermal vias than a board that uses larger holes.
VOUT
CIN
GND
VIN
• THERMAL AND INTERCONNECT VIAS
8052 F06
Figure 6. Layout Showing Suggested External Components,
GND Plane and Thermal Vias
8052fg
For more information www.linear.com/LTM8052
21
LTM8052/LTM8052A
APPLICATIONS INFORMATION
Hot Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8052/LTM8052A. However, these
capacitors can cause problems if the LTM8052/LTM8052A
is plugged into a live input supply (see Application Note 88
for a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the voltage at the VIN pin of the LTM8052/LTM8052A can ring
to more than twice the nominal input voltage, possibly
exceeding the LTM8052/LTM8052A’s rating and damaging the part. If the input supply is poorly controlled or the
user will be plugging the LTM8052/LTM8052A into an
energized supply, the input network should be designed
to prevent this overshoot. This can be accomplished by
installing a small resistor in series to VIN, but the most
popular method of controlling input voltage overshoot is
to add an electrolytic bulk capacitor to the VIN net. This
capacitor’s relatively high equivalent series resistance
damps the circuit and eliminates the voltage overshoot.
The extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit,
though it is physically large.
Thermal Considerations
The LTM8052/LTM8052A output current may need to
be derated if it is required to operate in a high ambient
temperature. The amount of current derating is dependent upon the input voltage, output power and ambient
temperature. The temperature rise curves given in the
Typical Performance Characteristics section can be used
as a guide. These curves were generated by the LTM8052/
LTM8052A mounted to a 58cm2 4-layer FR4 printed circuit
board. Boards of other sizes and layer count can exhibit
different thermal behavior, so it is incumbent upon the user
to verify proper operation over the intended system’s line,
load and environmental operating conditions.
22
For increased accuracy and fidelity to the actual application, many designers use finite element analysis (FEA) to
predict thermal performance. To that end, Page 2 of the
data sheet typically gives four thermal coefficients:
θJA – Thermal resistance from junction to ambient
θJCbottom – Thermal resistance from junction to the
bottom of the product case
θJCtop – Thermal resistance from junction to top of the
product case
θJB – Thermal resistance from junction to the printed
circuit board.
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confusion
and inconsistency. These definitions are given in JESD
51-12, and are quoted or paraphrased below:
θJA is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to as
“still air” although natural convection causes the air to
move. This value is determined with the part mounted to
a JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
θJCbottom is the junction-to-board thermal resistance with
all of the component power dissipation flowing through the
bottom of the package. In the typical µModule regulator,
the bulk of the heat flows out the bottom of the package,
but there is always heat flow out into the ambient environment. As a result, this thermal resistance value may
be useful for comparing packages but the test conditions
don’t generally match the user’s application.
θJCtop is determined with nearly all of the component power
dissipation flowing through the top of the package. As the
electrical connections of the typical µModule regulator are
on the bottom of the package, it is rare for an application
to operate such that most of the heat flows from the junction to the top of the part. As in the case of θJCbottom, this
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
APPLICATIONS INFORMATION
θJB is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule regulator and into the board, and is really the
sum of the θJCbottom and the thermal resistance of the
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a 2-sided,
2-layer board. This board is described in JESD 51-9.
Given these definitions, it should now be apparent that none
of these thermal coefficients reflects an actual physical
operating condition of a µModule regulator. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
A graphical representation of these thermal resistances
is given in Figure 7.
The blue resistances are contained within the µModule
device, and the green are outside.
The die temperature of the LTM8052/LTM8052A must be
lower than the maximum rating of 125°C, so care should
be taken in the layout of the circuit to ensure good heat
sinking of the LTM8052/LTM8052A. The bulk of the
heat flow out of the LTM8052/LTM8052A is through the
bottom of the module and the LGA pads into the printed
circuit board. Consequently a poor printed circuit board
design can cause excessive heating, resulting in impaired
performance or reliability. Please refer to the PCB Layout
section for printed circuit board design suggestions.
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
CASE (BOTTOM)-TO-BOARD
JUNCTION-TO-CASE
RESISTANCE
(BOTTOM) RESISTANCE
AMBIENT
BOARD-TO-AMBIENT
RESISTANCE
8052 F07
µModule DEVICE
Figure 7. Thermal Resistances Among µModule Device,
Printed Circuit Board and Environment
8052fg
For more information www.linear.com/LTM8052
23
LTM8052/LTM8052A
TYPICAL APPLICATIONS
36VIN, 3.3VOUT Step-Down CVCC Converter
VIN
6V TO 36V
10µF
VIN
510k
VOUT
3.3V
5A
LTM8052
VOUT
RUN
SS
OPTIONAL
INPUT
PROTECTION
+
VREF
SYNC
CTL_I
COMP
CTL_T
GND ADJ
RT
330µF
100µF
5.62k
75.0k
8052 TA02
36VIN, LTM8052 Charges Two 2.5V Series Supercapacitors at 5.6A
VIN
7V TO 36V
10µF
510k
VIN
RUN
SS
OPTIONAL
INPUT
PROTECTION
VOUT
5V
5.6A
LTM8052
VOUT
SYNC
CTL_I
COMP
CTL_T
GND ADJ
RT
68.1k
2.5V
2.2F
VREF
47µF
2.5V
2.2F
3.09k
8052 TA03
24
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
TYPICAL APPLICATIONS
36VIN, 12VOUT Step-Down CVCC Converter
VIN
16V TO 36V
10µF
510k
VIN
RUN
SS
OPTIONAL
INPUT
PROTECTION
VOUT
12V
3.5A
LTM8052
VOUT
+
VREF
SYNC
CTL_I
COMP
CTL_T
GND ADJ
RT
120µF
47µF
1.1k
61.9k
8052 TA04
31VIN, –5VOUT Negative Converter
VIN
7V TO 31V
10µF
510k
VIN
LTM8052
VOUT
RUN
SS
SYNC
OPTIONAL
INPUT
PROTECTION
VREF
CTL_I
CTL_T
COMP
RT GND ADJ
68.1k
3.09k
8052 TA05
+
120µF
100µF
VOUT
–5V
3A
8052fg
For more information www.linear.com/LTM8052
25
LTM8052/LTM8052A
TYPICAL APPLICATIONS
Two LTM8052As Used to Regulate Positive or Negative Voltage
(and Current) Across a Peltier Device
VIN
10V TO 36V
383k
10µF
VOUT
2V TO 8V
VOUT
VIN
RUN LTM8052A
SS
VREF
SYNC
CTL_I
COMP
CTL_T
RT
GND
+
ADJ
118k
PELTIER
100µF
100µF
(OPTIONAL)
330µF
1.74k to
14.7k
VIN
FIXED
5V
VOUT
RUN LTM8052A
SS
VREF
10µF
SYNC
CTL_I
COMP
CTL_T
RT
GND
68.1k
ADJ
+
100µF
120µF
3.09k
8052 TA06
Stack Two LTM8052s to Charge and Actively Balance Supercapacitors (or Batteries)
VIN
8.5V TO 36V
383k
10µF
RUN LTM8052
SS
VREF
SYNC
CTL_I
COMP
CTL_T
RT
GND
90.9k
VIN
10µF
VOUT
VOUT
VIN
ADJ
2.5V SUPERCAP
47µF
9.09k
VOUT
RUN LTM8052
SS
VREF
SYNC
CTL_I
COMP
CTL_T
RT
GND
90.9k
ADJ
2.5V SUPERCAP
47µF
9.09k
8052 TA07
26
8052fg
For more information www.linear.com/LTM8052
1.905
3.175
SUGGESTED PCB LAYOUT
TOP VIEW
0.000
aaa Z
0.630 ±0.025 Ø 81x
0.635
PACKAGE TOP VIEW
E
0.635
4
1.905
Y
X
D
For more information www.linear.com/LTM8052
6.350
5.080
0.000
5.080
6.350
aaa Z
2.45 – 2.55
SYMBOL
A
b
D
E
e
F
G
aaa
bbb
eee
0.15
0.10
0.05
MAX
2.92
0.66
A
NOTES
DETAIL B
TOTAL NUMBER OF LGA PADS: 81
NOM
2.82
0.63
15.0
11.25
1.27
12.70
8.89
DIMENSIONS
0.27 – 0.37
SUBSTRATE
eee S X Y
MIN
2.72
0.60
DETAIL A
DIA (0.630) 81x
DETAIL B
MOLD
CAP
Z
4.445
4.445
(Reference LTC DWG # 05-08-1868 Rev A)
// bbb Z
PAD “A1”
CORNER
3.175
LGA Package
81-Lead (15mm × 11.25mm × 2.82mm)
e
b
7
5
G
4
e
3
PACKAGE BOTTOM VIEW
6
2
1
L
K
J
H
G
F
E
D
C
B
A
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
4
!
TRAY PIN 1
BEVEL
COMPONENT
PIN “A1”
7
3
LGA 81 1212 REV A
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
6. THE TOTAL NUMBER OF PADS: 81
5. PRIMARY DATUM -Z- IS SEATING PLANE
LAND DESIGNATION PER JESD MO-222, SPP-010
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
7
SEE NOTES
PAD 1
SEE NOTES
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
F
b
8
DETAIL A
LTM8052/LTM8052A
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTM8052#packaging for the most recent package drawings.
8052fg
27
3.175
SUGGESTED PCB LAYOUT
TOP VIEW
1.905
aaa Z
0.630 ±0.025 Ø 81x
E
0.000
PACKAGE TOP VIEW
0.635
4
0.635
PIN “A1”
CORNER
1.905
Y
X
D
For more information www.linear.com/LTM8052
6.350
5.080
3.810
2.540
1.270
0.000
1.270
2.540
3.810
5.080
6.350
aaa Z
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
H1
H2
aaa
bbb
ccc
ddd
eee
H1
SUBSTRATE
NOM
3.42
0.60
2.82
0.75
0.63
15.00
11.25
1.27
12.70
8.89
0.32
2.50
MAX
3.62
0.70
2.92
0.90
0.66
NOTES
DETAIL B
PACKAGE SIDE VIEW
0.37
2.55
0.15
0.10
0.20
0.30
0.15
TOTAL NUMBER OF BALLS: 81
0.27
2.45
MIN
3.22
0.50
2.72
0.60
0.60
b1
DIMENSIONS
ddd M Z X Y
eee M Z
DETAIL A
Øb (81 PLACES)
DETAIL B
H2
MOLD
CAP
ccc Z
A1
A2
A
Z
(Reference LTC DWG # 05-08-1959 Rev Ø)
// bbb Z
28
Z
BGA Package
81-Lead (15mm × 11.25mm × 3.42mm)
e
b
7
5
G
4
e
3
PACKAGE BOTTOM VIEW
6
2
1
L
K
J
H
G
F
E
D
C
B
A
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
4
3
TRAY PIN 1
BEVEL
COMPONENT
PIN “A1”
7
!
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
BGA 81 0913 REV Ø
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
6. SOLDER BALL COMPOSITION IS 96.5% Sn/3.0% Ag/0.5% Cu
5. PRIMARY DATUM -Z- IS SEATING PLANE
BALL DESIGNATION PER JESD MS-028 AND JEP95
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
7
SEE NOTES
PIN 1
SEE NOTES
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
F
b
8
DETAIL A
LTM8052/LTM8052A
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTM8052#packaging for the most recent package drawings.
8052fg
3.175
4.445
4.445
LTM8052/LTM8052A
PACKAGE DESCRIPTION
Table 3. Pin Assignment Table (Arranged by Pin Number)
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
A1
VOUT
B1
VOUT
C1
VOUT
D1
VOUT
E1
GND
F1
GND
A2
VOUT
B2
VOUT
C2
VOUT
D2
VOUT
E2
GND
F2
GND
A3
VOUT
B3
VOUT
C3
VOUT
D3
VOUT
E3
GND
F3
GND
A4
VOUT
B4
VOUT
C4
VOUT
D4
VOUT
E4
GND
F4
GND
A5
GND
B5
GND
C5
GND
D5
GND
E5
GND
F5
GND
A6
GND
B6
GND
C6
GND
D6
GND
E6
GND
F6
GND
A7
GND
B7
GND
C7
GND
D7
GND
E7
GND
F7
GND
A8
GND
B8
GND
C8
GND
D8
CTL_T
E8
CTL_I
F8
VREF
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
PIN ID
FUNCTION
G1
GND
–
–
J1
VIN
K1
VIN
L1
VIN
G2
GND
–
–
J2
VIN
K2
VIN
L2
VIN
G3
GND
–
–
J3
VIN
K3
VIN
L3
VIN
G4
GND
–
–
–
–
–
–
–
–
G5
GND
H5
GND
J5
GND
K5
GND
L5
GND
G6
GND
H6
GND
J6
GND
K6
GND
L6
RUN
G7
GND
H7
GND
J7
GND
K7
GND
L7
SYNC
G8
RT
H8
COMP
J8
SS
K8
ADJ
L8
GND
8052fg
For more information www.linear.com/LTM8052
29
LTM8052/LTM8052A
PACKAGE PHOTOS
LGA
15mm
2.82mm
11.25mm
LGA
15mm
2.82mm
11.25mm
BGA
15mm
3.42mm
11.25mm
BGA
15mm
3.42mm
11.25mm
30
8052fg
For more information www.linear.com/LTM8052
LTM8052/LTM8052A
REVISION HISTORY
REV
DATE
DESCRIPTION
A
3/12
Modified the Description section.
B
C
8/12
5/13
PAGE NUMBER
1
Updated the Absolute Maximum Ratings and Pin Configuration sections.
2
Corrected the pin name on schematics using two LTM8052s.
24
Updated the Related Parts table.
28
Updated the selection table and performance curve.
1
Added the LTM8052A ordering information.
2
Updated the Output Overvoltage Protection section.
17
Modified the Peltier Driver circuit to use LTM8052A.
25
Updated solder temperature from 250°C to 245°C in the Absolute Maximum Ratings section.
2
18
D
E
10/13
6/14
Added the MP-Grade for LTM8052 and LTM8052A
2
Corrected Figure Description
24
Added TechClip Video hyperlink
1
Updated Order Information table
2
Updated Voltage Regulation and Output Overvoltage Protection sections
16, 17
F
6/15
Added BGA Package
1, 2, 30
G
11/16
Added parentheses to a equation of current limit
17
Updated the Related Parts table
32
8052fg
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LTM8052
31
LTM8052/LTM8052A
TYPICAL APPLICATION
36VIN, 3.3VOUT Step-Down Converter with 4.75A Accurate Current Limit
VIN
6V TO 36V
10µF
VIN
510k
LTM8052
VOUT
VOUT
3.3V
4.75A
RUN
SS
OPTIONAL
INPUT
PROTECTION
VREF
SYNC
CTL_I
COMP
CTL_T
GND ADJ
RT
75k
5.62k
100µF
+
330µF
71.5k
127k
8052 TA08
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTM8026
36VIN, 5A Step-Down µModule Regulator with
Adjustable Current Limit
6V ≤ VIN ≤ 36V, 1.2V ≤ VOUT ≤ 24V, Adjustable Current Limit, Parallelable
Outputs, CLK Input, 11.25mm × 15mm × 2.82mm LGA Package
LTM8025
36VIN, 3A Step-Down µModule Regulator
3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 24V, CLK Input, 9mm × 15mm × 4.32mm
LGA Package
LTM8062/
LTM8062A
32VIN, 2A µModule Battery Charger with Maximum
Peak Power Tracking (MPPT)
Adjustable VBATT up to 14.4V (18.8V for the LTM8062A), C/10 or Timer
Termination, 9mm × 15mm × 4.32mm LGA Package
LTM8027
60VIN, 4A DC/DC Step-Down µModule Regulator
4.5V ≤ VIN ≤ 60V, 2.5V ≤ VOUT ≤ 24V, 15mm × 15mm × 4.32mm LGA Package
LTM4613
EN55022B Compliant 36VIN, 8A Step-Down µModule
Regulator
5V ≤ VIN ≤ 36V, 3.3V ≤ VOUT ≤ 15V, Synchronizable, Parallelable,
15mm × 15mm × 4.32mm LGA Package
LTM8064
58VIN, 6A CVCC Step-Down µModule Regulator
6V ≤ VIN ≤ 58V, 1.2V ≤ VOUT ≤ 36V, 16mm × 11.9mm × 4.92mm BGA Package
LTM8054
36VIN, 5.4A Buck-Boost µModule Regulator with
Current Limit Function
5V ≤ VIN ≤ 36V, 1.2V ≤ VOUT ≤ 36V, 11.25mm × 15mm × 3.42mm BGA Package
LTM8055
36VIN, 8.5A Buck-Boost µModule Regulator with
Current Limit Function
5V ≤ VIN ≤ 36V, 1.2V ≤ VOUT ≤ 36V, 15mm × 15mm × 4.92mm BGA Package
LTM8056
58VIN, 48VOUT Buck-Boost µModule Regulator with
Current Limit Function
5V ≤ VIN ≤ 58V, 1.2V ≤ VOUT ≤ 48V, 15mm × 15mm × 4.92mm BGA Package
LTM8053
40VIN, 3.5A Step-Down µModule Regurator
3.4V ≤ VIN ≤ 40V, 0.97V ≤ VOUT ≤ 15V, 6.25mm × 9mm × 3.32mm BGA Package
32 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTM8052
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTM8052
8052fg
LT 1116 REV G • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2011
工商网监
湘ICP备2023018690号
