EVALUATION KIT AVAILABLE
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
General Description
The MAX16977 is a 2A, current-mode, step-down
converter with an integrated high-side switch. The device
is designed to operate with input voltages from 3.5V to
36V while using only 30FA quiescent current at no load.
The switching frequency is adjustable from 1MHz to
2.2MHz by an external resistor and can be synchronized
to an external clock. The output voltage is pin selectable
to be 5V fixed or adjustable from 1V to 10V. The wide
input voltage range along with its ability to operate at
high duty cycle during undervoltage transients makes the
device ideal for automotive and industrial applications.
The device operates in skip mode for reduced current
consumption in light-load applications. Protection features
include overcurrent limit, overvoltage, and thermal shutdown with automatic recovery. The device also features
a power-good monitor to ease power-supply sequencing.
The device operates over the -40NC to +125NC automotive temperature range, and is available in 16-pin TSSOP
and TQFN (5mm x 5mm) packages with exposed pads.
Applications
Automotive
Industrial
Benefits and Features
●● Supports Up to 2A Loads without External FET
Saves Space and Cost
• Integrated 2A Internal High-Side (70mI typ) Switch
• Fast Load-Transient Response and Current-Mode
Architecture
●● Direct Car Battery to Sub-5V Rail Conversion at
Beyond 2MHz Reduces External Component Count
• 5V Fixed or 1V to 10V Adjustable Output Voltage
• High Duty Cycle During Undervoltage Transients
●● Robust Input Voltage Up to 36V Supports Automotive
Applications
• Wide 3.5V to 36V Input Voltage Range
• 42V Input Transients Tolerance
• Overvoltage, Undervoltage, Overtemperature, and
Short-Circuit Protections
●● Meets Tight OEM Power-Consumption Requirements
with Low IQ
• 30µA Standby Mode Operating Current
• 5µA Typical Shutdown Current
●● Advanced Clock Capabilities Offer Further Reduction
in EMI if Necessary to Enable Noise-Free System
Design
• Adjustable Switching Frequency (1MHz to 2.2MHz)
• Frequency-Synchronization Input
• Spread Spectrum (Optional)
High-Voltage Input DC-DC Converters
Point-of-Load Applications
Typical Application Circuit
Ordering Information appears at end of data sheet.
VBAT
CIN1
47µF
CIN2
4.7µF
SUP
SUPSW
BST
EN
LX
FSYNC
CCOMP1
2.2nF
RCOMP
20kI
COMP
CCOMP2
12pF
L1
2.2µH
VOUT
VBIAS
VBIAS
FOSC
FB
BIAS
GND
PGOOD
VOUT
5V AT 2A
COUT
22µF
D1
OUT
RFOSC
12kI
CBIAS
1µF
19-5844; Rev 4; 1/17
MAX16977
CBST
0.1µF
RPGOOD
10kI
POWER GOOD
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Absolute Maximum Ratings
SUP, SUPSW, LX, EN to GND................................-0.3V to +42V
SUP to SUPSW......................................................-0.3V to +0.3V
BST to GND............................................................-0.3V to +47V
BST to LX ................................................................-0.3V to +6V
OUT to GND...........................................................-0.3V to +12V
FOSC, COMP, BIAS, FSYNC, I.C., PGOOD,
FB to GND.............................................................-0.3V to +6V
LX Continuous RMS Current....................................................3A
Output Short-Circuit Duration.....................................Continuous
Continuous Power Dissipation (TA = +70NC)
TSSOP (derate 26.1mW/oC above +70oC)........... 2088.8mW*
TQFN (derate 28.6mW/oC above +70oC)............. 2285.7mW*
Operating Temperature Range......................... -40NC to +125NC
Junction Temperature......................................................+150NC
Storage Temperature Range............................. -65NC to +150NC
Lead Temperature (soldering, 10s).................................+300NC
Soldering Temperature (reflow)...................................... +260oC
*As per the JEDEC 51 standard (multilayer board).
Package Thermal Characteristics (Note 1)
TSSOP
Junction-to-Ambient Thermal Resistance (BJA)........38.3NC/W
Junction-to-Case Thermal Resistance (BJC)..................3NC/W
TQFN
Junction-to-Ambient Thermal Resistance (BJA)...........35NC/W
Junction-to-Case Thermal Resistance (BJC)...............2.7NC/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Electrical Characteristics
(VSUP = VSUPSW = 14V, VEN = 14V, CBIAS = 1FF, RFOSC = 12kI, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values
are at TA = +25NC.)
PARAMETER
SYMBOL
Supply Voltage Range
VSUP,
VSUPSW
Load-Dump Event Supply
Voltage
VSUP_LD
ISUP
Supply Current
Shutdown Supply Current
BIAS Regulator Voltage
BIAS Undervoltage Lockout
BIAS Undervoltage-Lockout
Hysteresis
CONDITIONS
MIN
TYP
3.5
tLD < 1s
MAX
UNITS
36
V
42
V
ILOAD = 1.5A
3.5
mA
Standby mode, no load, VOUT = 5V
30
60
ISUP_STANDBY Standby mode, no load, VOUT = 5V,
TA = +25°C
30
45
5
12
FA
FA
ISHDN
VEN = 0V
VBIAS
VSUP = VSUPSW = 6V to 36V
4.7
5
5.3
V
VBIAS rising
2.9
3.1
3.3
V
VUVBIAS
400
mV
Thermal Shutdown Threshold
+175
NC
Thermal-Shutdown Threshold
Hysteresis
15
NC
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Maxim Integrated │ 2
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Electrical Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, CBIAS = 1FF, RFOSC = 12kI, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values
are at TA = +25NC.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
4.925
5
5.075
V
4.925
5
5.15
V
10
V
OUTPUT VOLTAGE (OUT)
Output Voltage
VOUT
Skip-Mode Output Voltage
VOUT_SKIP
VFB = VBIAS, normal operation
No load, VFB = VBIAS
Adjustable Output Voltage
Range
VOUT_ADJ
FB connected to external resistive divider
1
Load Regulation
VFB = VBIAS, 30mA < ILOAD < 2A
0.5
%
Line Regulation
VFB = VBIAS, 6V < VSUPSW < 36V
High-side on, VBST - VLX = 5V
0.02
%/V
BST Input Current
IBST_ON
LX Current Limit
Skip-Mode Threshold
ILX
(Note 2)
2.4
ISKIP_TH
Spread Spectrum
Power-Switch On-Resistance
RON
High-Side Switch Leakage
Current
1.5
2.5
3
4
mA
A
300
mA
Spread spectrum enabled
6
%
RON measured between SUPSW and LX,
ILX = 1A, VBIAS = 5V
70
VSUP = 36V, VLX = 0V, TA = +25°C
150
mI
1
FA
TRANSCONDUCTANCE AMPLIFIER (COMP)
FB Input Current
IFB
FB Regulation Voltage
VFB
FB Line Regulation
DVLINE
Transconductance (from FB to
COMP)
Minimum On-Time
gm
10
FB connected to an external resistive
divider; 0°C < TA < +125°C
0.99
FB connected to an external resistive
divider; -40°C < TA < +125°C
0.985
DCMAX
1.01
V
1.0
1.015
6V < VSUP < 36V
0.02
%/V
VFB = 1V, VBIAS = 5V (Note 2)
900
FS
80
ns
tON_MIN
Maximum Duty Cycle
1.0
nA
fSW = 2.2MHz
98
fSW = 1MHz
99
%
OSCILLATOR FREQUENCY
Oscillator Frequency
RFOSC = 12kI
2.05
2.20
2.35
MHz
1
FA
EXTERNAL CLOCK INPUT (FSYNC)
FSYNC Input Current
External Input Clock Acquisition
Time
TA at +25°C
tFSYNC
External Input Clock Frequency
External Input Clock
High Threshold
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1
(Note 2)
VFSYNC_HI
VFSYNC rising
Cycles
fOSC +
10%
Hz
1.4
V
Maxim Integrated │ 3
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Electrical Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, CBIAS = 1FF, RFOSC = 12kI, TA = TJ = -40NC to +125NC, unless otherwise noted. Typical values
are at TA = +25NC.)
PARAMETER
External Input Clock
Low Threshold
Soft-Start Time
SYMBOL
VFSYNC_LO
CONDITIONS
MIN
TYP
VFSYNC falling
tSS
MAX
UNITS
0.4
V
8.5
ms
ENABLE INPUT (EN)
Enable Input-High Threshold
VEN_HI
Enable Input-Low Threshold
VEN_LO
Enable Threshold Voltage
Hysteresis
VEN,HYS
Enable Input Current
IEN
2
V
0.9
0.2
TA = +25NC
V
V
1
FA
%VFB
RESET
Output Overvoltage Trip
Threshold
PGOOD Switching Level
VOUT_OV
VTH_RISING
VTH_FALLING
VFB rising, VPGOOD = high
VFB falling, VPGOOD = low
PGOOD Debounce
PGOOD Output Low Voltage
ISINK = 5mA
PGOOD Leakage Current
VOUT in regulation, TA = +25NC
105
110
115
93
95
97
90
92.5
95
10
35
60
Fs
0.4
V
1
FA
%VFB
Note 2: Guaranteed by design; not production tested.
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Maxim Integrated │ 4
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Typical Operating Characteristics
(VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFSYNC = 0V, RFOSC = 12.1kHz, TA = +25NC, unless otherwise noted.)
NO-LOAD STARTUP BEHAVIOR
(5V/2.2MHz)
FULL-LOAD STARTUP BEHAVIOR
MAX16977 toc01
MAX16977 toc02
5V/2.2MHz
RESISTIVE LOAD = 2.5Ω
5V/div
SUP SHORTED TO SUPSW
5V/div
VIN
VIN
0V
0V
2V/div
VOUT
2V/div
VOUT
0V
1A/div
0A
5V/div
0V
ILOAD
VPGOOD
0V
10V/div
0V
VPGOOD
2ms/div
2ms/div
70
60
50
40
70
60
3.3V
50
8V
40
5V
30
ISUP + ISUPSW
80
75
70
60
55
fSW = 2.2MHz
L1 = 2.2µH (WURTH 744311220)
D1: D360B-13-F FROM DIODES, INC.
50
0.0001
SUPPLY VOLTAGE (V)
0.001
0.01
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
0.1
ILOAD (A)
LOAD CURRENT (A)
2.5
2.0
1.5
1.0
VIN = 14V
ILOAD = 1.5A
3.0
SWITCHING FREQUENCY (MHz)
MAX16977 toc06
3.0
MAX16977 toc07
SWITCHING FREQUENCY vs. LOAD CURRENT
(5V/2.2MHz)
SWITCHING FREQUENCY vs. RFOSC
SWITCHING FREQUENCY (MHz)
85
10
0
5V
65
0
0.5
90
20
5.5 9.0 12.5 16.0 19.5 23.0 26.5 30.0 33.5
3.3V
MAX16977 toc05
80
8V
95
EFFICIENCY (%)
80
D1: B360B-13-F FROM DIODES, INC.
L1: WURTH 744311220
90
100
MAX16977 toc04
MAX16977 toc03
90
30
20
10
0
100
EFFICIENCY (%)
SUPPLY CURRENT (µA)
120
110
100
EFFICIENCY vs. LOAD CURRENT
(VIN = 14V)
EFFICIENCY vs. LOAD CURRENT
(VIN = 14V)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(5V/2.2MHz)
VIN = 14V
2.5
2.0
1.5
1.0
0.5
0
0
12
15
18
RFOSC (kI)
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21
24
0
0.5
1.0
1.5
2.0
ILOAD (A)
Maxim Integrated │ 5
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Typical Operating Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFSYNC = 0V, RFOSC = 12.1kHz, TA = +25NC, unless otherwise noted.)
LOAD-TRANSIENT RESPONSE
(SKIP MODE)
LINE-TRANSIENT RESPONSE
(5V/2.2MHz)
MAX16977 toc08
MAX16977 toc09
5V/2.2MHz
VOUT
(AC-COUPLED)
100mV/div
ILOAD
VOUT
AC-COUPLED
50mV/div
100mA/div
1A/div
500mA
0A
ILOAD
0
100µs/div
100µs/div
FSYNC TRANSITION FROM INTERNAL TO EXTERNAL FREQUENCY
(3.3V/2.2MHz CONFIGURATION)
UNDERVOLTAGE PULSE
(5V/2.2MHz)
MAX16977 toc11
MAX16977 toc10
fFSYNC = 2.475MHz
VIN
5V/div
5V/div
RESISTIVE LOAD = 2.5Ω
VLX
0V
2V/div
VFSYNC
0V
5V/div
VLX
0V
20V/div
0V
VBIAS
5V/div
0V
10ms/div
OUTPUT RESPONSE TO SLOW INPUT RAMP
(ILOAD = 2A)
MAX16977 toc13
MAX16977 toc12
5V/2.2MHz
42V
VIN
10V/div
10V/div
14V
0V
VIN
5V/div
0V
VOUT
0V
VOUT
10V/div
VLX
0V
5V/div
0V
5V/2.2MHz
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2A/div
0A
ILOAD
100ms/div
0V
VOUT
200ns/div
LOAD DUMP TEST
3.5V
4s/div
Maxim Integrated │ 6
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Typical Operating Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFSYNC = 0V, RFOSC = 12.1kHz, TA = +25NC, unless otherwise noted.)
SHORT CIRCUIT TO GROUND TEST
(5V/2.2MHz)
5.10
VIN = 14V
5.08
2V/div
VOUT
5.06
5.04
5V/div
0V
VOUT (V)
0V
VPGOOD
MAX16977 toc15
VOUT LOAD REGULATION
(5V/2.2MHz)
MAX16977 toc14
5.02
5.00
4.98
4.96
ILX
10A/div
4.94
0A
4.92
4.90
10ms/div
0
0.4
0.8
1.2
1.6
2.0
ILOAD (A)
VOUT vs. TEMPERATURE
(5V/2.2MHz)
5.06
5.04
5.04
5.02
5.02
5.00
4.98
ILOAD = 0A
ILOAD = 3A
4.96
5.00
4.98
4.96
4.94
4.94
4.92
4.92
4.90
4.90
6
-40 -25 -10 5 20 35 50 65 80 95 110 125
5.08
5.06
5.02
VBIAS (V)
5.04
5.00
4.98
4.94
4.94
4.92
4.92
4.90
4.90
18
24
30
36
TA = -40°C
4.98
4.96
12
18
5.00
4.96
SUPPLY VOLTAGE (V)
16
MAX16977 toc19
MAX16977 toc18
5.10
5.02
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14
BIAS LOAD REGULATION
(5V/2.2MHz)
5.04
6
12
VOUT LINE REGULATION
(5V/2.2MHz)
5.06
0
10
SUPPLY VOLTAGE (V)
ILOAD = 0A
5.08
8
TEMPERATURE (°C)
5.10
VOUT (V)
ILOAD = 2A
5.08
VOUT (V)
VOUT (V)
5.06
MAX16977 toc17
VIN = 14V
5.08
5.10
MAX16977 toc16
5.10
VOUT LINE REGULATION
(5V/2.2MHz)
TA = +125°C
0
2
4
TA = +25°C
6
8
10 12 14 16 18 20
IBIAS (mA)
Maxim Integrated │ 7
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Typical Operating Characteristics (continued)
(VSUP = VSUPSW = 14V, VEN = 14V, VOUT = 5V, VFSYNC = 0V, RFOSC = 12.1kHz, TA = +25NC, unless otherwise noted.)
ISHDN vs. SUPPLY VOLTAGE
16
TA = +125°C
12
8
6
5.6
5.4
TA = +25°C
10
5.2
5.0
4.8
4.6
TA = -40°C
4
4.4
2
4.2
0
VEN = 0V
VIN = 14V
5.8
ISHDN (µA)
14
MAX16977 toc21
VEN = 0V
18
ISHDN (µA)
ISHDN vs. TEMPERATURE
6.0
MAX16977 toc20
20
4.0
3
10
17
24
31
38
-40 -25 -10 5 20 35 50 65 80 95 110 125
45
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
DIPS AND DROP TEST
LINE-TRANSIENT RESPONSE
(ILOAD = 2A)
MAX16977 toc22
MAX16977 toc23
5V/2.2MHz
5V/2.2MHz
VIN
5V/div
0V
20V/div
0V
VLX
5V/div
0V
VPGOOD
10ms/div
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5V
5V/div
0V
VOUT
14V
VIN
10V/div
0V
VOUT
5V/div
0V
10V/div
VLX
0V
VPGOOD
5V/div
0V
10ms/div
Maxim Integrated │ 8
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
SUPSW
SUPSW
LX
LX
16 15 14 13 12 11 10
TOP VIEW
BST
SUP
LX
LX
SUPSW
EN
I.C.
TOP VIEW
SUPSW
Pin Configurations
12
11
10
9
9
EN 13
I.C. 14
FSYNC 15
8
1
GND
PGOOD
TSSOP
2
3
4
COMP
7
BIAS
PGOOD
6
COMP
FOSC
5
FB
FSYNC
4
OUT
3
EP
+
FB
FOSC 16
OUT
EP
+
2
SUP
7
BST
6
GND
5
BIAS
MAX16977
MAX16977
1
8
TQFN
(5mm × 5mm)
Pin Descriptions
PIN
NAME
FUNCTION
15
FSYNC
Synchronization Input. The device synchronizes to an external signal applied to FSYNC.
The external clock frequency must be 10% greater than the internal clock frequency for
proper operation. Connect FSYNC to GND if the internal clock is used.
2
16
FOSC
Resistor-Programmable Switching-Frequency Setting Control Input. Connect a resistor
from FOSC to GND to set the switching frequency.
3
1
PGOOD
Open-Drain, Active-Low Output. PGOOD asserts when VOUT is below the 92.5% regulation point. PGOOD deasserts when VOUT is above the 95% regulation point.
4
2
OUT
Switch Regulator Output. OUT also provides power to the internal circuitry when the output voltage of the converter is set between 3V and 5V during standby mode.
5
3
FB
6
4
COMP
7
5
BIAS
Linear-Regulator Output. BIAS powers up the internal circuitry. Bypass with a 1FF
capacitor to ground.
8
6
GND
Ground
9
7
BST
High-Side Driver Supply. Connect a 0.1FF capacitor between LX and BST for proper
operation.
TSSOP
TQFN
1
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Feedback Input. Connect an external resistive divider from OUT to FB and GND to set
the output voltage. Connect to BIAS to set the output voltage to 5V.
Error-Amplifier Output. Connect an RC network from COMP to GND for stable operation.
See the Compensation Network section for more details.
Maxim Integrated │ 9
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Pin Descriptions (continued)
PIN
NAME
FUNCTION
TSSOP
TQFN
10
8
SUP
11, 12
9, 10
LX
13, 14
11, 12
SUPSW
15
13
EN
SUP Voltage-Compatible Enable Input. Drive EN low to disable the device. Drive EN
high to enable the device.
16
14
I.C.
Internally Connected. Connect to ground for proper operation.
—
—
EP
Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective
power dissipation. Do not use as the only IC ground connection. EP must be connected
to GND.
Voltage Supply Input. SUP powers up the internal linear regulator. Connect a 1FF
capacitor to ground.
Inductor Switching Node. Connect a Schottky diode between LX and GND.
Internal High-Side Switch-Supply Input. SUPSW provides power to the internal switch.
Connect a 1FF and 4.7FF capacitor to ground.
Internal Block Diagram
OUT
FB
COMP
FBSW
PGOOD
FBOK
EN
SUP
AON
HVLDO
BIAS
SWITCHOVER
BST
SUPSW
EAMP
LOGIC
PWM
HSD
REF
LX
CS
SOFTSTART
SLOPE
COMP
OSC
FSYNC
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MAX16977
FOSC
Maxim Integrated │ 10
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Detailed Description
needs to maintain a well-regulated output voltage using
an input voltage that varies from 9V to 18V. Additionally,
the device incorporates an innovative design for fast-loop
response that further ensures good output-voltage regulation during transients.
The MAX16977 is a constant-frequency, current-mode,
automotive buck converter with an integrated high-side
switch. The device operates with input voltages from
3.5V to 36V and tolerates input transients up to 42V.
During undervoltage events, such as cold-crank conditions, the internal pass device maintains 98% duty cycle.
System Enable (EN)
The switching frequency is resistor programmable from
1MHz to 2.2MHz to allow optimization for efficiency, noise,
and board space. A synchronization input, FSYNC, allows
the device to synchronize to an external clock frequency.
An enable-control input (EN) activates the device from its
low-power shutdown mode. EN is compatible with inputs
from automotive battery level down to 3.3V. The highvoltage compatibility allows EN to be connected to SUP,
KEY/KL30, or the INH pin of a CAN transceiver.
During light-load conditions, the device enters skip mode
for high efficiency. The 5V fixed output voltage eliminates
the need for external resistors and reduces the supply
current to 30FA. See the Internal Block Diagram for more
information.
EN turns on the internal regulator. Once VBIAS is above
the internal lockout threshold, VUVL = 3.1V (typ), the converter activates and the output voltage ramps up within
8.5ms.
Wide Input Voltage Range (3.5V to 36V)
The device includes two separate supply inputs, SUP
and SUPSW, specified for a wide 3.5V to 36V input voltage range. VSUP provides power to the device, and
VSUPSW provides power to the internal switch. When
the device is operating with a 3.5V input supply, certain
conditions such as cold crank can cause the voltage at
SUPSW to drop below the programmed output voltage.
As such, the device operates in a high duty-cycle mode
to maintain output regulation.
Linear-Regulator Output (BIAS)
The device includes a 5V linear regulator, BIAS, that
provides power to the internal circuitry. Connect a 1FF
ceramic capacitor from BIAS to GND.
External Clock Input (FSYNC)
The device synchronizes to an external clock signal
applied at FSYNC. The signal at FSYNC must have a
10% higher frequency than the internal clock frequency
for proper synchronization.
Soft-Start
The device includes an 8.5ms fixed soft-start time for up
to 500FF capacitive load with a 2A resistive load.
Minimum On-Time
The device features a 80ns minimum on-time that ensures
proper operation at 2.2MHz switching frequency and high
differential voltage between the input and the output. This
feature is extremely beneficial in automotive applications
where the board space is limited and the converter
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A logic-low at EN shuts down the device. During shutdown, the internal linear regulator and gate drivers turn
off. Shutdown is the lowest power state and reduces the
quiescent current to 5FA (typ). Drive EN high to bring the
device out of shutdown.
Overvoltage Protection
The device includes overvoltage protection circuitry that
protects the device when there is an overvoltage condition at the output. If the output voltage increases by more
than 110% of its set voltage, the device stops switching.
The device resumes regulation once the overvoltage
condition is removed.
Fast Load-Transient Response
Current-mode buck converters include an integrator
architecture and a load-line architecture. The integrator architecture has large loop gain but slow transient
response. The load-line architecture has fast transient
response but low loop gain. The device features an
integrator architecture with innovative design to improve
transient response. Thus, the device delivers high outputvoltage accuracy, plus the output can recover quickly
from a transient overshoot, which could damage other
on-board components during load transients.
Overload Protection
The overload protection circuitry is triggered when the
device is in current limit and VOUT is below the reset
threshold. Under these conditions the device turns off
the high-side switch for 16ms and re-enters soft-start. If
the overload condition is still present, the device repeats
the cycle.
Maxim Integrated │ 11
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
Skip Mode/Standby Mode
ramps up 6% in 200μs and then ramps down 6% and
back to 2.2MHz in 200μs. The cycle repeats. The 400μs
modulation period is fixed for other fOSC frequency. The
internal spread spectrum is disabled if the IC is synced
to an external clock. However, the IC accepts an external
spread-spectrum clock.
During light-load operation, IINDUCTOR P 185mA, the
device enters skip mode operation. Skip mode turns off
the majority of circuitry and allows the output to drop
below regulation voltage before the switch is turned on
again. The lower the load current, the longer it takes for
the regulator to initiate a new cycle. Because the converter skips unnecessary cycles and turns off the majority
of circuitry, the converter efficiency increases. When the
high-side FET stops switching for more than 50Fs, most
of the internal circuitry, including LDO, draws power from
VOUT (for VOUT = 3V to 5.5V), allowing current consumption from the battery to drop to only 30FA.
Spread Spectrum
The IC has an internal spread-spectrum option to optimize
EMI performance. This is factory set and the S-version of
the IC should be ordered. For spread-spectrum-enabled
ICs, the operating frequency is varied ±6% up from the
base 2.2MHz frequency. The modulation signal is a triangular wave with a period of 400μs. Therefore, fOSC
VOUT
Thermal-overload protection limits the total power dissipation in the device. When the junction temperature exceeds
+175NC (typ), an internal thermal sensor shuts down the
internal bias regulator and the step-down converter, allowing the IC to cool. The thermal sensor turns on the IC again
after the junction temperature cools by 15NC.
Applications Information
Setting the Output Voltage
Connect FB to BIAS for a fixed 5V output voltage. To set
the output to other voltages between 1V and 10V, connect a resistive divider from output (OUT) to FB to GND
(Figure 1). Calculate RFB1 (OUT to FB resistor) with the
following equation:
V
=
R FB1 R FB2 OUT − 1
VFB
RFB1
MAX16977
Overtemperature Protection
FB
where VFB = 1V (see the Electrical Characteristics table).
RFB2
Internal Oscillator
Figure 1. Adjustable Output-Voltage Setting
SWITCHING FREQUENCY vs. RFOSC
MAX16977 toc06
SWITCHING FREQUENCY (MHz)
3.0
2.5
2.0
The switching frequency (fSW) is set by a resistor (RFOSC)
connected from FOSC to GND. See Figure 2 to select the
correct RFOSC value for the desired switching frequency.
For example, a 2.2MHz switching frequency is set with
RFOSC = 12kI. Higher frequencies allow designs with
lower inductor values and less output capacitance.
Consequently, peak currents and I2R losses are lower
at higher switching frequencies, but core losses, gate
charge currents, and switching losses increase.
Inductor Selection
1.5
1.0
VIN = 14V
ILOAD = 1.5A
0.5
0
12
15
18
21
24
Three key inductor parameters must be specified for
operation with the device: inductance value (L), inductor
saturation current (ISAT), and DC resistance (RDCR). To
select inductance value, the ratio of inductor peak-topeak AC current to DC average current (LIR) must be
selected first. A good compromise between size and loss
is a 30% peak-to-peak ripple current to average-current
RFOSC (kI)
Figure 2. Switching Frequency vs. RFOSC
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Maxim Integrated │ 12
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
ratio (LIR = 0.3). The switching frequency, input voltage,
output voltage, and selected LIR then determine the
inductor value as follows:
Table 1. Inductor Size Comparison
INDUCTOR SIZE
V
(V
− VOUT )
L = OUT SUP
VSUP fSWI OUTLIR
where VSUP, VOUT, and IOUT are typical values (so that
efficiency is optimum for typical conditions). The switching frequency is set by RFOSC (see the Internal Oscillator
section). The exact inductor value is not critical and can
be adjusted to make trade-offs among size, cost, efficiency, and transient response requirements. Table 1 shows
a comparison between small and large inductor sizes.
SMALLER
LARGER
Lower price
Smaller ripple
Smaller form factor
Higher efficiency
Faster load response
Larger fixed-frequency
range in skip mode
The input capacitor RMS current requirement (IRMS) is
defined by the following equation:
IRMS = ILOAD(MAX)
VOUT (VSUP − VOUT )
The inductor value must be chosen so that the maximum
inductor current does not reach the device’s minimum
current limit. The optimum operating point is usually
found between 25% and 35% ripple current. When pulse
skipping (FSYNC low and light loads), the inductor value
also determines the load-current value at which PFM/
PWM switchover occurs.
IRMS has a maximum value when the input voltage
equals twice the output voltage (VSUP = 2VOUT), so
IRMS(MAX) = ILOAD(MAX)/2.
Find a low-loss inductor having the lowest possible
DC resistance that fits in the allotted dimensions. Most
inductor manufacturers provide inductors in standard
values, such as 1.0FH, 1.5FH, 2.2FH, 3.3FH, etc. Also
look for nonstandard values, which can provide a better compromise in LIR across the input voltage range. If
using a swinging inductor (where the no-load inductance
decreases linearly with increasing current), evaluate
the LIR with properly scaled inductance values. For
the selected inductance value, the actual peak-to-peak
inductor ripple current (DIINDUCTOR) is defined by:
The input-voltage ripple is composed of DVQ (caused
by the capacitor discharge) and DVESR (caused by the
equivalent series resistance (ESR) of the capacitor). Use
low-ESR ceramic capacitors with high ripple-current
capability at the input. Assume the contribution from the
ESR and capacitor discharge equal to 50%. Calculate
the input capacitance and ESR required for a specified
input-voltage ripple using the following equations:
VOUT (VSUP − VOUT )
∆IINDUCTOR =
VSUP × fSW × L
Choose an input capacitor that exhibits less than 10NC
self-heating temperature rise at the RMS input current for
optimal long-term reliability.
ESRIN =
where
where DIINDUCTOR is in A, L is in H, and fSW is in Hz.
Ferrite cores are often the best choices, although powdered iron is inexpensive and can work well at 200kHz.
The core must be large enough not to saturate at the
peak inductor current (IPEAK):
∆I
IPEAK ILOAD(MAX) + INDUCTOR
=
2
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
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VSUP
and
∆VESR
∆I
I OUT + L
2
(V
− VOUT ) × VOUT
∆IL = SUP
VSUP × fSW × L
I
× D(1 − D)
VOUT
CIN = OUT
and D =
∆VQ × fSW
VSUPSW
where IOUT is the maximum output current, and D is the
duty cycle.
Output Capacitor
The output filter capacitor must have low enough ESR to
meet output ripple and load-transient requirements, yet
have high enough ESR to satisfy stability requirements.
Maxim Integrated │ 13
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
The output capacitance must be high enough to absorb
the inductor energy while transitioning from full-load
to no-load conditions without tripping the overvoltage
fault protection. When using high-capacitance, low-ESR
capacitors, the filter capacitor’s ESR dominates the
output-voltage ripple. So the size of the output capacitor depends on the maximum ESR required to meet the
output-voltage ripple (VRIPPLE(P-P)) specifications:
Compensation Network
VRIPPLE(P-P) = ESR × ILOAD(MAX) × LIR
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as
to the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value.
When using low-capacity filter capacitors, such as
ceramic capacitors, size is usually determined by the
capacity needed to prevent voltage droop and voltage rise from causing problems during load transients.
Generally, once enough capacitance is added to meet
the overshoot requirement, undershoot at the rising load
edge is no longer a problem. However, low-capacity filter
capacitors typically have high-ESR zeros that can affect
the overall stability.
Rectifier Selection
The device requires an external Schottky diode rectifier as a freewheeling diode. Connect this rectifier close
to the device using short leads and short PCB traces.
Choose a rectifier with a voltage rating greater than the
maximum expected input voltage, VSUPSW. Use a low
forward-voltage-drop Schottky rectifier to limit the negative voltage at LX. Avoid higher than necessary reversevoltage Schottky rectifiers that have higher forwardvoltage drops.
VOUT
R1
The device uses an internal transconductance error
amplifier with its inverting input and its output available
to the user for external frequency compensation. The
output capacitor and compensation network determine
the loop stability. The inductor and the output capacitor are chosen based on performance, size, and cost.
Additionally, the compensation network optimizes the
control-loop stability.
The controller uses a current-mode control scheme that
regulates the output voltage by forcing the required current
through the external inductor. The device uses the voltage drop across the high-side MOSFET to sense inductor
current. Current-mode control eliminates the double pole
in the feedback loop caused by the inductor and output
capacitor, resulting in a smaller phase shift and requiring
less elaborate error-amplifier compensation than voltagemode control. Only a simple single-series resistor (RC)
and capacitor (CC) are required to have a stable, highbandwidth loop in applications where ceramic capacitors
are used for output filtering (Figure 3). For other types of
capacitors, due to the higher capacitance and ESR, the
frequency of the zero created by the capacitance and
ESR is lower than the desired closed-loop crossover frequency. To stabilize a nonceramic output capacitor loop,
add another compensation capacitor (CF) from COMP to
GND to cancel this ESR zero.
The basic regulator loop is modeled as a power modulator, output feedback divider, and an error amplifier. The
power modulator has a DC gain set by gmc x RLOAD,
with a pole and zero pair set by RLOAD, the output
capacitor (COUT), and its ESR. The following equations
allow to approximate the value for the gain of the power
modulator (GAINMOD(DC)), neglecting the effect of the
ramp stabilization. Ramp stabilization is necessary when
the duty cycle is above 50% and is internally done for
the device.
GAINMOD(DC)
= g mc × R LOAD
COMP
gm
R2
VREF
RC
where RLOAD = VOUT/ILOUT(MAX) in I and gmc = 3S.
CF
CC
Figure 3. Compensation Network
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Maxim Integrated │ 14
MAX16977
36V, 2A, 2.2MHz Step-Down Converter
with Low Operating Current
In a current-mode step-down converter, the output
capacitor, its ESR, and the load resistance introduce a
pole at the following frequency:
The total loop gain as the product of the modulator gain,
the feedback voltage-divider gain, and the error-amplifier
gain at fC should be equal to 1. So:
fpMOD =
1
2π × C OUT × R LOAD
The output capacitor and its ESR also introduce a zero at:
fzMOD =
1
2π × ESR × C OUT
When COUT is composed of “n” identical capacitors
in parallel, the resulting COUT = n x COUT(EACH) and
ESR = ESR(EACH)/n. Note that the capacitor zero for a
parallel combination of alike capacitors is the same as
for an individual capacitor.
The feedback voltage-divider has a gain of GAINFB =
VFB/VOUT, where VFB is 1V (typ).
The transconductance-error amplifier has a DC gain of
GAINEA(DC) = gm,EA x ROUT,EA, where gm,EA is the
error-amplifier transconductance, which is 900FS (typ),
and ROUT,EA is the output resistance of the error amplifier.
A dominant pole (fdpEA) is set by the compensation capacitor (CC) and the amplifier output resistance
(ROUT,EA). A zero (fzEA) is set by the compensation
resistor (RC) and the compensation capacitor (CC).
There is an optional pole (fpEA) set by CF and RC to
cancel the output capacitor ESR zero if it occurs near
the crossover frequency (fC, where the loop gain equals
1 (0dB)). Thus:
1
fpdEA =
2π × C C × (R OUT,EA + R C )
fzEA =
1
2π × C C × R C
1
fpEA =
2π × C F × R C
The loop-gain crossover frequency (fC) should be set
below 1/5th of the switching frequency and much higher
than the power-modulator pole (fpMOD):
f
fpMOD
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