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MAX25255DAFDG/VY+

MAX25255DAFDG/VY+

  • 厂商:

    AD(亚德诺)

  • 封装:

    PowerWFQFN23

  • 描述:

    降压 开关稳压器 IC 正 固定 3.3V,5V 2 输出 6A,6A 23-PowerWFQFN

  • 数据手册
  • 价格&库存
MAX25255DAFDG/VY+ 数据手册
Click here to ask an associate for production status of specific part numbers. Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level MAX25254/MAX25255 General Description Benefits and Features The MAX25254/MAX25255 are small, synchronous dual buck converters with integrated high-side and low-side switches. The ICs are designed to deliver up to 8A per channel with input voltages from 3V to 36V while using only 12μA quiescent current at no load. Voltage quality can be monitored by observing the PGOOD signals. The MAX25254/MAX25255 can regulate the output voltage in the dropout region by running at 99% of the duty cycle, making them ideal for automotive and industrial applications. Dual Buck Converter The MAX25254/MAX25255 offer two fixed output voltages of 5V and 3.3V. Four fixed frequency options allow for small external components and reduced output ripple, and also guarantee no AM interference. The MAX25254/MAX25255 can enter skip mode at light loads with ultra-low quiescent current of 12μA at no load. The MAX25254/MAX25255 can be ordered with spread spectrum enabled for optimum EMI performance. Two buck converters within the MAX25254D and MAX25255D can be configured for dual-phase operation with up to 16A output load capability. Furthermore, the MAX25254D/MAX25255D and the MAX25254Q/ MAX25255Q can be used in parallel to provide quadphase operation that supports up to 32A (max) output current. The MAX25254/MAX25255 are available in a small, 4.50mm x 5.75mm, 23-pin FC2QFN package and use very few external components. Applications • • • • • Front-End Power Supply for Head Units ASIL Applications General-Purpose Dual Buck Converters Telematics Modules Front Camera Power • • • • • • • Wide Input Range from 3.0V to 36V (42V, max) Low Shutdown Supply Current (6.5µA, max) Low Operating Quiescent Current with One Channel ON (12µA, typ) Programmable VOUT from 0.8V to 14V Up to 8A per Channel 180° Out-of-Phase Operation between Two Converters 24ns (typ) Minimum On-Time Dual/Quad-Phase Operation • • • Ability to Operate Two ICs in Parallel for Quad-Phase Operation ±10% Current Sharing Accuracy Supports up to 16A in Dual-Phase and 32A in QuadPhase Diagnostics and Redundant Circuits (MAX25255) • • • • ASIL B Compliant Redundant Reference Die Temperature Monitor Precision Overvoltage and Undervoltage Protection General • • • • • 23-Pin, 4.50mm x 5.75mm FC2QFN Package -40°C to +125°C Operating Ambient Temperature AEC-Q100 Rating 200kHz, 400kHz, 1MHz, or 2MHz Switching Frequency Options Spread Spectrum Ordering Information appears at end of data sheet. 19-101441; Rev 7; 9/23 © 2023 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Simplified Block Diagram PGOOD1 VEA AGND BIAS EXTVCC TEMP PGOOD2 SUP1 PGOOD1_OUTB POR OUT1/ FB1 FEEDB ACK LOGIC SELE CT INTERNA L SOFT-START PGOOD LOGIC THERMAL SHUTDOW N BG INTERNAL LINEAR REGULATOR SECONDARY1 PGOOD LOGIC TEMPSNS POR SWITCHOVER PGOOD2_OUTB POR SECONDARY2 OSCILLATOR VOLTAGE EAMP VOLTAGE EAMP BG_AS ILB FEEDB ACK LOGIC SELE CT OUT2/ FB2 INTERNAL SOFT-START VREF VREF VOUT1 AVERAGE CURRENT SENSE VOUT2 PWM PWM ASIL B UV1 & OV1 ASILB UV2 & OV2 ILIM THRESHOLD ILIM THRESHOLD UV1 OV1 BST1 AVERAGE CURRENT SENSE OV2 UV2 BIAS BST2 BIAS CLK UVLO POR SUP1 PWM1 BIAS PGND1 GATE DRIVE LOGIC CLK2 CLK2 STEP-DOW N DC-DC2 EN2 EXTERNAL CLOCK EN1 PWM2 PGOOD2_OUTB EN1 GATE DRIVE LOGIC SYNC TIED HI (PW M MODE) SYNC TIED LO (SKIP MODE) EN2 SYNC AND SYNCOUT EN1 www.analog.com DIGTOP PGOOD1 _OUTB STEP-DOW N DC-DC1 LX1 SECONDARY2 CLK1 CLK1 SUP2 TEMPSENS_EN SECONDARY1 SYNCOUT SYNC LX2 BIAS PGND2 EN2 Analog Devices | 2 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Absolute Maximum Ratings SUP_, EN_ to PGND_ ........................................ -0.3V to +42V EXTVCC to AGND ............................................... -0.3V to +16V BST_ to LX_ ....................................................... -0.3V to +2.2V PGND_ to AGND ................................................ -0.3V to +0.3V BST_ to PGND_ .................................................. -0.3V to +44V BIAS, SPS to AGND ........................................... -0.3V to +2.2V LX_ to PGND_ .......................................... -0.3V to SUP_+0.3V LX_ Continuous RMS Current .............................................10A SYNCOUT, SYNC to AGND ................................. -0.3V to +6V ESD Protection (Human Body Model) ............................... ±2kV PGOOD1, PGOOD2 to AGND .............................. -0.3V to +6V Operating Temperature Range....................... -40°C to +150°C OUT1/FB1, OUT2/FB2 to AGND .......................... -0.3V to +6V Storage Temperature Range .......................... -65°C to +150°C VEA, TEMP to AGND................................. -0.3V to BIAS+0.3V Lead Temperature (soldering, 10s) ............................... +300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Information 23 FC2QFN Package Code F234A5FY+1 Outline Number 21-100477 Land Pattern Number 90-100168 THERMAL PARAMETERS 4-LAYER JEDEC BOARD 4-LAYER EV KIT Junction-to-Ambient Thermal Resistance (θJA) 27.2°C/W 18.5°C/W Junction-to-Case (Top) Thermal Resistance (θJCt) 9.7°C/W — Junction-to-Case (Bottom) Thermal Resistance (θJCb) 4.8°C/W 5.5°C/W Junction-to-Board Thermal Resistance (θJB) 6.9°C/W 7.9°C/W Junction-to-Top Characterization Parameter (ΨJT) 0.56°C/W 0.58°C/W Junction-to-Board Characterization Parameter (ΨJB) 7.0°C/W 7.9°C/W For the latest package outline information and land patterns (footprints), go to https://www.analog.com/en/design-center/packagingquality-symbols-footprints/package-index.html. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Electrical Characteristics (VSUP1 = VSUP2 = 14V, VEN1 = VEN2 = 14V, TJ = -40°C to +150°C, unless otherwise noted. Typical values are at TA = +25°C) PARAMETER Supply Voltage Range Load-Dump Event Supply Voltage Shutdown Supply Current Supply Current www.analog.com SYMBOL CONDITIONS MAX UNITS 36 V tLD < 1s 42 V VEN1 = VEN2 = 0V, TA = +25°C 6.5 µA VSUP1, VSUP2 VSUP_LD ISHDN ISUP MIN TYP 3 VEN1 = VSUP1 = VSUP2, VOUT1 = 3.3V, VEN2 = 0V, VOUT2 = 0V, VEXTVCC = VOUT1, no load, non-ASIL, no switching, TA = +25°C VEN1 = VEN2 = VSUP1 = VSUP2, VOUT1 = VOUT2 = 3.3V, VEXTVCC = VOUT1, no load, non-ASIL, no switching, TA = +25°C VEN1 = VEN2 = VSUP1 = VSUP2, VOUT1 = 3.3V, VOUT2 = 5.0V, VEXTVCC = 12 µA 17 18 Analog Devices | 3 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level (VSUP1 = VSUP2 = 14V, VEN1 = VEN2 = 14V, TJ = -40°C to +150°C, unless otherwise noted. Typical values are at TA = +25°C) PARAMETER SYMBOL CONDITIONS VOUT1, no load, non-ASIL, no switching, TA = +25°C VEN1 = VSUP1, VEN2 = 0V, VOUT1 = 5.0V, VOUT2 = 0V, VEXTVCC = VOUT1, no load, non-ASIL, no switching, TA = +25°C VEN1 = VSUP1, VOUT1 = 3.3V, VEN2 = 0V, VOUT2 = 0V, VEXTVCC = VOUT1, no load, ASIL, no switching, TA = +25°C VEN1 = VEN2 = VSUP1 = VSUP2, VFB1 = VFB2 = 0.815V, VEXTVCC = 3.3V, no load, non-ASIL, no switching, TA = +25°C VEN1 = VSUP1 = VSUP2, VEN2 = 0V, VFB1 = 0.815V, VFB2 = floating, VEXTVCC = 5V, no load, non-ASIL, no switching, TA = +25°C VEN1 = VSUP1 = VSUP2, VEN2 = 0V, VFB1 = 0.815V, VFB2 = floating, VEXTVCC = 3.3V, no load, non-ASIL, no switching, TA = +25°C SUP Undervoltage Lockout VSUP_UVLO BIAS Undervoltage Lockout VBIAS_UVLO VOUT_SKIP Voltage Accuracy VOUT_PWM Undervoltage Threshold Range 140 180 12 14 9.7 Falling threshold 2.64 2.73 2.88 BIAS falling 1.53 1.59 1.63 BIAS rising VOUT = 3.3V to 5.0V (internal fixed), skip mode, no load, TA = -40°C to +125°C VOUT = 3.3V to 5.0V (internal fixed), PWM mode, TA = -40°C to +125°C 1.62 1.66 1.69 -2.0 +2.5 -2 +2 102.5 110.0 MAX25255 External feedback option 4 options, 2.5% step 107.5 97.5 MAX25254 % 90.0 % 92.5 Percentage of nominal output, VOUT = 3.3V to 5.0V Percentage of nominal output, VOUT = 3.3V to 5.0V -1 +1 % -2 35 MAX25254 MAX25255 V 110.0 MAX25254 MAX25255 V % Fixed output option MAX25254 MAX25254 www.analog.com 100 3.18 4 options, 2.5% step UNITS 18 3.03 MAX25255 Active Timeout Period MAX 2.93 Overvoltage/ Undervoltage Threshold Accuracy Overvoltage/ Undervoltage Propagation Delay TYP Rising threshold MAX25255 Overvoltage Threshold Range MIN +2 50 65 50 5.4 6.0 0.5 6.5 µs ms Analog Devices | 4 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level (VSUP1 = VSUP2 = 14V, VEN1 = VEN2 = 14V, TJ = -40°C to +150°C, unless otherwise noted. Typical values are at TA = +25°C) PARAMETER FB Voltage Accuracy FB Current SYMBOL CONDITIONS Only for external divider IC configuration VFB_PWM_EXT VFB = 0.8V, PWM mode, TA = -40°C, +125°C IFB VFB = 0.8V, TA = +25°C MIN TYP MAX UNITS 0.788 0.8 0.812 V 0.02 µA High-Side DMOS RDSON RON_HS VBIAS = 1.8V, ILX = 1.8A 10 22 50 mΩ Low-Side DMOS RDSON RON_LS VBIAS = 1.8V, ILX = 1.8A 6 11 24 mΩ DMOS High-Side Current-Limit Threshold IHS_ILIM fSW = 2MHz 9.0 10.5 12.5 fSW = 400kHz 10.5 12.0 14.0 DMOS Low-Side Negative Current-Limit Threshold INEG fSW = 2MHz -3.7 -3.2 -2.5 fSW = 400kHz -4.1 -3.5 -2.9 LX Leakage Current ILX_LEAK BST Leakage Current IBST_LEAK Soft-Start Ramp Time tSS Minimum On-Time tON Maximum Duty Cycle PWM Switching Frequency External Input Clock Frequency Spread-Spectrum Range VSUP = 36V, VLX = 0V or VLX = 36V, TA = +25°C VSUP = 36V, VBST = 0V or VBST = 36V, TA = +25°C A -5 5 µA -5 5 µA 2.6 2.8 ms 24 40 ns 2.3 Dropout mode A 98.0 99.6 fSW_400kHz 365 400 435 kHz % fSW_2MHz 1.9 2.0 2.15 MHz fSYNC_400kHz fSW = 400kHz 380 620 kHz fSYNC_2MHz fSW = 2.0MHz 1.65 2.5 MHz SPS ±6 % INTERNAL BIAS LDO BIAS Voltage VBIAS 1.8 VEXTVCC = 0V BIAS Current Limit 65 V 107 135 mA 1 12 µA 0.4 V PGOOD1, PGOOD2 PGOOD_ High Leakage Current ILEAK_PGOOD PGOOD_ Low Level VOUT_PGOOD Sinking 1mA LOGIC LEVELS EN_ High Level VIH_EN EN_ Low Level VIL_EN EN_ Input Current IIN_EN SYNC_ High Threshold VIH_SYNC SYNC_ Low Threshold VIL_SYNC 1.2 V VEN_ = VSUP = 36V, TA = +25°C 0.5 V 1 µA 1.4 V 0.4 V 14.0 V EXTVCC EXTVCC Operating Range EXTVCC Rising Threshold EXTVCC Falling Threshold www.analog.com VEXTVCC 2.7 VEXTVCC_RTH EXTVCC rising 2.36 2.50 2.63 V VEXTVCC_FTH EXTVCC falling 2.25 2.41 2.54 V Analog Devices | 5 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level (VSUP1 = VSUP2 = 14V, VEN1 = VEN2 = 14V, TJ = -40°C to +150°C, unless otherwise noted. Typical values are at TA = +25°C) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 2.55 3.30 3.85 V 160 °C 1.2 V SYNCOUT SYNCOUT Voltage Level VSYNCOUT 5mA max load current TEMP AND THERMAL PROTECTION Temperature Monitoring Range 20 TEMP Voltage Range 0.7 TEMP Voltage Accuracy TJ = +25°C 0.73 0.75 0.77 TJ = +125°C 0.95 1.00 1.06 V Thermal Shutdown TSHDN 175 °C Thermal Shutdown Hysteresis TSHDN_HYS 15 °C www.analog.com Analog Devices | 6 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Typical Operating Characteristics (VSUP = VEN = 12V, TA = +25°C, unless otherwise noted.) www.analog.com Analog Devices | 7 MAX25254/MAX25255 www.analog.com Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Analog Devices | 8 MAX25254/MAX25255 www.analog.com Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Analog Devices | 9 MAX25254/MAX25255 www.analog.com Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Analog Devices | 10 MAX25254/MAX25255 www.analog.com Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Analog Devices | 11 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Pin Configurations PGOOD2 OUT2/ FB2 EXTVCC BIAS AGND VEA TEMP OUT1/ FB1 PGOOD1 23 22 21 20 19 18 17 16 15 TOP VIEW SYNC 1 14 SYNCOUT EN2 2 13 EN1 BST2 3 12 BST1 LX2 4 11 LX1 NC 5 10 NC MAX25254 MAX25255 8 9 PGND1 SUP1 7 SUP2 PGND2 6 23 FC2QFN 4.50mm × 5. 75mm NOTE: OUT1 AND OUT2 FOR FIXED OUTPUT V ERSION FB1 AND FB2 FOR ADJUSTABLE OUTPUT VERSION Pin Descriptions PIN NAME 1 SYNC 2 EN2 3 BST2 4 LX2 5 NC 6 PGND2 7 SUP2 8 SUP1 9 PGND1 10 NC www.analog.com FUNCTION Synchronization Input. Connect SYNC to AGND to enable skip mode. Connect SYNC to high to enable FPWM mode. It can also be used to synchronize to an external clock. Enable Input for Buck2. Drive EN2 high/low to enable/disable Buck2. EN2 can be connected directly to the battery for always-ON applications. Integrated High-Side MOSFET Gate Drive Supply. Connect a 0.1µF ceramic capacitor between BST2 and LX2 for proper operation. Buck2 Inductor Connection. Connect an inductor from LX2 to Buck2 output. LX2 is high impedance when Buck2 is disabled. Not Connected Buck2 Power Ground. Make sure that PGND2 is connected to the ground plane with enough vias for optimum thermal performance. Buck2 High-Side MOSFET Supply. Bypass SUP2 to PGND2 with 0.1µF and 4.7µF ceramic capacitors as close as possible. Buck1 High-Side MOSFET and BIAS LDO Supply. Bypass SUP1 to PGND1 with 0.1µF and 4.7µF ceramic capacitors as close as possible. Buck1 Power Ground. Make sure that PGND1 is connected to the ground plane with enough vias for optimum thermal performance. Not Connected Analog Devices | 12 MAX25254/MAX25255 11 LX1 12 BST1 13 EN1 14 SYNCOUT 15 PGOOD1 16 OUT1/FB1 17 TEMP 18 VEA 19 AGND 20 BIAS 21 EXTVCC 22 OUT2/FB2 23 PGOOD2 www.analog.com Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Buck1 Inductor Connection. Connect an inductor from LX1 to the Buck1 output. LX1 is high impedance when Buck1 is disabled. Integrated High-Side MOSFET Gate Drive Supply. Connect a 0.1µF ceramic capacitor between BST2 and LX2 for proper operation. Enable Input for Buck1. Drive EN1 high/low to enable/disable Buck1. EN1 can be connected directly to the battery for always-ON applications. 90° Out-of-Phase Clock Output. Connect SYNCOUT of the primary IC to SYNC of the secondary IC for quad-phase operation. Multiphase operation is designed for PWM mode. No clock is present on SYNCOUT in skip mode or with external clock synchronization. Buck1 Open-Drain Power-Good Output. Connect PGOOD1 to BIAS or an external voltage rail with a pull-up resistor. PGOOD1 is pulled to ground during startup, Buck1 output undervoltage, or overvoltage. Buck1 Output Sense/Feedback Input. In the fixed output version, connect OUT1 to the Buck1 output to set the fixed output voltage. In the adjustable output version, connect FB1 to a resistor-divider between the Buck1 output and AGND to program the output voltage between 0.8V and 14V. FB1 is regulated to 0.8V (typ) in the adjustable version. Die Temperature Monitoring Node. The voltage at TEMP is proportional to the IC die temperature. Error Amplifier Output for Multiphase Operation. When two MAX25255 ICs are used in parallel for 4phase operation, tie both VEA nodes together for phase balancing. Leave VEA open in single-IC operation. Analog Ground. All of the sensitive analog signals are internally referenced to analog ground. Care must be taken during layout to ensure that AGND is routed in the quiet section of the PCB. Internal Linear Regulator Output. Bypass BIAS with a 4.7µF (min) capacitor to AGND. BIAS supplies the internal gate drive circuitry and is not for external use. Switchover Input. When valid voltage is present at EXTVCC, EXTVCC supplies the internal BIAS LDO after soft-start is complete. If the EXTVCC voltage is not valid, or it is tied to ground, the BIAS LDO is supplied by SUP1. Bypass EXTVCC with a 2.2µF ceramic capacitor. Buck2 Output Sense/Feedback Input. In the fixed output version, connect OUT2 to the Buck2 output to set the fixed output voltage. In the adjustable output version, connect FB2 to a resistor-divider between the Buck2 output and AGND to program the output voltage between 0.8V and 14V. FB2 is regulated to 0.8V (typ) in the adjustable output version. Buck2 Open-Drain Power-Good Output. Connect PGOOD2 to BIAS or an external voltage rail with a pull-up resistor. PGOOD2 is pulled to ground during startup, Buck2 output undervoltage, or overvoltage. Analog Devices | 13 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Functional Diagrams EN2 BST2 CBST2 0.1µF L2 0.47µH PGOOD1 15 OUT1 16 TEMP 17 18 19 VEA AGND BIAS CBIAS 4.7µF 20 OUT2 EXTVCC 21 SYNC 22 23 PGOOD2 CEXTVCC 2.2 µF 1 14 2 13 3 12 EN1 BST1 MAX25255AFDA LX2 NC 4 11 5 10 OUT2 LX1 NC CBST1 0.1µF L1 0.47µH OUT1 CIN2 0.1µF/4.7µF 8 9 PGND1 SUP2 7 SUP1 6 PGND2 COUT2 3 x 22µF SYNCOUT COUT1 3 x 22µF CIN1 0.1µ/4. 7µF Detailed Description The MAX25254/MAX25255 are small, dual synchronous buck converters with integrated high-side and low-side MOSFETs. Each buck converter is sized to provide continuous current of 6A at 2MHz. The current capability of the device is increased at lower switching frequency to 8A at 400kHz. These buck converters offer high-voltage-capable individual enable pins that can be tied directly to a car battery in always-ON applications. They also offer a very low quiescent current of 12µA with either one of the buck converters enabled. The voltage quality of the buck converters can be monitored by observing the PGOOD1/PGOOD2 signal. The MAX25254/MAX25255 can operate in dropout by running at 99% of the duty cycle, making them ideal for automotive and industrial applications. The MAX25254 offers fixed output voltage and adjustable output voltage options. The voltages can be externally set when using the adjustable output version by placing external resistor-dividers between the buck outputs, FB1/FB2, and AGND. The MAX25254/MAX25255 provide an internal oscillator with 200kHz/400kHz/1MHz/2MHz options. Frequency operation at 2MHz optimizes the application for the smallest component size, though at the cost of lower efficiency. Frequency operation at 200kHz/400kHz offers better overall efficiency at the expense of component size and board space. The buck converters automatically enter skip mode at light loads with 12µA ultra-low quiescent current and SYNC pulled low. The MAX25254/MAX25255 can also be used in dual-phase or quad-phase operation and can output up to 32A in quad-phase operation. The MAX25255 buck converters are individually designed for the ASIL B safety level. The overvoltage and undervoltage thresholds can be individually programmed to a set level within ±1% accuracy. www.analog.com Analog Devices | 14 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Internal 1.8V BIAS LDO An internal 1.8V BIAS LDO supplies the IC internal circuitry. SUP1 supplies the internal BIAS LDO. Bypass BIAS with a 4.7µF (min) ceramic capacitor. To minimize the LDO power dissipation, enable the EXTVCC switchover circuitry to have the LDO input switch from SUP1 to the buck output. EXTVCC Switchover To reduce the IC internal power dissipation, the input of the internal BIAS LDO can be switched from SUP1 to an external supply, or to the output of one of the buck converters, by applying the valid voltage to EXTVCC. If the buck converter output is connected to EXTVCC, light load efficiency is improved as the SUP1 supply current to BIAS LDO is scaled down proportionally to the duty cycle of buck converter. If VEXTVCC drops below 2.4V (typ), the input supply of the BIAS LDO is automatically switched back to SUP1. Switching Frequency/External Synchronization The MAX25254/MAX25255 provide an internal oscillator with 200kHz, 400kHz, 1MHz, and 2MHz options. Drive SYNC high for forced-PWM (FPWM) operation. Drive SYNC low to enable skip mode for better efficiency at a light load. The IC can be synchronized to the external clock with a valid external clock present at SYNC. Apply an external clock to SYNC to enable frequency synchronization. The Buck1 converter synchronizes its LX1 rising edge to the SYNC rising edge, and Buck1 and Buck2 converters operate 180° out of phase. Spread-Spectrum Option The ICs feature enhanced EMI performance with a spread-spectrum option. When spread spectrum is enabled, the operating frequency is varied by ±6% centered at switching frequency. The modulation signal is a triangular wave with a 4.5kHz frequency at 2MHz. Therefore, the switching frequency ramps down 6% and back to 2MHz in 110μs, and ramps up 6% and back to 2MHz in 110μs after which the cycle repeats. For operations at 400kHz, the modulation signal scales proportionally to 4.5kHz x 0.4/2 = 0.9kHz. The internal spread-spectrum option is disabled if the devices are synchronized to an external clock. However, the devices do not filter the input clock on SYNC and pass any modulation present (including spread spectrum) onto the driving external clock. Enable Input (EN1/EN2) Enable inputs EN1 and EN2 enable the corresponding buck converter from its shutdown mode. EN1/EN2 are high-voltage compatible with input from an automotive battery level down to 1.8V. Drive EN1/EN2 high to enable the Buck1/Buck2 converter output. Drive both EN1 and EN2 low to disable the IC into shutdown mode. The quiescent current is reduced to 6.5μA (max) during shutdown. Soft-Start Drive EN1/EN2 high to enable the buck converters. The soft-start circuitry gradually ramps up the reference voltage during soft-start time (2.6ms, typ) to reduce input inrush currents. Power-Good Indicators (PGOOD1/PGOOD2) The IC features two open-drain power-good outputs (PGOOD1/PGOOD2) to indicate the output voltage status. PGOOD pulls low when the MAX25254 buck converter output voltage drops below 92.5% (typ) of the nominal regulation voltage or above 107.5% (typ). The PGOOD asserts low during soft-start. The MAX25255 buck converters are individually designed for the ASIL B safety level. Four PGOOD undervoltage threshold options are possible between 90% and 97.5% in 2.5% steps, and four PGOOD overvoltage threshold options are possible between 102.5% and 110% in 2.5% steps. Contact the factory for additional part options. Short-Circuit Protection The buck converters feature a cycle-by-cycle current limit and hiccup mode to protect them against a short-circuit or overload condition. In the event of an overload condition, the high-side FET remains on until the inductor current reaches the current-limit threshold. The converter then turns off the high-side FET and turns on the low-side FET to allow the inductor current to ramp down. Once the inductor current decreases to the valley current limit, the converter turns on the high-side FET again. This cycle repeats until the overload condition is removed. A short-circuit is detected when the output voltage falls below the preset threshold voltage while the inductor current hits the current limit. The threshold voltage is 50% of the output regulation voltage for the fixed output voltage version, or 25% www.analog.com Analog Devices | 15 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level of the output regulation voltage for the adjustable output voltage version. During hiccup mode, the IC turns off the buck converter for 26ms (10x soft-start time), and then restarts it in case the overcurrent or short-circuit condition is removed. The hiccup repeats when the short-circuit is continuously present. Die Temperature Monitor The MAX25254/MAX25255 feature a temperature sensor to monitor die temperature. A voltage proportional to the die temperature is provided at the TEMP node. The relation between the TEMP voltage and die temperature is shown in the following formula: 𝑉𝑇𝐸𝑀𝑃 = 2.6 × 𝑇𝐽 + 685 where VTEMP is in mV. The TEMP node outputs 0.75V (typ) at a die temperature of +25°C and 1V at +125°C. The die temperature monitor function is only enabled in FPWM. Thermal Shutdown Protection Thermal shutdown protection limits total power dissipation in the IC. When the junction temperature exceeds +175°C, an internal sensor shuts down the IC, allowing it to cool. The thermal sensor turns on the IC again after the junction temperature cools by 15°C. Multiphase Operation The MAX25254/MAX25255 can be configured in dual phase and quad phase to provide higher output current, up to 16A and 32A respectively. In dual-phase operation, two buck converters within the MAX25254D/MAX25255D are operated in parallel with 180° out-of-phase switching to provide an output current up to 16A. Buck1 of the MAX25254/MAX25255 is programmed as a primary, while Buck2 is treated as secondary in dual-phase operation. Furthermore, the MAX25254D/MAX25255D and MAX25254Q/MAX25255Q can be operated in parallel to be configured in quad-phase operation to meet higher current needs. The MAX25254D/MAX25255D is programmed as a primary while MAX25254Q/MAX25255Q is treated as a secondary. In quad-phase operation, the SYNCOUT of the primary is connected to the SYNC of the secondary to have both ICs switch 90° out of phase to reduce the filter capacitor requirement. FPWM operation is recommended for quad-phase operation. The VEA nodes of the primary and the secondary are connected to ensure balanced current sharing between two ICs and to share primary's voltage control loop with the secondary. In multiphase operation, PGOOD2 of the primary IC is used to report the status of primary buck, while PGOOD1 of the secondary is used for primary status sense. PGOOD2 of the primary is connected to PGOOD1 of the secondary in quadphase operation. Applications Information Setting Output Voltage The MAX25254 offers an adjustable output version to program the output voltage from 0.8V to 14V. Connect a resistive voltage-divider from the converter output to the FB_ input and then to AGND (see Figure 1). Select the bottom-side resistors (RBOTTOM from FB_-to-AGND) close to or equal to 10kΩ. Calculate the top-side resistors (RTOP from outputto-FB_) with the following equation: 𝑅𝑇𝑂𝑃 = 𝑅𝐵𝑂𝑇𝑇𝑂𝑀 × ( 𝑉𝑂𝑈𝑇 𝑉𝐹𝐵 − 1) where VFB = 0.8V (typ) and RBOTTOM = 10kΩ. www.analog.com Analog Devices | 16 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level VOUT MAX25254 RTOP CFF OUT/FB RBOTTOM Figure 1. Setting Output Voltage Using External Resistor-Divider When an external resistor-divider is used to program the buck output voltage, a feed-forward capacitor in parallel with RTOP with a low-pF capacitance can be used to improve control-loop phase margin. Input Capacitor The input capacitors reduce peak current drawn from the power source and improve noise and voltage ripple on the SUP1/SUP2 nodes caused by the buck converter switching cycles. Two ceramic input capacitors with 0.1µF and 4.7µF capacitance are recommended in parallel at SUP1/SUP2 for proper buck operation. Place a 0.1µF ceramic capacitor of a 0402 or 0603 size next to SUP1/SUP2 and PGND to reduce input noise and improve EMI performance. A 4.7µF ceramic capacitor after a 0.1µF capacitor is required on each input side to reduce input voltage ripple. An additional buck capacitor might be required if high impedance exists in the input supply or traces. The input capacitor RMS current requirement (IRMS) is defined by the following equation: 𝐼RMS = 𝐼LOAD(MAX) × ( √𝑉OUT × (𝑉SUP − 𝑉OUT ) ) 𝑉SUP IRMS has a maximum value when the input voltage equals twice the output voltage: 𝑉SUP = 2 × 𝑉OUT Therefore: 𝐼LOAD(MAX) 2 Choose an input capacitor that exhibits less than +10°C self-heating temperature rise at the RMS input current for optimal long-term reliability. The input-voltage ripple is composed of ΔVQ (caused by the capacitor discharge) and ΔVESR (caused by the ESR of the capacitor). Assume the contribution from the ESR and capacitor discharge to be equal to 50%. Calculate the input capacitance and ESR required for a specified input voltage ripple using the following equations: 𝐼RMS = ESR IN = 𝐶IN ∆𝑉ESR ∆𝐼𝐿⁄ 2 𝐼LOAD(MAX) × 𝐷(1 − 𝐷) = ∆𝑉𝑄 × 𝑓SW 𝐼LOAD(MAX) + where: ∆𝐼𝐿 = 𝐷= (𝑉𝑆𝑈𝑃 − 𝑉𝑂𝑈𝑇 ) × 𝑉𝑂𝑈𝑇 𝑉𝑆𝑈𝑃 × 𝑓𝑆𝑊 × 𝐿 𝑉OUT 𝑉SUP www.analog.com Analog Devices | 17 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level and ILOAD(MAX) is the maximum output current, ΔIL is the peak-to-peak inductor current, fSW is the switching frequency, and D is the duty cycle. Inductor Selection Inductor selection is a compromise between component size, efficiency, control loop bandwidth, and loop stability. Insufficient inductance increases the inductor current ripple, conduction losses, and output voltage ripple, and causes loop instability in the worst case. A large inductor reduces the inductor current ripple but sacrifices of component size and slow response. See Table 1 for optimized inductor values at switching frequencies of 400kHz and 2MHz. The nominal standard value selected should be within ±30% of the specified inductance. Table 1. Recommended Inductor and Output Capacitor per Phase SWITCHING FREQUENCY RECOMMENDED INDUCTANCE (μH) RECOMMENDED OUTPUT CAPACITANCE (μF) 400kHz 2.2 3 x 47 2MHz 0.47 3 x 22 Output Capacitor The output capacitor is a critical component for switching regulators. It is selected to meet output voltage ripple, load transient response, and loop stability requirements. The output voltage ripple is composed of ΔVQ (caused by the capacitor discharge) and ΔVESR (caused by the ESR of the output capacitor). Use low-ESR ceramic capacitors. Assume the contribution to the output ripple voltage from ESR and the capacitor discharge to be equal. Use the following equations to get the output capacitance and ESR for a specified output voltage ripple. 𝐸𝑆𝑅 = ∆𝑉𝐸𝑆𝑅 ∆𝐼𝑃−𝑃 𝐶𝑂𝑈𝑇 = ∆𝐼𝑃−𝑃 8 × ∆𝑉𝑄 × 𝑓𝑆𝑊 ∆𝐼𝑃−𝑃 = (𝑉𝑆𝑈𝑃 − 𝑉𝑂𝑈𝑇 ) × 𝑉𝑂𝑈𝑇 𝑉𝑆𝑈𝑃 × 𝑓𝑆𝑊 × 𝐿 𝑉𝑂𝑈𝑇𝑅𝐼𝑃𝑃𝐿𝐸 = ∆𝑉𝐸𝑆𝑅 + ∆𝑉𝑄 where ΔIP-P is the peak-to-peak inductor current. During a load step, the output capacitors supply the load current before the converter loop responds with a higher duty cycle, which causes output voltage undershoot. To keep the maximum output voltage deviations below the tolerable limits of the electronics being powered, output capacitance can be calculated with the following equation: 𝐶𝑂𝑈𝑇 = ∆𝐼𝐿𝑂𝐴𝐷 ∆𝑉 × 2𝜋 × 𝑓𝐶 where ΔILOAD is the load step, ΔV is the allowed output voltage undershoot, and fC is the loop crossover frequency, which can be assumed to be fSW/10. The calculated COUT is the actual capacitance after considering capacitance tolerance, temperature effect, and voltage derating. See Table 1 for recommended output capacitance. PCB Layout Guidelines Careful PCB layout is critical to achieve low switching losses, low EMI, and clean, stable operation. See Figure 2 and the MAX25255 evaluation kit (EV kit) for an example layout. Place the ceramic input-bypass capacitors (CIN and CBP) as close as possible to SUP1/SUP2 and PGND1/PGND2. Input capacitors should be placed right next to the SUP1/SUP2 and PGND1/PGND2 nodes on the same layer to provide best EMI rejection and minimize the input noise on SUP1/SUP2. The symmetrical input capacitor arrangements generate the SUP1/SUP2 loops with opposite orientation to cancel the magnetic fields and help EMI mitigation. www.analog.com Analog Devices | 18 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Minimize the connection from the buck output capacitor's ground terminal to the input capacitor's ground terminal and to the PGND1/PGND2 nodes. Keep the buck’s high-current path and power traces wide and short. Minimize the traces from LX node to the inductor and then to the output capacitors. This reduces the buck current loop area and minimizes LX trace resistance and stray capacitance to achieve optimal efficiency. Place the bootstrap capacitors (CBST) next to the LX1/LX2 and BST1/BST2 nodes. Use short and wide traces from BST1/BST2 and LX1/LX2 to minimize this routing parasitic impedance. High parasitic impedance from BST1/BST2 to LX1/LX2 impacts the switching speed, further increases switching losses, and causes high dv/dt noise. See the MAX25255 EV kit for BST1/BST2 to LX1/LX2 routing. Place the BIAS capacitor as close to the BIAS node as possible. Noise coupling into BIAS can disturb the reference and bias circuitry if this capacitor is installed away from the IC. Place the EXTVCC capacitor as close to the EXTVCC node as possible if the EXTVCC switchover is used. Noise coupling into EXTVCC can disturb the reference and bias circuitry if this capacitor is installed away from the IC. Keep the sensitive analog signals (OUT1/OUT2/FB1/FB2/VEA) away from noisy switching nodes (LX1/LX2 and BST1/BST2) and high-current loops. For a multiphase PCB, minimize the connection between VEAs and the connection from the primary’s SYNCOUT to the secondary’s SYNC. Ground is the return path for the full load currents flowing into and out of the MAX25255. It is also the common reference voltage for all of the analog circuits. Improper ground routing can bring extra resistance and inductance into the current loop, causing different voltage reference and worsening voltage ringing or spikes. Place a solid ground plane layer under the power loop components layer to shield the switching noise from other sensitive traces. Isolate the analog ground AGND from the power ground PGND1/PGND2 under the IC area on the component layer. Connect AGND and PGND1/PGND2 together at a single point with a star ground connection to minimize the ground current loops. PCB layout also plays an important role in power dissipation and thermal performance. The PGND1/PGND2 nodes are main power connection area between the IC and outside the IC. Place as much copper ground area as possible around the PGND1/PGND2 area to ensure efficient heat transfer. Place as many as possible vias around PGND nodes and under the IC area to further transfer the heat down the internal ground plane and other layers to further improve the thermal resistance from the IC package to the ambient area. CEXTVCC AGND CBP CIN COUT CIN CIN COUT COUT COUT CIN COUT VOUT1 CBP LX1 LX2 VOUT2 CBST CBST CBIAS COUT COUT COUT PGND Figure 2. Layout Example www.analog.com Analog Devices | 19 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Typical Application Circuits Dual-Output Configuration: MAX25254, 400kHz, 5V/3.3V EN2 BST2 CBST2 0.1µF L2 2.2 µH LX2 NC OUT1/ FB1 PGOOD1 15 17 16 TEMP VEA 19 18 AGND BIAS CBIAS 4.7µF 20 OUT2/ FB2 EXTVCC 21 SYNC 22 23 PGOOD2 CEXTVCC 2.2µF 1 14 2 13 3 12 MAX25254AFDD 4 11 5 10 OUT2 8 9 PGND1 SUP2 7 SUP1 6 CIN2 0.1µF/4.7µF www.analog.com EN1 BST1 LX1 NC CBST1 0.1µF L1 2.2µH OUT1 PGND2 COUT2 3 x 47µF SYNCOUT COUT1 3 x 47µF CIN1 0.1µF/4.7µF Analog Devices | 20 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Dual-Phase Output Configuration: MAX25255, 2MHz, 3.3V CEXTVCC 2.2µF CBIAS 4.7µF EN2 BST2 CBST2 0.1µF L2 0.47µH LX2 NC PGOOD1 15 OUT1 16 TEMP 17 18 19 VEA AGND BIAS 20 EXTVCC OUT2 OUT 21 SYNC 22 23 PGOOD2 OUT 1 14 2 13 3 12 MAX25255DAFDA 4 11 5 10 OUT 8 9 PGND1 SUP1 SUP2 7 CIN2 0.1µ//4.7µF www.analog.com EN1 BST1 LX1 NC CBST1 0.1µF L1 0.47µH OUT 6 PGND2 COUT2 3 x 22µF SYNCOUT COUT1 3 x 22µF CIN1 0.1µF//4.7µF Analog Devices | 21 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Quad-Phase Output Configuration: MAX25255, 2MHz, 5V 2 13 3 12 MAX25255DAFDG PRIMARY LX2_M 4 11 NC 5 10 EN2_S EN1_M BST1_M LX1_M NC BST2_S CBST1 0.1µF CBST4 0.1µF L1 0.47µH OUT L4 0.47µH LX2_S NC 16 18 PGOOD1_S TEMP_S 17 VEA AGND 19 20 BIAS_S EXTVCC_S 21 SYNCOUT_S 1 14 2 13 3 12 MAX25254QAFDE SECONDARY 4 11 5 10 CIN2 0.1µF/4.7µF www.analog.com PGND1_ M 9 CIN1 0.1µF/4.7µF COUT1 3 x 22µF COUT4 3 x 22µF 6 7 CIN4 0.1µF/4.7µF 8 9 PGND1_ S 8 SUP1_M SUP2_M 7 EN1_S BST1_S LX1_S NC CBST3 0.1µF L3 0.47µH OUT OUT 6 PGND2_ M COUT2 3 x 22µF SYNC_S SYNCOUT_M 22 PGOOD2_S PGOOD1_M 14 23 16 15 OUT1_M TEMP_M 18 17 AGND 19 20 VEA EXTVCC_M BIAS_M 21 1 OUT SUP1_S L2 0.47µH OUT SUP2_S BST2_M CBST2 0.1µF OUT PGND2_ S EN2_M 22 PGOOD2_M 23 SYNC_M OUT2_M OUT CBIAS2 4.7µF CEXTVCCS 2.2µF 15 VEA OUT1_S CBIAS1 4.7µF OUT2_S CEXTVCCM 2.2µF COUT3 3 x 22µF CIN3 0.1µF/4.7µF Analog Devices | 22 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Ordering Information PART NUMBER PHASE CONFIGURATION ILIM (A) SWITCHING FREQUENCY SAFETY VOUT1 (V) VOUT2 (V) IDC (A) SPREAD SPECTRUM 10.5 2MHz ASIL 5 3.3 6 ON, ±6% 12 400kHz ASIL 5 3.3 8 OFF 10.5 2MHz Non-ASIL 5 3.3 6 ON, ±6% 12 400kHz Non-ASIL 5 3.3 8 OFF 10.5 2MHz Non-ASIL ADJ ADJ 6 ON, ±6% 12 400kHz Non-ASIL 3.3 3.3 8 ON, ±6% 10.5 2MHz ASIL 3.3 3.3 6 ON, ±6% 12 400kHz ASIL 3.3 3.3 8 ON, ±6% 10.5 2MHz Non-ASIL 3.3 3.3 6 ON, ±6% 12 400kHz Non-ASIL 3.3 3.3 8 ON, ±6% 10.5 2MHz Non-ASIL 5 5 6 ON, ±6% 12 400kHz Non-ASIL 5 5 8 ON, ±6% 10.5 2MHz ASIL 5 5 6 ON, ±6% 12 400kHz ASIL 5 5 8 ON, ±6% 12 400kHz Non-ASIL ADJ ADJ 8 OFF 10.5 2MHz Non-ASIL ADJ ADJ 6 ON, ±6% 10.5 2MHz Non-ASIL 3.3 3.3 6 ON, ±6% 12 400kHz Non-ASIL 3.3 3.3 8 ON, ±6% 10.5 2MHz Non-ASIL 5 5 6 ON, ±6% 12 400kHz Non-ASIL 5 5 8 ON, ±6% DUAL CHANNELS MAX25255AFDA/VY+ MAX25255AFDB/VY+ MAX25254AFDC/VY+ MAX25254AFDD/VY+* MAX25254AFDE/VY+ MAX25254AFDF/VY+ Two separated outputs Two separated outputs Two separated outputs Two separated outputs Two separated outputs Two separated outputs DUAL PHASE MAX25255DAFDA/VY+ MAX25255DAFDB/VY+* MAX25254DAFDC/VY+ MAX25254DAFDD/VY+* MAX25254DAFDE/VY+* MAX25254DAFDF/VY+* MAX25255DAFDG/VY+ MAX25255DAFDH/VY+* MAX25254DAFDJ/VY+ MAX25254DAFDK/VY+* Single output, primary Single output, primary Single output, primary Single output, primary Single output, primary Single output, primary Single output, primary Single output, primary Single output, primary Single output, primary QUAD PHASE MAX25254QAFDA/VY+* MAX25254QAFDB/VY+* MAX25254QAFDE/VY+* MAX25254QAFDF/VY+* Single output, secondary Single output, secondary Single output, secondary Single output, secondary * Future part—contact factory for availability. + Denotes a lead(Pb)-free/RoHS-compliant package. T Denotes tape-and-reel. /VY Denotes a side-wettable, automotive-qualified package. www.analog.com Analog Devices | 23 MAX25254/MAX25255 Dual 36V Input Voltage, 8A Synchronous Buck Converters with Multiphase Capability and ASIL B Safety Level Revision History REVISION NUMBER 0 1 2 3 4 5 6 7 REVISION DESCRIPTION DATE 4/22 Initial release 4/22 Updated Ordering Information table Updated Electrical Characteristics, Typical Application Circuits, and Ordering Information 6/22 table 9/22 Updated Ordering Information table 12/22 Updated Ordering Information table 1/23 Updated Ordering Information table 4/23 Updated Typical Operating Characteristics and Ordering Information table 9/23 Updated Package Information and Ordering Information table PAGES CHANGED — 25 4, 22, 23 23 23 23 10, 23 3, 23 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. w w w . a n a l o g . c o m Analog Devices | 24
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