19-0732; Rev 2; 12/10
KIT
ATION
EVALU
E
L
B
AVAILA
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Maxim’s Smart Power Selector™ (SPS) safely distributes power between an external power source (AC
adapter, auto adapter, or USB source), battery, and the
system load. When system load peaks exceed the
external source capability, the battery supplies supplemental current. When system load requirements are
small, residual power from the external power source
charges the battery. A thermal-limiting circuit limits battery-charge rate and external power-source current to
prevent overheating. The PMIC also allows the system
to operate with no battery or a discharged battery.
Features
o Two 95%-Efficient 1MHz Buck Regulators
Main Regulator: 0.98V to VIN at 1200mA
Core Regulator: 0.98V to VIN at 900mA
o 1MHz Boost WLED Driver
Drives Up to 7 White LEDs at 30mA (max)
PWM and Analog Dimming Control
o Four Low-Dropout Linear Regulators
1.7V to 5.5V Input Range
15µA Quiescent Current
o Single-Cell Li+ Charger
Adapter or USB Input
Thermal-Overload Protection
o Smart Power Selector (SPS)
AC Adapter/USB or Battery Source
Charger-Current and System-Load Sharing
Ordering Information
The MAX8662 is available in a 6mm x 6mm, 48-pin TQFN
package, while the MAX8663, without the LED driver, is
available in a 5mm x 5mm, 40-pin TQFN package.
PART
TEMP RANGE
PIN-PACKAGE
MAX8662ETM+
-40°C to +85°C
48 TQFN-EP*
6mm x 6mm x 0.8mm
Applications
MAX8663ETL+
-40°C to +85°C
40 TQFN-EP*
5mm x 5mm x 0.8mm
Smart Phones and PDAs
+Denotes a lead(Pb)-free/RoHS-compliant package.
MP3 and Portable Media Players
*EP = Exposed pad.
Palmtop and Wireless Handhelds
Typical Operating Circuit
EN1
PG1
LX1
PV1
OVP
CS
CC3
FB2
PV2
PG2
EN2
TOP VIEW
LX2
Pin Configurations
36 35 34 33 32 31 30 29 28 27 26 25
FB1
DC/USB
INPUT
DC
PWR OK
POK
CHARGE
STATUS
CHG
BAT
EN6
37
24
EN7
38
23
PWM
LX3
39
22
EN5
PG3
40
21
EN4
OUT6
41
20
OUT5
IN67
42
19
IN45
EN2
EN3
MAX8662
CHARGE
ENABLE
EN1
43
18
OUT4
VL
44
17
GND
EN4
SL1
45
16
REF
EN5
SL2
46
15
CT
PSET
47
14
ISET
POK
48
13
THM
CEN
10 11 12
CHG
9
BRT
8
BAT2
7
BAT1
6
SYS2
5
DC2
4
SYS1
EN3
3
DC1
2
PEN2
PEN1
1
TQFN
(6mm x 6mm)
Pin Configurations continued at end of data sheet.
MAX8662
MAX8663
TO SYSTEM
POWER
Li+
BATTERY
OUT1
0.98V TO VIN / 1.2A
OUT2
0.98V TO VIN / 0.9A
TO SYS
LX1
CEN
OUT7
EP
SYS
LX2
LX3
OUT3
(MAX8662 ONLY)
30mA
WLED
CS
EN6
OUT4
500mA
OUT5
150mA
SL1
OUT6
300mA
SL2
OUT7
150mA
EN7
OUT4–OUT7
VOLTAGE
SELECT
Smart Power Selector is a trademark of Maxim Integrated
Products, Inc.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX8662/MAX8663
General Description
The MAX8662/MAX8663 power-management ICs
(PMICs) are efficient, compact devices suitable for
smart cellular phones, PDAs, Internet appliances, and
other portable devices. They integrate two synchronous
buck regulators, a boost regulator driving two to seven
white LEDs, four low-dropout linear regulators (LDOs),
and a linear charger for a single-cell Li-ion (Li+) battery.
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
ABSOLUTE MAXIMUM RATINGS
LX3 to GND ............................................................-0.3V to +33V
DC_ to GND..............................................................-0.3V to +9V
BAT_, CEN, CHG, EN_, PEN_, POK, PV_, PWM,
SYS_, LX1, CS, LX2 to GND .................................-0.3V to +6V
VL to GND ................................................................-0.3V to +4V
BRT, CC3, FB_, IN45, IN67, OVP, REF,
SL_ to GND ...........................................-0.3V to (VSYS + 0.3V)
CT, ISET, PSET, THM to GND .....................-0.3V to (VVL + 0.3V)
OUT4, OUT5 to GND................................-0.3V to (VIN45 + 0.3V)
OUT6, OUT7 to GND................................-0.3V to (VIN67 + 0.3V)
PG_ to GND...........................................................-0.3V to +0.3V
BAT1 + BAT2 Continuous Current ...........................................3A
SYS1 + SYS2 Continuous Current (2 pins) ..............................3A
LX_ Continuous Current ........................................................1.5A
Continuous Power Dissipation (TA = +70°C)
40-Pin 5mm x 5mm TQFN
(derate 35.7mW/°C above +70°C)
(multilayer board) .......................................................2857mW
48-Pin 6mm x 6mm TQFN
(derate 37mW/°C above +70°C) (multilayer board)...2963mW
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature Range ............................-40°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS (Input Limiter and Battery Charger)
(VDC = 5V, VBAT = 4V, VCEN = 0V, VPEN_ = 5V, RPSET = 3kΩ, RISET = 3.15kΩ, CCT = 0.068µF, TA = -40°C to +85°C, unless otherwise
noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
8.0
V
INPUT LIMITER
DC Operating Range
VDC
(Note 2)
4.1
DC Undervoltage Threshold
VDC_L
VDC rising, 500mV hysteresis
3.9
4.0
4.1
V
DC Overvoltage Threshold
VDC_H
VDC rising, 100mV hysteresis
6.6
6.9
7.2
V
DC Supply Current
DC Shutdown Current
DC-to-SYS Dropout
On-Resistance
RDC_SYS
DC-to-BAT Dropout
Threshold
VDR_DC_BAT
VL Voltage
SYS Regulation Voltage
DC Input Current Limit
PSET Resistance Range
Input Limiter Soft-Start Time
2
VVL
VSYS_REG
IDC_LIM
RPSET
ISYS = IBAT = 0mA, VCEN = 0V
1.5
ISYS = IBAT = 0mA, VCEN = 5V
0.9
VDC = 5V, VCEN = 5V, VPEN1 = VPEN2 = 0V (USB
suspend mode)
110
180
µA
VDC = 5V, ISYS = 400mA, VCEN = 5V
0.1
0.2
Ω
mA
When VSYS regulation and charging stops, VDC
falling, 150mV hysteresis
20
50
85
mV
IVL = 0 to 10mA
3.1
3.3
3.5
V
VDC = 5.8V, ISYS = 1mA, VCEN = 5V
5.2
5.3
5.4
V
VPEN1 = 5V, VPEN2 = 5V,
RPSET = 1.5kΩ
1800
2000
2200
VPEN1 = 5V, VPEN2 = 5V,
RPSET = 3kΩ
900
1000
1100
VPEN1 = 5V, VPEN2 = 5V,
RPSET = 6kΩ
450
500
550
VPEN1 = 0V, VPEN2 = 5V
(500mA USB mode)
450
475
500
VPEN1 = VPEN2 = 0V
(100mA USB mode)
80
90
100
VDC = 5V, VSYS = 4.0V
Guaranteed by SYS current limit
TSS_DC_SYS Current-limit ramp time
1.5
6.0
1.5
_______________________________________________________________________________________
mA
kΩ
ms
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
(VDC = 5V, VBAT = 4V, VCEN = 0V, VPEN_ = 5V, RPSET = 3kΩ, RISET = 3.15kΩ, CCT = 0.068µF, TA = -40°C to +85°C, unless otherwise
noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
RBAT_REG
VDC = 0V, VBAT = 4.2V, ISYS = 1A
MIN
TYP
MAX
UNITS
40
80
mΩ
50
100
150
mV
TA = +25°C
4.179
4.200
4.221
TA = -40°C to +85°C
4.158
4.200
4.242
-100
-60
mV
825
mA
BATTERY CHARGER
BAT-to-SYS On-Resistance
VDC = 5V, VPEN1 = VPEN2 = 0V (USB 100mA mode),
ISYS = 200mA (BAT to SYS voltage drop during SYS
overload)
BAT-to-SYS Reverse
Regulation Voltage
BAT Regulation Voltage
VBAT_REG
BAT Recharge Threshold
BAT voltage drop to restart charging
ISYS = 0mA,
RPSET = 1.5kΩ,
VPEN1 = VPEN2 = 5V
BAT Fast-Charge Current
-140
RISET = 1.89kΩ
RISET = 3.15kΩ
RISET
675
RISET = 7.87kΩ
Guaranteed by BAT charging current
(1.5A to 300mA)
Charger Soft-Start Time
tSS_CHG
750
300
75
1.57
RISET = 3.15kΩ (ISET output voltage to actual
charge-current ratio)
VISET-to-IBAT Ratio
V
1250
VBAT = 2.5V, RISET = 3.15kΩ (prequalification
current is 10% of fast-charge current)
BAT Prequalification Current
ISET Resistance Range
IBAT = 0mA
Charge-current ramp time
BAT Prequalification
Threshold
VBAT rising, 180mV hysteresis
BAT Leakage Current
VBAT = 4.2V,
outputs disabled
CHG and Top-Off Threshold
IBAT where CHG goes
high, and top-off timer;
IBAT falling (7.5% of
fast-charge current)
Timer-Suspend Threshold
IBAT falling (Note 3)
250
Timer Accuracy
CCT = 0.068µF
-20
2.9
mA
7.87
kΩ
2
V/A
1.5
ms
3.0
3.1
VDC = 0V
0.01
5
VDC = VCEN = 5V
0.01
5
RISET = 3.15kΩ
56.25
300
V
µA
mA
350
mV
+20
%
Prequalification Time
tPREQUAL
From CEN high to end of prequalification charge,
VBAT = 2.5V, CCT = 0.068µF
30
Min
Charge Time
tFST-CHG
From CEN high to end of fast charge,
CCT = 0.068µF
300
Min
Top-Off Time
tTOP-OFF
From CHG high to end of fast charge,
CCT = 0.068µF
30
Min
(Note 4)
100
°C
RPSET = 3kΩ
50
mA/°C
Charger Thermal-Limit
Temperature
Charger Thermal-Limit Gain
_______________________________________________________________________________________
3
MAX8662/MAX8663
ELECTRICAL CHARACTERISTICS (Input Limiter and Battery Charger) (continued)
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
ELECTRICAL CHARACTERISTICS (Input Limiter and Battery Charger) (continued)
(VDC = 5V, VBAT = 4V, VCEN = 0V, VPEN_ = 5V, RPSET = 3kΩ, RISET = 3.15kΩ, CCT = 0.068µF, TA = -40°C to +85°C, unless otherwise
noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
THERMISTOR INPUT (THM)
THM Internal Pullup
Resistance
kΩ
10
THM Resistance Threshold,
Hot
Resistance falling (1% hysteresis)
3.73
3.97
4.21
kΩ
THM Resistance Threshold,
Cold
Resistance rising (1% hysteresis)
26.98
28.7
30.42
kΩ
THM Resistance Threshold,
Disabled
Resistance falling
270
300
330
Ω
LOGIC I/O (POK, CHG, PEN_, EN_, PWM, CEN)
Input Logic-High Level
1.3
V
Input Logic-Low Level
0.4
VLOGIC = 0V to 5.5V, TA = +25°C
Logic Input-Leakage Current
-1
VLOGIC = 5.5V, TA = +85°C
Logic Output-Voltage Low
VLOGIC = 5.5V
V
+1
µA
0.01
ISINK = 1mA
Logic Output-High Leakage
Current
+0.001
10
100
TA = +25°C
0.001
1
TA = +85°C
0.01
mV
µA
ELECTRICAL CHARACTERISTICS (Output Regulator)
(VSYS_ = VPV_ = VIN45 = VIN67 = 4.0V, VBRT = 1.25V, circuit of Figure 1, TA = -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SYSTEM
SYS Operating Range
SYS Undervoltage Threshold
VSYS
VUVLO_SYS
2.6
VSYS rising, 100mV hysteresis
2.4
Extra supply current when at least one output is on
SYS Bias Current Additional
Regulator Supply Current
Not including
SYS bias current
V
2.6
V
35
70
OUT1 on, VPWM = 0V
16
35
OUT2 on, VPWM = 0V
16
35
OUT3 on
1
2
OUT4 on (current into IN45)
20
30
OUT5 on (current into IN45)
16
25
OUT6 on (current into IN67)
17
27
µA
mA
µA
16
25
1.0
1.1
MHz
VPWM = 0V
16
35
µA
VPWM = 5V
2.9
OUT7 on (current in IN67)
Internal Oscillator Frequency
5.5
2.5
PWM frequency of OUT1, OUT2, and OUT3
0.9
BUCK REGULATOR 1
ISYS + IPV1, no load,
not including SYS
bias current
Supply Current
Output Voltage Range
VOUT1
Maximum Output Current
IOUT1
4
Guaranteed by FB accuracy
0.98
1200
_______________________________________________________________________________________
mA
3.30
V
mA
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
(VSYS_ = VPV_ = VIN45 = VIN67 = 4.0V, VBRT = 1.25V, circuit of Figure 1, TA = -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
From VFB1 = 0.98V, IOUT1 = 0 to 1200mA,
VOUT1 = 0.98V to 3.3V
FB Regulation Accuracy
MIN
-3
FB1 Input Leakage Current
pMOS On-Resistance
ILX1 = 100mA
nMOS On-Resistance
ILX1 = 100mA
TYP
MAX
UNITS
+3
%
µA
0.01
0.10
VPV1 = 3.3V
0.12
0.24
VPV1 = 2.6V
0.15
VPV1 = 3.3V
0.2
VPV1 = 2.6V
0.3
pMOS Current Limit
1.4
1.8
0.4
2.2
Ω
Ω
A
Skip Mode Transition Current
90
mA
nMOS Zero-Cross Current
25
mA
VEN1 = 0V, VSYS = 5.5V,
TA = +25°C
LX Leakage
VLX1 = VPV1 = 5.5V
VLX1 = 0V, VPV1 = 5.5V
0.01
-5.00
Soft-Start Time
1.00
-0.01
400
µA
µs
BUCK REGULATOR 2
Supply Current
ISYS + IPV2, no load, not
including SYS bias current
Output Voltage Range
Guaranteed by FB accuracy
VPWM = 0V
16
VPWM = 5V
2.1
0.98
Maximum Output Current
35
3.30
900
From VFB2 = 0.98V, IOUT2 = 0 to 600mA,
VOUT2 = 0.98V to 3.3V
FB Regulation Accuracy
pMOS On-Resistance
ILX2 = 100mA
nMOS On- Resistance
ILX2 = 100mA
µA
0.10
0.2
0.4
VPV2 = 2.6V
0.3
VPV2 = 3.3V
0.2
VPV2 = 2.6V
0.3
1.30
Skip Mode Transition Current
90
nMOS Zero-Cross Current
25
VEN2 = 0V, VSYS = 5.5V,
TA = +25°C
%
0.01
1.07
LX Leakage
+3
VPV2 = 3.3V
pMOS Current Limit
VLX2 = VPV2 = 5.5V
VLX2 = 0V, VPV2 = 5.5V
0.01
-5.00
Soft-Start Time
V
mA
-3
FB2 Input Leakage Current
µA
mA
0.4
1.55
Ω
Ω
A
mA
mA
1.00
-0.01
µA
400
µs
1
mA
BOOST REGULATOR FOR LED DRIVER
At SYS, no load, not
including SYS bias current
Supply Current
Switching
Output Range
VOUT3
Minimum Duty Cycle
DMIN
Maximum Duty Cycle
DMAX
90
92
CS Regulation Voltage
VCS
0.29
0.32
0.35
V
1.225
1.250
1.275
V
20.0
20.8
OVP Regulation Voltage
VSYS
Duty = 90%, ILX3 = 0mA
OVP Sink Current
19.2
OVP Soft-Start Period
30
10
Time for IOVP to ramp from 0 to 20µA (Note 5)
1.25
V
%
%
µA
ms
_______________________________________________________________________________________
5
MAX8662/MAX8663
ELECTRICAL CHARACTERISTICS (Output Regulator) (continued)
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
ELECTRICAL CHARACTERISTICS (Output Regulator) (continued)
(VSYS_ = VPV_ = VIN45 = VIN67 = 4.0V, VBRT = 1.25V, circuit of Figure 1, TA = -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
OVP Leakage Current
VEN3 = 0V,
VOVP = VSYS = 5.5V
nMOS On-Resistance
ILX3 = 100mA
nMOS Off-Leakage Current
VLX3 = 30V
MIN
TYP
MAX
TA = +25°C
0.01
1
TA = +85°C
0.1
0.6
1.2
TA = +25°C
0.01
5.00
TA = +85°C
0.1
nMOS Current Limit
500
620
UNITS
µA
Ω
µA
900
mA
1.5
V
V
LED DRIVER
BRT Input Range
VBRT
ICS = 0 to 30mA
REF Voltage
VREF
IREF = 0mA
BRT Input Current
VBRT = 0 to 1.5V
CS Sink Current
VCS = 0.2V
CS Current-Source
Line Regulation
VSYS = 2.7V to 5.5V
0
TA = +25°C
1.45
1.50
1.55
-1
-0.01
+1
TA = +85°C
0.1
VBRT = 1.5V
28
30
32
VBRT = 50mV
0.4
0.8
1.2
0.1
µA
mA
%/V
PWM DIMMING
EN3 DC Turn-On Delay
From VEN3 = high to LED on
1.5
2.0
2.5
ms
EN3 Shutdown Delay
From VEN3 = low to LED off
1.5
2.0
2.5
ms
PWM Dimming Capture
Period
Time between rising edges
on EN3 for PWM dimming to
become active
1.5
2.0
PWM Dimming Pulse-Width
Resolution
Resolution of high or low-pulse width on EN3 for
dimming change
Maximum
Minimum
8
ms
10
0.5
µs
µs
LINEAR REGULATORS
IN45, IN67 Operating Range
IN45, IN67 Undervoltage
Threshold
VIN45
VUVLO-IN45
1.7
VIN45 rising, 100mV hysteresis
1.5
1.6
Output Noise
f = 100Hz to 100kHz
200
PSRR
f = 100kHz
30
Shutdown Supply Current
VEN4 = VEN5 = 0V, TA = +25°C
Soft-Start Ramp Time
VOUT4 to 90% of final value
Output Discharge
Resistance in Shutdown
VEN4 = 0V
0.001
5.5
V
1.7
V
µVRMS
dB
1
34
0.5
µA
V/ms
1.0
2.0
kΩ
20
30
µA
+1.5
%
LINEAR REGULATOR 4 (LDO4)
Supply Current
At IN45, VEN5 = 0V
Voltage Accuracy
IOUT4 = 0 to 500mA,
VIN45 = VOUT4 + 0.3V to 5.5V with 1.7V (min)
-1.5
Guaranteed stability, ESR < 0.05Ω
3.76
Minimum Output Capacitor
COUT4
Dropout Resistance
IN45 to OUT4
Current Limit
VOUT4 = 0V
6
IOUT4 = 0A
µF
0.2
500
700
_______________________________________________________________________________________
0.4
Ω
mA
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
(VSYS_ = VPV_ = VIN45 = VIN67 = 4.0V, VBRT = 1.25V, circuit of Figure 1, TA = -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
16
25
µA
+1.5
%
LINEAR REGULATOR 5 (LDO5)
Supply Current
At IN45, VEN4 = 0V
Voltage Accuracy
IOUT5 = 0 to 150mA,
VIN45 = VOUT5 + 0.3V to 5.5V with 1.7V (min)
-1.5
Guaranteed stability, ESR < 0.05Ω
0.8
Minimum Output Capacitor
COUT5
Dropout Resistance
IN45 to OUT5
Current Limit
VOUT5 = 0V
IOUT5 = 0A
µF
0.6
150
1.2
210
Ω
mA
LINEAR REGULATOR 6 (LDO6)
Supply Current
At IN67, VEN6 = VSYS, VEN7 = 0V
Voltage Accuracy
IOUT6 = 0 to 300mA, VIN67 = VOUT6 + 0.3V to 5.5V
-1.5
Guaranteed stability, ESR < 0.05Ω
1.76
Minimum Output Capacitor
COUT6
Dropout Resistance
IN67 to OUT6
Current Limit
VOUT6 = 0V
IOUT6 = 0A
17
µA
%
µF
0.35
300
27
+1.5
0.60
420
Ω
mA
LINEAR REGULATOR 7 (LDO7)
Supply Current
At IN67, VEN6 = 0V, VEN7 = VSYS
Voltage Accuracy
IOUT7 = 0 to 150mA,
VIN67 = VOUT7 + 0.3V to 5.5V with 1.7V (min)
-1.5
Guaranteed stability, ESR < 0.05Ω
0.8
Minimum Output Capacitor
COUT7
Dropout Resistance
IN67 to OUT6
Current Limit
VOUT7 = 0V
IOUT7 = 0A
16
µA
+1.5
%
µF
0.6
150
25
1.2
Ω
210
mA
165
°C
15
°C
THERMAL SHUTDOWN
Thermal-Shutdown
Temperature
Thermal-Shutdown
Hysteresis
TJ rising
Note 1: Limits are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed through
correlation using statistical quality control (SQC) methods.
Note 2: Input withstand voltage. Not designed to operate above VDC = 6.5V due to thermal-dissipation issues.
Note 3: ISET voltage when CT timer stops. Occurs only when in constant-current mode. Translates to 20% of fast-charge current.
Note 4: Temperature at which the input current limit begins to reduce.
Note 5: The WLED driver’s sink current ramp time is a function of the external compensation at CC3. With a compensation of 1kΩ in
series with 0.22µF and a target sink current of 30mA, the WLED boost’s output voltage ramps up in 1.25ms, but the WLED
sink current of 30mA settles in 12ms. See the OUT3 Enable and Disable Response graph in the Typical Operating
Characteristics section for more information.
_______________________________________________________________________________________
7
MAX8662/MAX8663
ELECTRICAL CHARACTERISTICS (OUTPUT REGULATOR) (continued)
Typical Operating Characteristics
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5kΩ, RISET = 3kΩ, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 =
VPEN2 = 5V, COUT1 = 2 x 10µF, COUT2 = 2 x 10µF, COUT3 = 0.1µF, COUT4 = 4.7µF, COUT5 = 1µF, COUT6 = 2.2µF, COUT7 = 1µF, CT =
0.068µF, CREF = CVL = 0.1µF, RTHM = 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, VGND = VPG1 = VPG2 = VPG3 = 0V, TA = +25°C,
unless otherwise noted.)
0.6
0.4
1.0
0.8
0.6
0.4
0.2
0.2
0
0
0
1
2
3
4
5
6
7
8
2
3
0.3
0.2
0.1
0
6
7
1
2
3
4
MAX8662/63 toc03
0.06
0.04
1
0
2
3
4
5
6
7
INPUT VOLTAGE (V)
BATTERY-LEAKAGE CURRENT
vs. TEMPERATURE (INPUT DISCONNECTED)
BATTERY-REGULATION VOLTAGE
vs. TEMPERATURE
VBAT = 4.0V
EN_ = 0
0.7
0.6
0.5
0.4
0.3
8
4.200
EN_ = 0
4.195
4.190
4.185
4.180
4.175
4.170
-40
-15
10
35
60
-40
85
-15
10
35
60
85
AMBIENT TEMPERATURE (°C)
CHARGE CURRENT
vs. BATTERY VOLTAGE (100mA USB)
CHARGE CURRENT
vs. BATTERY VOLTAGE (500mA USB)
CHARGE CURRENT
vs. BATTERY VOLTAGE (AC ADAPTER)
50
40
VBAT RISING
30
VBAT FALLING
VDC = 5V
RISET = 3kΩ
PEN1 = PEN2 = 0
400
350
VBAT RISING
300
VBAT FALLING
250
200
150
600
VBAT RISING
500
VBAT FALLING
400
300
200
100
50
0
0
2
VDC = 5V
RISET = 3kΩ
PEN1 = PEN2 = 1
700
100
0
1
MAX8662/63 toc09
450
800
CHARGE CURRENT (mA)
60
VDC = 5V
RISET = 3kΩ
PEN1 = 0
PEN2 = 1
500
CHARGE CURRENT (mA)
MAX8662/63 toc07
70
550
MAX8662/63 toc08
AMBIENT TEMPERATURE (°C)
80
0
0.08
BATTERY VOLTAGE (V)
90
10
0.10
INPUT VOLTAGE (V)
5
100
20
0.12
8
0.2
0
3
BATTERY VOLTAGE (V)
8
5
MAX8662/63 toc05
0.4
4
0.8
BATTERY-LEAKAGE CURRENT (µA)
MAX8662/63 toc04
BATTERY-LEAKAGE CURRENT (µA)
EN_ = 0, CEN = 1
VDC OPEN
VDC = 5V
0.14
0
1
INPUT VOLTAGE (V)
0.5
0.16
0.02
0
BATTERY-LEAKAGE CURRENT
vs. BATTERY VOLTAGE
VBAT = 4.2V
ISYS = 0mA
PEN1 = PEN2 = 0
CEN = 1
0.18
MAX8662/63 toc06
0.8
VBAT RISING
VBAT FALLING
1.2
0.20
INPUT QUIESCENT CURRENT (mA)
1.0
VBAT = 3.6V
BATTERY-REGULATION VOLTAGE (V)
1.2
1.4
MAX8662/63 toc02
VBAT = 4.2V
ISYS = 0
CHARGER IN
DONE MODE
VBAT RISING
VBAT FALLING
INPUT QUIESCENT CURRENT
vs. INPUT VOLTAGE (SUSPEND)
INPUT QUIESCENT CURRENT
vs. INPUT VOLTAGE (CHARGER DISABLED)
INPUT QUIESCENT CURRENT (mA)
INPUT QUIESCENT CURRENT (mA)
1.4
MAX8662/63 toc01
INPUT QUIESCENT CURRENT
vs. INPUT VOLTAGE (CHARGER ENABLED)
CHARGE CURRENT (mA)
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
4
5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
BATTERY VOLTAGE (V)
0
1
2
3
BATTERY VOLTAGE (V)
_______________________________________________________________________________________
4
5
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
400
VDC = 5.0V, VBAT = 4.0V
RISET = 3kΩ, CEN = 0, EN_ = 0
300
200
5.0
PEN1 = 0, PEN2 = 1
500
400
300
0
-15
10
35
85
60
CHARGER
ENABLED
4.0
3.8
0
-40
4.6
4.2
PEN1 = PEN2 = 0
100
CHARGER
DISABLED
4.8
4.4
VDC = 6.5V, VBAT = 3.1V
RISET = 3kΩ, CEN = 0, EN_ = 0
200
PEN1 = PEN2 = 0
100
3.6
-40
-15
10
35
85
60
0
1
2
3
4
5
6
8
7
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
INPUT VOLTAGE (V)
SYS OUTPUT VOLTAGE
vs. SYS OUTPUT CURRENT (DC DISCONNECTED)
SYS OUTPUT VOLTAGE
vs. SYS OUTPUT CURRENT (500mA USB)
SYS OUTPUT VOLTAGE
vs. SYS OUTPUT CURRENT (AC ADAPTER)
5.2
VDC = 0V
VBAT = 4.0V
5.2
5.0
VSYS (V)
4.8
4.6
5.6
5.2
5.0
4.8
4.6
4.8
4.6
4.4
4.4
4.4
4.2
4.2
4.2
4.0
4.0
4.0
3.8
3.8
3.8
3.6
3.6
0
0.5
1.0
1.5
2.0
3.0
2.5
VDC = 5.0V
VBAT = 4.0V
PEN1 = PEN2 = 1
CEN = 1
5.4
VSYS (V)
5.0
VDC = 5.0V
VBAT = 4.0V
PEN1 = 0, PEN2 = 1
CEN = 1
5.4
3.6
0
0.5
ISYS (A)
1.0
1.5
2.0
0
3.0
2.5
VDC
5V
VPOK
VCHG
IBAT
0V
2V/div
+95mA
IIN
VSYS
5V/div
VPOK
5V/div
VCHG
0mA
NEGATIVE BATTERY
CURRENT FLOWS INTO
THE BATTERY
(CHARGING).
2.5
3.0
5V/div
5V
0V
+95mA
200mA/div
4.4V
2.0
MAX8662/63 toc17
+95mA
IIN
1.5
USB CONNECT (ISYS = 50mA)
5V/div
5V
0V
0mA 4.0V
1.0
ISYS (A)
MAX8662/63 toc16
VSYS
0.5
ISYS (A)
USB CONNECT (ISYS = 0mA)
VDC
MAX8662/63 toc15
THE SLOPE OF THIS LINE SHOWS THAT THE
BAT-TO-SYS RESISTANCE IS 49mΩ.
5.4
5.6
MAX8662/63 toc13
5.6
VSYS (V)
5.2
600
MAX8662/63 toc12
700
VBAT = 4.0V
ISYS = 0mA
PEN1 = 0
PEN2 = 1
5.4
VSYS (V)
PEN1 = 0, PEN2 = 1
500
MAX8662/63 toc11
800
600
5.6
MAX8662/63 toc14
CHARGE CURRENT (mA)
700
PEN1 = PEN2 = 1
CHARGE CURRENT (mA)
PEN1 = PEN2 = 1
800
900
MAX8662/63 toc10
900
200mA/div
IBAT
0mA 4.0V
5V
4.4V
200mA/div
2V/div
0V
5V/div
0V
5V/div
50mA
NEGATIVE BATTERY
CURRENT FLOWS
INTO THE BATTERY (CHARGING).
200mA/div
-45mA
200µs/div
200µs/div
PEN1 = PEN2 = 0, CEN = 0,
VBAT = 4.0V, ISYS = 0mA, EN_ = 1
PEN1 = PEN2 = 0, CEN = 0,
VBAT = 4.0V, ISYS = 50mA, EN_ = 1
_______________________________________________________________________________________
9
MAX8662/MAX8663
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5kΩ, RISET = 3kΩ, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 =
VPEN2 = 5V, COUT1 = 2 x 10µF, COUT2 = 2 x 10µF, COUT3 = 0.1µF, COUT4 = 4.7µF, COUT5 = 1µF, COUT6 = 2.2µF, COUT7 = 1µF, CT =
0.068µF, CREF = CVL = 0.1µF, RTHM = 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, VGND = VPG1 = VPG2 = VPG3 = 0V, TA = +25°C,
unless otherwise noted.)
SYS OUTPUT VOLTAGE
CHARGE CURRENT vs. AMBIENT TEMPERATURE
CHARGE CURRENT vs. AMBIENT TEMPERATURE
vs. INPUT VOLTAGE
(LOW IC POWER DISSIPATION)
(HIGH IC POWER DISSIPATION)
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5kΩ, RISET = 3kΩ, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 =
VPEN2 = 5V, COUT1 = 2 x 10µF, COUT2 = 2 x 10µF, COUT3 = 0.1µF, COUT4 = 4.7µF, COUT5 = 1µF, COUT6 = 2.2µF, COUT7 = 1µF, CT =
0.068µF, CREF = CVL = 0.1µF, RTHM = 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, VGND = VPG1 = VPG2 = VPG3 = 0V, TA = +25°C,
unless otherwise noted.)
AC ADAPTER CONNECT (ISYS = 500mA)
USB DISCONNECTED (500mA USB)
MAX8662/63 toc18
VDC
0V
IIN
0mA
VSYS
VPOK
MAX8662/63 toc19
5V
5V/div
VDC
1A/div
IIN
5V
4.0V
500mA/div
2V/div
4.4V
5V/div
5V
475mA
+1280mA
4.4V
VSYS
1V/div
5V/div
VCHG
5V/div
VCHG
0V
500mA
5V/div
0V
0mA
1A/div
-780mA
IBAT
IBAT
500mA/div
-475mA
NEGATIVE BATTERY CURRENT FLOWS
INTO THE BATTERY (CHARGING).
400µs/div
200µs/div
PEN1 = PEN2 = 1, CEN = 0,
VBAT = 4.0V, ISYS = 500mA, EN_ = 1
PEN1 = 0, PEN2 = 1, CEN = 0,
VBAT = 4.0V, ISYS = 0mA
CHARGER ENABLE (ISYS = 0mA)
OUT1 REGULATOR EFFICIENCY
vs. LOAD CURRENT
MAX8662/63 toc20
2.8V
5V/div
475mA
IIN
1A/div
0mA
5V
VSYS
4.4V
VCHG
2V/div
0V
5V/div
0mA
IBAT
-475mA
500mA/div
MAX8662/63 toc21
100
0V
OUT1 REGULATOR EFFICIENCY (%)
VCEN
90
80
VBAT = 3.6V
70
VBAT = 3.6V
60
50
VBAT = 4.2V
VBAT = 4.2V
40
30
PWM = 0
PWM = 1
VOUT1 = 3.3V
20
10
0
0.1
200µs/div
1
VBAT = 3.6V
3.1
3.0
2.9
2.8
1
10
100
LOAD CURRENT (mA)
10
1000
10,000
3.306
3.302
3.298
RLOAD = 330Ω
2.5
0.1
VBAT = 4.0V
RLOAD = 330Ω
3.294
2.6
3.20
MAX8662/63 toc24
3.2
2.7
3.24
10,000
OUT1 VOLTAGE vs. TEMPERATURE
OUTPUT VOLTAGE (V)
3.32
1000
3.310
MAX8662/63 toc23
3.3
OUTPUT VOLTAGE (V)
VBAT = 4.2V
3.28
3.4
MAX8662/63 toc22
3.36
100
OUT1 REGULATOR LINE REGULATION
OUT1 REGULATOR LOAD REGULATION
3.40
10
LOAD CURRENT (mA)
PEN1 = 0, PEN2 = 1, VBAT = 4.0V, ISYS = 0mA, EN_ = 1
OUTPUT VOLTAGE (V)
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
3.290
2.7
3.1
3.5
3.9
4.3
VSYS (V)
4.7
5.1
5.5
-40
-15
10
35
60
AMBIENT TEMPERATURE (°C)
______________________________________________________________________________________
85
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
OUT1 REGULATOR LIGHT-LOAD
SWITCHING WAVEFORMS
OUT1 REGULATOR HEAVY-LOAD
SWITCHING WAVEFORMS
MAX8662/63 toc25
MAX8662/63 toc26
VBAT = 4.0V
IOUT1 = 10mA
VOUT1
AC-COUPLED
50mV/div
VLX
VOUT1
AC-COUPLED
2V/div
IL
10mV/div
2V/div
VLX
200mA/div
IL
500mA/div
VBAT = 4.2V
IOUT1 = 1200mA
PWM = 0
20µs/div
1µs/div
OUT1 REGULATOR LOADTRANSIENT RESPONSE
OUT1 REGULATOR LINETRANSIENT RESPONSE
MAX8662/63 toc27
VLX
MAX8662/63 toc28
5V
5V/div
VSYS
IOUT1
1A/div
IL
1A/div
4V
1V/div
IOUT1 = 10mA
PWM = 0
VOUT1
50mV/div
5V/div
VLX
VBAT = 4.0V
IOUT1 = 10mA TO 1200mA TO 10mA
PWM = 0
IL
100mV/div
200mA/div
40µs/div
100µs/div
OUT2 REGULATOR EFFICIENCY
vs. LOAD CURRENT
OUT1 ENABLE AND DISABLE RESPONSE
MAX8662 toc29
IDC
200mA/div
VEN1
2V/div
MAX8662/63 toc30
90
80
70
VBAT = 4.2V
60
VBAT = 4.2V
50
VBAT = 3.6V
VBAT = 3.6V
40
30
20
PWM = 0
PWM = 1
VOUT1 = 3.3V
10
0
400µs/div
1.32
0.1
1
10
100
LOAD CURRENT (mA)
VBAT = 4.2V
1.31
OUTPUT VOLTAGE (V)
2V/div
OUT2 REGULATOR EFFICIENCY (%)
VCEN = VL
R OUT1 = 33I
VOUT1
OUT2 REGULATOR LOAD REGULATION
100
1000
MAX8662/63 toc31
VOUT1
1.30
VBAT = 3.6V
1.29
1.28
1.27
1.26
0.1
1
10
100
1000
10,000
LOAD CURRENT (mA)
______________________________________________________________________________________
11
MAX8662/MAX8663
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5kΩ, RISET = 3kΩ, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 =
VPEN2 = 5V, COUT1 = 2 x 10µF, COUT2 = 2 x 10µF, COUT3 = 0.1µF, COUT4 = 4.7µF, COUT5 = 1µF, COUT6 = 2.2µF, COUT7 = 1µF, CT =
0.068µF, CREF = CVL = 0.1µF, RTHM = 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, VGND = VPG1 = VPG2 = VPG3 = 0V, TA = +25°C,
unless otherwise noted.)
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5kΩ, RISET = 3kΩ, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 =
VPEN2 = 5V, COUT1 = 2 x 10µF, COUT2 = 2 x 10µF, COUT3 = 0.1µF, COUT4 = 4.7µF, COUT5 = 1µF, COUT6 = 2.2µF, COUT7 = 1µF, CT =
0.068µF, CREF = CVL = 0.1µF, RTHM = 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, VGND = VPG1 = VPG2 = VPG3 = 0V, TA = +25°C,
unless otherwise noted.)
OUT2 VOLTAGE vs. TEMPERATURE
MAX8662/63 toc32
1.3050
RLOAD = 130Ω
OUTPUT VOLTAGE (V)
1.308
1.306
1.304
MAX8662/63 toc33
OUT2 REGULATOR LINE REGULATION
1.310
OUTPUT VOLTAGE (V)
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
VBAT = 4.0V
RLOAD = 130Ω
1.3045
1.3040
1.3035
1.302
1.3030
1.300
2.7
3.1
3.5
3.9
4.3
4.7
5.1
5.5
-40
-15
VSYS (V)
10
35
85
OUT2 REGULATOR HEAVY-LOAD
SWITCHING WAVEFORMS
OUT2 REGULATOR LIGHT-LOAD
SWITCHING WAVEFORMS
MAX8662/63 toc35
MAX8662/63 toc34
VOUT2
AC-COUPLED
60
AMBIENT TEMPERATURE (°C)
PWM = 0
VBAT = 4.0V
IOUT2 = 10mA
20mV/div
VLX
2V/div
IL
VOUT2
AC-COUPLED
10mV/div
VL
2V/div
IL
500mA/div
100mA/div
VBAT = 4.0V
IOUT2 = 900mA
10µs/div
1µs/div
OUT2 REGULATOR LOADTRANSIENT RESPONSE
OUT2 REGULATOR LINETRANSIENT RESPONSE
MAX8662/63 toc37
MAX8662/63 toc36
5V
VLX
5V/div
VSYS
IOUT2
1A/div
VOUT1
IL
VOUT2
AC-COUPLED
500mA/div
50mV/div
VBAT = 4.0V
IOUT2 = 10mA TO 900mA TO 10mA
40µs/div
12
4V
IOUT1 = 10mA
PWM = 0
1V/div
20mV/div
VLX
5V/div
200mA/div
IL
PWM = 0
100µs/div
______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
LED CURRENT
vs. PWM DIMMING DUTY CYCLE
5.0
VCEN = VL
R OUT2 = 33I
VBAT = 3.6V
VBRT = 0.25V
f = 1kHz
4.5
IDC
200mA/div
VEN2
3.5
3.0
2.5
2.0
1.5
1.0
2V/div
VBAT = 3.6V
25
LED CURRENT (mA)
1V/div
LED CURRENT (mA)
4.0
VOUT2
LED CURRENT vs. BRT VOLTAGE
30
MAX8662/63 toc40
MAX8662 toc38
MAX8662/63 toc39
OUT2 ENABLE AND DISABLE RESPONSE
20
15
10
5
0.5
0
0
0
10
20 30 40 50
0
60 70 80 90 100
0.3
MAX8662/63 toc41
MAX8662 toc42
100mA/div
VOUT3
VLX
100
VCEN = VL
OUT3 LOAD = 7 WLEDs
ILED = 30mA
VBAT = 4.0V
COMPENSATION
AT CC3 = 1kI
IN SERIES WITH 0.22µF
4.0V
10V/div
10V/div
IDC
VOUT3
AC-COUPLED
200mV/div
200mA/div
VEN3
2V/div
OUT2 REGULATOR EFFICIENCY (%)
IL
0.9
1.5
1.2
OUT3 REGULATOR EFFICIENCY
vs. LOAD CURRENT
OUT3 ENABLE AND DISABLE RESPONSE
OUT3 SWITCHING WAVEFORMS
0.6
BRT VOLTAGE (V)
DUTY CYCLE (%)
MAX8662/63 toc43
400µs/div
VSYS = 5.5V
VSYS = 4.2V
90
80
70
VSYS = 3.6V
60
50
40
30
20
10
IOUT3 = 1mA
0
1µs/div
0.1
4ms/div
1
10
100
LOAD CURRENT (mA)
3.295
3.290
VIN = 5.5V
2.6
2.2
1.8
1.4
0
100
200
300
LOAD CURRENT (mA)
400
500
3.311
3.309
3.307
3.285
3.280
VBAT = 4.0V
RLOAD = 330Ω
3.313
OUTPUT VOLTAGE (V)
VIN = 3.6V
3.300
RLOAD = 330Ω
3.0
OUTPUT VOLTAGE (V)
3.305
OUT4 VOLTAGE vs. TEMPERATURE
3.315
MAX8662/63 toc45
MAX8662/63 toc44
3.310
OUTPUT VOLTAGE (V)
OUT4 REGULATOR LINE REGULATION
3.4
MAX8662/63 toc46
OUT4 REGULATOR LOAD REGULATION
3.315
3.305
1
2
3
4
VIN_OUT4 (V)
5
6
-40
-15
10
35
85
60
AMBIENT TEMPERATURE (°C)
_____________________________________________________________________________________
13
MAX8662/MAX8663
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5kΩ, RISET = 3kΩ, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 =
VPEN2 = 5V, COUT1 = 2 x 10µF, COUT2 = 2 x 10µF, COUT3 = 0.1µF, COUT4 = 4.7µF, COUT5 = 1µF, COUT6 = 2.2µF, COUT7 = 1µF, CT =
0.068µF, CREF = CVL = 0.1µF, RTHM = 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, VGND = VPG1 = VPG2 = VPG3 = 0V, TA = +25°C,
unless otherwise noted.)
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5kΩ, RISET = 3kΩ, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 =
VPEN2 = 5V, COUT1 = 2 x 10µF, COUT2 = 2 x 10µF, COUT3 = 0.1µF, COUT4 = 4.7µF, COUT5 = 1µF, COUT6 = 2.2µF, COUT7 = 1µF, CT =
0.068µF, CREF = CVL = 0.1µF, RTHM = 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, VGND = VPG1 = VPG2 = VPG3 = 0V, TA = +25°C,
unless otherwise noted.)
OUT4 REGULATOR LINEOUT4 REGULATOR LOADTRANSIENT RESPONSE
TRANSIENT RESPONSE
MAX8662/63 toc48
MAX8662/63 toc47
5V
3.6V
VIN45
IOUT4
2V/div
500mA/div
VOUT4
AC-COUPLED
20mV/div
VOUT4
AC-COUPLED
50mV/div
VBAT = 4.0V
IOUT4 = 10mA TO 500mA TO 10mA
IOUT4 = 10mA
100µs/div
40µs/div
OUT4 REGULATOR DROPOUT VOLTAGE
vs. LOAD CURRENT
VCEN = VL
R OUT4 = 33I
THE SLOPE OF THIS LINE SHOWS THAT
THE DROPOUT RESISTANCE OF AN
AVERAGE PART AND BOARD
COMBINATION IS 181mΩ.
2V/div
VOUT4
IDC
200mA/div
VEN4
DROPOUT VOLTAGE (mV)
90
80
OUT5 REGULATOR LOAD REGULATION
3.310
3.308
70
60
50
40
30
VIN = 3.6V
3.306
3.304
VIN = 5.5V
3.302
20
2V/div
MAX8662/63 toc51
100
OUTPUT VOLTAGE (V)
MAX8662 toc49
MAX8662/63 toc50
OUT4 ENABLE AND DISABLE RESPONSE
10
3.300
0
0
400µs/div
100
200
300
400
0
500
30
OUT5 VOLTAGE vs. TEMPERATURE
3.310
MAX8662/63 toc52
RLOAD = 330Ω
3.309
OUTPUT VOLTAGE (V)
3.0
2.6
2.2
1.8
VBAT = 4.0V
RLOAD = 330Ω
3.308
3.307
3.306
3.305
1.4
3.304
1
2
3
4
VIN_OUT5 (V)
14
90
MAX8662/63 toc53
OUT5 REGULATOR LINE REGULATION
3.4
60
LOAD CURRENT (mA)
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
5
6
-40
-15
10
35
60
AMBIENT TEMPERATURE (°C)
______________________________________________________________________________________
85
120
150
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
OUT5 REGULATOR LOADTRANSIENT RESPONSE
OUT5 REGULATOR LINETRANSIENT RESPONSE
MAX8662/63 toc55
MAX8662/63 toc54
5V
VIN45
IOUT5
3.6V
2V/div
100mA/div
VOUT5
AC-COUPLED
VOUT5
AC-COUPLED
50mV/div
20mV/div
IOUT5 = 10mA
VBAT = 4.0V
IOUT5 = 10mA TO 150mA TO 10mA
100µs/div
40µs/div
70
MAX8662 toc56
VCEN = VL
R OUT5 = 33I
THE SLOPE OF THIS LINE SHOWS THAT
THE DROPOUT RESISTANCE OF AN
AVERAGE PART AND BOARD
COMBINATION IS 384mΩ.
60
VOUT5
IDC
DROPOUT VOLTAGE (V)
2V/div
200mA/div
VEN5
2V/div
MAX8662/63 toc57
OUT5 REGULATOR DROPOUT VOLTAGE
vs. LOAD CURRENT
OUT5 ENABLE AND DISABLE RESPONSE
50
40
30
20
10
0
0
400µs/div
30
60
90
150
120
IOUT (mA)
3.0
3.298
VIN = 3.6V
3.294
OUTPUT VOLTAGE (V)
VIN = 5.5V
RLOAD = 330Ω
3.2
OUTPUT VOLTAGE (V)
3.302
OUT6 VOLTAGE vs. TEMPERATURE
3.309
MAX8662/63 toc59
MAX8662/63 toc58
3.306
OUTPUT VOLTAGE (V)
3.4
2.8
2.6
2.4
2.2
2.0
MAX8662/63 toc60
OUT6 REGULATOR LINE REGULATION
OUT6 REGULATOR LOAD REGULATION
3.310
VBAT = 4.0V
RLOAD = 330Ω
3.307
3.305
3.303
1.8
1.6
1.4
3.290
0
50
100
150
200
LOAD CURRENT (mA)
250
300
3.301
1
2
3
4
VIN_OUT6 (V)
5
6
-40
-15
10
35
60
85
AMBIENT TEMPERATURE (°C)
______________________________________________________________________________________
15
MAX8662/MAX8663
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5kΩ, RISET = 3kΩ, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 =
VPEN2 = 5V, COUT1 = 2 x 10µF, COUT2 = 2 x 10µF, COUT3 = 0.1µF, COUT4 = 4.7µF, COUT5 = 1µF, COUT6 = 2.2µF, COUT7 = 1µF, CT =
0.068µF, CREF = CVL = 0.1µF, RTHM = 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, VGND = VPG1 = VPG2 = VPG3 = 0V, TA = +25°C,
unless otherwise noted.)
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5kΩ, RISET = 3kΩ, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 =
VPEN2 = 5V, COUT1 = 2 x 10µF, COUT2 = 2 x 10µF, COUT3 = 0.1µF, COUT4 = 4.7µF, COUT5 = 1µF, COUT6 = 2.2µF, COUT7 = 1µF, CT =
0.068µF, CREF = CVL = 0.1µF, RTHM = 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, VGND = VPG1 = VPG2 = VPG3 = 0V, TA = +25°C,
unless otherwise noted.)
OUT6 REGULATOR LINEOUT6 REGULATOR LOADTRANSIENT RESPONSE
TRANSIENT RESPONSE
MAX8662/63 toc62
MAX8662/63 toc61
5V
3.6V
VIN67
IOUT6
2V/div
200mA/div
VOUT6
AC-COUPLED
20mV/div
VOUT6
AC-COUPLED
50mV/div
IOUT6 = 10mA
VBAT = 4.0V
IOUT6 = 10mA TO 300mA TO 10mA
100µs/div
OUT6 ENABLE AND DISABLE RESPONSE
OUT6 REGULATOR DROPOUT VOLTAGE
vs. LOAD CURRENT
MAX8662 toc63
80
DROPOUT VOLTAGE (mV)
IDC
200mA/div
VEN6
THE SLOPE OF THIS LINE SHOWS THAT
THE DROPOUT RESISTANCE OF AN
AVERAGE PART AND BOARD
COMBINATION IS 238mΩ.
70
2V/div
VOUT6
MAX8662/63 toc64
40µs/div
VCEN = VL
R OUT6 = 33I
60
50
40
30
20
2V/div
10
0
50
0
400µs/div
100
150
200
250
300
IOUT (mA)
OUT7 REGULATOR LINE REGULATION
3.0
VIN = 5.5V
3.298
VIN = 3.6V
3.296
2.8
2.6
2.4
2.2
2.0
1.8
VBAT = 4.0V
RLOAD = 330Ω
3.302
OUTPUT VOLTAGE (V)
3.300
RLOAD = 330Ω
3.2
OUTPUT VOLTAGE (V)
3.302
OUT7 VOLTAGE vs. TEMPERATURE
3.303
MAX8662/63 toc66
MAX8662/63 toc65
3.4
MAX8662/63 toc67
OUT7 REGULATOR LOAD REGULATION
3.304
OUTPUT VOLTAGE (V)
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
3.301
3.300
3.299
1.6
3.294
1.4
0
30
60
90
LOAD CURRENT (mA)
16
120
150
3.298
1
2
3
4
VIN_OUT7 (V)
5
6
-40
-15
10
35
60
AMBIENT TEMPERATURE (°C)
______________________________________________________________________________________
85
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
MAX8662/63 toc68
MAX8662/63 toc69
5V
3.6V
VIN67
IOUT7
2V/div
100mA/div
50mV/div
VOUT7
AC-COUPLED
20mV/div
VOUT7
AC-COUPLED
IOUT7 = 10mA
VBAT = 4.0V
IOUT7 = 10mA TO 150mA TO 10mA
40µs/div
100µs/div
OUT7 REGULATOR DROPOUT VOLTAGE
vs. LOAD CURRENT
IDC
200mA/div
VEN7
DROPOUT VOLTAGE (V)
2V/div
VOUT7
THE SLOPE OF THIS LINE SHOWS THAT
THE DROPOUT RESISTANCE OF AN
AVERAGE PART AND BOARD
COMBINATION IS 391mΩ.
60
2V/div
50
3.30
40
30
20
VIN = 5.5V
3.28
3.27
3.26
VIN = 4.35V
3.25
10
3.24
0
400µs/div
3.29
0
25
50
75
100
125
0
150
1
2
OUTPUT VOLTAGE (V)
3.40
3.35
3.30
3.25
3.20
3.15
3.10
0.5
OUTPUT LOW VOLTAGE (V)
MAX8662/63 toc73
RLOAD = 3.3kΩ
3.45
4
5
6
7
8
9
10
OPEN-DRAIN OUTPUT VOLTAGE LOW
vs. SINK CURRENT
VL REGULATOR LINE REGULATION
3.50
3
LOAD CURRENT (mA)
IOUT (mA)
MAX8662/63 toc74
VCEN = VL
R OUT7 = 33I
VL REGULATOR LOAD REGULATION
3.31
MAX8662/63 toc72
70
OUTPUT VOLTAGE (V)
MAX8662 toc70
MAX8662/63 toc71
OUT7 ENABLE AND DISABLE RESPONSE
THE SLOPE OF THIS LINE SHOWS THAT
THE PULLDOWN RESISTANCE IS 11Ω.
VIN = 5.0V
VBAT = 4.0V
0.4
0.3
0.2
0.1
PULLDOWN DEVICE HAS A
20mA STEADY-STATE RATING
3.05
3.00
0
3
4
5
6
VIN (V)
7
8
0
5
10
15
20
25
30
35
40
ISINK (mA)
______________________________________________________________________________________
17
MAX8662/MAX8663
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VDC = 5V, RPSET = 1.5kΩ, RISET = 3kΩ, VOUT1 = 3.3V, VOUT2 = 1.3V, SL1 = SL2 = open, VCEN = 0V, VPEN1 =
VPEN2 = 5V, COUT1 = 2 x 10µF, COUT2 = 2 x 10µF, COUT3 = 0.1µF, COUT4 = 4.7µF, COUT5 = 1µF, COUT6 = 2.2µF, COUT7 = 1µF, CT =
0.068µF, CREF = CVL = 0.1µF, RTHM = 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, VGND = VPG1 = VPG2 = VPG3 = 0V, TA = +25°C,
unless otherwise noted.)
OUT7 REGULATOR LOADOUT7 REGULATOR LINETRANSIENT RESPONSE
TRANSIENT RESPONSE
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Pin Description
PIN
NAME
FUNCTION
MAX8662
MAX8663
1
1
PEN1
Input Limiter-Control Input 1. Used with CEN and PEN2 to set the DC current limit to 95mA,
475mA, a resistor programmable level up to 2A, or to turn off the input limiter (see Table 1).
2
2
PEN2
Input Limiter-Control Input 2. Used with CEN and PEN1 to set the DC current limit to 95mA,
475mA, a resistor programmable level up to 2A, or to turn off the input limiter (see Table 1).
3
—
EN3
Enable Input and PWM Dimming Input for Regulator 3 White LED Boost. Drive high to
enable. Drive low for more than 2ms to turn off. For PWM-controlled dimming, drive EN3
with a PWM switching input with a frequency of 1kHz to 100kHz.
4, 5
3, 4
DC1,
DC2
DC Input Source. Connect to an AC adapter or USB source. DC1 and DC2 are internally
connected.
6, 7
5, 6
SYS1,
SYS2
System Supply Voltage. The SYS output supplies power to all regulators. With no external
power, SYS1 and SYS2 connect to BAT through an internal 40mΩ switch. When a valid
voltage is present at DC_, SYS_ connects to DC_ but is limited to 5.3V. SYS1 and SYS2 are
internally connected.
8, 9
7, 8
BAT1,
BAT2
Battery Connections. Connect to a single-cell Li+ battery. The battery is charged from SYS_
when a valid source is present at DC. BAT_ drives SYS_ when DC is not valid. BAT1 and
BAT2 are internally connected.
10
—
BRT
LED Analog Brightness Control Input. Connect BRT to a voltage from 50mV to 1.5V to set
ICS from 1mA to 30mA. Connect BRT to the center of a resistor-divider connected between
REF and GND to set a fixed brightness when analog dimming is not required.
11
9
CHG
Charger Status Output. CHG is an open-drain nMOS that pulls low when the charger is in
fast charge or prequalification modes. CHG goes high impedance when the charger is in
top-off mode or disabled.
12
10
CEN
Charger Enable Input. Drive CEN low to enable the charger when a valid source is
connected at DC. Drive CEN high to disable charging. Drive CEN high and PEN2 low to
enter USB suspend mode.
13
11
THM
Thermistor Input. Connect a 10kΩ negative temperature coefficient (NTC) thermistor from
THM to GND. Charging is suspended when the temperature is beyond the hot or cold
limits. Connect THM to GND to disable the thermistor functionality.
14
12
ISET
Charge Rate-Set Input. Connect a resistor from ISET to GND to set the fast-charge current
from 300mA to 1.25A. The prequalification charge current and top-off threshold are set to
10% and 7.5% of fast-charge current, respectively.
18
15
13
CT
Charge Timer-Programming Pin. Connect a capacitor from CT to GND to set the length of
time required to trigger a fault condition in fast-charge or prequalification mode and to
determine the time the charger remains in top-off mode. Connect CT to GND to disable
timers.
16
—
REF
Reference Voltage. Provides 1.5V output when EN3 is high. An internal discharge
resistance pulls REF to 0V when EN3 is low.
17
14
GND
Ground. Low-noise ground connection.
18
15
OUT4
Linear Regulator 4 Output. Delivers up to 500mA at an output voltage determined by SL1
and SL2. Connect a 4.7µF ceramic capacitor from OUT4 to GND. Increase the value to
10µF if VOUT4 < 1.5V.
______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
PIN
NAME
FUNCTION
16
IN45
Input Supply for Linear Regulators 4 and 5. Connect IN45 to a supply voltage between 1.7V
and VSYS. Connect at least a 1µF ceramic capacitor from IN45 to GND.
20
17
OUT5
Linear Regulator 5 Output. Delivers up to 150mA at an output voltage determined by SL1
and SL2. Connect a 1µF ceramic capacitor from OUT5 to GND. Increase the value to 2.2µF
if VOUT5 < 1.5V.
21
18
EN4
22
19
EN5
Enable Input for Linear Regulator 5. Drive high to enable.
MAX8662
MAX8663
19
Enable Input for Linear Regulator 4. Drive high to enable.
23
20
PWM
PWM/Skip-Mode Selector. Drive PWM high to force step-down regulators 1 and 2 to
operate in 1MHz forced-PWM mode. Drive PWM low, or connect to GND to allow regulators
1 and 2 to enter skip mode at light loads.
24
21
FB1
Feedback Input for Buck Regulator 1. Connect FB1 to the center of a resistor-divider
connected between OUT1 and GND to set the output voltage between 0.98V and 3.3V.
25
22
EN1
Enable Input for Buck Regulator 1. Drive high to enable.
26
23
PG1
Power Ground for Buck Regulator 1. GND, PG1, PG2, and PG3 must be connected
together externally.
27
24
LX1
Buck Regulator 1 Inductor Connection Node. Connect an inductor from LX1 to the output of
regulator 1.
28
25
PV1
Power Input for Buck Regulator 1. Connect PV1 to SYS and decouple with a 10µF or greater lowESR capacitor to GND. PV1, PV2, and SYS must be connected together externally.
LED Boost Overvoltage Input. Connect a resistor from OVP to the boost output to set the
maximum output voltage and to initiate soft-start when EN3 goes high. An internal 20µA
pulldown current from OVP to GND determines the maximum boost voltage. The internal
current is disconnected when EN3 is low. OVP is diode clamped to SYS_.
29
—
OVP
30
—
CS
31
—
CC3
Compensation Input for LED Boost Regulator 3. See the Boost Converter with White LED Driver
(OUT3, MAX8662 Only) section.
32
26
FB2
Feedback Input for Buck Regulator 2. Connect FB2 to the center of a resistor-divider
connected between OUT2 and GND to set the output voltage between 0.98V and 3.3V.
33
27
PV2
Power Input for Buck Regulator 2. Connect PV2 to SYS and decouple with a 10µF or
greater low-ESR capacitor to GND. PV1, PV2, and SYS must be connected together
externally.
34
28
LX2
Buck Regulator 2 Inductor Connection Node. Connect an inductor from LX2 to the output of
regulator 2.
35
29
PG2
Power Ground for Buck Regulator 2. GND, PG1, PG2, and PG3 must be connected together
externally.
36
30
EN2
Enable Input for Buck Regulator 2. Drive high to enable.
37
31
EN6
Enable Input for Linear Regulator 6. Drive high to enable.
38
32
EN7
Enable Input for Linear Regulator 7. Drive high to enable.
39
—
LX3
Boost Regulator 3 Inductor Connection Node. Connect an inductor from LX3 to SYS_.
LED Current Source. Sinks from 1mA to 30mA depending on the voltage at BRT and the
PWM signal at EN3. Driving EN3 low for more than 2ms turns off the current source. VCS is
regulated to 0.32V.
______________________________________________________________________________________
19
MAX8662/MAX8663
Pin Description (continued)
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Pin Description (continued)
PIN
NAME
FUNCTION
MAX8662
MAX8663
40
—
PG3
41
33
OUT6
Linear Regulator 6 Output. Delivers up to 300mA at an output voltage determined by SL1
and SL2. Connect a 2.2µF ceramic capacitor from OUT6 to GND. Increase the value to
4.7µF if VOUT6 < 1.5V.
42
34
IN67
Input Supply for Linear Regulators 6 and 7. Connect IN67 to a supply voltage of 1.7V to
VSYS. Connect at least a 1µF ceramic capacitor from IN67 to GND.
43
35
OUT7
Linear Regulator 7 Output. Delivers up to 150mA at an output voltage determined by SL1
and SL2. Connect a 1µF ceramic capacitor from OUT7 to GND. Increase the value to 2.2µF
if VOUT7 < 1.5V.
44
36
VL
Input Limiter and Charger Logic Supply. Provides 3.3V when a valid input voltage is
present at DC. Connect a 0.1µF capacitor from VL to GND. VL is capable of providing up to
10mA to an external load when DC is valid.
45
37
SL1
46
38
SL2
47
39
PSET
Input Current-Limit Set Input. Connect a resistor (RPSET) from PSET to ground to program
the DC input current limit from 500mA to 2A.
48
40
POK
Power-Ok Output. POK is an open-drain nMOS output that pulls low when a valid input is
detected at DC. This output is not affected by the states of PEN1, PEN2, or CEN.
—
20
—
EP
Power Ground for Boost Regulator 3. GND, PG1, PG2, and PG3 must be connected
together externally.
Output-Voltage Select Inputs 1 and 2 for Linear Regulators. Leave disconnected, or
connect to GND or SYS to set to one of three states. SL1 and SL2 set the output voltage of
OUT4, OUT5, OUT6, and OUT7 to one of nine combinations. See Table 3.
Exposed Paddle. Connect the exposed paddle to ground. Connecting the exposed paddle
to ground does not remove the requirement for proper ground connections to GND, PG1,
PG2, and PG3. The exposed paddle is attached with epoxy to the substrate of the die,
making it an excellent path to remove heat from the IC.
______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
DC1
SYS1
DC2
SYS2
MAX8662/MAX8663
INPUT FROM AC
ADAPTER/USB
4.1V TO 8V
SYS
C1
VLOGIC
C10
+
R1
POK
INPUTVOLTAGE
MONITOR
GND
VL
-
INPUT-TO-SYS
CURRENTLIMITING
SWITCH
BAT1
BATTERY-TO-SYS
SWITCH (ALLOWS
BAT AND DC TO SUPPLY
CURRENT TO SYS)
3.3V
C2
INPUT LIMITER
AND
THERMAL
PROTECTION
PV1
SYS
+
100mV
C11
THM
R6
BATTERY
CHARGER
L1
MAIN
STEP-DOWN
REGULATOR
C5
MAIN
R2
TIMEOUT
R3
PEN2
500mA
PEN1
ADAPTER
OFF
C12
CT
MAX8662
MAX8663
EN1
CHARGING
100mA
USB
ON
R8
PSET
FB1
ON
DONE
CEN
PG1
VLOGIC
OK
R7
LX1
MAIN
BATTERY
BATTERY THERMISTOR
CHG
C4
OUT1
0.98V TO 3.3V AT 1.2A
BAT2
R9
ISET
OFF
PWM
LX3
PWM
C6
OUT2
0.98V TO 3.3V AT 0.9A
PG3
L2
CORE
STEP-UP
LED
DRIVER
CC3
D4
R10
OVP
PG2
ONLY AVAILABLE
D5 FOR THE MAX8662
D6
1kΩ
C15
0.22µF
FB2
CS
EN2
EN3
BRT
ON
D2
LX2
CORE
STEP-DOWN
REGULATOR
R5
OUT3 AT 30mA
C14
D3
C7
R4
C13
D1
PV2
SYS
SYS
L3
SKIP
OFF
1.5V
REF
D7
D8
D9 TO SYS*
ANALOG DIMMING
(0 TO 1.5V)
PWM BRIGHTNESS
CONTROL AND ENABLE
C3, 0.1µF
OUT4
EN4
IN45
SYS
OFF
C8
OUT5
EN5
TRI-STATE MODE
INPUTS; SEE TABLE 2
SL1
{
SL2
C17
ON
OUT5
150mA
OFF
LDO OUTPUTVOLTAGE
SETTING
OUT6
EN6
IN67
SYS
OUT4
500mA
C16
ON
C18
ON
OUT6
300mA
OFF
C9
OUT7
EN7
C19
ON
OUT7
150mA
OFF
EP
*OPTIONAL.
Figure 1. Block Diagram and Application Circuit
______________________________________________________________________________________
21
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Detailed Description
The MAX8662/MAX8663 highly integrated PMICs are
designed for use in smart cellular phones, PDAs,
Internet appliances, and other portable devices. They
integrate two synchronous buck regulators, a boost
regulator driving two to seven white LEDs (MAX8662
only), four low dropout (LDO) linear regulators, and a
linear charger for a single-cell Li+ battery. Figure 1 is
the block diagram and application circuit.
SPS circuitry offers flexible power distribution between
an AC adapter or USB source, battery, and system
load, and makes the best use of available power from
the AC adapter/USB input. The battery is charged with
any available power not used by the system load. If a
system load peak exceeds the current limit, supplemental current is taken from the battery. Thermal limiting prevents overheating by reducing power drawn
from the input source.
Two step-down DC-DC converters achieve excellent
light-load efficiency and have on-chip soft-start circuitry; 1MHz switching frequency allows for small external
components. Four LDO linear regulators feature low
quiescent current and operate from inputs as low as
1.7V. This allows the LDOs to operate from the stepdown output voltage to improve efficiency. The white
LED driver features easy adjustment of LED brightness
and open-LED overvoltage protection. A 1-cell Li+
charger has programmable charge current up to 1.25A
and a charge timer.
Smart Power Selector (SPS)
SPS seamlessly distributes power between the external
input, the battery, and the system load (Figure 2). The
basic functions of SPS are:
• With both the external power supply and battery
connected:
AC ADAPTER
OR
USB INPUT
•
When the battery is connected and there is no
external power input, the system is powered from
the battery.
•
When an external power input is connected and
there is no battery, the system is powered from the
external power input.
A thermal-limiting circuit reduces battery-charge rate and
external power-source current to prevent overheating.
22
Q1 INPUT-TO-SYS
SWITCH
SYS
SYSTEM
LOAD
Q2
BATTERY-TO-SYS
SWITCH
(DISCHARGE PATH)
Q3
(CHARGE
PATH)
BAT
BATTERY
GND
MAX8662
MAX8663
RTHM
THM
Figure 2. Smart Power Selector Block Diagram
Input Limiter
All regulated outputs (OUT1–OUT7) derive their power
from the SYS output. With an AC adapter or USB source
connected at DC, the input limiter distributes power
from the external power source to the system load and
battery charger. In addition to the input limiter’s primary
function of passing the DC power source to the system
and charger loads at SYS, it performs several additional
functions to optimize use of available power:
•
Input Voltage Limiting: If the voltage at DC rises,
SYS limits to 5.3V, preventing an overvoltage of the
system load. A DC voltage greater than 6.9V is considered invalid and the input limiter disconnects the
DC input entirely. The withstand voltage at DC is
guaranteed to be at least 9V. A DC input is also
invalid if it is less than BAT, or less than the DC
undervoltage threshold of 3.5V (falling). With an
invalid DC input voltage, SYS connects to BAT
through a 40mΩ switch.
•
Input Overcurrent Protection: The current at DC is
limited to prevent input overload. This current limit
is automatically adjusted to match the capabilities
of source, whether it is a 100mA or 500mA USB
source, or an AC adapter. When the load exceeds
the input current limit, SYS drops to 100mV below
BAT and supplemental load current is provided by
the battery.
a) When the system load requirements exceed the
capacity of the external power input, the battery
supplies supplemental current to the load.
b) When the system load requirements are less than
the capacity of the external power input, the battery is charged with residual power from the input.
DC
______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
•
Thermal Limiting: The input limiter includes a thermal-limiting circuit that reduces the current drawn
from DC when the IC junction temperature increases
beyond +100°C in an attempt to prevent further
heating. The current limit is be reduced by 5%/°C for
temperatures above +100°C, dropping to 0mA at
+120°C. Due to the adaptive nature of the charging
circuitry, the charger current reduces to 0mA before
the system load is affected by thermal limiting.
Adaptive Battery Charging: While the system is
powered from DC, the charger can also draw
power from SYS to charge the battery. If the charger load plus system load exceeds the current capability of the input source, an adaptive charger
control loop reduces charge current to prevent the
SYS voltage from collapsing. Maintaining a higher
SYS voltage improves efficiency and reduces
power dissipation in the input limiter by running the
switching regulators at lower current.
SYS
(CHARGER ON)
The adaptive battery-charger circuit reduces charging
current when the SYS voltage drops 550mV below DC.
For example, if DC is at 5V, the charge current reduces
to prevent SYS from dropping below 4.45V. When DC is
greater than 5.55V, the adaptive charging circuitry
reduces charging current when SYS drops 300mV
below the 5.3V SYS regulation point (5.0V). Finally, the
circuit prevents itself from pulling SYS down to within
100mV of BAT.
INPUT: 500mA USB
CHARGER: RISET = 3.112kΩ (750mA)
DC
SYS
(CHARGER OFF)
Figure 3 shows the SYS voltage and its relationship to
DC and BAT under three conditions:
a) Charger is off and SYS is driven from DC.
b) Charger is on and adaptive charger control is limiting
charge current.
c) The load at SYS is greater than the available input current.
5.3V
5.0V
ISYS x 150mΩ
550mV
ISYS x 30mΩ
BAT
SYS
(SYS OVERLOAD)
4.0V
3.9V
100mV
100mV
475mA
BAT CHARGE
CURRENT
(CHARGE ON)
0mA
Figure 3. SYS Voltage and Charge Current vs. DC and BAT Voltage
______________________________________________________________________________________
23
MAX8662/MAX8663
•
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Power-OK Output (POK)
DC Input Current-Limit Selection
(PEN1/PEN2)
POK is an active-low open-drain output indicating DC
status. When the voltage at DC is between the undervoltage and the overvoltage thresholds, and is greater
than the BAT voltage, POK pulls low to indicate that
input power is OK. Otherwise, POK is high impedance.
POK is not affected by the states of PEN1, PEN2, or
CEN. POK remains active in thermal overload.
The input current limit can be set to a variety of values
as shown in Table 1. When the PEN1 input is low, a
USB source is expected at DC and the current limit is
set to either 95mA or 475mA by PEN2.
When PEN1 is high, an AC adapter is expected at DC
and the current limit is set based on a programming resistor at PSET. The DC input current limit is calculated from:
IDC_LIM = 2000 x (1.5 / RPSET)
An exception is when the battery charger is disabled
(CEN high) with PEN2 low, where the MAX8662/
MAX8663 enter USB suspend mode.
Battery Charger
The battery charger state diagram is illustrated in
Figure 4.
With a valid AC adapter/USB voltage present, the battery charger initiates a charge cycle when the charger
Table 1. DC Input Current and Charger Current-Limit Select
CEN
PEN1
PEN2
0
0
0
1
1
1
0
0
1
X*
0
1
0
1
X*
0
1
1
DC INPUT CURRENT LIMIT
95mA
475mA
2000(1.5V / RPSET)
Off
475mA
2000(1.5V / RPSET)
EXPECTED INPUT TYPE
CHARGER CURRENT LIMIT**
100mA USB
500mA USB
AC adapter
USB suspend
500mA USB
AC adapter
*X = Don’t care.
1556(1.5V / RISET)
1556(1.5V / RISET)
1556(1.5V / RISET)
Off
Off
Off
**The maximum charge will not exceed the DC Input current.
CHARGER OFF
CEN = 1 OR REMOVE AND
RECONNECT AC
ADAPTER/USB
CHG = HIGH-Z
IBAT = 0mA
ANY STATE
TOGGLE CEN OR
REMOVE AND
RECONNECT AC
ADAPTER/USB
CEN = 0
SET TIMER = 0
PREQUALIFICATION
TIMER > tPREQUAL
CHG = 0V
IBAT = ICHG-MAX / 10
VBAT > 3V
SET TIMER = 0
VBAT < 2.82V
SET TIMER = 0
FAST CHARGE
TIMER > tFST-CHG
(TIMER SUSPENDED IF IBAT < ICHG-MAX x
20% WHILE VBAT < 4.2V)
ANY CHARGING STATE
THERMISTOR
TOO HOT OR TOO COLD
TIMER = SUSPENDED
IBAT < ICHG-MAX x 7.5%
AND VBAT = 4.2V
SET TIMER = 0
THERMISTOR
TEMPERATURE OK
TIMER = RESUMED
TEMPERATURE
SUSPEND
IBAT = 0mA
CHG = PREVIOUS STATE
FAULT
POK = 0V
CHG = BLINK AT 1Hz
IBAT = 0mA
CHG = 0V
IBAT = ICHG-MAX
IBAT > ICHG-MAX x 12%
SET TIMER = 0
TOP - OFF
CHG = HIGH - Z
VBAT = < 4.1V
SET TIMER = 0
TIMER > tTOP-OFF
DONE
CHG = HIGH-Z
IBAT = 0mA
Figure 4. Charger State Diagram
24
______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
MONITORING THE BATTERY CHARGE CURRENT WITH VISET
ISET VOLTAGE (V)
VISET =
RISET
1556
x IBAT
1.5
0
DISCHARGING
Charge Current
ISET adjusts the MAX8662/MAX8663 charging current
to match the capacity of the battery. A resistor from
ISET to ground sets the maximum fast-charge current,
the charge current in prequal, and the charge-current
threshold below which the battery is considered completely charged. Calculate these thresholds as follows:
ICHG-MAX = 1556 x 1.5V / RISET
IPRE-QUAL = 10% x ICHG-MAX
ITOP-OFF = 7.5% x ICHG-MAX
Determine the ICHG-MAX value by considering the characteristics of the battery, and not the capabilities of the
expected AC adapter/USB charging input, the system
load, or thermal limitations of the PCB. The MAX8662/
MAX8663 automatically adjust the charging algorithm
to accommodate these factors.
In addition to setting the charge current, ISET also provides a means to monitor battery-charge current. The
output voltage of the ISET pin tracks the charge current
delivered to the battery, and can be used to monitor the
charge rate, as shown in Figure 5. A 1.5V output indicates the battery is being charged at the maximum set
fast-charge current; 0V indicates no charging. This voltage is also used by the charger control circuitry to set
and monitor the battery current. Avoid adding more
than 10pF capacitance directly to the ISET pin. If filtering of the charge-current monitor is necessary, add a
resistor of 100kΩ or more between ISET and the filter
capacitor to preserve charger stability.
MAX8662/MAX8663
is enabled. It first detects the battery voltage. If the battery voltage is less than the BAT prequalification threshold (3.0V), the charger enters prequalification mode in
which the battery charges at 10% of the maximum fastcharge current. This slow charge ensures that the battery is not damaged by fast-charge current while
deeply discharged. Once the battery voltage rises to
3.0V, the charger transitions to fast-charge mode and
applies the maximum charge current. As charging continues, the battery voltage rises until it reaches the battery regulation voltage (4.2V) where charge current
starts tapering down. When charge current decreases
to 7.5% of fast-charge current, the charger enters topoff mode. Top-off charging continues for 30min, then all
charging stops. If the battery voltage subsequently
drops below the 4.1V recharge threshold, charging
restarts and the timers reset.
0
1556 x (1.5V/RISET)
BATTERY-CHARGING CURRENT (A)
Figure 5. Monitoring the Battery Charge Current with ISET
Output Voltage
Charge Timer
As shown in Figure 3, the MAX8662/MAX8663 feature a
fault timer for safe charging. If prequalification charging
or fast charging does not complete within the time limits,
which are programmed by the timer capacitor at CT, the
charger stops charging and issues a timeout fault.
Charging can be resumed by either toggling CEN or
cycling the DC input voltage.
The MAX8662/MAX8663 support values of CCT from
0.01µF to 1µF:
C CT
t PREQUAL = 30 min×
0 . 068µ F
t FST − CHG = 300 min×
C CT
0 . 068µ F
When the charger exits fast-charge mode, CHG goes
high impedance and top-off mode is entered. Top-off
time is also determined by the capacitance at CT:
t TOP − OFF = 300 min×
C CT
0 . 068µ F
In fast-charge mode, the fault timer is suspended when
the charge current is limited, by input or thermal limiting, to less than 20% of ICHG-MAX.
______________________________________________________________________________________
25
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Connect CT to GND to disable the prequalification and
fast-charge timers, allowing the battery to charge indefinitely in top-off mode, or if other system timers are to
be used to control charging.
Charge-Enable Input (CEN)
Driving CEN high disables the battery charger. Driving
CEN low enables the charger when a valid source is
connected at DC. CEN does not affect the input limit
current, except that driving CEN high and PEN2 low
activates USB suspend mode.
In many systems, there is no need for the system controller (typically a microprocessor) to disable the charger because the SPS circuitry independently manages
charging and adapter/battery power hand-off. In these
situations, CEN can be connected to ground.
Charge Status Output (CHG)
CHG is an open-drain output that indicates charger status. CHG is low when the battery charger is in prequalification or fast-charge mode. It is high impedance
when the charger is done, in top-off, or disabled.
The charger faults if the charging timer expires in prequalification or fast charge. In this state, CHG pulses at
1Hz to indicate that a fault occurred.
Battery Charger Thermistor Input (THM)
Battery or ambient temperature can be monitored with
a negative temperature coefficient (NTC) thermistor.
Charging is allowed when the thermistor temperature is
within the allowable range.
The charger enters a temperature suspend state when
the thermistor resistance falls below 3.97kΩ (too hot) or
rises above 28.7kΩ (too cold). This corresponds to a 0
to +50°C range when using a 10kΩ NTC thermistor with
a beta of 3500. The relation of thermistor resistance to
temperature is defined by the following equation:
RT
1
1 ⎞ ⎪⎫
⎪⎧ ⎛
−
⎨β⎜
⎬
⎝ T + 273 298 ⎟⎠ ⎭⎪
⎪
⎩
= R25 × e
where:
RT = The resistance in ohms of the thermistor at temperature T in Celsius
R25 = The resistance in ohms of the thermistor at +25°C
ß = The material constant of the thermistor, which typically ranges from 3000K to 5000K
T = The temperature of the thermistor in °C
Table 2 shows temperature limits for different thermistor
material constants.
Some designs may prefer other trip temperatures. This
can usually be accommodated by connecting a resistor
in series and/or in parallel with the thermistor and/or
using a thermistor with different ß. For example, a
+45°C hot threshold and 0°C cold threshold can be
realized by using a thermistor with a ß of 4250 and connecting 120kΩ in parallel. Since the thermistor resistance near 0°C is much higher than it is near +50°C, a
large parallel resistance lowers the cold threshold,
while only slightly lowering the hot threshold.
Conversely, a small series resistance raises the cold
threshold, while only slightly raising the hot threshold.
The charger timer pauses when the thermistor resistance goes out of range: charging stops and the timer
counters hold their state. When the temperature comes
back into range, charging resumes and the counters
continue from where they left off. Connecting THM to
GND disables the thermistor function.
Table 2. Fault Temperatures for Different Thermistors
THERMISTOR ß (K)
3000 (K)
3250 (K)
3500 (K)
3750 (K)
4250 (K)
Resistance at +25°C (kΩ)
10
10
10
10
10
Resistance at +50°C (kΩ)
4.59
4.30
4.03
3.78
3316
Resistance at 0°C (kΩ)
25.14
27.15
29.32
31.66
36.91
Nominal Hot Trip Temperature (°C)
55
53
50
49
46
Nominal Cold Trip Temperature (°C)
-3
-1
0
2
4.5
26
______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
10kΩ
SWITCH OPEN
WHEN CHARGER
DISABLED
MAX8662
MAX8663
55.71kΩ
VTHM_C = 2.4V RISING (TYP)
+
97.71kΩ
VTHM_H = 0.9V FALLING (TYP)
THM
+
COLD
60mV HYST
BAD TEMP
HOT
60mV HYST
DISABLE CHARGER
THERMAL
CONNECTION
54.43kΩ
ESD
DIODE
VTHM_D = 0.1V FALLING (TYP)
+
-
ENABLE THM
60mV HYST
6.43kΩ
GND
GND
Figure 6. Thermistor Input
Figure 6 shows a simplified version of the THM input.
Ensure that the physical size of the thermistor is such
that the circuit of Figure 6 does not cause self-heating.
Step-Down DC-DC Converters
(OUT1 and OUT2)
OUT1 and OUT2 are high-efficiency, 1MHz, current-mode
step-down converters with adjustable output voltage.
The OUT1 regulator outputs 0.98V to VIN at up to 1200mA
while OUT2 outputs 0.98V to VIN at up to 900mA.
OUT1 and OUT2 have individual enable inputs. When
enabled, the OUT1 and OUT2 gradually ramp the output voltage over a 400µs soft-start time. This soft-start
eliminates input inrush current spikes.
OUT1 and OUT2 can operate at a 100% duty cycle,
which allows the regulators to maintain regulation at the
lowest possible battery voltage. The OUT1 dropout voltage is 72mV with a 600mA load and the OUT2 dropout
voltage is 90mV with a 450mA load (does not include
inductor resistance). During 100% duty-cycle operation,
the high-side p-channel MOSFET turns on continuously,
connecting the input to the output through the inductor.
Step-Down Converter Operating Modes
OUT1 and OUT2 can operate in either auto-PWM mode
(PWM low) or forced-PWM mode (PWM high). In autoPWM mode, OUT1 and OUT2 enter skip mode when
the load current drops below a predetermined level. In
skip mode, the regulator skips cycles when they are not
needed, which greatly decreases quiescent current
and improves efficiency at light loads. In forced-PWM
mode, the converters operate with a constant 1MHz
switching frequency regardless of output load. Output
voltage is regulated by modulating the switching duty
cycle. Forced-PWM mode is preferred for low-noise
systems, where switching harmonics can occur only at
multiples of the constant-switching frequency and are
easily filtered; however, regulator operating current is
greater and light-load efficiency is reduced.
Synchronous Rectification
Internal n-channel synchronous rectifiers eliminate the
need for external Schottky diodes and improve efficiency.
The synchronous rectifier turns on during the second
half of each switching cycle. During this time, the voltage across the inductor is reversed, and the inductor
current ramps down. In PWM mode, the synchronous
rectifier turns off at the end of the switching cycle. In
______________________________________________________________________________________
27
MAX8662/MAX8663
VL
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
skip mode, the synchronous rectifier turns off when the
inductor current falls below the n-channel zero-crossing
threshold or at the end of the switching cycle, whichever occurs first.
Setting OUT1 and OUT2 Output Voltage
Select an output voltage for OUT1 between 0.98V and
VIN by connecting FB1 to the center of a resistive voltage-divider between OUT1 and GND. Choose R3
(Figure 1) for a reasonable bias current in the resistive
divider; choose R3 to be between 100kΩ and 200kΩ.
Then, R2 (Figure 1) is given by:
R2 = R3 ((VOUT1/VFB) - 1)
where VFB = 0.98V. For OUT2, R4 and R5 are calculated using:
R4 = R5 ((VOUT2/VFB) - 1)
OUT1 and OUT2 Inductors
3.3µH and 4.7µH inductors are recommended for the
OUT1 and OUT2 step-down converters. Ensure that the
inductor saturation current rating exceeds the peak
inductor current, and the rated maximum DC inductor
current exceeds the maximum output current. For lower
load currents, the inductor current rating may be
reduced. For most applications, use an inductor with a
current rating 1.25 times the maximum required output
current. For maximum efficiency, the inductor’s DC
resistance should be as low as possible. See Table 4
for component examples.
Boost Converter with White LED Driver
(OUT3, MAX8662 Only)
The MAX8662 contains a boost converter, OUT3, which
drives up to seven white LEDs in series at up to 30mA.
The boost converter regulates its output voltage to
maintain the bottom of the LED stack at 320mV. A 1MHz
switching rate allows for a small inductor and small
input and output capacitors, while also minimizing input
and output ripple.
Reference Voltage
REF is a 1.5V regulated output that is available to drive
the BRT input when the boost converter is enabled.
This voltage can be used to control LED brightness by
driving BRT through a resistor-divider.
Boost Overvoltage Protection (OVP)
OVP limits the maximum voltage of the boost output for
protection against overvoltage due to open or disconnected LEDs. An external resistor between OUT3 and
OVP, with an internal 20µA pulldown current from OVP
to GND, sets the maximum boost output to:
VBOOST_MAX = (ROVP x 20µA) + 1.25V
28
For example, with ROVP = 1.2MΩ, the OUT3 maximum
voltage is set at 25.25V. The OVP circuit also provides
soft-start to reduce inrush current by ramping the internal pulldown current from 0 to 20µA over 1.25ms at
startup. The 20µA internal current is disconnected
when EN3 goes low.
OUT3 can also be used as a voltage-output boost by
setting ROVP for the desired output voltage. When doing
this, the output filter capacitor must be at least 1µF, and
the compensation network should be a 0.01µF capacitor in series with a 10kΩ resistor from CC3 to ground.
Brightness Control (Voltage or PWM)
LED current is set by the voltage at BRT. The VBRT
range for adjusting output current from 1mA to 30mA is
50mV to 1.5V. Connecting BRT to a 1.5V reference voltage (such as REF) sets LED current to 30mA.
The EN3 input can also be driven by a logic-level PWM
brightness control signal, such as that supplied by a
microcontroller. The allowed PWM frequency range is
from 1kHz to 100kHz. A 100% duty cycle corresponds
to full current set by the BRT pin. The MAX8662 digitally
decodes the PWM brightness signal and eliminates
PWM ripple found in more common PWM brightness
controls. As a result, no external filtering is needed to
prevent intensity ripple at the PWM rate.
In order to properly distinguish between a DC or PWM
control signal, the MAX8662 delays turn-on from the rising edge of EN3, and turn-off from the falling edge of
EN3, by 2ms. If there are no more transitions in the EN3
signal after 2ms, EN3 assumes the control signal is DC
and sets LED brightness based on the DC level. If two rising edges occur within 2ms, the circuit assumes the control is PWM and sets brightness based on the duty cycle.
OUT3 Inductor
For the white LED driver, OUT3, a 22µH inductor is recommended for most applications. For best efficiency,
the inductor’s DC resistance should also be as low as
possible. See Table 4 for component examples.
OUT3 Compensation
An RC compensation network from CC3 to GND and an
output capacitor (C14 of Figure 1) ensure boost converter stability. For WLED applications, connect a
0.22µF ceramic capacitor in series with a 1kΩ resistor
from CC3 to GND and use a 0.1µF output capacitor.
For fixed output voltage applications such as OLED,
connect a 0.01µF ceramic capacitor in series with a
10kΩ resistor from CC3 to GND and use a 1µF capacitor. These components for fixed output voltage applications improve the load transient performance of the
boost converter. The trade-off for this improved load
______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
The RC compensation network from CC3 to GND
affects the WLED driver’s sink current ramp time. As
shown in the OUT3 Enable and Disable Response
graph in the Typical Operating Characteristics section,
the OUT3 voltage ramps up in 1.25ms, but the WLED
sink current of 30mA settles in 12ms. This 12ms is
associated with the compensation of 1kΩ in series with
0.22µF. Smaller RC time constants reduce the WLED
sink current ramp time.
OUT3 Diode Selection
The MAX8662 boost converter’s high-switching frequency demands a high-speed rectification diode (D1)
for optimum efficiency. A Schottky diode is recommended due to its fast recovery time and low forwardvoltage drop. Ensure the diode’s peak current rating
exceeds the peak inductor current. In addition, the
diode’s reverse breakdown voltage must exceed
VOUT3. See Table 4 for component examples.
Linear Regulators
(OUT4, OUT5, OUT6, and OUT7)
The MAX8662/MAX8663 contain four low-dropout, lowquiescent current, low-operating voltage linear regulators. The maximum output currents for OUT4, OUT5,
OUT6, and OUT7 are 500mA, 150mA, 300mA, and
150mA, respectively. Each regulator has its own enable
input. When enabled, a linear regulator soft-starts by
ramping the outputs at 34V/ms. This limits inrush current when the regulators are enabled.
The LDO output voltages, OUT4, OUT5, OUT6, and
OUT7 are pin programmable by SL1 and SL2 (Table 3).
SL1 and SL2 are intended to be hardwired and cannot
be driven by active logic. Changes to SL1 and SL2
after power-up are ignored.
VL Linear Regulator
VL is the output of a 3.3V linear regulator that powers
the on-chip input limiter and charger control circuitry.
VL is powered from DC and can provide up to 10mA
when a DC source is present. Bypass VL to GND with a
0.1µF capacitor.
Regulator Enable Inputs (EN_)
The OUT1–OUT7 regulators have individual enable
inputs. Drive EN_ high to initiate soft-start and enable
OUT_. Drive EN_ low to disable OUT_. When disabled,
each regulator (OUT1–OUT7) switches in an active
pulldown resistor to discharge the output.
Soft-Start/Inrush Current
The MAX8662/MAX8663 implement soft-start on many
levels to control inrush current and avoid collapsing
source supply voltages. The input-voltage limit and battery charger have a 1.5ms soft-start time. All regulators
also implement soft-start. White LED driver soft-start is
accomplished by ramping the OVP current from 0 to
20µA in 1.25ms. During soft-start, the PWM controller
forces 0% switching duty cycle to avoid an input current surge at turn-on.
Undervoltage and Overvoltage Lockout
DC UVLO
When the DC voltage is below the DC undervoltage
threshold (V UVLO_DC , typically 3.5V falling), the
MAX8662/MAX8663 enter DC undervoltage lockout (DC
UVLO). DC UVLO forces the power management circuits to a known dormant state until the DC voltage is
high enough to allow the device to make accurate decisions. In DC UVLO, Q1 is open (Figure 2), the charger is
disabled, POK is high-Z, and CHG is high-Z. The system load switch, Q2 (Figure 2) is closed in DC UVLO,
allowing the battery to power the SYS node. All regulators are allowed to operate from the battery in DC UVLO.
Table 3. SL1 and SL2, Output Voltage Selection
CONNECT SL_ TO:
LINEAR REGULATOR OUTPUT VOLTAGES
SL1
SL2
OUT4 (V)
OUT5 (V)
OUT6 (V)
Open circuit
Open circuit
3.3
3.3
3.3
OUT7 (V)
3.3
Ground
Open circuit
3.3
2.85
1.85
1.85
SYS
Open circuit
2.85
2.85
1.85
1.85
Open circuit
Ground
3.3
2.85
2.85
1.85
Ground
Ground
2.5
3.3
1.5
1.5
SYS
Ground
2.5
3.3
1.5
1.3
Open circuit
SYS
1.2
1.8
1.1
1.3
Ground
SYS
3.3
2.85
1.5
1.5
SYS
SYS
1.8
2.5
3.3
2.85
______________________________________________________________________________________
29
MAX8662/MAX8663
transient performance is the larger (1µF) high-voltage
(30V) output capacitor.
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
DC OVLO
When the DC voltage is above the DC overvoltage
threshold (VOVLO_DC, typically 6.9V), the MAX8662/
MAX8663 enter DC overvoltage lockout (DC OVLO).
DC OVLO mode protects the MAX8662/MAX8663 and
downstream circuitry from high-voltage stress up to 9V.
In DC OVLO, VL is on, Q1 (Figure 2) is open, the charger is disabled, POK is high-Z, and CHG is high-Z. The
system load switch Q2 (Figure 2) is closed in DC
OVLO, allowing the battery to power SYS. All regulators
are allowed to operate from the battery in DC OVLO.
SYS UVLO
When the SYS voltage falls below the SYS undervoltage
threshold (V UVLO_SYS , typically 2.4V falling), the
MAX8662/MAX8663 enter SYS undervoltage lockout
(SYS UVLO). SYS UVLO forces all regulators off. All
regulators assume the states determined by the corresponding enable input (EN_) when the SYS voltage
rises above VUVLO_SYS.
Input-Limiter Thermal Limiting
The MAX8662/MAX8663 reduce input-limiter current by
5%/°C when its die temperature exceeds +100°C. The
system load (SYS) has priority over charger current, so
input current is first reduced by lowering charge current. If the junction temperature still reaches +120°C in
spite of charge-current reduction, no current is drawn
from DC, the battery supplies the entire system load,
and SYS is regulated at 100mV below BAT. Note that
this on-chip thermal-limiting circuitry is not related to,
and operates independently from, the thermistor input.
Regulator Thermal-Overload Shutdown
The MAX8662/MAX8663 disable all charger, SYS, and
regulator outputs (except VL) if the junction temperature rises above +165°C, allowing the device to cool.
When the junction temperature cools by approximately
15°C, resume the state they held prior to thermal overload. Note that this on-chip thermal-protection circuitry
is not related to, and operates independently from, the
thermistor input. Also note that thermal-overload shutdown is a fail-safe mechanism. Proper thermal design
should ensure that the junction temperature of the
MAX8662/MAX8663 never exceeds the absolute maximum rating of +150°C.
Applications Information
Step-Down Converters (OUT1 and OUT2)
Capacitor Selection
The input capacitor in a DC-DC converter reduces current peaks drawn from the battery or other input power
source and reduces switching noise in the controller.
The impedance of the input capacitor at the switching
frequency should be less than the input source’s output
impedance so that high-frequency switching currents
do not pass through the input source. The DC-DC converter output capacitor keeps output ripple small and
ensures control-loop stability. The output capacitor must
also have low impedance at the switching frequency.
Ceramic capacitors with X5R or X7R dielectrics are
highly recommended for both input and output capacitors due to their small size, low ESR, and small temperature coefficients.
See Table 4 for example OUT1/OUT2 input and output
capacitors and manufacturers.
Table 4. External Components List (See Figure 1)
COMPONENT
PART
Input filter capacitor
4.7µF ±10%, 16V X5R ceramic capacitor
Murata GRM188R61C105KA93B or Taiyo Yuden EMK107 BJ105KA
C2, C3
VL filter capacitor
0.1µF ±10%, 10V X5R ceramic capacitor (0402)
Murata GRM 155R61A104KA01 or TDK C1005X5R1A104K
C4, C6
Buck input bypass capacitors
4.7µF ±10%, 6.3V X5R ceramic capacitors (0603)
Mutara GRM188R60J475KE
C5, C7
Step-down output filter
capacitors
2 x 10µF ±10%, 6.3V X5R ceramic capacitors (0805)
Murata GRM219R60J106KE19
C8, C9
Linear regulator input filter
capacitors
1.0µF ±10%, 16V X5R ceramic capacitors (0603)
Murata GRM188R61C105KA93B or Taiyo Yuden EMK107 BJ105KA
C10
SYS output bypass capacitor
10µF ±10%, 6.3V X5R ceramic capacitor
C11
Battery bypass capacitor
4.7µF ±10%, 6.3V X5R ceramic capacitor
Charger timing capacitor
0.068µF ±10%, 10V X5R ceramic capacitor (0402)
TDK C1005X5R1A683K
C1
C12
30
FUNCTION
______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
MAX8662/MAX8663
Table 4. External Components List (See Figure 1) (continued)
COMPONENT
FUNCTION
PART
C13
Boost input bypass capacitor
1.0µF ±10%, 16V X5R ceramic capacitor (0603)
Murata GRM188R61C105KA93B or Taiyo Yuden EMK107BJ105KA
C14
Step-up output filter capacitor
0.1µF ±10%, 50V X7R ceramic capacitor (0603)
Murata GRM188R71H104KA93 or Taiyo Yuden UMK107BJ104KA
C15
Step-up compensation
capacitor
C16
Linear regulator output filter
capacitor
C17, C19
Linear regulator output filter
capacitors
C18
Linear regulator output filter
capacitor
D1
Boost rectifier
200mA, 30V Schottky diode (SOD-323)
Central CMDSH2-3
Display backlighting
30mA surface-mount white LEDs
Nichia NSCW215T
D2–D8
0.22µF ±10%, 10V X5R ceramic capacitor (0402)
Murata GRM155R61A224KE19
4.7µF ±10%, 6.3V X5R ceramic capacitor (0603)
Murata GRM188R60J475KE19
1.0µF ±10%, 6.3V X5R ceramic capacitors (0603)
Murata GRM188R60J105KA01
2.2µF ±10%, 6.3V X5R ceramic capacitor (0603)
Murata GRM185R60J225KE26
100mA silicon signal diode
Central CMOD4448
3.3µH inductor
TOKO DE2818C 1072AS-3R3M, 1.6A, 50mΩ
D9
CS clamp
L1
OUT1 step-down inductor
L2
OUT2 step-down inductor
4.7µH inductor
TOKO DE2818C 1072AS-4R7M, 1.3A, 70mΩ
L3
OUT3 step-up inductor
22µH inductor
Murata LQH32CN220K53, 250mA, 0.71Ω DCR (3.2mm x 2.5mm x 1.55mm)
or TDK VLF3012AT-220MR33, 330mA, 0.76Ω DCR (2.8mm x 2.6mm x 1.2mm)
R1, R7
Logic output pullup resistors
100kΩ
R2–R5
Step-down feedback resistors
R3 and R5 are 200kΩ ±0.1%; R2 and R4 depend on output voltage (±0.1%)
R6
Negative TC thermistor
Phillips NTC thermistor
P/N 2322-640-63103
10kΩ ±5% at +25°C
R8
Input current-limit
programming resistor
1.5kΩ ±1%, for 2A limit
R9
Fast charge-current
programming resistor
3kΩ ±1%, for 777mA charging
R10
Step-up overvoltage feedback
resistor
1.2MΩ ±1%, for 25V max output
______________________________________________________________________________________
31
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Power Dissipation
The MAX8662/MAX8663 have a thermal-limiting circuitry,
as well as a shutdown feature to protect the IC from damage when the die temperature rises. To allow the maximum charging current and load current on each
regulator, and to prevent thermal overload, it is important
to ensure that the heat generated by the
MAX8662/MAX8663 is dissipated into the PCB. The package’s exposed paddle must be soldered to the PCB, with
multiple vias tightly packed under the exposed paddle to
ensure optimum thermal contact to the ground plane.
Table 5 shows the thermal characteristics of the
MAX8662/MAX8663 packages. For example, the junction-to-case thermal resistance (θJC) of the MAX8663 is
1.7°C/W. When properly mounted on a multilayer PCB,
the junction-to-ambient thermal resistance (θJA) is typically 28°C/W.
PCB Layout and Routing
High switching frequencies and relatively large peak
currents make the PCB layout a very important aspect of
design. Good design minimizes ground bounce, excessive EMI on the feedback paths, and voltage gradients
in the ground plane, which can result in instability or
regulation errors.
A separate low-noise analog ground plane containing
the reference, linear regulator, signal ground, and GND
must connect to the power-ground plane at only one
point to minimize the effects of power-ground currents.
PG_, DC power, and battery grounds must connect
directly to the power-ground plane. Connect GND to
the exposed paddle directly under the IC. Use multiple
tightly spaced vias to the ground plane under the
exposed paddle to help cool the IC.
Position input capacitors from DC, SYS, BAT, PV1, and
PV2 to the power-ground plane as close as possible to
the IC. Connect input capacitors and output capacitors
from inputs of linear regulators to low-noise analog
ground as close as possible to the IC. Connect the
inductors, output capacitors, and feedback resistors as
close to the IC as possible and keep the traces short,
direct, and wide.
Refer to the MAX8662/MAX8663 evaluation kit for a
suitable PCB layout example.
Table 5. MAX8662/MAX8663 Package Thermal Characteristics
48-PIN THIN QFN (6mm x 6mm)
SINGLE-LAYER PCB
MULTILAYER PCB
40-PIN THIN QFN (5mm x 5mm)
SINGLE-LAYER PCB
MULTILAYER PCB
2105.3mW
CONTINUOUS
POWER
Derate 26.3mW/°C above
DISSIPATION
+70°C
2963.0mW
1777.8mW
2857.1mW
Derate 37.0mW/°C above
+70°C
Derate 22.2mW/°C above
+70°C
Derate 35.7mW/°C above
+70°C
θJA
38°C/W
27°C/W
45°C/W
28°C/W
θJC
1.4°C/W
1.4°C/W
1.7°C/W
1.7°C/W
32
______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
FB1
EN1
PG1
LX1
PV1
PV2
FB2
LX2
PG2
EN2
TOP VIEW
30 29 28 27 26 25 24 23 22 21
EN6 31
20 PWM
EN7 32
19 EN5
OUT6 33
18 EN4
IN67 34
17 OUT5
OUT7 35
16 IN45
MAX8663
VL 36
14 GND
SL2 38
13 CT
4
5
6
7
8
9
10
DC2
SYS1
SYS2
BAT1
BAT2
CHG
CEN
3
DC1
11 THM
PEN2
12 ISET
POK 40
PEN1
PSET 39
2
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE NO.
LAND
PATTERN NO.
48 TQFN-EP
T4866-1
21-0141
90-0057
40 TQFN-EP
T4055-1
21-0140
90-0016
15 OUT4
SL1 37
1
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.
TQFN
(5mm x 5mm)
______________________________________________________________________________________
33
MAX8662/MAX8663
Pin Configurations (continued)
MAX8662/MAX8663
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Revision History
REVISION
NUMBER
REVISION
DATE
0
2/07
Initial release
—
1
12/08
Updated Figure 1
21
2
12/10
Updated Electrical Characteristics table, TOCs 29, 38, 42, 49, 56, 63, and 70,
Figures 3, 4, 5, and 6, OUT3 Compensation section
DESCRIPTION
PAGES
CHANGED
5, 6, 7, 11,
13–17, 23, 24,
25, 27, 28, 29
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
34 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2010 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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