19-0746; Rev 4; 8/08
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Features
The MAX9775/MAX9776 combine a high-efficiency
Class D, stereo/mono audio power amplifier with a
mono DirectDrive ® receiver amplifier and a stereo
DirectDrive headphone amplifier.
♦ Unique Spread-Spectrum Modulation and Active
Emissions Limiting Significantly Reduces EMI
♦ 3D Stereo Enhancement (MAX9775 Only)
♦ Up to 3 Stereo Inputs
♦ 1.5W Stereo Speaker Output (4Ω, VDD = 5V)
♦ 50mW Mono Receiver/Stereo Headphone Outputs
(32Ω, VDD = 3.3V)
♦ High PSRR (68dB at 217Hz)
♦ 79% Efficiency (VDD = 3.3V, RL = 8Ω, POUT =
470mW)
♦ I2C Control—Input Configuration, Volume Control,
Output Mode
♦ Click-and-Pop Suppression
♦ Low Total Harmonic Distortion (0.03% at 1kHz)
♦ Current-Limit and Thermal Protection
♦ Available in Space-Saving, 36-Bump WLP (3mm x
3mm) and 32-Pin TQFN (5mm x 5mm) Packages
Maxim’s 3rd-generation, ultra-low-EMI, Class D audio
power amplifiers provide Class AB performance with
Class D efficiency. The MAX9775/MAX9776 deliver
1.5W per channel into a 4Ω load from a 5V supply and
offer efficiencies up to 79%. Active emissions limiting
circuitry and spread-spectrum modulation greatly
reduce EMI, eliminating the need for output filtering
found in traditional Class D devices.
The MAX9775/MAX9776 utilize a fully differential architecture, a full-bridged output, and comprehensive clickand-pop suppression. A 3D stereo enhancement
function allows the MAX9775 to widen the stereo sound
field immersing the listener in a cleaner, richer sound
experience than typically found in portable applications.
The devices utilize a flexible, user-defined mixer architecture that includes an input mixer, volume control, and
output mixer. All control is done through I2C.
The mono receiver amplifier and stereo headphone
amplifier use Maxim’s DirectDrive architecture that produces a ground-referenced output from a single supply,
eliminating the need for large DC-blocking capacitors,
saving cost, space, and component height.
The MAX9775 is available in a 36-bump WLP (3mm x
3mm) package. The MAX9776 is available in a 32-pin
TQFN (5mm x 5mm) or a 36-bump WLP (3mm x 3mm)
package. Both devices are specified over the extended
-40°C to +85°C temperature range.
Applications
Ordering Information
PART
PIN-PACKAGE
CLASS D
AMPLIFIER
MAX9775EBX+T
36 WLP*
Stereo
MAX9776ETJ+
32 TQFN-EP**
Mono
MAX9776EBX+T
36 WLP*
Mono
Note: All devices are specified over the -40°C to +85°C operating temperature range.
+Denotes a lead-free/RoHS-compliant package.
*Four center bumps depopulated.
**EP = Exposed pad.
Pin Configurations appear at end of data sheet.
DirectDrive is a registered trademark of Maxim Integrated
Products, Inc.
Cell Phones
Portable Multimedia Players
Handheld Gaming Consoles
Simplified Block Diagrams
SINGLE SUPPLY 2.7V TO 5.5V
3D
SOUND
CONTROL
GAIN
CONTROL
SINGLE SUPPLY 2.7V TO 5.5V
GAIN
CONTROL
MIXER/
MUX
I2 C
INTERFACE
MIXER/
MUX
I 2C
INTERFACE
MAX9775
MAX9776
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX9775/MAX9776
General Description
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
ABSOLUTE MAXIMUM RATINGS
Duration of Short Circuit Between
OUT_+ and OUT_- ..................................................Continuous
Duration of HP_, OUT_ Short Circuit to
GND or PVDD ..........................................................Continuous
Continuous Power Dissipation (TA = +70°C)
36-Bump (3mm x 3mm) UCSP Multilayer Board
(derate 17.0mW/°C above +70°C) ...........................1360.5mW
32-Pin (5mm x 5mm) TQFN Single-Layer Board
(derate 21.3mW/°C above +70°C) ...........................1702.1mW
32-Pin TQFN Multilayer Board (derate 34.5mW/°C
above +70°C)...........................................................2758.6mW
Junction Temperature ......................................................+150°C
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
VDD to GND..............................................................................6V
PVDD to PGND .........................................................................6V
CPVDD to CPGND ....................................................................6V
CPVSS to CPGND .....................................................-6V to +0.3V
VSS to CPGND..........................................................-6V to +0.3V
C1N .......................................(CPVSS - 0.3V) to (CPGND + 0.3V)
C1P.......................................(CPGND - 0.3V) to (CPVDD + 0.3V)
HPL, HPR to GND...................(CPVSS - 0.3V) to (CPVDD + 0.3V)
GND to PGND and CPGND................................................±0.3V
VDD to PVDD and CPVDD ....................................................±0.3V
SDA, SCL to GND.....................................................-0.3V to +6V
All other pins to GND..................................-0.3V to (VDD + 0.3V)
Continuous Current In/Out of PVDD, PGND, CPVDD, CPGND,
OUT__, HPR, and HPL..................................................±800mA
Continuous Input Current CPVSS ......................................260mA
Continuous Input Current (all other pins) .........................±20mA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = PVDD = CPVDD = 3.3V, VGND = VPGND = VCPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between
OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. TA = TMIN to
TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
5.5
V
GENERAL
Supply Voltage Range
Quiescent Current (Mono)
VDD, PVDD,
Inferred from PSRR test
CPVDD
IDD
2.7
Output mode 1, 6, 11 (Rx mode)
6.3
10
Output mode 4, 9, 14 (HP mode)
8
12.6
Output mode 2, 7, 12 (SP mode)
9.5
15
Output mode 3, 8, 13 (SP and HP mode)
12.9
18
Output mode 1, 6, 11 (Rx mode)
Quiescent Current (Stereo)
Mute Current
Shutdown Current
IDD
IMUTE
ISHDN
mA
7
Output mode 4, 9, 14 (HP mode)
9
Output mode 2, 7, 12 (SP mode)
16.5
mA
Output mode 3, 8, 13 (SP and HP mode)
20
Current in mute (low power)
4.7
10
Hard shutdown
SHDN = GND
0.1
10
Soft shutdown
See the I2C Interface
section
8.5
15
Time from shutdown or power-on to full
operation
30
mA
µA
ms
Turn-On Time
tON
Input Resistance
RIN
B and C pair inputs, TA = +25°C,
VOL = max
17.5
28
41.0
kΩ
A pair inputs, TA = +25°C, +20dB
3.5
5.5
8.0
kΩ
Common-Mode Rejection Ratio
CMRR
TA = +25°C, fIN = 1kHz (Note 2)
45
50
60
dB
Input DC Bias Voltage
VBIAS
IN_ inputs
1.12
1.25
1.38
V
2
_______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
(VDD = PVDD = CPVDD = 3.3V, VGND = VPGND = VCPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between
OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. TA = TMIN to
TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
±5.5
±23.5
UNITS
SPEAKER AMPLIFIERS
Output Offset Voltage
Click-and-Pop Level
VOS
KCP
TA = +25°C
TMIN ≤ TA ≤ TMAX
Peak voltage,
TA = +25°C,
A-weighted, 32
samples per second
(Notes 2, 3)
±40
Into shutdown
-62
Out of shutdown
-60
Into mute
-63
Out of mute
VDD = 2.7V to 5.5V
Power-Supply Rejection Ratio
(Note 3)
Output Power (Note 4)
PSRR
POUT
TA = +25°C
THD+N = 1%,
TA = +25°C
dB
-62
48
70
f = 217Hz,
100mVP-P ripple
68
f = 1kHz,
100mVP-P ripple
60
f = 20kHz,
100mVP-P ripple
50
RL = 4Ω, VDD = 5V
dB
1500
RL = 8Ω, VDD = 3.3V
450
RL = 8Ω, VDD = 5V
1115
Current Limit
mW
1.6
Total Harmonic Distortion Plus
Noise (Note 4)
Signal-to-Noise Ratio
Output Frequency
THD+N
SNR
fOSC
η
Efficiency
Gain
f = 1kHz
VOUT = 1.8VRMS,
RL = 8Ω, 3D not
active (Note 3)
RL = 8Ω,
POUT = 125mW
0.03
RL = 4Ω,
POUT = 250mW
0.04
3D Sound Resistors (Note 5)
BW = 20Hz to 20kHz
81
A-weighted
84
dB
Fixed-frequency modulation
1100
Spread-spectrum modulation
1100 ±30
POUT = 470mW, f = 1kHz both channels
driven, L = 68µH in series with 8Ω load
Crosstalk (Notes 4, 5)
TA = +25°C
R3D
A
%
AV
Channel-to-Channel Gain
Tracking (Note 5)
mV
Used with 22nF and 2.2nF external
capacitors
L to R, R to L, f = 10kHz, RL = 8Ω,
VOUT = 300mVRMS
5
kHz
79
%
12
dB
±1
%
7
73
9
kΩ
dB
_______________________________________________________________________________________
3
MAX9775/MAX9776
ELECTRICAL CHARACTERISTICS (continued)
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
ELECTRICAL CHARACTERISTICS (continued)
(VDD = PVDD = CPVDD = 3.3V, VGND = VPGND = VCPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between
OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. TA = TMIN to
TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
±1.8
±5.5
mV
RECEIVER AMPLIFIER
Output Offset Voltage
Click-and-Pop Level
VOS
TA = +25°C
KCP
Peak voltage, TA =
+25°C, A-weighted,
32 samples per
second (Notes 3, 6)
Into shutdown
-62
Into mute
-67
Out of shutdown
-63
Out of mute
VDD = 2.7V to 5.5V
Power-Supply Rejection Ratio
(Note 3)
Output Power
Gain
Total Harmonic Distortion Plus
Noise
Signal-to-Noise Ratio
PSRR
POUT
TA = +25°C
TA = +25°C,
THD+N = 1%
-66
58
SNR
80
f = 217Hz,
100mVP-P ripple
80
f = 1kHz,
100mVP-P ripple
70
f = 20kHz,
100mVP-P ripple
62
RL = 16Ω
60
RL = 32Ω
50
AV
THD+N
dB
dB
mW
3
RL = 16Ω (VOUT = 800mVRMS, f = 1kHz)
0.03
RL = 32Ω (VOUT = 800mVRMS, f = 1kHz)
0.024
RL = 16Ω, VOUT =
800mVRMS (Note 3)
BW = 20Hz to 20kHz
87
A-weighted
89
dB
%
dB
Slew Rate
SR
0.3
V/µs
Capacitive Drive
CL
300
pF
HEADPHONE AMPLIFIERS
Output Offset Voltage
Click-and-Pop Level
VOS
TA = +25°C
KCP
Peak voltage, TA =
+25°C, A-weighted,
32 samples per
second (Notes 2, 4)
ESD Protection
HP_
±1.8
Into shutdown
-61
Into mute
-65
Out of shutdown
-60
Out of mute
-64
Contact
±4
Air
±8
VDD = 2.7V to 5.5V
Power-Supply Rejection Ratio
(Note 3)
4
PSRR
TA = +25°C
58
±5.5
mV
dB
kV
80
f = 217Hz,
100mVP-P ripple
80
f = 1kHz,
100mVP-P ripple
70
f = 20kHz,
100mVP-P ripple
62
_______________________________________________________________________________________
dB
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
(VDD = PVDD = CPVDD = 3.3V, VGND = VPGND = VCPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between
OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. TA = TMIN to
TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
Output Power
POUT
CONDITIONS
TA = +25°C,
THD+N = 1%
MIN
RL = 16Ω
60
RL = 32Ω
50
Current Limit
Gain
AV
Channel-to-Channel Gain
Tracking
Total Harmonic Distortion Plus
Noise
TA = +25°C
THD+N
Signal-to-Noise Ratio
SNR
TYP
UNITS
mW
170
mA
+3
dB
±1
%
RL = 16Ω (VOUT = 800mVRMS, f = 1kHz)
0.03
RL = 32Ω (VOUT = 800mVRMS, f = 1kHz)
0.024
RL = 16Ω,
VOUT = 800mVRMS
MAX
BW = 20Hz to
20kHz
92
A-weighted
93
%
dB
Slew Rate
SR
0.3
V/µs
Capacitive Drive
CL
300
pF
75
dB
L to R, R to L, f = 10kHz, RL = 16Ω,
VOUT = 160mVRMS
Crosstalk
VOLUME CONTROL
HP gain (max)
IN+6dB = 0
(minimum gain
setting)
Volume Control
IN+6dB = 1
(maximum gain
setting)
Mono Gain
3
SP gain (max)
12
HP gain (min)
-72
SP gain (min)
-63
HP gain (max)
9
SP gain (max)
18
HP gain (min)
-61
SP gain (min)
-57
Mono+6dB = 0
0
Mono+6dB = 1
6
dB
All outputs
Input Pair A Control
Mute Attenuation
(Minimum Volume)
dB
INA+20dB = 0 (minimum gain setting)
Set by IN+6dB
INA+20dB = 1 (maximum gain setting)
20
VIN = 1VRMS
80
dB
dB
DIGITAL INPUTS (SHDN, SDA, SCL)
Input-Voltage High
VIH
Input-Voltage Low
1.4
V
VIL
Input Hysteresis (SDA, SCL)
VHYS
0.4
200
V
mV
_______________________________________________________________________________________
5
MAX9775/MAX9776
ELECTRICAL CHARACTERISTICS (continued)
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
ELECTRICAL CHARACTERISTICS (continued)
(VDD = PVDD = CPVDD = 3.3V, VGND = VPGND = VCPGND = 0V, SHDN = VDD, I2C settings (INA gain = +20dB, INB gain = INC gain =
0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated between
OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise noted. C1 = C2 = C3 = 1µF. TA = TMIN to
TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
SDA, SCL Input Capacitance
CIN
10
Input Leakage Current
IIN
0.3
Pulse Width of Spike Suppressed
tSP
50
MAX
UNITS
5.0
µA
pF
ns
DIGITAL OUTPUTS (SDA Open Drain)
Output Low Voltage SDA
VOL
ISINK = 6mA
Output Fall Time SDA
tOF
VH(MIN) to VL(MAX) bus capacitance =
10pF to 400pF, ISINK = 3mA
0.4
250
V
ns
I2C INTERFACE TIMING (Note 7)
Serial Clock Frequency
fSCL
DC
400
kHz
Bus Free Time Between STOP
and START Conditions
tBUF
1.3
µs
START Condition Hold
tHD:STA
0.6
µs
STOP Condition Setup Time
tSU:STA
0.6
µs
Clock Low Period
tLOW
1.3
µs
Clock High Period
tHIGH
0.6
µs
Data Setup Time
tSU:DAT
100
Data Hold Time
tHD:DAT
0
ns
900
ns
Maximum Receive SCL/SDA Rise
Time
tR
300
ns
Maximum Receive SCL/SDA Fall
Time
tF
300
ns
Setup Time for STOP Condition
tSU:STO
Capacitive Load for Each Bus
Line
Cb
0.6
µs
400
pF
All devices are 100% production tested at room temperature. All temperature limits are guaranteed by design.
Measured at headphone outputs.
Amplifier inputs AC-coupled to GND.
Testing performed with a resistive load in series with an inductor to simulate an actual speaker load. For RL = 8Ω, L = 68µH;
for RL = 4Ω, L = 47µH.
Note 5: MAX9775 only.
Note 6: Testing performed at room temperature with an 8Ω resistive load in series with a 68µH inductive load connected across BTL
outputs for speaker amplifier. Testing performed with a 32Ω resistive load connected between OUT_ and GND for headphone amplifier. Testing performed with 32Ω resistive load connected between OUTRx and GND for mono receiver amplifier. Mode transitions are controlled by I2C.
Note 7: Guaranteed by design.
Note 1:
Note 2:
Note 3:
Note 4:
6
_______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =
INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated
between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA =
+25°C, unless otherwise noted.)
1
1
1
VDD = 5V
RL = 4Ω
VDD = 5V
RL = 8Ω
POUT = 400mW
THD+N (%)
POUT = 750mW
0.01
0.001
100
1k
10k
100k
POUT = 150mW
0.01
0.001
10
POUT = 400mW
0.1
THD+N (%)
POUT = 1000mW
0.01
VDD = 3.3V
RL = 4Ω
POUT = 150mW
0.1
THD+N (%)
0.1
MAX9775/76 toc03
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
MAX9775/76 toc02
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
MAX9775/76 toc01
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
0.001
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
VDD = 3.3V
RL = 8Ω
POUT = 500mW
POUT = 300mW
POUT = 150mW
0.01
VDD = 5V
RL = 4Ω
10
SSM
THD+N (%)
0.1
THD+N (%)
THD+N (%)
0.1
100
1
f = 10kHz
0.1
FFM
0.01
f = 1kHz
0.01
10
100
1k
FREQUENCY (Hz)
10k
100k
f = 20Hz
0.001
0.001
0.001
MAX9775/76 toc06
VDD = 3.3V
RL = 8Ω
MAX9775/76 toc05
1
MAX9775/76 toc04
1
10
100
1k
FREQUENCY (Hz)
10k
100k
0
0.4
0.8
1.2
1.6
2.0
OUTPUT POWER (W)
_______________________________________________________________________________________
7
MAX9775/MAX9776
Typical Operating Characteristics
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =
INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated
between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA =
+25°C, unless otherwise noted.)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
VDD = 5V
RL = 8Ω
10
VDD = 3.3V
RL = 4Ω
10
100
MAX9775/76 toc08
100
MAX9775/76 toc07
100
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
f = 1kHz
VDD = 3.3V
RL = 8Ω
MAX9775/76 toc09
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
f = 1kHz
10
1
f = 10kHz
0.1
0.01
THD+N (%)
THD+N (%)
1
f = 10kHz
0.1
0.01
f = 20Hz
0
0.3
0.6
0.9
1.2
0.01
0.2
0.4
0.6
0.8
0.2
0
0.4
OUTPUT POWER (W)
OUTPUT POWER (W)
OUTPUT POWER (W)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
EFFICIENCY
vs. OUTPUT POWER
EFFICIENCY
vs. OUTPUT POWER
SSM
80
0.1
70
60
50
RL = 4Ω
40
20
FFM
0.3
0.6
0.9
OUTPUT POWER (W)
1.2
1.5
70
60
50
RL = 4Ω
40
VDD = 3.3V
fIN = 1kHz
POUT = POUTL + POUTR
10
0
0
0
RL = 8Ω
80
20
VDD = 5V
fIN = 1kHz
POUT = POUTL + POUTR
10
0.001
90
30
30
0.01
100
EFFICIENCY (%)
1
RL = 8Ω
0.6
MAX9775/76 toc12
90
EFFICIENCY (%)
VDD = 5V
RL = 8Ω
f = 1kHz
10
100
MAX9775/76 toc10
100
8
f = 20Hz
0.001
0
1.5
f = 10kHz
0.1
f = 20Hz
0.001
0.001
1
MAX9775/76 toc11
THD+N (%)
f = 1kHz
THD+N (%)
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
0
0.8
1.6
2.4
OUTPUT POWER (W)
3.2
4.0
0
0.4
0.8
1.2
OUTPUT POWER (W)
_______________________________________________________________________________________
1.6
2.0
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
OUTPUT POWER
vs. SUPPLY VOLTAGE
THD+N = 10%
1400
1200
1000
800
THD+N = 1%
600
1200
THD+N = 10%
1000
800
600
VDD = 5V
f = 1kHz
2.0
OUTPUT POWER (W)
1600
OUTPUT POWER (mW)
THD+N = 1%
1.0
THD+N = 1%
400
0.5
400
200
200
0
3.7
4.2
4.7
0
2.7
5.2
3.2
3.7
4.2
4.7
5.2
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
OUTPUT POWER
vs. LOAD
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
800
THD+N = 10%
600
400
THD+N = 1%
200
0
-20
CROSSTALK vs. FREQUENCY
-40
-50
-60
OUTL
-70
-80
-90
-100
1
10
LOAD (Ω)
100
0
-10
-20
-30
OUTR
-30
10
100
1k
FREQUENCY (Hz)
100
10
LOAD (Ω)
VDD = 3.3V
VIN = 100mVP-P
RL = 8Ω
-10
1
MAX9775/76 toc17
VDD = 3.3V
f = 1kHz
0
POWER-SUPPLY REJECTION RATIO (dB)
1000
3.2
MAX9775/76 toc16
2.7
CROSSTALK (dB)
0
OUTPUT POWER (W)
THD+N = 10%
1.5
10k
100k
MAX9775/6 toc18
OUTPUT POWER (mW)
1800
RL = 8Ω
f = 1kHz
1400
2.5
MAX9775/76 toc14
RL = 4Ω
f = 1kHz
2000
1600
MAX9775/76 toc13
2200
OUTPUT POWER
vs. LOAD
MAX9775/76 toc15
OUTPUT POWER
vs. SUPPLY VOLTAGE
OUT_ = 1VP-P
RL = 8Ω
-40
-50
-60
-70
-80
-90
-100
-110
-120
RIGHT TO LEFT
LEFT TO RIGHT
10
100
1k
10k
FREQUENCY (Hz)
100k
_______________________________________________________________________________________
9
MAX9775/MAX9776
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =
INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated
between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA =
+25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =
INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated
between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA =
+25°C, unless otherwise noted.)
LEFT TO RIGHT
0
0.1
0.2
0.3
0.4
0.5
INPUT AMPLITUDE (VRMS)
-40
-60
-80
-100
-120
-80
-100
VDD = 5V
RL = 8Ω
INPUTS AC GROUNDED
10k
15k
10
100
FREQUENCY (MHz)
5k
0
1000
20k
15k
MAX9775 SUPPLY CURRENT
vs. SUPPLY VOLTAGE
-20
-40
-60
-80
-100
10k
FREQUENCY (Hz)
25
SP MODE
INPUTS AC GROUNDED
OUTPUTS UNLOADED
20
15
VDD = 5V
RL = 8Ω
INPUTS AC GROUNDED
-140
1
0
20k
MAX9775 toc23
20
-120
-140
10
5k
SUPPLY CURRENT (mA)
-60
0.1
-100
WIDEBAND OUTPUT SPECTRUM
SPREAD-SPECTRUM MODE
-40
-120
-80
-140
0
OUTPUT MAGNITUDE (dBV)
-20
-60
FREQUENCY (Hz)
MAX9775/6 toc22
0
-40
-120
WIDEBAND OUTPUT SPECTRUM
FIXED-FREQUENCY MODE
20
-20
-140
0.6
MAX9775/76 toc21
-20
FFM MODE
RL = 8Ω
VDD = 3.3V
fIN = 1kHz
UNWEIGHTED
0
MAX9775/76 toc24
-90
-100
-110
-120
SSM MODE
RL = 8Ω
VDD = 3.3V
fIN = 1kHz
UNWEIGHTED
0
20
OUTPUT MAGNITUDE (dBV)
RIGHT TO LEFT
-50
-60
-70
-80
MAX9775/76 toc20
MAX9775/6 toc19
fIN = 1kHz
RL = 8Ω
GAIN = +12dB
20
OUTPUT MAGNITUDE (dBV)
CROSSTALK (dB)
0
-10
-20
-30
-40
IN-BAND OUTPUT SPECTRUM
IN-BAND OUTPUT SPECTRUM
CROSSTALK vs. INPUT AMPLITUDE
OUTPUT MAGNITUDE (dBV)
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
10
0.1
1
10
100
FREQUENCY (MHz)
1000
2.7
3.2
3.7
4.2
4.7
SUPPLY VOLTAGE (V)
______________________________________________________________________________________
5.2
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
SHUTDOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
90
80
10
8
VDD = 5V
RL = 32Ω
70
0.1
THD+N (%)
SUPPLY CURRENT (nA)
SUPPLY CURRENT (mA)
12
1
MAX9775/76 toc26
SP MODE
INPUTS AC GROUNDED
OUTPUTS UNLOADED
14
100
MAX9775/76 toc25
16
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
60
50
40
POUT = 20mW
0.01
30
20
6
MAX9775/76 toc27
MAX9776 SUPPLY CURRENT
vs. SUPPLY VOLTAGE
POUT = 40mW
10
4
0.001
0
2.7
3.2
3.7
4.2
4.7
5.2
2.7
3.2
3.7
4.2
4.7
10
5.2
100
1k
10k
100k
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
VDD = 3.3V
RL = 32Ω
VDD = 5V
RL = 32Ω
10
f = 1kHz
0.1
THD+N (%)
THD+N (%)
POUT = 40mW
0.01
THD+N (%)
0.1
100
MAX9775/76 toc30
VDD = 3.3V
RL = 16Ω
MAX9775/76 toc29
1
MAX9775/76 toc28
1
POUT = 40mW
1
f = 10kHz
0.1
0.01
POUT = 20mW
0.01
POUT = 10mW
f = 20Hz
0.001
0.001
10
100
1k
FREQUENCY (Hz)
10k
100k
0.001
10
100
1k
FREQUENCY (Hz)
10k
100k
0
20
40
60
80
OUTPUT POWER (mW)
______________________________________________________________________________________
11
MAX9775/MAX9776
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =
INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated
between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA =
+25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =
INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated
between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA =
+25°C, unless otherwise noted.)
VDD = 3.3V
RL = 16Ω
10
100
MAX9775/76 toc32
100
MAX9775 toc31
100
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. COMMON-MODE VOLTAGE
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
VDD = 3.3V
RL = 32Ω
10
VDD = 3.3V
fIN = 1kHz
POUT = 30mW
GAIN = +3dB
RL = 32Ω
10
f = 1kHz
0.01
f = 10kHz
0.1
f = 20Hz
f = 20Hz
0.001
0.001
120
0
350
300
250
200
150
VDD = 5V
f = 1kHz
RL = 32Ω
POUT = POUTR + POUTL
100
50
TOTAL OUTPUT POWER (mW)
12
400
RL = 16Ω
350
300
250
200
RL = 32Ω
150
VDD = 3.3V
f = 1kHz
POUT = POUTR + POUTL
50
0
80
0.5
1.0
1.5
2.0
COMMON-MODE VOLTAGE (V)
120
2.5
OUTPUT POWER
vs. SUPPLY VOLTAGE
450
100
0
40
0
80
500
POWER DISSIPATION (mW)
400
60
POWER DISSIPATION
vs. OUTPUT POWER
MAX9775/76 toc34
450
40
OUTPUT POWER (mW)
POWER DISSIPATION
vs. OUTPUT POWER
500
20
65
60
THD+N = 10%
OUTPUT POWER (mW)
30
60
90
OUTPUT POWER (mW)
MAX9775/76 toc36
0.001
0
0.1
0.01
0.01
0
1
THD+N (%)
f = 10kHz
0.1
1
MAX9775/76 toc35
THD+N (%)
THD+N (%)
f = 1kHz
1
MAX9775/6 toc33
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. OUTPUT POWER
POWER DISSIPATION (mW)
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
55
50
45
THD+N = 1%
40
35
RL = 32Ω
f = 1kHz
30
0
40
80
120
TOTAL OUTPUT POWER (mW)
160
2.7
3.2
3.7
4.2
4.7
SUPPLY VOLTAGE (V)
______________________________________________________________________________________
5.2
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
OUTPUT POWER
vs. LOAD
100
THD+N = 10%
60
40
20
100
THD+N = 10%
80
60
1000
100
10
C1 = C2 = 0.68μF
-40
-50
HPR
-70
MAX9775/76 toc41
VDD = 3.3V
f = 1kHz
RL = 32Ω
0
-20
-40
-60
-80
-100
-80
-120
HPL
100
1k
10k
FREQUENCY (Hz)
100k
OUT_ = 1VP-P
RL = 32Ω
-20
-30
-40
-50
-60
-70
-80
-90
-100
0
5k
10k
FREQUENCY (Hz)
15k
1000
RIGHT TO LEFT
LEFT TO RIGHT
-110
-120
-140
-100
10
100
LOAD (Ω)
CROSSTALK vs. FREQUENCY
0
-10
CROSSTALK (dB)
-30
20
OUTPUT MAGNITUDE (dBV)
VDD = 3.3V
VIN = 100mVP-P
RL = 32Ω
-90
10
OUTPUT FREQUENCY SPECTRUM
MAX9775/6 toc40
0
-60
1000
100
LOAD (Ω)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
-20
40
0
LOAD (Ω)
-10
C1 = C2 = 1μF
THD+N = 1%
0
10
C1 = C2 = 2.2μF
60
20
20
0
POWER-SUPPLY REJECTION RATIO (dB)
80
40
VDD = 5V
f = 1kHz
THD+N = 1%
120
VDD = 3.3V
f = 1kHz
THD+N = 1%
20k
MAX9775/6 toc42
120
140
OUTPUT POWER (mW)
140
80
160
OUTPUT POWER (mW)
160
VDD = 3.3V
f = 1kHz
180
100
MAX9775/76 toc38
180
OUTPUT POWER (mW)
200
MAX9775/76 toc37
200
OUTPUT POWER vs. LOAD RESISTANCE
AND CHARGE-PUMP CAPACITOR SIZE
MAX9775/6 toc39
OUTPUT POWER
vs. LOAD
10
100
1k
10k
FREQUENCY (Hz)
______________________________________________________________________________________
100k
13
MAX9775/MAX9776
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =
INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated
between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA =
+25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VDD = PVDD = CPVDD = 3.3V, GND = PGND = CPGND = 0V, SHDN = VDD, I2C default gain settings (INA gain = +20dB, INB gain =
INC gain = 0dB, volume setting = 0dB, mono path gain = 0dB, SHDN = 1, SSM = 1). Speaker load resistors (RLSP) are terminated
between OUT_+ and OUT_-, headphone load resistors are terminated to GND, unless otherwise stated. C1 = C2 = C3 = 1µF. TA =
+25°C, unless otherwise noted.)
TURN-OFF RESPONSE
TURN-ON RESPONSE
CROSSTALK vs. INPUT AMPLITUDE
MAX9775/76 toc45
MAX9775 toc43
MAX9775/76 toc44
0
-10
-20
-30
fIN = 1kHz
RL = 32Ω
GAIN = +3dB
-40
-50
-60
-70
-80
CROSSTALK (dB)
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
RIGHT TO LEFT
-90
-100
-110
-120
LEFT TO RIGHT
0
0.4
0.8
INPUT AMPLITUDE (VRMS)
1.2
SCL
2V/div
SCL
2V/div
SPEAKER
OUTPUT
50mA/div
SPEAKER
OUTPUT
50mA/div
HEADPHONE
OUTPUT
2V/div
HEADPHONE
OUTPUT
2V/div
10ms/div
10ms/div
MUTE-ON RESPONSE
MUTE-OFF RESPONSE
MAX9775/76 toc46
10ms/div
14
MAX9775/76 toc47
SCL
2V/div
SCL
2V/div
SPEAKER
OUTPUT
50mA/div
SPEAKER
OUTPUT
50mA/div
HEADPHONE
OUTPUT
2V/div
HEADPHONE
OUTPUT
2V/div
10ms/div
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
PIN
NAME
F1
PVDD
FUNCTION
Class D Power Supply
E1
OUTL-
D2
SCL
D1, F3
PGND
C1
OUTL+
C2
SDA
Serial Data Input. Connect a 1kΩ pullup resistor from SDA to VDD.
B1
CL_L
3D External Capacitor 3. Connect a 2.2nF capacitor to GND.
B2
CL_H
A1
CPVDD
Negative Left-Speaker Output
Serial Clock Input. Connect a 1kΩ pullup resistor from SCL to VDD.
Power Ground
Positive Left-Speaker Output
3D External Capacitor 4. Connect a 22nF capacitor to GND.
Charge-Pump Power Supply
A2
C1P
B3
VBIAS
Common-Mode Bias
Charge-Pump Flying Capacitor Positive Terminal
A3
CPGND
Charge-Pump GND
A4
C1N
Charge-Pump Flying Capacitor Negative Terminal
B4
INC1
Input C1. Left input or positive input (see Table 5a).
A5
CPVSS
A6
HPL
Left Headphone Output
B5
VSS
Headphone Amplifier Negative Power Supply. Connect to CPVSS.
B6
HPR
Right Headphone Output
C5
INC2
Input C2. Right input or negative input (see Table 5a).
C6
OUTRx
Mono Receiver Output
D6
VDD
Analog Power Supply
D5
INB2
Input B2. Right input or negative input (see Table 5a).
E6
CR_L
3D External Capacitor 1. Connect a 2.2nF capacitor to GND.
E5
INB1
Input B1. Left input or positive input (see Table 5a).
F6
GND
Analog Ground
F5
CR_H
3D External Capacitor 2. Connect a 22nF capacitor to GND.
E4
INA2
Input A2. Right input or negative input (see Table 5a).
Charge-Pump Output. Connect to VSS.
F4
OUTR+
E3
INA1
Positive Right Speaker Output
F2
OUTR-
Negative Right Speaker Output
E2
SHDN
Active-Low Hardware Shutdown
—
EP
Input A1. Left input or positive input (see Table 5a).
Exposed Pad. The external pad lowers the package’s thermal impedance by providing a
direct heat conduction path from the die to the PCB. The exposed pad is internally
connected to GND. Connect the exposed thermal pad to the GND plane.
______________________________________________________________________________________
15
MAX9775/MAX9776
Pin Description—MAX9775
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Pin Description—MAX9776
PIN
TQFN
UCSP
NAME
FUNCTION
1
F1
PVDD
Class D Power Supply
2
E1
OUT-
Negative Left-Speaker Output
3
D2
SCL
4, 29
D1, F3
PGND
Power Ground
5
C1
OUT+
Positive Left-Speaker Output
6
C2
SDA
Serial Data Input. Connect a 1kΩ pullup resistor from SDA to VDD.
7, 8, 23,
26, 28, 31
B1, B2,
E6, F2,
F4, F5
I.C.
Internal Connection. Leave unconnected. This pin is internally connected to the signal path.
Do not connect together or to any other pin.
9
A1
CPVDD
10
A2
C1P
11
B3
VBIAS
Common-Mode Bias
12
A3
CPGND
Charge-Pump GND
13
A4
C1N
Charge-Pump Flying Capacitor Negative Terminal
14
B4
INC1
Input C1. Left input or positive input (see Table 5a).
15
A5
CPVSS
16
A6
HPL
17
B5
VSS
Headphone Amplifier Negative Power Supply. Connect to CPVSS.
18
B6
HPR
Right Headphone Output
16
Serial Clock Input. Connect a 1kΩ pullup resistor from SCL to VDD.
Charge-Pump Power Supply
Charge-Pump Flying Capacitor Positive Terminal
Charge-Pump Output. Connect to VSS.
Left Headphone Output
19
C5
INC2
20
C6
OUTRx
Mono Receiver Output
Input C2. Right input or negative input (see Table 5a).
21
D6
VDD
Analog Power Supply
22
D5
INB2
Input B2. Right input or negative input (see Table 5a).
24
E5
INB1
Input B1. Left input or positive input (see Table 5a).
25
F6
GND
Analog Ground
27
E4
INA2
Input A2. Right input or negative input (see Table 5a).
30
E3
INA1
Input A1. Left input or positive input (see Table 5a).
32
E2
SHDN
Active-Low Hardware Shutdown
EP
—
EP
Exposed Pad. The external pad lowers the package’s thermal impedance by providing a
direct heat conduction path from the die to the PCB. The exposed pad is internally connected
to GND. Connect the exposed thermal pad to the GND plane.
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
VDD
C2
1μF
CPVSS
VSS
15 (A5)
17 (B5)
VDD
1μF
0.1μF
VDD
1μF
PVDD
21 (D6)
1 (F1)
C1N 13 (A4)
CPGND 12 (A3)
C1
1μF
10kΩ
C1P 10 (A2)
CHARGE
PUMP
VDD
DirectDrive
CPVDD 9 (A1)
C3
1μF
16 (A6) HPL
3dB
1μF
RIGHT
VOLUME
INA1 30 (E3)
INA2 27 (E4)
1μF
1μF
LEFT
VOLUME
INB1 24 (E5)
INB2 22 (D5)
18 (B6) HPR
3dB
INPUT A: 0dB,
6dB, OR 20dB
OUTPUT
MIXER
INPUT
MIXER
INPUT B: 0dB
OR 6dB
20 (C6) OUTRx
3dB
12dB
5 (C1) OUTL+
1μF
1μF
MONO
VOLUME
INC1 14 (B4)
INC2 19 (C5)
CLASS D
AMPLIFIER
MAXIM 3D
SOUND
INPUT C: 0dB
OR 6dB
12dB
28 (F4) OUTR+
CLASS D
AMPLIFIER
1μF
VBIAS
2 (E1) OUTL-
31 (F2) OUTR-
11 (B3)
1μF
SDA
SCL
SHDN
6 (C2)
MAX9775
3 (D2)
I2C CONTROL
32 (E2)
3D CIRCUIT
25 (F6)
GND
4 (D1)
PGND
29 (F3)
PGND
23 (E6)
CR_L
2.2nF
26 (F5)
CR_H
22nF
7 (B1)
CL_L
2.2nF
8 (B2)
CL_H
22nF
______________________________________________________________________________________
17
MAX9775/MAX9776
Typical Application Circuits
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
MAX9775/MAX9776
Typical Application Circuits (continued)
VDD
C2
1μF
CPVSS
VSS
15 (A5)
17 (B5)
VDD
1μF
VDD
0.1μF
1μF
PVDD
21 (D6)
1 (F1)
C1N 13 (A4)
CPGND 12 (A3)
C1
1μF
10kΩ
C1P 10 (A2)
CHARGE
PUMP
VDD
CPVDD 9 (A1)
DirectDrive
C3
1μF
1μF
INA1 30 (E3)
INA2 27 (E4)
INPUT A: 0dB,
6dB, OR 20dB
3dB
1μF
1μF
LEFT
VOLUME
INB1 24 (E5)
INB2 22 (D5)
3dB
18 (B6) HPR
20 (C6) OUTRx
12dB
MONO
VOLUME
INC1 14 (B4)
INC2 19 (C5)
OUTPUT
MIXER
16 (A6) HPL
INPUT
MIXER
INPUT B: 0dB
OR 6dB
1μF
1μF
3dB
RIGHT
VOLUME
5 (C1) OUT+
CLASS D
AMPLIFIER
INPUT C: 0dB
OR 6dB
2 (E1) OUT-
1μF
VBIAS
11 (B3)
1μF
SDA
SCL
SHDN
6 (C2)
MAX9776
3 (D2)
I2C CONTROL
32 (E2)
25 (F6)
GND
18
4 (D1)
PGND
29 (F3)
PGND
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
The MAX9775/MAX9776 ultra-low-EMI, filterless, Class D
audio power amplifiers feature several improvements to
switch-mode amplifier technology. The MAX9775/
MAX9776 feature active emissions limiting circuitry to
reduce EMI. Zero dead-time technology maintains stateof-the-art efficiency and THD+N performance by allowing
the output FETs to switch simultaneously without crossconduction. A unique filterless modulation scheme and
spread-spectrum modulation create compact, flexible,
low-noise, efficient audio power amplifiers while
occupying minimal board space. The differential input
architecture reduces common-mode noise pickup with or
without the use of input-coupling capacitors. The
MAX9775/MAX9776 can also be configured as singleended input amplifiers without performance degradation.
The MAX9775/MAX9776 feature three fully differential
input pairs (INA_, INB_, INC_) that can be configured
as stereo single-ended or mono differential inputs. I2C
provides control for input configuration, volume level,
and mixer configuration. The MAX9775’s 3D enhancement feature widens the stereo sound field to improve
stereo imaging when stereo speakers are placed in
close proximity.
DirectDrive allows the headphone and mono receiver
amplifiers to output ground-referenced signals from a
single supply, eliminating the need for large DC-blocking capacitors. Comprehensive click-and-pop suppression minimizes audible transients during the turn-on
and turn-off of amplifiers.
Class D Speaker Amplifier
Comparators monitor the audio inputs and compare the
complementary input voltages to a sawtooth waveform.
The comparators trip when the input magnitude of the
sawtooth exceeds their corresponding input voltage. The
active emissions limiting circuitry slightly reduces the
turn-on rate of the output H-bridge by slew-rate limiting
the comparator output pulse. Both comparators reset at
a fixed time after the rising edge of the second comparator trip point, generating a minimum-width pulse
(tON(MIN),100ns typ) at the output of the second comparator (Figure 1). As the input voltage increases or
decreases, the duration of the pulse at one output
increases while the other output pulse duration remains
the same. This causes the net voltage across the speaker (VOUT+ - VOUT-) to change. The minimum-width pulse
helps the devices to achieve high levels of linearity.
tSW
VIN-
VIN+
OUT-
OUT+
tON(MIN)
VOUT+ - VOUT-
Figure 1. Outputs with an Input Signal Applied
______________________________________________________________________________________
19
MAX9775/MAX9776
Detailed Description
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Operating Modes
Fixed-Frequency Modulation
The MAX9775/MAX9776 feature a fixed-frequency
modulation mode with a 1.1MHz switching frequency,
set through the I2C interface (Table 2). In fixed-frequency modulation mode, the frequency spectrum of the
Class D output consists of the fundamental switching
frequency and its associated harmonics (see the
Wideband Output Spectrum Fixed-Frequency Mode
graph in the Typical Operating Characteristics).
Spread-Spectrum Modulation
The MAX9775/MAX9776 feature a unique spread-spectrum modulation that flattens the wideband spectral components. Proprietary techniques ensure that the
tSW
tSW
cycle-to-cycle variation of the switching period does not
degrade audio reproduction or efficiency (see the
Typical Operating Characteristics). Select spread-spectrum modulation mode through the I2C interface (Table
2). In spread-spectrum modulation mode, the switching
frequency varies randomly by ±30kHz around the center
frequency (1.16MHz). The modulation scheme remains
the same, but the period of the sawtooth waveform
changes from cycle to cycle (Figure 2). Instead of a
large amount of spectral energy present at multiples of
the switching frequency, the energy is now spread over
a bandwidth that increases with frequency. Above a few
megahertz, the wideband spectrum looks like white
noise for EMI purposes (see Figure 3).
tSW
tSW
VIN-
VIN+
OUT-
OUT+
tON(MIN)
VOUT+ - VOUT-
Figure 2. Output with an Input Signal Applied (Spread-Spectrum Modulation Mode)
20
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
MAX9775/MAX9776
40.0
35.0
EN55022B LIMIT
AMPLITUDE (dBμV/m)
30.0
25.0
20.0
15.0
10.0
5.0
30.0
60.0
80.0
100.0
120.0
140.0
160.0
180.0
200.0
220.0
240.0
260.0
280.0
300.0
FREQUENCY (MHz)
Figure 3. EMI with 76mm of Speaker Cable
______________________________________________________________________________________
21
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Filterless Modulation/Common-Mode Idle
The MAX9775/MAX9776 use Maxim’s unique modulation scheme that eliminates the LC filter required by traditional Class D amplifiers, improving efficiency,
reducing component count, conserving board space
and system cost. Conventional Class D amplifiers output a 50% duty-cycle square wave when no signal is
present. With no filter, the square wave appears across
the load as a DC voltage, resulting in finite load current,
increasing power consumption, especially when idling.
When no signal is present at the input of the
MAX9775/MAX9776, the outputs switch as shown in
Figure 4. Because the MAX9775/MAX9776 drive the
speaker differentially, the two outputs cancel each
other, resulting in no net idle mode voltage across the
speaker, minimizing power consumption.
VIN = 0V
OUT-
OUT+
DirectDrive
Traditional single-supply headphone amplifiers have
outputs biased at a nominal DC voltage (typically half
the supply) for maximum dynamic range. Large coupling capacitors are needed to block this DC bias from
the headphone. Without these capacitors, a significant
amount of DC current flows to the headphone, resulting
in unnecessary power dissipation and possible damage to both headphone and headphone amplifier.
Maxim’s DirectDrive architecture uses a charge pump to
create an internal negative supply voltage. This allows the
headphone outputs of the MAX9775/MAX9776 to be
biased at GND, almost doubling dynamic range while
operating from a single supply. With no DC component,
there is no need for the large DC-blocking capacitors.
Instead of two large (220µF, typ) tantalum capacitors, the
MAX9775/MAX9776 charge pump requires two small
ceramic capacitors, conserving board space, reducing
cost, and improving the frequency response of the headphone amplifier. See the Output Power vs. Load
Resistance and Charge-Pump Capacitor Size graph in
the Typical Operating Characteristics for details of the
possible capacitor sizes. There is a low DC voltage on
the amplifier outputs due to amplifier offset. However, the
offset of the MAX9775/MAX9776 is typically 1.4mV,
which, when combined with a 32Ω load, results in less
than 44nA of DC current flow to the headphones.
22
VOUT+ - VOUT- = 0V
Figure 4. Outputs with No Input Signal
In addition to the cost and size disadvantages of the
DC-blocking capacitors required by conventional headphone amplifiers, these capacitors limit the amplifier’s
low-frequency response and can distort the audio signal. Previous attempts at eliminating the output-coupling capacitors involved biasing the headphone return
(sleeve) to the DC bias voltage of the headphone
amplifiers. This method raises some issues:
1) The sleeve is typically grounded to the chassis.
Using the midrail biasing approach, the sleeve must
be isolated from system ground, complicating product design.
2) During an ESD strike, the driver’s ESD structures are
the only path to system ground. Thus, the amplifier
must be able to withstand the full ESD strike.
3) When using the headphone jack as a lineout to
other equipment, the bias voltage on the sleeve may
conflict with the ground potential from other equipment, resulting in possible damage to the amplifiers.
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
QR
RIGHT
RIGHT
+
IL
IR
GND
LISTENER
d
VDD / 2
VOUT
LEFT
+
LEFT
QL
CONVENTIONAL DRIVER-BIASING SCHEME
Figure 6. MAX9775 3D Stereo Enhancement
+VDD
VOUT
GND
-VDD
DirectDrive BIASING SCHEME
Figure 5. Traditional Amplifier Output vs. MAX9775/MAX9776
DirectDrive Output
Charge Pump
The MAX9775/MAX9776 feature a low-noise charge
pump. The switching frequency of the charge pump is
half the switching frequency of the Class D amplifier,
regardless of the operating mode. The nominal switching frequency is well beyond the audio range, and thus
does not interfere with the audio signals, resulting in an
SNR of 93dB. Although not typically required, additional high-frequency noise attenuation can be achieved by
increasing the size of C2 (see the Typical Application
Circuits). The charge pump is active in both speaker
and headphone modes.
3D Enhancement
The MAX9775 features a 3D stereo enhancement function, allowing the MAX9775 to widen the stereo sound field
and immerse the listener in a cleaner, richer sound experience. Note the MAX9776, mono Class D speaker amplifier
does not feature 3D stereo enhancement.
As stereo speaker applications become more compact,
the quality of stereophonic sound is jeopardized.
With Maxim’s 3D stereo enhancement, it is possible to
emulate stereo sound in situations where the speakers
must be positioned close together. As shown in Figure
6, wave interference can be used to cancel the left
channel in the vicinity of the listener’s right ear and vice
versa. This technique can yield an apparent separation
between the speakers that is a factor of four or greater
than the actual physical separation.
The external capacitors CL_L, CL_H, CR_L, and CR_H
set the starting and stopping range of the 3D effect.
CL_H and CR_H are for the lower limit (in the MAX9775
Typical Application Circuit, it is 1kHz), CR_L and CL_L
are for the higher limit (10kHz). The internal resistor is
typically 7kΩ and the frequencies are calculated as:
3D _ START =
1
2πRC
where R = 7kΩ and C = CR_H and CL_H.
3D _ STOP =
1
2πRC
where R = 7kΩ and C = CR_L and CL_L.
For example, with CR_L = CL_L = 2.2nF and CR_H =
CL_H = 22nF, the 3D start frequency is 1kHz and the
3D stop frequency is 10kHz.
Enabling the 3D sound effect results in an apparent 6dB
gain because the internal left and right signals are mixed
together. This gain can be nulled by volume adjusting
the left and right signals. The volume control can be programmed through the I2C-compatible interface to compensate for the extra 6dB increase in gain. For example,
______________________________________________________________________________________
23
MAX9775/MAX9776
VDD
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
if the right and left volume controls are set for a maximum gain 0dB (11111 in Table 7, IN+6dB = 0 from Table
10) before the 3D effect is activated, the volume control
should be programmed to -6dB (11001 in Table 7)
immediately after the 3D effect has been activated.
Signal Path
The audio inputs of the MAX9775/MAX9776—INA, INB,
and INC—are preamplified and then mixed by the input
mixer to create three internal signals: Left (L), Right (R),
and Mono (M). Tables 5a and 5b show how the inputs
are mixed to create L, R, and M. These signals are then
independently volume adjusted by the L, R, and M volume control and routed to the output mixer. The output
mixer mixes the internal L, R, and M signals to create a
variety of audio mixes that are output to the headphone
speaker and mono receiver amplifiers. Figure 6 shows
the signal path that the audio signals take.
Signal amplification takes place in three stages. In the
first stage, the inputs (INA, INB, and INC) are preamplified. The amount by which each input is amplified
is determined by the bits INA+20dB (B4 in the Input
Mode Control Register) and IN+6dB (B3 in the Global
Control Register). After preamplification, they are mixed
in the Input Mixer to create the internal signals L, R,
and M.
In the second stage of amplification, the internal L, R,
and M signals are independently volume adjusted.
Finally, each output amplifier has its own internal gain.
The speaker, headphone, and mono receiver amplifiers
have fixed gains of 12dB, 3dB, and 3dB, respectively.
Current-Limit and Thermal Protection
The MAX9775/MAX9776 feature current limiting and
thermal protection to protect the device from short circuits and overcurrent conditions. The headphone
amplifier pulses in the event of an overcurrent condition
with a pulse every 100µs as long as the condition is
present. Should the current still be high, the above
cycle is repeated. The speaker amplifier current-limit
protection clamps the output current without shutting
down the output. This can result in a distorted output.
Current is limited to 1.6A in the speaker amplifiers and
170mA in the headphone and mono receiver amplifiers.
The MAX9775/MAX9776 have thermal protection that
disables the device at +150°C until the temperature
decreases to +120°C.
-75dB TO 0dB
12dB
SPEAKER
RVOL
PREAMPLIFIER
-75dB TO 0dB
3dB
HEADPHONE
INPUT
MIXER
INPUT
OUTPUT
MIXER
LVOL
INPUT A:
0dB, 6dB, 20dB
INPUT B AND C:
0dB, 6dB
0dB TO 6dB
-75dB TO 0dB
MONO+6dB
MVOL
Figure 7. Signal Path
24
3dB
RECEIVER
MONO
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Shutdown
The MAX9775/MAX9776 feature a 0.1µA hard shutdown
mode that reduces power consumption to extend battery
life and a soft shutdown where current consumption is
typically 8.5µA. Hard shutdown is controlled by connecting the SHDN pin to GND, disabling the amplifiers, bias
circuitry, charge pump, and I2C. In shutdown, the headphone amplifier output impedance is 1.4kΩ and the
speaker output impedance is 300kΩ. Similarly, the
MAX9775/MAX9776 enter soft-shutdown when the SHDN
bit = 0 (see Table 2). The I2C interface is active and the
contents of the command register are not affected when
in soft-shutdown. This allows the master to write to the
MAX9775/MAX9776 while in shutdown. The I2C interface
is completely disabled in hardware shutdown. When the
MAX9775/MAX9776 are re-enabled the default settings
are applied (see Table 3).
I2C Interface
The MAX9775/MAX9776 feature an I2C 2-wire serial
interface consisting of a serial data line (SDA) and a
serial clock line (SCL). SDA and SCL facilitate communication between the MAX9775/MAX9776 and the master at clock rates up to 400kHz. Figure 8 shows the
2-wire interface timing diagram. The MAX9775/
MAX9776 are receive-only slave devices relying on the
master to generate the SCL signal. The master, typically a microcontroller, generates SCL and initiates data
transfer on the bus. The MAX9775/MAX9776 cannot
write to the SDA bus except to acknowledge the receipt
of data from the master. The MAX9775/MAX9776 will
not acknowledge a read command from the master.
A master device communicates to the MAX9775/
MAX9776 by transmitting the proper address followed
by the data word. Each transmit sequence is framed by
a START (S) or REPEATED START (Sr) condition and a
STOP (P) condition. Each word transmitted over the
bus is 8 bits long and is always followed by an
acknowledge clock pulse.
The MAX9775/MAX9776 SDA line operates as both an
input and an open-drain output. A pullup resistor,
greater than 500Ω, is required on the SDA bus. The
MAX9775/MAX9776 SCL line operates as an input only.
A pullup resistor (greater than 500Ω) is required on
SCL if there are multiple masters on the bus or if the
master in a single-master system has an open-drain
SCL output. Series resistors in line with SDA and SCL
are optional. Series resistors protect the digital inputs of
the MAX9775/MAX9776 from high-voltage spikes on
the bus lines, and minimize crosstalk and undershoot of
the bus signals.
SDA
tBUF
tSU, STA
tSU, DAT
tHD, STA
tHD, DAT
tLOW
tSP
tSU, STO
SCL
tHIGH
tHD, STA
tR
tF
START
CONDITION
REPEATED
START
CONDITION
STOP
CONDITION
START
CONDITION
Figure 8. 2-Wire Serial-Interface Timing Diagram
______________________________________________________________________________________
25
MAX9775/MAX9776
Click-and-Pop Suppression
In conventional single-supply headphone amplifiers, the
output-coupling capacitor is a major contributor of audible clicks and pops. Upon startup, the amplifier charges
the coupling capacitor to its bias voltage, typically half the
supply. Likewise, during shutdown, the capacitor is discharged to GND. This results in a DC shift across the
capacitor, which, in turn, appears as an audible transient
at the speaker. Since the MAX9775/MAX9776 headphone
amplifier does not require output-coupling capacitors, this
problem does not arise.
In most applications, the output of the preamplifier driving the MAX9775/MAX9776 has a DC bias of typically
half the supply. During startup, the input-coupling
capacitor is charged to the preamplifier’s DC bias voltage, resulting in a DC shift across the capacitor and an
audible click/pop. An internal delay of 30ms eliminates
the click/pop caused by the input filter.
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Bit Transfer
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the START and STOP
Conditions section). SDA and SCL idle high when the
I2C bus is not busy.
the seven most significant bits (MSBs) followed by the
Read/Write bit. The address is the first byte of information sent to the MAX9775/MAX9776 after the START
condition. The MAX9775/MAX9776 are slave devices
only capable of being written to. The Read/Write bit
should be a zero when configuring the MAX9775/
MAX9776.
START and STOP Conditions
A master device initiates communication by issuing a
START condition. A START condition is a high-to-low
transition on SDA with SCL high. A STOP condition is a
low-to-high transition on SDA while SCL is high (Figure
9). A START (S) condition from the master signals the
beginning of a transmission to the MAX9775/MAX9776.
The master terminates transmission, and frees the bus,
by issuing a STOP (P) condition. The bus remains active
if a REPEATED START (Sr) condition is generated
instead of a STOP condition.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9775/MAX9776 use to handshake receipt of each
byte of data (see Figure 10). The MAX9775/MAX9776
pull down SDA during the master-generated 9th clock
pulse. Monitoring ACK allows for detection of unsuccessful data transfers. An unsuccessful data transfer
occurs if a receiving device is busy or if a system fault
has occurred. In the event of an unsuccessful data
transfer, the bus master may reattempt communications.
Early STOP Conditions
The MAX9775/MAX9776 recognize a STOP condition at
any point during data transmission except if the STOP
condition occurs in the same high pulse as a START
condition.
Slave Address
The MAX9775/MAX9776 are available with one preset
slave address (see Table 1). The address is defined as
S
Sr
Table 1. MAX9775/MAX9776 Address Map
PART
SLAVE ADDRESS
A6
A5
A4
A3
A2
A1
A0
R/W
MAX9775
1
0
0
1
1
0
0
0
MAX9776
1
0
0
1
1
0
1
0
P
SCL
CLOCK PULSE FOR
ACKNOWLEDGMENT
START
CONDITION
SCL
1
2
8
NOT ACKNOWLEDGE
SDA
SDA
ACKNOWLEDGE
Figure 9. START, STOP, and REPEATED START Conditions
26
Figure 10. Acknowledge
______________________________________________________________________________________
9
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
S
SLAVE ADDRESS
B7 B6 B5 B4 B3 B2 B1 B0
0 ACK COMMAND BYTE
R/W
The MAX9775/MAX9776 only accept write data, but
they acknowledge the receipt of the address byte with
the R/W bit set high. The MAX9775/MAX9776 do not
write to the SDA bus in the event that the R/W bit is set
high. Subsequently, the master reads all 1’s from the
MAX9775/MAX9776. Always set the R/W bit to zero to
avoid this situation.
ACK P
ACKNOWLEDGE
FROM MAX9775/MAX9776
Programming the MAX9775/MAX9776
Figure 11. Write Data Format Example
Write Data Format
A write to the MAX9775/MAX9776 includes transmission of a START condition, the slave address with the
R/W bit set to 0 (Table 1), one byte of data to configure
the Command Register, and a STOP condition. Figure
11 illustrates the proper format for one frame.
The MAX9775/MAX9776 are programmed through 6
control registers. Each register is addressed by the 3
MSBs (B5–B7) followed by 5 configure bits (B0–B4) as
shown in Table 2. Correct programming of the
MAX9775/MAX9776 requires writing to all 6 control registers. Upon power-on, their default settings are as listed in Table 3.
Table 2. Control Registers
B7
FUNCTION
B6
B5
B4
B3
COMMAND
B2
B1
B0
DATA
Input Mode Control
0
0
0
Mono Volume Control
0
0
1
INA+20dB
INMODE (Tables 5a and 5b)
Left Volume Control
0
1
0
LVOL (Table 7)
Right Volume Control
0
1
1
RVOL (Table 7)
Output Mode Control
1
0
0
MONO+6dB
Global Control Register
1
0
1
SHDN
MVOL (Table 7)
OUTMODE (Table 9)
IN+6dB
MUTE
SSM
3D/MONO
Table 3. Power-On Reset Conditions
COMMAND
Input Mode (000)
DATA
10000
DESCRIPTION
Input A gain = +20dB; input A, B, and C singled-ended stereo inputs
Mono Volume (001)
11111
Maximum volume
Left Volume (010)
11111
Maximum volume
Right Volume (011)
11111
Maximum volume
Output Mode (100)
01000
0dB of extra mono gain, mode 8: stereo headphone, stereo speaker
Global Control Register (101)
00011
Powered-off, input B/C gain = 0dB, MUTE off, SSM on, 3D/MONO on
______________________________________________________________________________________
27
MAX9775/MAX9776
COMMAND BYTE IS STORED ON
RECEIPT OF STOP CONDITION
ACKNOWLEDGE FROM
MAX9775/MAX9776
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Input Mode Control
Table 4. Input Mode Control Register
REGISTER
Input Mode Control
B7
B6
B5
B4
0
0
0
INA+20dB
The MAX9775/MAX9776 have three flexible inputs that
can be configured as single-ended stereo inputs or differential mono inputs. All input signals are summed into
three unique signals—Left (L), Right (R), and Mono
(M)—which are routed to the output amplifiers. The bit
INA+20dB allows the option of boosting low-level signals on INA. INA+20dB can be set as follows:
B3
B2
B1
B0
INMODE (Tables 5a and 5b )
1 = Input A’s gain +20dB for low-level signals such as
FM receivers.
0 = Input A’s gain is either 0dB or +6dB as set by
IN+6dB (bit B3 of the Control Register).
Tables 5a and 5b show how the inputs—INA, INB, and
INC—are mixed to create the internal signals Left (L),
Right (R), and Mono (M).
Table 5a. Input Mode
PROGRAMMING MODE
INMODE
B2
B1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
0
0
0
0
0
1
0
1
B3
0
0
0
0
0
0
0
0
1
1
1
1
INPUT CONFIGURATION
B0
0
1
0
1
0
1
0
1
0
1
0
1
INA1
INA2
INB1
INB2
INC1
INC2
L
L
L
L
L
L
M+
M+
M+
M+
M+
M+
R
R
R
R
R
R
MMMMMM-
L
L
M+
M+
R+
L+
L
L
M+
M+
R+
L+
R
R
MMRLR
R
MMRL-
L
M+
L
M+
L+
R+
L
M+
L
M+
L+
R+
R
MR
MLRR
MR
MLR-
Table 5b. Internal Signals L, R, and M
PROGRAMMING MODE
INMODE
B3
B2
B1
B0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
28
INTERNAL SIGNALS LEFT (L), RIGHT (R), AND MONO (M)
L
R
M
INA1 + INB1 + INC1
INA1 + INB1
INA1 + INC1
INA1
INA1 + (INC1 - INC2)
INA1 + (INB1 - INB2)
INB1 + INC1
INB1
INC1
INA2 + INB2 + INC2
INA2 + INB2
INA2 + INC2
INA2
INA2 + (INB1 - INB2)
INA2 + (INC1 - INC2)
INB2 + INC2
INB2
INC2
—
INC1 - INC2
INB1 - INB2
(INB1 - INB2) + (INC1 - INC2)
—
—
INA1 - INA2
(INA1 - INA2) + (INC1 - INC2)
(INA1 - INA2) + (INB1 - INB2)
1
0
0
1
—
—
(INA1 - INA2) + (INB1 - INB2)
+ (INC1 - INC2)
1
1
0
0
1
1
0
1
INC1 - INC2
INB1 - INB2
INB1 - INB2
INC1 - INC2
INA1 - INA2
INA1 - INA2
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Table 6. Mono/Left/Right Volume Control Registers
REGISTER
B7
B6
B5
B4
B3
B2
Mono Volume Control
0
0
1
Left Volume Control
0
1
0
LVOL
Right Volume Control
0
1
1
RVOL
The MAX9775/MAX9776 have separate volume controls
for each of the internal signals: Left (L), Right (R), and
Mono (M). The final gain of each signal is determined
by the way the following bits are set: MVOL, LVOL,
B1
B0
MVOL
RVOL, INA+20dB, IN+6dB, and MONO+6dB. Table 7
shows how to configure the L, R, and M amplifiers for
specific gains.
Table 7. Volume Control Settings
MVOL/LVOL/RVOL
B4
B3
B2
B1
B0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
GAIN (dB)
MVOL/LVOL/RVOL
GAIN (dB)
B4
B3
B2
B1
B0
Mute
1
0
0
0
0
-23
1
-75
1
0
0
0
1
-21
1
0
-71
1
0
0
1
0
-19
0
1
1
-67
1
0
0
1
1
-17
0
1
0
0
-63
1
0
1
0
0
-15
0
0
1
0
1
-59
1
0
1
0
1
-13
0
0
1
1
0
-55
1
0
1
1
0
-11
0
0
1
1
1
-51
1
0
1
1
1
-9
0
1
0
0
0
-47
1
1
0
0
0
-7
0
1
0
0
1
-44
1
1
0
0
1
-6
0
1
0
1
0
-41
1
1
0
1
0
-5
0
1
0
1
1
-38
1
1
0
1
1
-4
0
1
1
0
0
-35
1
1
1
0
0
-3
0
1
1
0
1
-32
1
1
1
0
1
-2
0
1
1
1
0
-29
1
1
1
1
0
-1
0
1
1
1
1
-26
1
1
1
1
1
0
______________________________________________________________________________________
29
MAX9775/MAX9776
Mono/Left/Right Volume Control
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Output Mode Control
Table 8. Output Mode Control Register
REGISTER
Output Mode Control
B7
B6
B5
B4
1
0
0
MONO+6dB
MONO+6dB in the Output Mode Control register allows
an extra 6dB of gain on the internal mono signal:
1 = Additional 6dB of gain is applied to the internal
Mono (M) signal path.
0 = No additional gain is applied to the Internal Mono
(M) signal path.
The MAX9775 has five output amplifiers: a mono
receiver amplifier, a stereo DirectDrive headphone
B3
B2
B1
B0
OUTMODE (Table 9)
amplifier, and a stereo Class D amplifier. The MAX9776
has four output amplifiers: a mono receiver amplifier, a
stereo DirectDrive headphone amplifier, and a mono
Class D amplifier.
Table 9 shows how each of the three internal signals—
Left (L), Right (R), and Mono (M)—are mixed and routed to the various outputs.
Table 9. Output Modes
MODE
OUTMODE
RECEIVER
LEFT HP
RIGHT HP
MAX9775
MAX9776
B3
B2
B1
B0
LEFT SPK
RIGHT
0
0
0
0
0
—
—
—
—
—
—
1
0
0
0
1
M
—
—
—
—
—
2
0
0
1
0
—
—
—
M
M
M
3
0
0
1
1
—
M
M
M
M
M
4
0
1
0
0
—
M
M
—
—
—
5
0
1
0
1
—
—
—
—
—
—
6
0
1
1
0
1/ (L + R)
2
—
—
—
—
—
7
0
1
1
1
—
—
—
L
R
L+R
8
1
0
0
0
—
L
R
L
R
L+R
9
1
0
0
1
—
L
R
—
—
—
10
1
0
1
0
—
—
—
—
—
—
11
1
0
1
1
M + 1/2 (L + R)
—
—
—
—
—
12
1
1
0
0
—
—
—
L+M
R+M
L + R + 2M
13
1
1
0
1
—
L+M
R+M
L+M
R+M
L + R + 2M
14
1
1
1
0
—
L+M
R+M
—
—
—
15
1
1
1
1
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
— = Amplifier off.
L = Left signal.
R = Right signal.
M = Mono signal.
30
SPK
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Table 10. Global Control Register
REGISTER
Global Control Register
B7
B6
B5
B4
B3
B2
B1
B0
1
0
1
SHDN
IN+6dB
MUTE
SSM
3D/MONO
The Global Control Register is used for global configurations, those affecting all inputs and outputs. The bits
in the control register are shown in Table 11.
Table 11. Global Control Register Configurations
BIT
NAME
B4
SHDN
B3
IN+6dB
B2
MUTE
B1
SSM
B0
3D/MONO
FUNCTION
1 = Normal operation
0 = Low-power shutdown mode. I2C settings are saved.
1 = All input signals are boosted by 6dB.
0 = All input signals are passed un-amplified.
This bit does not affect INA if the INA+20dB bit (B4 of the Input Mode Control Register) is set to
1, in which case INA is boosted by 20dB.
1 = Mute all outputs.
0 = All outputs are active.
1 = Spread-spectrum Class D modulation.
0 = Fixed-frequency Class D modulation.
MAX9775:
1 = 3D Enhancement is on.
0 = 3D Enhancement is off.
1 = Speakers will output L+R in modes 7, 8, 12, and 13 (see Table 9).
0 = Speakers will output L in modes 7, 8, 12, and 13 (see Table 9).
Applications Information
Class D Filterless Operation
Traditional Class D amplifiers require an output filter to
recover the audio signal from the amplifier’s PWM output. The filters add cost, increase the solution size of
the amplifier, and can decrease efficiency. The traditional PWM scheme uses large differential output
swings (2 x VDD(P-P)) and causes large ripple currents.
Any parasitic resistance in the filter components results
in a loss of power, lowering the efficiency.
The MAX9775/MAX9776 do not require an output filter.
The device relies on the inherent inductance of the
speaker coil and the natural filtering of both the speaker and the human ear to recover the audio component
of the square-wave output. Eliminating the output filter
results in a smaller, less costly, more efficient solution.
Because the switching frequency of the MAX9775/
MAX9776 speaker output is well beyond the bandwidth
of most speakers, voice coil movement due to the
square-wave frequency is very small. Although this movement is small, a speaker not designed to handle the additional power may be damaged. For optimum results use a
speaker with a series inductance > 10µH. Typical 8Ω
speakers, for portable audio applications, exhibit series
inductances in the 20µH to 100µH range.
Input Amplifier
Differential Input
The MAX9775/MAX9776 feature a programmable differential input structure, making it compatible with many
CODECs, and offering improved noise immunity over a
single-ended input amplifier. In devices such as cell
phones, high-frequency signals from the RF transmitter
can be picked up by the amplifier’s input traces. The
signals appear at the amplifier’s inputs as commonmode noise. A differential input amplifier amplifies the
difference of the two inputs and any signal common to
both is cancelled.
______________________________________________________________________________________
31
MAX9775/MAX9776
Global Control Register
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Single-Ended Input
The MAX9775/MAX9776 can be configured as a singleended input amplifier by appropriately configuring the
Input Control Register (see Tables 5a and 5b).
DC-Coupled Input
The input amplifier can accept DC-coupled inputs that
are biased to the amplifier’s bias voltage. DC-coupling
eliminates the input-coupling capacitors; reducing component count to potentially six external components
(see the Typical Application Circuits). However, the
highpass filtering effect of the capacitors is lost, allowing low-frequency signals to feed through to the load.
Unused Inputs
Connect any unused input pin directly to VBIAS. This
saves input capacitors on unused inputs and provides
the highest noise immunity on the input.
Component Selection
Input Filter
An input capacitor (CIN) in conjunction with the input
impedance of the MAX9775/MAX9776 form a highpass
filter that removes the DC bias from the incoming signal.
The AC-coupling capacitor allows the amplifiers to automatically bias the signal to an optimum DC level.
Assuming zero source impedance, the -3dB point of the
highpass filter is given by:
f−3dB =
Class D Output Filter
The MAX9775/MAX9776 do not require a Class D output filter. The devices pass EN55022B emission standards with 152mm of unshielded speaker cables.
However, output filtering can be used if a design is failing radiated emissions due to board layout or cable
length, or the circuit is near EMI-sensitive devices. Use
a ferrite bead filter when radiated frequencies above
10MHz are of concern. Use an LC filter when radiated
frequencies below 10MHz are of concern, or when long
leads (> 152mm) connect the amplifier to the speaker.
Figure 12 shows optional speaker amplifier output filters.
External Component Selection
BIAS Capacitor
VBIAS is the output of the internally generated DC bias
voltage. The VBIAS bypass capacitor, CVBIAS improves
PSRR and THD+N by reducing power supply and other
noise sources at the common-mode bias node, and
also generates the clickless/popless, startup/shutdown
DC bias waveforms for the speaker amplifiers. Bypass
VBIAS with a 1µF capacitor to GND.
1
2πRINCIN
Choose CIN so that f-3dB is well below the lowest frequency of interest. Use capacitors whose dielectrics
have low-voltage coefficients, such as tantalum or aluminum electrolytic. Capacitors with high-voltage coefficients, such as ceramics, may result in increased
distortion at low frequencies.
Other considerations when designing the input filter
include the constraints of the overall system and the
actual frequency band of interest. Although high-fidelity
audio calls for a flat-gain response between 20Hz and
20kHz, portable voice-reproduction devices such as cell
phones and two-way radios need only concentrate on
the frequency range of the spoken human voice (typi-
32
cally 300Hz to 3.5kHz). In addition, speakers used in
portable devices typically have a poor response below
300Hz. Taking these two factors into consideration, the
input filter may not need to be designed for a 20Hz to
20kHz response, saving both board space and cost
due to the use of smaller capacitors.
22Ω
0.033μF
0.1μF
33μH
OUT_+
0.47μF
OUT_33μH
0.033μF
0.1μF
22Ω
Figure 12. Speaker Amplifier Output Filter
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Flying Capacitor (C1)
The value of the flying capacitor (C1) affects the output
resistance of the charge pump. A C1 value that is too
small degrades the device’s ability to provide sufficient
current drive, which leads to a loss of output voltage.
Increasing the value of C1 reduces the charge-pump output resistance to an extent. Above 1µF, the on-resistance
of the switches and the ESR of C1 and C2 dominate.
Output Capacitor (C2)
The output capacitor value and ESR directly affect the
ripple at CPVSS. Increasing the value of C2 reduces
output ripple. Likewise, decreasing the ESR of C2
reduces both ripple and output resistance. Lower
capacitance values can be used in systems with low
maximum output power levels. See the Output Power
vs. Load Resistance and Charge-Pump Capacitor Size
graph in the Typical Operating Characteristics.
CPVDD Bypass Capacitor (C3)
The CPVDD bypass capacitor (C3) lowers the output
impedance of the power supply and reduces the
impact of the MAX9775/MAX9776’s charge-pump
switching transients. Bypass CPVDD with C3 to PGND
and place it physically close to the CPVDD and PGND.
Use a value for C3 that is equal to C1.
Supply Bypassing, Layout, and Grounding
Proper layout and grounding are essential for optimum
performance. Use large traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance. Large traces also aid in moving heat away from the package. Proper grounding
improves audio performance, minimizes crosstalk
between channels, and prevents any switching noise
from coupling into the audio signal. Connect PGND and
GND together at a single point on the PCB. Route all
traces that carry switching transients away from GND
and the traces/components in the audio signal path.
Connect all of the power-supply inputs (CPVDD, VDD,
and PVDD) together. Bypass CPVDD with a 1µF capacitor to CPGND. Bypass VDD with 1µF capacitor to GND.
Bypass PVDD with a 1µF capacitor in parallel with a
0.1µF capacitor to PGND. Place the bypass capacitors
as close to the MAX9775/MAX9776 as possible. Place
a bulk capacitor between PVDD and PGND if needed.
Use large, low-resistance output traces. Current drawn
from the outputs increases as load impedance
decreases. High output trace resistance decreases the
power delivered to the load. Large output, supply, and
GND traces also allow more heat to move from the
MAX9775/MAX9776 to the PCB, decreasing the thermal
impedance of the circuit.
TQFN Applications Information
The MAX9776 TQFN-EP package features an exposed
thermal pad on its underside. This pad lowers the
package’s thermal impedance by providing a direct
heat conduction path from the die to the PCB. The
exposed pad is internally connected to GND. Connect
the exposed thermal pad to the PCB GND plane.
WLP Applications Information
For the latest application details on WLP construction,
dimensions, tape carrier information, PCB techniques,
bump-pad layout, and recommended reflow temperature profile, as well as the latest information of reliability
testing results, refer to Application Note 1891:
Understanding the Basics of the Wafer-Level ChipScale Package (WL-CSP) available on Maxim’s website
at www.maxim-ic.com/ucsp.
WLP Thermal Consideration
When operating at maximum output power, the WLP
thermal dissipation can become a limiting factor. The
WLP package does not dissipate as much power as a
TQFN and as a result will operate at a higher temperature. At peak output power into a 4Ω load, the
MAX9775/MAX9776 can exceed its thermal limit, triggering thermal protection. As a result, do not choose
the WLP package when maximum output power into 4Ω
is required.
Table 12. Suggested Capacitor Manufacturers
SUPPLIER
PHONE
FAX
WEBSITE
Taiyo Yuden
800-348-2496
847-925-0899
www.t-yuden.com
TDK
807-803-6100
847-390-4405
www.component.tdk.com
______________________________________________________________________________________
33
MAX9775/MAX9776
Charge-Pump Capacitor Selection
Use capacitors with an ESR less than 100mΩ for optimum performance. Low-ESR ceramic capacitors minimize the output resistance of the charge pump. Most
surface-mount ceramic capacitors satisfy the ESR
requirement. For best performance over the extended
temperature range, select capacitors with an X7R dielectric or better. Table 12 lists suggested manufacturers.
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
MAX9775/MAX9776
Pin Configurations
TOP VIEW
(BUMPS ON BOTTOM)
1
2
3
4
5
6
CPVDD
C1P
CPGND
C1N
CPVSS
HPL
1
2
3
4
5
6
CPVDD
C1P
CPGND
C1N
CPVSS
HPL
I.C.
I.C.
VBIAS
INC1
VSS
HPR
OUT+
SDA
INC2
OUTRx
PGND
SCL
INB2
VDD
OUT-
SHDN
INA1
INA2
INB1
I.C.
PVDD
I.C.
PGND
I.C.
I.C.
GND
A
A
CL_L
CL_H
VBIAS
INC1
VSS
HPR
B
B
OUTL+
SDA
INC2
OUTRx
C
C
PGND
SCL
MAX9775
INB2
VDD
MAX9776
D
D
OUTL-
SHDN
INA1
INA2
INB1
CR_L
E
E
PVDD
OUTR-
PGND
OUTR+
CR_H
GND
F
F
WLP
PVDD
1
OUT-
2
I.C.
INA1
PGND
I.C.
INA2
I.C.
GND
TOP VIEW
SHDN
WLP
32
31
30
29
28
27
26
25
24 INB1
23 I.C.
+
*EP
SCL
3
22 INB2
PGND
4
21 VDD
OUT+
5
MAX9776
20 OUTRx
10
11
12
13
14
15
16
HPL
9
INC1
17 VSS
CPVSS
8
C1N
I.C.
CPGND
18 HPR
VBIAS
19 INC2
7
C1P
6
I.C.
CPVDD
SDA
TQFN-EP*
Chip Information
PROCESS: BiCMOS
34
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
QFN THIN.EPS
______________________________________________________________________________________
35
MAX9775/MAX9776
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
36
______________________________________________________________________________________
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
WLP PKG.EPS
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
36 WLP
W363A3+3
21-0024
32 TQFN-EP
T3255-4
21-0140
______________________________________________________________________________________
37
MAX9775/MAX9776
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
MAX9775/MAX9776
2 x 1.5W, Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
Revision History
REVISION
NUMBER
REVISION
DATE
0
3/07
1
7/07
Initial release of MAX9776 UCSP package and updated Tables 3 and 5b
2
9/07
Initial release of MAX9775 UCSP and removal of MAX9775 TQFN, updated Pin
Description and Table 9
3
1/08
Updated the Typical Application Circuits
4
8/08
Changed package code and drawing
DESCRIPTION
Initial release
PAGES
CHANGED
—
1, 7, 27, 28
1, 12, 15, 30, 33, 34
17, 18
1, 33, 34, 37
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
38 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2008 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
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