Precision Micropower,
Low Dropout Voltage References
REF19x Series
FEATURES
TEST PINS
Initial accuracy: ±2 mV maximum
Temperature coefficient: 5 ppm/°C maximum
Low supply current: 45 μA maximum
Sleep mode: 15 μA maximum
Low dropout voltage
Load regulation: 4 ppm/mA
Line regulation: 4 ppm/V
High output current: 30 mA
Short-circuit protection
Test Pin 1 and Test Pin 5 are reserved for in-package Zener zap.
To achieve the highest level of accuracy at the output, the Zener
zapping technique is used to trim the output voltage. Because
each unit may require a different amount of adjustment, the
resistance value at the test pins varies widely from pin to pin
and from part to part. The user should leave Pin 1 and Pin 5
unconnected.
TP 1
VS 2
REF19x
SERIES
8
NC
7
NC
SLEEP 3
APPLICATIONS
NOTES
1. NC = NO CONNECT.
2. TP PINS ARE FACTORY TEST
POINTS, NO USER CONNECTION.
Figure 1. 8-Lead SOIC_N and TSSOP Pin Configuration
(S Suffix and RU Suffix)
TP 1
VS 2
GENERAL DESCRIPTION
SLEEP 3
TOP VIEW
GND 4 (Not to Scale)
The REF19x series precision band gap voltage references use a
patented temperature drift curvature correction circuit and
laser trimming of highly stable, thin-film resistors to achieve a
very low temperature coefficient and high initial accuracy.
The REF19x series is made up of micropower, low dropout
voltage (LDV) devices, providing stable output voltage from
supplies as low as 100 mV above the output voltage and
consuming less than 45 μA of supply current. In sleep mode,
which is enabled by applying a low TTL or CMOS level to the
SLEEP pin, the output is turned off and supply current is
further reduced to less than 15 μA.
The REF19x series references are specified over the extended
industrial temperature range (−40°C to +85°C) with typical
performance specifications over −40°C to +125°C for
applications, such as automotive.
REF19x
SERIES
8
NC
7
NC
6
OUTPUT
5
TP
NOTES
1. NC = NO CONNECT.
2. TP PINS ARE FACTORY TEST
POINTS, NO USER CONNECTION.
00371-002
Portable instruments
ADCs and DACs
Smart sensors
Solar powered applications
Loop-current-powered instruments
00371-001
6 OUTPUT
TOP VIEW
GND 4 (Not to Scale) 5 TP
Figure 2. 8-Lead PDIP Pin Configuration
(P Suffix)
Table 1. Nominal Output Voltage
Part Number
REF191
REF192
REF193
REF194
REF195
REF196
REF198
Nominal Output Voltage (V)
2.048
2.50
3.00
4.50
5.00
3.30
4.096
All electrical grades are available in an 8-lead SOIC package; the
PDIP and TSSOP packages are available only in the lowest
electrical grade.
Rev. J
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©1996–2008 Analog Devices, Inc. All rights reserved.
REF19x Series
TABLE OF CONTENTS
Features .............................................................................................. 1
Electrical Characteristics—REF198 @ TA = 25°C .................. 14
Applications ....................................................................................... 1
Electrical Characteristics—REF198 @ −40°C ≤ TA ≤ +85°C 14
General Description ......................................................................... 1
Test Pins ............................................................................................. 1
Electrical Characteristics—REF198 @ −40°C ≤ TA ≤ +125°C
....................................................................................................... 15
Revision History ............................................................................... 3
Absolute Maximum Ratings ......................................................... 16
Specifications..................................................................................... 4
Thermal Resistance .................................................................... 16
Electrical Characteristics—REF191 @ TA = 25°C .................... 4
ESD Caution................................................................................ 16
Electrical Characteristics—REF191 @ −40°C ≤ +85°C ........... 5
Typical Performance Characteristics ........................................... 17
Electrical Characteristics—REF191 @ −40°C ≤ TA ≤ +125°C 6
Applications Information .............................................................. 20
Electrical Characteristics—REF192 @ TA = 25°C .................... 6
Output Short-Circuit Behavior ................................................ 20
Electrical Characteristics—REF192 @ −40°C ≤ TA ≤ +85°C .. 7
Device Power Dissipation Considerations .............................. 20
Electrical Characteristics—REF192 @ −40°C ≤ TA ≤ +125°C 7
Output Voltage Bypassing ......................................................... 20
Electrical Characteristics—REF193 @ TA = 25°C .................... 8
Sleep Mode Operation ............................................................... 20
Electrical Characteristics—REF193 @ −40°C ≤ TA ≤ +85°C .. 8
Basic Voltage Reference Connections ..................................... 20
Electrical Characteristics—REF193 @ TA ≤ −40°C ≤ +125°C 9
Membrane Switch-Controlled Power Supply ......................... 20
Electrical Characteristics—REF194 @ TA = 25°C .................... 9
Current-Boosted References with Current Limiting ............. 21
Electrical Characteristics—REF194 @ −40°C ≤ TA ≤ +85°C 10
Negative Precision Reference Without Precision Resistors .. 21
Electrical Characteristics—REF194 @ −40°C ≤ TA ≤ +125°C
....................................................................................................... 10
Stacking Reference ICs for Arbitrary Outputs ....................... 22
Electrical Characteristics—REF195 @ TA = 25°C .................. 11
Switched Output 5 V/3.3 V Reference ..................................... 23
Electrical Characteristics—REF195 @ −40°C ≤ TA ≤ +85°C 11
Kelvin Connections .................................................................... 23
Electrical Characteristics—REF195 @ −40°C ≤ TA ≤ +125°C
....................................................................................................... 12
Fail-Safe 5 V Reference .............................................................. 24
Electrical Characteristics—REF196 @ TA = 25°C .................. 12
Electrical Characteristics—REF196 @ −40°C ≤ TA ≤ +85°C 13
Precision Current Source .......................................................... 22
Low Power, Strain Gage Circuit ............................................... 25
Outline Dimensions ....................................................................... 26
Ordering Guide .......................................................................... 27
Electrical Characteristics—REF196 @ −40°C ≤ TA ≤ +125°C
....................................................................................................... 13
Rev. J | Page 2 of 28
REF19x Series
REVISION HISTORY
3/08—Rev. I to Rev. J
Changes to General Description ..................................................... 1
Changes to Specifications Section................................................... 4
Deleted Wafer Test Limits Section ................................................14
Changes to Table 23, Thermal Resistance Section, and
Table 24 .............................................................................................16
Changes to Figure 6.........................................................................17
Changes to Device Power Dissipation
Considerations Section ...................................................................20
Changes to Current-Boosted References with Current
Limiting Section ..............................................................................21
Changes to Precision Current Source Section.............................22
Changes to Figure 28 ......................................................................23
Changes to Figure 30 ......................................................................24
Changes to Low Power, Strain Gage Circuit Section ..................25
Changes to Ordering Guide ...........................................................27
9/06—Rev. H to Rev. I
Updated Format.................................................................. Universal
Changes to Table 25 ........................................................................16
Changes to Figure 6.........................................................................16
Changes to Figure 10, Figure 12, Figure 14, and Figure 26 .......17
Changes to Figure 18 ......................................................................18
Changes to Figure 20 ......................................................................19
Changes to Figure 23 ......................................................................20
Changes to Figure 25 ......................................................................21
Updated Outline Dimensions ........................................................25
Changes to Ordering Guide ...........................................................26
6/05—Rev. G to Rev. H
Updated Format ................................................................. Universal
Changes to Caption in Figure 7..................................................... 16
Updated Outline Dimensions........................................................ 25
Changes to Ordering Guide ........................................................... 26
7/04—Rev. F to Rev. G
Changes to Ordering Guide ............................................................. 4
3/04—Rev. E to Rev. F
Updated Absolute Maximum Rating.............................................. 4
Changes to Ordering Guide ........................................................... 14
Updated Outline Dimensions........................................................ 24
1/03—Rev. D to Rev. E
Changes to Figure 3 and Figure 4 ................................................. 15
Changes to Output Short Circuit Behavior ................................. 17
Changes to Figure 20 ...................................................................... 17
Changes to Figure 24 ...................................................................... 19
Updated Outline Dimensions........................................................ 23
1/96—Revision 0: Initial Version
Rev. J | Page 3 of 28
REF19x Series
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—REF191 @ TA = 25°C
@ VS = 3.3 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
INITIAL ACCURACY 1
E Grade
F Grade
G Grade
LINE REGULATION 2
E Grade
F and G Grades
LOAD REGULATION2
E Grade
F and G Grades
DROPOUT VOLTAGE
Symbol
VO
LONG-TERM STABILITY 3
NOISE VOLTAGE
DVO
eN
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
2.046
2.043
2.038
2.048
2.050
2.053
2.058
V
V
V
3.0 V ≤ VS ≤ 15 V, IOUT = 0 mA
2
4
4
8
ppm/V
ppm/V
VS = 5.0 V, 0 mA ≤ IOUT ≤ 30 mA
4
6
10
15
0.95
1.25
1.55
ppm/mA
ppm/mA
V
V
V
mV
μV p-p
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VS = 3.15 V, ILOAD = 2 mA
VS = 3.3 V, ILOAD = 10 mA
VS = 3.6 V, ILOAD = 30 mA
1000 hours @ 125°C
0.1 Hz to 10 Hz
1
1.2
20
Initial accuracy includes temperature hysteresis effect.
Line and load regulation specifications include the effect of self-heating.
3
Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
2
Rev. J | Page 4 of 28
REF19x Series
ELECTRICAL CHARACTERISTICS—REF191 @ −40°C ≤ +85°C
@ VS = 3.3 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 3.
Parameter
TEMPERATURE COEFFICIENT 1, 2
E Grade
F Grade
G Grade 3
LINE REGULATION 4
E Grade
F and G Grades
LOAD REGULATION4
E Grade
F and G Grades
DROPOUT VOLTAGE
SLEEP PIN
Logic High Input Voltage
Logic High Input Current
Logic Low Input Voltage
Logic Low Input Current
SUPPLY CURRENT
Sleep Mode
1
2
Symbol
TCVO/°C
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
2
5
10
5
10
25
ppm/°C
ppm/°C
ppm/°C
3.0 V ≤ VS ≤ 15 V, IOUT = 0 mA
5
10
10
20
ppm/V
ppm/V
VS = 5.0 V, 0 mA ≤ IOUT ≤ 25 mA
5
10
15
20
0.95
1.25
1.55
ppm/mA
ppm/mA
V
V
V
−8
0.8
−8
45
15
V
μA
V
μA
μA
μA
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VS = 3.15 V, ILOAD = 2 mA
VS = 3.3 V, ILOAD = 10 mA
VS = 3.6 V, ILOAD = 25 mA
VH
IH
VL
IL
2.4
No load
No load
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
Guaranteed by characterization.
4
Line and load regulation specifications include the effect of self-heating.
Rev. J | Page 5 of 28
REF19x Series
ELECTRICAL CHARACTERISTICS—REF191 @ −40°C ≤ TA ≤ +125°C
@ VS = 3.3 V, −40°C ≤ TA ≤ +125°C, unless otherwise noted.
Table 4.
Parameter
TEMPERATURE COEFFICIENT 1, 2
E Grade
F Grade
G Grade 3
LINE REGULATION 4
E Grade
F and G Grades
LOAD REGULATION4
E Grade
F and G Grades
DROPOUT VOLTAGE
1
2
Symbol
TCVO/°C
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
2
5
10
ppm/°C
ppm/°C
ppm/°C
3.0 V ≤ VS ≤ 15 V, IOUT = 0 mA
10
20
ppm/V
ppm/V
VS = 5.0 V, 0 mA ≤ IOUT ≤ 20 mA
10
20
ppm/mA
ppm/mA
V
V
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VS = 3.3 V, ILOAD = 10 mA
VS = 3.6 V, ILOAD = 20 mA
1.25
1.55
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
Guaranteed by characterization.
4
Line and load regulation specifications include the effect of self-heating.
ELECTRICAL CHARACTERISTICS—REF192 @ TA = 25°C
@ VS = 3.3 V, TA = 25°C, unless otherwise noted.
Table 5.
Parameter
INITIAL ACCURACY 1
E Grade
F Grade
G Grade
LINE REGULATION 2
E Grade
F and G Grades
LOAD REGULATION2
E Grade
F and G Grades
DROPOUT VOLTAGE
Symbol
VO
LONG-TERM STABILITY 3
NOISE VOLTAGE
DVO
eN
1
2
3
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
2.498
2.495
2.490
2.500
2.502
2.505
2.510
V
V
V
3.0 V ≤ VS ≤ 15 V, IOUT = 0 mA
2
4
4
8
ppm/V
ppm/V
VS = 5.0 V, 0 mA ≤ IOUT ≤ 30 mA
4
6
10
15
1.00
1.40
ppm/mA
ppm/mA
V
V
mV
μV p-p
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VS = 3.5 V, ILOAD = 10 mA
VS = 3.9 V, ILOAD = 30 mA
1000 hours @ 125°C
0.1 Hz to 10 Hz
1.2
25
Initial accuracy includes temperature hysteresis effect.
Line and load regulation specifications include the effect of self-heating.
Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
Rev. J | Page 6 of 28
REF19x Series
ELECTRICAL CHARACTERISTICS—REF192 @ −40°C ≤ TA ≤ +85°C
@ VS = 3.3 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 6.
Parameter
TEMPERATURE COEFFICIENT 1, 2
E Grade
F Grade
G Grade 3
LINE REGULATION 4
E Grade
F and G Grades
LOAD REGULATION4
E Grade
F and G Grades
DROPOUT VOLTAGE
SLEEP PIN
Logic High Input Voltage
Logic High Input Current
Logic Low Input Voltage
Logic Low Input Current
SUPPLY CURRENT
Sleep Mode
1
2
Symbol
TCVO/°C
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
2
5
10
5
10
25
ppm/°C
ppm/°C
ppm/°C
3.0 V ≤ VS ≤ 15 V, IOUT = 0 mA
5
10
10
20
ppm/V
ppm/V
VS = 5.0 V, 0 mA ≤ IOUT ≤ 25 mA
5
10
15
20
1.00
1.50
ppm/mA
ppm/mA
V
V
−8
0.8
−8
45
15
V
μA
V
μA
μA
μA
Max
Unit
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VS = 3.5 V, ILOAD = 10 mA
VS = 4.0 V, ILOAD = 25 mA
VH
IH
VL
IL
2.4
No load
No load
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
Guaranteed by characterization.
4
Line and load regulation specifications include the effect of self-heating.
ELECTRICAL CHARACTERISTICS—REF192 @ −40°C ≤ TA ≤ +125°C
@ VS = 3.3 V, −40°C ≤ TA ≤ +125°C, unless otherwise noted.
Table 7.
Parameter
TEMPERATURE COEFFICIENT 1, 2
E Grade
F Grade
G Grade 3
LINE REGULATION 4
E Grade
F and G Grades
LOAD REGULATION4
E Grade
F and G Grades
DROPOUT VOLTAGE
1
2
Symbol
TCVO/°C
Condition
Min
Typ
IOUT = 0 mA
2
5
10
ppm/°C
ppm/°C
ppm/°C
3.0 V ≤ VS ≤ 15 V, IOUT = 0 mA
10
20
ppm/V
ppm/V
VS = 5.0 V, 0 mA ≤ IOUT ≤ 20 mA
10
20
ppm/mA
ppm/mA
V
V
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VS = 3.5 V, ILOAD = 10 mA
VS = 4.0 V, ILOAD = 20 mA
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
Guaranteed by characterization.
4
Line and load regulation specifications include the effect of self-heating.
Rev. J | Page 7 of 28
1.00
1.50
REF19x Series
ELECTRICAL CHARACTERISTICS—REF193 @ TA = 25°C
@ VS = 3.3 V, TA = 25°C, unless otherwise noted.
Table 8.
Parameter
INITIAL ACCURACY 1
G Grade
LINE REGULATION 2
G Grade
LOAD REGULATION2
G Grade
DROPOUT VOLTAGE
Symbol
VO
LONG-TERM STABILITY 3
NOISE VOLTAGE
DVO
eN
1
2
3
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
2.990
3.0
3.010
V
3.3 V, ≤ VS ≤ 15 V, IOUT = 0 mA
4
8
ppm/V
VS = 5.0 V, 0 mA ≤ IOUT ≤ 30 mA
VS = 3.8 V, ILOAD = 10 mA
VS = 4.0 V, ILOAD = 30 mA
1000 hours @ 125°C
0.1 Hz to 10 Hz
6
15
0.80
1.00
ppm/mA
V
V
mV
μV p-p
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
1.2
30
Initial accuracy includes temperature hysteresis effect.
Line and load regulation specifications include the effect of self-heating.
Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
ELECTRICAL CHARACTERISTICS—REF193 @ −40°C ≤ TA ≤ +85°C
@ VS = 3.3 V, TA = −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 9.
Parameter
TEMPERATURE COEFFICIENT 1, 2
G Grade 3
LINE REGULATION 4
G Grade
LOAD REGULATION4
G Grade
DROPOUT VOLTAGE
SLEEP PIN
Logic High Input Voltage
Logic High Input Current
Logic Low Input Voltage
Logic Low Input Current
SUPPLY CURRENT
Sleep Mode
1
2
Symbol
TCVO/°C
Condition
Typ
Max
Unit
IOUT = 0 mA
10
25
ppm/°C
3.3 V ≤ VS ≤ 15 V, IOUT = 0 mA
10
20
ppm/V
VS = 5.0 V, 0 mA ≤ IOUT ≤ 25 mA
VS = 3.8 V, ILOAD = 10 mA
VS = 4.1 V, ILOAD = 30 mA
10
20
0.80
1.10
ppm/mA
V
V
−8
0.8
−8
45
15
V
μA
V
μA
μA
μA
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VH
IH
VL
IL
2.4
No load
No load
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
4
Min
Guaranteed by characterization.
Line and load regulation specifications include the effect of self-heating.
Rev. J | Page 8 of 28
REF19x Series
ELECTRICAL CHARACTERISTICS—REF193 @ TA ≤ −40°C ≤ +125°C
@ VS = 3.3 V, –40°C ≤ TA ≤ +125°C, unless otherwise noted.
Table 10.
Parameter
TEMPERATURE COEFFICIENT 1, 2
G Grade 3
LINE REGULATION 4
G Grade
LOAD REGULATION4
G Grade
DROPOUT VOLTAGE
1
2
Symbol
TCVO/°C
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
10
ppm/°C
3.3 V ≤ VS ≤ 15 V, IOUT = 0 mA
20
ppm/V
VS = 5.0 V, 0 mA ≤ IOUT ≤ 20 mA
VS = 3.8 V, ILOAD = 10 mA
VS = 4.1 V, ILOAD = 20 mA
10
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
0.80
1.10
ppm/mA
V
V
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
Guaranteed by characterization.
4
Line and load regulation specifications include the effect of self-heating.
ELECTRICAL CHARACTERISTICS—REF194 @ TA = 25°C
@ VS = 5.0 V, TA = 25°C, unless otherwise noted.
Table 11.
Parameter
INITIAL ACCURACY 1
E Grade
G Grade
LINE REGULATION 2
E Grade
G Grade
LOAD REGULATION2
E Grade
G Grade
DROPOUT VOLTAGE
Symbol
VO
LONG-TERM STABILITY 3
NOISE VOLTAGE
DVO
eN
1
2
3
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
4.498
4.490
4.5
4.502
4.510
V
V
4.75 V ≤ VS ≤ 15 V, IOUT = 0 mA
2
4
4
8
ppm/V
ppm/V
VS = 5.8 V, 0 mA ≤ IOUT ≤ 30 mA
2
4
4
8
0.50
1.30
ppm/mA
ppm/mA
V
V
mV
μV p-p
∆VO/∆VIN
∆VO/∆VLOAD
V S − VO
VS = 5.00 V, ILOAD = 10 mA
VS = 5.8 V, ILOAD = 30 mA
1000 hours @ 125°C
0.1 Hz to 10 Hz
2
45
Initial accuracy includes temperature hysteresis effect.
Line and load regulation specifications include the effect of self-heating.
Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
Rev. J | Page 9 of 28
REF19x Series
ELECTRICAL CHARACTERISTICS—REF194 @ −40°C ≤ TA ≤ +85°C
@ VS = 5.0 V, TA = −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 12.
Parameter
TEMPERATURE COEFFICIENT 1, 2
E Grade
G Grade 3
LINE REGULATION 4
E Grade
G Grade
LOAD REGULATION4
E Grade
G Grade
DROPOUT VOLTAGE
SLEEP PIN
Logic High Input Voltage
Logic High Input Current
Logic Low Input Voltage
Logic Low Input Current
SUPPLY CURRENT
Sleep Mode
1
2
Symbol
TCVO/°C
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
2
10
5
25
ppm/°C
ppm/°C
4.75 V ≤ VS ≤ 15 V, IOUT = 0 mA
5
10
10
20
ppm/V
ppm/V
VS = 5.80 V, 0 mA ≤ IOUT ≤ 25 mA
5
10
15
20
0.5
1.30
ppm/mA
ppm/mA
V
V
−8
0.8
−8
45
15
V
μA
V
μA
μA
μA
Max
Unit
∆VO/∆VIN
∆VO/∆VLOAD
V S − VO
VS = 5.00 V, ILOAD = 10 mA
VS = 5.80 V, ILOAD = 25 mA
VH
IH
VL
IL
2.4
No load
No load
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
Guaranteed by characterization.
4
Line and load regulation specifications include the effect of self-heating.
ELECTRICAL CHARACTERISTICS—REF194 @ −40°C ≤ TA ≤ +125°C
@ VS = 5.0 V, −40°C ≤ TA ≤ +125°C, unless otherwise noted.
Table 13.
Parameter
TEMPERATURE COEFFICIENT 1, 2
E Grade
G Grade 3
LINE REGULATION 4
E Grade
G Grade
LOAD REGULATION
E Grade
Grade
DROPOUT VOLTAGE
1
2
Symbol
TCVO/°C
Condition
Min
Typ
IOUT = 0 mA
2
10
ppm/°C
ppm/°C
4.75 V ≤ VS ≤ 15 V, IOUT = 0 mA
5
10
ppm/V
ppm/V
VS = 5.80 V, 0 mA ≤ IOUT ≤ 20 mA
5
10
ppm/mA
ppm/mA
V
V
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VS = 5.10 V, ILOAD = 10 mA
VS = 5.95 V, ILOAD = 20 mA
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
Guaranteed by characterization.
4
Line and load regulation specifications include the effect of self-heating.
Rev. J | Page 10 of 28
0.60
1.45
REF19x Series
ELECTRICAL CHARACTERISTICS—REF195 @ TA = 25°C
@ VS = 5.10 V, TA = 25°C, unless otherwise noted.
Table 14.
Parameter
INITIAL ACCURACY 1
E Grade
F Grade
G Grade
LINE REGULATION 2
E Grade
F and G Grades
LOAD REGULATION2
E Grade
F and G Grades
DROPOUT VOLTAGE
Symbol
VO
LONG-TERM STABILITY 3
NOISE VOLTAGE
DVO
eN
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
4.998
4.995
4.990
5.0
5.002
5.005
5.010
V
V
V
5.10 V ≤ VS ≤ 15 V, IOUT = 0 mA
2
4
4
8
ppm/V
ppm/V
VS = 6.30 V, 0 mA ≤ IOUT ≤ 30 mA
2
4
4
8
0.50
1.30
ppm/mA
ppm/mA
V
V
mV
μV p-p
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VS = 5.50 V, ILOAD = 10 mA
VS = 6.30 V, ILOAD = 30 mA
1000 hours @ 125°C
0.1 Hz to 10 Hz
1.2
50
1
Initial accuracy includes temperature hysteresis effect.
Line and load regulation specifications include the effect of self-heating.
3
Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
2
ELECTRICAL CHARACTERISTICS—REF195 @ −40°C ≤ TA ≤ +85°C
@ VS = 5.15 V, TA = −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 15.
Parameter
TEMPERATURE COEFFICIENT 1, 2
E Grade
F Grade
G Grade 3
LINE REGULATION 4
E Grade
F and G Grades
LOAD REGULATION4
E Grade
F and G Grades
DROPOUT VOLTAGE
SLEEP PIN
Logic High Input Voltage
Logic High Input Current
Logic Low Input Voltage
Logic Low Input Current
SUPPLY CURRENT
Sleep Mode
1
2
Symbol
TCVO/°C
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
2
5
10
5
10
25
ppm/°C
ppm/°C
ppm/°C
5.15 V ≤ VS ≤ 15 V, IOUT = 0 mA
5
10
10
20
ppm/V
ppm/V
VS = 6.30 V, 0 mA ≤ IOUT ≤ 25 mA
5
10
10
20
0.50
1.30
ppm/mA
ppm/mA
V
V
−8
0.8
−8
45
15
V
μA
V
μA
μA
μA
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VS = 5.50 V, ILOAD = 10 mA
VS = 6.30 V, ILOAD = 25 mA
VH
IH
VL
IL
2.4
No load
No load
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
Guaranteed by characterization.
4
Line and load regulation specifications include the effect of self-heating.
Rev. J | Page 11 of 28
REF19x Series
ELECTRICAL CHARACTERISTICS—REF195 @ −40°C ≤ TA ≤ +125°C
@ VS = 5.20 V, −40°C ≤ TA ≤ +125°C, unless otherwise noted.
Table 16.
Parameter
TEMPERATURE COEFFICIENT 1, 2
E Grade
F Grade
G Grade 3
LINE REGULATION 4
E Grade
F and G Grades
LOAD REGULATION4
E Grade
F and G Grades
DROPOUT VOLTAGE
1
2
Symbol
TCVO/°C
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
2
5
10
ppm/°C
ppm/°C
ppm/°C
5.20 V ≤ VS ≤ 15 V, IOUT = 0 mA
5
10
ppm/V
ppm/V
VS = 6.45 V, 0 mA ≤ IOUT ≤ 20 mA
5
10
0.60
ppm/mA
ppm/mA
V
1.45
V
ΔVO/ΔVIN
ΔVO/ΔVLOAD
VS − V O
VS = 5.60 V, ILOAD = 10 mA
VS = 6.45 V, ILOAD = 20 mA
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
Guaranteed by characterization.
4
Line and load regulation specifications include the effect of self-heating.
ELECTRICAL CHARACTERISTICS—REF196 @ TA = 25°C
@ VS = 3.5 V, TA = 25°C, unless otherwise noted.
Table 17.
Parameter
INITIAL ACCURACY 1
G Grade
LINE REGULATION 2
G Grade
LOAD REGULATION2
G Grade
DROPOUT VOLTAGE
Symbol
VO
LONG-TERM STABILITY 3
NOISE VOLTAGE
DVO
eN
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
3.290
3.3
3.310
V
3.50 V ≤ VS ≤ 15 V, IOUT = 0 mA
4
8
ppm/V
VS = 5.0 V, 0 mA ≤ IOUT ≤ 30 mA
VS = 4.1 V, ILOAD = 10 mA
VS = 4.3 V, ILOAD = 30 mA
1000 hours @ 125°C
0.1 Hz to 10 Hz
6
15
0.80
1.00
ppm/mA
V
V
mV
μV p-p
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
1
1.2
33
Initial accuracy includes temperature hysteresis effect.
Line and load regulation specifications include the effect of self-heating.
3
Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
2
Rev. J | Page 12 of 28
REF19x Series
ELECTRICAL CHARACTERISTICS—REF196 @ −40°C ≤ TA ≤ +85°C
@ VS = 3.5 V, TA = –40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 18.
Parameter
TEMPERATURE COEFFICIENT 1, 2
G Grade 3
LINE REGULATION 4
G Grade
LOAD REGULATION4
G Grade
DROPOUT VOLTAGE
SLEEP PIN
Logic High Input Voltage
Logic High Input Current
Logic Low Input Voltage
Logic Low Input Current
SUPPLY CURRENT
Sleep Mode
1
2
Symbol
TCVO/°C
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
10
25
ppm/°C
3.5 V ≤ VS ≤ 15 V, IOUT = 0 mA
10
20
ppm/V
VS = 5.0 V, 0 mA ≤ IOUT ≤ 25 mA
VS = 4.1 V, ILOAD = 10 mA
VS = 4.3 V, ILOAD = 25 mA
10
20
0.80
1.00
ppm/mA
V
V
−8
0.8
−8
45
15
V
μA
V
μA
μA
μA
Max
Unit
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VH
IH
VL
IL
2.4
No load
No load
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/V0(TMAX − TMIN)
3
Guaranteed by characterization.
4
Line and load regulation specifications include the effect of self-heating.
ELECTRICAL CHARACTERISTICS—REF196 @ −40°C ≤ TA ≤ +125°C
@ VS = 3.50 V, −40°C ≤ TA ≤ +125°C, unless otherwise noted.
Table 19.
Parameter
TEMPERATURE COEFFICIENT 1, 2
G Grade 3
LINE REGULATION 4
G Grade
LOAD REGULATION4
G Grade
DROPOUT VOLTAGE
1
2
Symbol
TCVO/°C
Condition
Min
Typ
IOUT = 0 mA
10
ppm/°C
3.50 V ≤ VS ≤ 15 V, IOUT = 0 mA
20
ppm/V
VS = 5.0 V, 0 mA ≤ IOUT ≤ 20 mA
VS = 4.1 V, ILOAD = 10 mA
VS = 4.4 V, ILOAD = 20 mA
20
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
Guaranteed by characterization.
4
Line and load regulation specifications include the effect of self-heating.
Rev. J | Page 13 of 28
0.80
1.10
ppm/mA
V
V
REF19x Series
ELECTRICAL CHARACTERISTICS—REF198 @ TA = 25°C
@ VS = 5.0 V, TA = 25°C, unless otherwise noted.
Table 20.
Parameter
INITIAL ACCURACY 1
E Grade
F Grade
G Grade
LINE REGULATION 2
E Grade
F and G Grades
LOAD REGULATION2
E Grade
F and G Grades
DROPOUT VOLTAGE
Symbol
VO
LONG-TERM STABILITY 3
NOISE VOLTAGE
DVO
eN
1
2
3
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
4.094
4.091
4.086
4.096
4.098
4.101
4.106
V
V
V
4.5 V ≤ VS ≤ 15 V, IOUT = 0 mA
2
4
4
8
ppm/V
ppm/V
VS = 5.4 V, 0 mA ≤ IOUT ≤ 30 mA
2
4
4
8
0.502
1.30
ppm/mA
ppm/mA
V
V
mV
μV p-p
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VS = 4.6 V, ILOAD = 10 mA
VS = 5.4 V, ILOAD = 30 mA
1000 hours @ 125°C
0.1 Hz to 10 Hz
1.2
40
Initial accuracy includes temperature hysteresis effect.
Line and load regulation specifications include the effect of self-heating.
Long-term stability specification is noncumulative. The drift in subsequent 1000-hour periods is significantly lower than in the first 1000-hour period.
ELECTRICAL CHARACTERISTICS—REF198 @ −40°C ≤ TA ≤ +85°C
@ VS = 5.0 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 21.
Parameter
TEMPERATURE COEFFICIENT 1, 2
E Grade
F Grade
G Grade 3
LINE REGULATION 4
E Grade
F and G Grades
LOAD REGULATION4
E Grade
F and G Grades
DROPOUT VOLTAGE
SLEEP PIN
Logic High Input Voltage
Logic High Input Current
Logic Low Input Voltage
Logic Low Input Current
SUPPLY CURRENT
Sleep Mode
1
2
Symbol
TCVO/°C
Condition
Min
Typ
Max
Unit
IOUT = 0 mA
2
5
10
5
10
25
ppm/°C
ppm/°C
ppm/°C
4.5 V ≤ VS ≤ 15 V, IOUT = 0 mA
5
10
10
20
ppm/V
ppm/V
VS = 5.4 V, 0 mA ≤ IOUT ≤ 25 mA
5
10
10
20
0.502
1.30
ppm/mA
ppm/mA
V
V
−8
0.8
−8
45
15
V
μA
V
μA
μA
μA
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VS = 4.6 V, ILOAD = 10 mA
VS = 5.4 V, ILOAD = 25 mA
VH
IH
VL
IL
2.4
No load
No load
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
Guaranteed by characterization.
4
Line and load regulation specifications include the effect of self-heating.
Rev. J | Page 14 of 28
REF19x Series
ELECTRICAL CHARACTERISTICS—REF198 @ −40°C ≤ TA ≤ +125°C
@ VS = 5.0 V, −40°C ≤ TA ≤ +125°C, unless otherwise noted.
Table 22.
Parameter
TEMPERATURE COEFFICIENT 1, 2
E Grade
F Grade
G Grade 3
LINE REGULATION 4
E Grade
F and G Grades
LOAD REGULATION4
E Grade
F and G Grades
DROPOUT VOLTAGE
1
2
Symbol
TCVO/°C
Condition
4
Typ
Max
Unit
IOUT = 0 mA
2
5
10
ppm/°C
ppm/°C
ppm/°C
4.5 V ≤ VS ≤ 15 V, IOUT = 0 mA
5
10
ppm/V
ppm/V
VS = 5.6 V, 0 mA ≤ IOUT ≤ 20 mA
5
10
ppm/mA
ppm/mA
V
V
ΔVO/ΔVIN
ΔVO/ΔVLOAD
V S − VO
VS = 4.7 V, ILOAD = 10 mA
VS = 5.6 V, ILOAD = 20 mA
For proper operation, a 1 μF capacitor is required between the output pin and the GND pin of the device.
TCVO is defined as the ratio of output change with temperature variation to the specified temperature range expressed in ppm/°C.
TCVO = (VMAX − VMIN)/VO(TMAX − TMIN)
3
Min
Guaranteed by characterization.
Line and load regulation specifications include the effect of self-heating.
Rev. J | Page 15 of 28
0.60
1.50
REF19x Series
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 23.
Parameter
Supply Voltage
Output to GND
Output to GND Short-Circuit Duration
Storage Temperature Range
PDIP, SOIC Package
Operating Temperature Range
REF19x
Junction Temperature Range
PDIP, SOIC Package
Lead Temperature (Soldering 60 sec)
Rating
−0.3 V to +18 V
−0.3 V to VS + 0.3 V
Indefinite
θJA is specified for worst-case conditions; that is, θJA is specified
for the device in socket for PDIP and is specified for the device
soldered in the circuit board for the SOIC and TSSOP packages.
−65°C to +150°C
Package Type
8-Lead PDIP (N)
8-Lead SOIC (R)
8-Lead TSSOP (RU)
−40°C to +85°C
−65°C to +150°C
300°C
Table 24.
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. J | Page 16 of 28
θJA
103
158
240
θJC
43
43
43
Unit
°C/W
°C/W
°C/W
REF19x Series
TYPICAL PERFORMANCE CHARACTERISTICS
50
5.004
3 TYPICAL PARTS
5.15V < VIN < 15V
5.003
BASED ON 600
45 UNITS, 4 RUNS
–40°C ≤ TA ≤ +85°C
40
PERCENTAGE OF PARTS
5.001
5.000
4.999
4.998
4.997
35
30
25
20
15
10
5
–25
0
25
50
TEMPERATURE (°C)
75
0
–20
00371-003
4.996
–50
100
–15
–10
10
15
20
Figure 6. TCVOUT Distribution
Figure 3. REF195 Output Voltage vs. Temperature
32
–5
0
5
TCVOUT (ppm/°C)
00371-006
OUTPUT VOLTAGE (V)
5.002
40
5.15V ≤ VS ≤ 15V
28
35
24
30
SUPPLY CURRENT (μA)
LOAD REGULATION (ppm/V)
NORMAL MODE
–40°C
20
16
+25°C
12
+85°C
8
25
20
15
10
4
5
0
0
–50
10
15
ILOAD (mA)
20
25
30
Figure 4. REF195 Load Regulator vs. ILOAD
20
SLEEP PIN CURRENT (µA)
+25°C
12
–40°C
8
4
–4
–3
–2
VL
–1
6
8
100
–5
+85°C
4
75
–6
10
VIN (V)
12
14
16
0
–50
00371-005
LINE REGULATION (ppm/mA)
0
25
50
TEMPERATURE (°C)
Figure 7. Supply Current vs. Temperature
0mA ≤ IOUT ≤ 25mA
16
0
–25
00371-007
5
VH
–25
0
25
50
TEMPERATURE (°C)
75
Figure 8. SLEEP Pin Current vs. Temperature
Figure 5. REF195 Line Regulator vs. VIN
Rev. J | Page 17 of 28
100
00371-008
0
00371-004
SLEEP MODE
REF19x Series
5V
0
OFF 100%
RIPPLE REJECTION (dB)
–20
ON
90%
–40
–60
–80
–100
10%
–120
100
1k
10k
FREQUENCY (Hz)
100k
20mV
00371-009
1M
Figure 9. Ripple Rejection vs. Frequency
100µs
Figure 12. Load Transient Response
10μF
10μF
1μF
1kΩ
REF
REF19x
2
6
200V
1μF
Z
90%
VS = 4V
4
1mA
LOAD
3
2
10%
1
0%
0
30mA
LOAD
2V
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
100µs
00371-011
ZO (Ω)
1μF
2V
100%
VG = 2V p-p
4
10mA
0
Figure 13. Load Transient Response Measurement Circuit
Figure 10. Ripple Rejection vs. Frequency Measurement Circuit
VIN = 7V
1μF
Figure 11. Output Impedance vs. Frequency
Figure 14. Power-On Response Time
REF19x
2
VIN = 7V
6
4
1μF
Figure 15. Power-On Response Time Measurement Circuit
Rev. J | Page 18 of 28
00371-014
4
10μF
6
4
OUTPUT
6
00371-010
2
2
00371-013
REF19x
1kΩ
VIN = 15V
REF19x
VIN = 15V
00371-015
10
00371-012
0%
REF19x Series
5V
5V
ON 100%
90%
90%
IL = 1mA
VOUT
IL = 10mA
10%
10%
200mV
00371-016
2ms
1V
35
REF19x
VOUT
2
6
30
1μF
Figure 17. SLEEP Response Time Measurement Circuit
25
20
15
10
5
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
REF195 DROPOUT VOLTAGE (V)
0.8
Figure 19. Load Current vs. REF195 Dropout Voltage
Rev. J | Page 19 of 28
0.9
00371-019
4
LOAD CURRENT (mA)
3
200µs
Figure 18. Line Transient Response
Figure 16. SLEEP Response Time
VIN = 15V
00371-018
0%
0%
00371-017
OFF
100%
REF19x Series
APPLICATIONS INFORMATION
OUTPUT SHORT-CIRCUIT BEHAVIOR
SLEEP MODE OPERATION
The REF19x family of devices is totally protected from damage
due to accidental output shorts to GND or to VS. In the event of
an accidental short-circuit condition, the reference device shuts
down and limits its supply current to 40 mA.
All REF19x devices include a sleep capability that is
TTL/CMOS-level compatible. Internally, a pull-up current
source to VS is connected at the SLEEP pin. This permits the
SLEEP pin to be driven from an open collector/drain driver. A
logic low or a 0 V condition on the SLEEP pin is required to
turn off the output stage. During sleep, the output of the
references becomes a high impedance state where its potential
would then be determined by external circuitry. If the sleep
feature is not used, it is recommended that the SLEEP pin be
connected to VS (Pin 2).
VS
OUTPUT
SLEEP (SHUTDOWN)
Figure 20. Simplified Schematic
DEVICE POWER DISSIPATION CONSIDERATIONS
The REF19x family of references is capable of delivering load
currents to 30 mA with an input voltage that ranges from 3.3 V
to 15 V. When these devices are used in applications with large
input voltages, exercise care to avoid exceeding the maximum
internal power dissipation of these devices. Exceeding the
published specifications for maximum power dissipation or
junction temperature can result in premature device failure. The
following formula should be used to calculate the maximum
junction temperature or dissipation of the device:
PD =
TJ − TA
θ JA
where TJ and TA are the junction and ambient temperatures,
respectively; PD is the device power dissipation; and θJA is the
device package thermal resistance.
OUTPUT VOLTAGE BYPASSING
For stable operation, low dropout voltage regulators and
references generally require a bypass capacitor connected from
their VOUT pins to their GND pins. Although the REF19x family
of references is capable of stable operation with capacitive loads
exceeding 100 μF, a 1 μF capacitor is sufficient to guarantee
rated performance. The addition of a 0.1 μF ceramic capacitor
in parallel with the bypass capacitor improves load current
transient performance. For best line voltage transient performance, it is recommended that the voltage inputs of these devices
be bypassed with a 10 μF electrolytic capacitor in parallel with a
0.1 μF ceramic capacitor.
The circuit in Figure 21 illustrates the basic configuration for
the REF19x family of references. Note the 10 μF/0.1 μF bypass
network on the input and the 1 μF/0.1 μF bypass network on
the output. It is recommended that no connections be made to
Pin 1, Pin 5, Pin 7, and Pin 8. If the sleep feature is not required,
Pin 3 should be connected to VS.
REF19x
10µF
0.1µF
NC 1
VS
8
NC
2
7
SLEEP 3
6
NC
OUTPUT
4
5
NC
+
1µF
TANT
0.1µF
NC = NO CONNECT
00371-021
GND
00371-020
BASIC VOLTAGE REFERENCE CONNECTIONS
Figure 21. Basic Voltage Reference Connections
MEMBRANE SWITCH-CONTROLLED POWER
SUPPLY
With output load currents in the tens of mA, the REF19x family
of references can operate as a low dropout power supply in
hand-held instrument applications. In the circuit shown in
Figure 22, a membrane on/off switch is used to control the
operation of the reference. During an initial power-on condition, the SLEEP pin is held to GND by the 10 kΩ resistor. Recall
that this condition (read: three-state) disables the REF19x
output. When the membrane on switch is pressed, the SLEEP
pin is momentarily pulled to VS, enabling the REF19x output.
At this point, current through the 10 kΩ resistor is reduced and
the internal current source connected to the SLEEP pin takes
control. Pin 3 assumes and remains at the same potential as VS.
When the membrane off switch is pressed, the SLEEP pin is
momentarily connected to GND, which once again disables the
REF19x output.
Rev. J | Page 20 of 28
REF19x Series
REF19x
NC 1
8
2
7
3
6
4
5
VS
1kΩ
5%
ON
The requirement for a heat sink on Q1 depends on the maximum input voltage and short-circuit current. With VS = 5 V and
a 300 mA current limit, the worst-case dissipation of Q1 is 1.5 W,
less than the TO-220 package 2 W limit. However, if smaller
TO-39 or TO-5 package devices, such as the 2N4033, are used,
the current limit should be reduced to keep maximum dissipation below the package rating. This is accomplished by simply
raising R4.
NC
NC
OUTPUT
+1µF
NC
TANT
OFF
00371-022
10kΩ
NC = NO CONNECT
A tantalum output capacitor is used at C1 for its low equivalent
series resistance (ESR), and the higher value is required for
stability. Capacitor C2 provides input bypassing and can be an
ordinary electrolytic.
Figure 22. Membrane Switch Controlled Power Supply
CURRENT-BOOSTED REFERENCES WITH
CURRENT LIMITING
Whereas the 30 mA rated output current of the REF19x series is
higher than is typical of other reference ICs, it can be boosted to
higher levels, if desired, with the addition of a simple external
PNP transistor, as shown in Figure 23. Full-time current
limiting is used to protect the pass transistor against shorts.
C2
100µF
25V
Q1
TIP32A
(SEE TEXT)
R4
2Ω
R1
1kΩ
Q2
2N3906
+
R2
1.5kΩ
C3
0.1µF
2
U1
D1
VC
3
1N4148
(SEE TEXT
ON SLEEP)
VS
COMMON
OUTPUT TABLE
REF196
6
VOUT (V)
REF192
REF193
REF196
REF194
REF195
2.5
3.0
3.3
4.5
5.0
F
S
(SEE TABLE)
4
U1
C1
10µF/25V
R3
1.82kΩ (TANTALUM)
S
F
+
+VOUT
3.3V
@ 150mA
NEGATIVE PRECISION REFERENCE WITHOUT
PRECISION RESISTORS
R1
In many current-output CMOS DAC applications where the
output signal voltage must be the same polarity as the reference
voltage, it is often necessary to reconfigure a current-switching
DAC into a voltage-switching DAC using a 1.25 V reference, an
op amp, and a pair of resistors. Using a current-switching DAC
directly requires an additional operational amplifier at the
output to reinvert the signal. A negative voltage reference is
then desirable because an additional operational amplifier is not
required for either reinversion (current-switching mode) or
amplification (voltage-switching mode) of the DAC output
voltage. In general, any positive voltage reference can be
converted into a negative voltage reference using an operational
amplifier and a pair of matched resistors in an inverting
configuration. The disadvantage to this approach is that the
largest single source of error in the circuit is the relative
matching of the resistors used.
VOUT
COMMON
00371-023
+VS = 6V
TO 9V
(SEE TEXT)
Shutdown control of the booster stage is an option, and when
used, some cautions are needed. Due to the additional active
devices in the VS line to U1, a direct drive to Pin 3 does not
work as with an unbuffered REF19x device. To enable shutdown
control, the connection from U1 to Q2 is broken at the X, and
Diode D1 then allows a CMOS control source, VC, to drive U1
to 3 for on/off operation. Startup from shutdown is not as clean
under heavy load as it is in basic REF19x series, and can require
several milliseconds under load. Nevertheless, it is still effective
and can fully control 150 mA loads. When shutdown control is
used, heavy capacitive loads should be minimized.
Figure 23. Boosted 3.3 V Referenced with Current Limiting
In this circuit, the power supply current of reference U1 flowing
through R1 to R2 develops a base drive for Q1, whose collector
provides the bulk of the output current. With a typical gain of
100 in Q1 for 100 mA to 200 mA loads, U1 is never required to
furnish more than a few mA, so this factor minimizes temperature-related drift. Short-circuit protection is provided by Q2,
which clamps the drive to Q1 at about 300 mA of load current,
with values as shown in Figure 23. With this separation of
control and power functions, dc stability is optimum, allowing
most advantageous use of premium grade REF19x devices for
U1. Of course, load management should still be exercised. A
short, heavy, low dc resistance (DCR) conductor should be used
from U1 to 6 to the VOUT Sense Point S, where the collector of
Q1 connects to the load, Point F.
Because of the current limiting configuration, the dropout voltage circuit is raised about 1.1 V over that of the REF19x devices,
due to the VBE of Q1 and the drop across Current Sense Resistor
R4. However, overall dropout is typically still low enough to
allow operation of a 5 V to 3.3 V regulator/reference using the
REF196 for U1 as noted, with a VS as low as 4.5 V and a load
current of 150 mA.
The circuit illustrated in Figure 24 avoids the need for tightly
matched resistors by using an active integrator circuit. In this
circuit, the output of the voltage reference provides the input
drive for the integrator. To maintain circuit equilibrium, the
integrator adjusts its output to establish the proper relationship
between the VOUT and GND references. Thus, any desired
negative output voltage can be selected by substituting for the
appropriate reference IC. The sleep feature is maintained in the
circuit with the simple addition of a PNP transistor and a 10 kΩ
resistor.
Rev. J | Page 21 of 28
REF19x Series
One caveat to this approach is that although rail-to-rail output
amplifiers work best in the application, these operational amplifiers
require a finite amount (mV) of headroom when required to
provide any load current; consider this issue when choosing the
negative supply for the circuit.
VS
2N3906
2
VS
3 SLEEP OUTPUT 6
1µF
1kΩ
+5V
REF19x
GND
10kΩ
100Ω
A1
1µF
4
–VREF
100kΩ
00371-024
–5V
A1 = 1/2 OP295,
1/2 OP291
Figure 24. Negative Precision Voltage Reference Uses No Precision Resistors
STACKING REFERENCE ICs FOR
ARBITRARY OUTPUTS
Some applications may require two reference voltage sources
that are a combined sum of standard outputs. The circuit shown
in Figure 25 shows how this stacked output reference can be
implemented.
OUTPUT TABLE
VOUT1 (V) VOUT2 (V)
U1/U2
+VS
VS > VOUT2 + 0.15V
REF192/REF192 2.5
REF192/REF194 2.5
REF192/REF195 2.5
5.0
7.0
7.5
+VS
VS > VOUT2 + 0.15V
2
C1
0.1µF
A related variation on stacking two 3-terminal references is
shown in Figure 26, where U1, a REF192, is stacked with a
2-terminal reference diode, such as the AD589. Like the
3-terminal stacked reference shown in Figure 25, this circuit provides two outputs, VOUT1 and VOUT2, which are the
individual terminal voltages of D1 and U1, respectively. Here
this is 1.235 V and 2.5 V, which provides a VOUT2 of 3.735 V.
When using 2-terminal reference diodes, such as D1, the rated
minimum and maximum device currents must be observed,
and the maximum load current from VOUT1 can be no greater
than the current setup by R1 and VO (U1). When VO (U1) is
equal to 2.5 V, R1 provides a 500 μA bias to D1, so the maximum load current available at VOUT1 is 450 μA or less.
U2
3
REF19x
VO (U2)
4
2
+VOUT2
6
(SEE TABLE)
+
C1
0.1μF
C2
1µF
3
U1
REF192
4
6
VO (U1)
+
C2
1μF
2
3
REF19x
(SEE TABLE)
4
VIN
COMMON
6
VO (U1)
+ C4
1µF
R1
3.9kΩ
+VOUT1
VIN
COMMON
(SEE TEXT)
VOUT
COMMON
00371-025
C3
0.1µF
U1
D1
AD589
VO (D1)
+ C3
1μF
R1
4.99kΩ
+VOUT2
3.735V
(SEE TEXT)
+VOUT1
1.235V
VOUT
COMMON
00371-026
10kΩ
SLEEP
TTL/CMOS
Although this concept is simple, some cautions are needed.
Because the lower reference circuit must sink a small bias
current from U2 (50 μA to 100 μA), plus the base current from
the series PNP output transistor in U2, either the external load
of U1 or R1 must provide a path for this current. If the U1
minimum load is not well defined, Resistor R1 should be used,
set to a value that conservatively passes 600 μA of current with
the applicable VOUT1 across it. Note that the two U1 and U2
reference circuits are locally treated as macrocells, each having
its own bypasses at input and output for best stability. Both U1
and U2 in this circuit can source dc currents up to their full
rating. The minimum input voltage, VS, is determined by the
sum of the outputs, VOUT2, plus the dropout voltage of U2.
Figure 26. Stacking Voltage References with the REF192
PRECISION CURRENT SOURCE
Figure 25. Stacking Voltage References with the REF19x
Two reference ICs are used, fed from a common unregulated
input, VS. The outputs of the individual ICs are connected in
series, as shown in Figure 25, which provide two output
voltages, VOUT1 and VOUT2. VOUT1 is the terminal voltage of U1,
whereas VOUT2 is the sum of this voltage and the terminal
voltage of U2. U1 and U2 are chosen for the two voltages that
supply the required outputs (see Table 1). If, for example, both
U1 and U2 are REF192s, the two outputs are 2.5 V and 5.0 V.
In low power applications, the need often arises for a precision
current source that can operate on low supply voltages. As
shown in Figure 27, any one of the devices in the REF19x family
of references can be configured as a precision current source.
The circuit configuration illustrated is a floating current source
with a grounded load. The output voltage of the reference is
bootstrapped across RSET, which sets the output current into the
load. With this configuration, circuit precision is maintained for
load currents in the range from the reference’s supply current
(typically 30 μA) to approximately 30 mA. The low dropout
voltage of these devices maximizes the current source’s output
voltage compliance without excess headroom.
Rev. J | Page 22 of 28
REF19x Series
VS
Using dissimilar REF19x series devices with this configuration
allows logic selection between the U1/U2-specified terminal
voltages. For example, with U1 (a REF195) and U2 (a REF196),
as noted in the table in Figure 28, changing the CMOScompatible VC logic control voltage from high to low selects
between a nominal output of 5.0 V and 3.3 V, and vice versa.
Other REF19x family units can also be used for U1/U2, with
similar operation in a logic sense, but with outputs as per the
individual paired devices (see the table in Figure 28). Of course,
the exact output voltage tolerance, drift, and overall quality of
the reference voltage is consistent with the grade of individual
U1 and U2 devices.
2
VS
REF19x
OUTPUT 6
GND
4
1µF
R1
ISY
ADJUST
P1
IOUT
VIN ≥ IOUT × RL (MAX) + VSY (MIN)
IOUT =
VOUT
RSET
VOUT
RSET
RSET
RL
+ ISY (REF19x)
FOR EXAMPLE, REF195: VOUT = 5V
IOUT = 5mA
R1 = 953Ω
P1 = 100Ω, 10-TURN
>> ISY
00371-027
3 SLEEP
Figure 27. A Low Dropout, Precision Current Source
SWITCHED OUTPUT 5 V/3.3 V REFERENCE
Applications often require digital control of reference voltages,
selecting between one stable voltage and a second. With the
sleep feature inherent to the REF19x series, switched output
reference configurations are easily implemented with little
additional hardware.
The circuit in Figure 28 illustrates the general technique, which
takes advantage of the output wire-OR capability of the REF19x
device family. When off, a REF19x device is effectively an open
circuit at the output node with respect to the power supply.
When on, a REF19x device can source current up to its current
rating, but sink only a few μA (essentially, just the relatively low
current of the internal output scaling divider). Consequently,
when two devices are wired together at their common outputs,
the output voltage is the same as the output voltage for the on
device. The off state device draws a small standby current of
15 μA (maximum), but otherwise does not interfere with operation of the on device, which can operate to its full current
rating. Note that the two devices in the circuit conveniently
share both input and output capacitors, and with CMOS logic
drive, it is power efficient.
OUTPUT TABLE
U1/U2
VC*
VOUT (V)
REF195/ HIGH 5.0
REF196 LOW 3.3
REF194/ HIGH 4.5
REF195 LOW 5.0
+VS = 6V
2
VC
1
2
3
4
*CMOS LOGIC LEVELS
U1
3
REF19x
6
(SEE TABLE)
U3A
U3B
74HC04 74HC04
4
+VOUT
2
U2
3
REF19x
6
+ C2
1µF
(SEE TABLE)
KELVIN CONNECTIONS
In many portable applications where the PCB cost and area go
hand-in-hand, circuit interconnects are very often narrow.
These narrow lines can cause large voltage drops if the voltage
reference is required to provide load currents to various
functions. The interconnections of a circuit can exhibit a typical
line resistance of 0.45 mΩ/square (for example, 1 oz. Cu).
In applications where these devices are configured as low
dropout voltage regulators, these wiring voltage drops can
become a large source of error. To circumvent this problem,
force and sense connections can be made to the reference
through the use of an operational amplifier, as shown in Figure 29.
This method provides a means by which the effects of wiring
resistance voltage drops can be eliminated. Load currents flowing
through wiring resistance produce an I-R error (ILOAD × RWIRE) at
the load. However, the Kelvin connection overcomes the problem by including the wiring resistance within the forcing loop
of the op amp. Because the op amp senses the load voltage, op
amp loop control forces the output to compensate for the wiring
error and to produce the correct voltage at the load. Depending
on the reference device chosen, operational amplifiers that can
be used in this application are the OP295, OP292, and OP183.
4
VIN
COMMON
VOUT
COMMON
00371-028
C1
0.1µF
Due to the nature of the wire-OR, one application caveat should
be understood about this circuit. Because U1 and U2 can only
source current effectively, negative going output voltage changes,
which require the sinking of current, necessarily take longer
than positive going changes. In practice, this means that the
circuit is quite fast when undergoing a transition from 3.3 V to
5 V, but the transition from 5 V to 3.3 V takes longer. Exactly
how much longer is a function of the load resistance, RL, seen
at the output and the typical 1 μF value of C2. In general, a conservative transition time is approximately several milliseconds
for load resistances in the range of 100 Ω to 1 kΩ. Note that for
highest accuracy at the new output voltage, several time constants
should be allowed (for example, >7.6 time constants for