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ALD1702SAL

ALD1702SAL

  • 厂商:

    ALD

  • 封装:

    SOIC8_150MIL

  • 描述:

    General Purpose Amplifier 1 Circuit Rail-to-Rail 8-SOIC

  • 数据手册
  • 价格&库存
ALD1702SAL 数据手册
ADVANCED LINEAR DEVICES, INC. ALD1702A/ALD1702B ALD1702/ALD1703 5V RAIL-TO-RAIL PRECISION OPERATIONAL AMPLIFIER GENERAL DESCRIPTION FEATURES The ALD1702A/ALD1702B/ALD1702/ALD1703 is a monolithic operational amplifier intended primarily for a wide range of analog applications in +5V single power supply and ±5V dual power supply systems as well as +4V to +10V battery operated systems. All device characteristics are specified for +5V single supply or ±2.5V dual supply systems. It is manufactured with Advanced Linear Devices' enhanced ACMOS silicon gate CMOS process. • Rail-to-rail input and output voltage ranges • All parameters specified for +5V single supply or ±2.5V dual supply systems. • High load capacitance capability -4000pF typical • No frequency compensation required -unity gain stable • Extremely low input bias currents -1.0pA typical (30pA max.) • Ideal for high source impedance applications • Dual power supply ±2.5V to ±5.0V operation • Single power supply +5V to +10V operation • High voltage gain -- typically 85V/mV @ ±2.5V and 250V/mV @ ±5.0V • Drive as low as 2KΩ load with 5mA drive current • Output short circuit protected • Unity gain bandwidth of 1.5MHz (1MHz min.) • Slew rate of 2.1V/µs (1.4V/µs min.) • Low power dissipation • Suitable for rugged, temperature-extreme environments The ALD1702A/ALD1702B/ALD1702/ALD1703 is designed to offer a balanced trade-off of performance parameters providing a wide range of desired specifications. It has been developed specifically with the 5V single supply or ±2.5 dual supply user in mind and offers the industry pin configuration of µA741 and ICL7611 types. Several important characteristics of the device make many applications easy to implement for these supply voltages. First, the operational amplifier can operate with rail to rail input and output voltages. This feature allows numerous analog serial stages to be implemented without losing operating voltage margin. Second, the device was designed to accommodate mixed applications where digital and analog circuits may work off the same 5V power supply. Third, the output stage can drive up to 400pF capacitive and 5KΩ resistive loads in non-inverting unity gain connection and double the capacitance in the inverting unity gain mode. These features, coupled with extremely low input currents, high voltage gain, useful bandwidth of 1.5MHz, slew rate of 2.1V/µs, low power dissipation, low offset voltage and temperature drift, make the ALD1702A/ ALD1702B/ALD1702/ALD1703 a truly versatile, user friendly, operational amplifier. The ALD1702A/ALD1702B/ALD1702/ALD1703 is designed and fabricated with silicon gate CMOS technology, and offers 1pA typical input bias current. On-chip offset voltage trimming allows the device to be used without nulling in most applications. The device offers typical offset drift of less than 7µV/°C which eliminates many trim or temperature compensation circuits. For precision applications, it is designed to settle to 0.01% in 8µs. Additionally, robust design and rigorous screening make this device especially suitable for operation in temperature-extreme environments and rugged conditions. APPLICATIONS • • • • • • • • • • • • • • Voltage amplifier Voltage follower/buffer Charge integrator Photodiode amplifier Data acquisition systems High performance portable instruments Signal conditioning circuits Sensor and transducer amplifiers Low leakage amplifiers Active filters Sample/Hold amplifier Picoammeter Current to voltage converter Coaxial cable driver PIN CONFIGURATION ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS)) 0°C to +70°C Operating Temperature Range 0°C to +70°C -55°C to 125°C 8-Pin Small Outline Package (SOIC) 8-Pin Plastic Dip Package 8-Pin CERDIP Package ALD1702ASAL ALD1702BSAL ALD1702SAL ALD1703SAL ALD1702APAL ALD1702BPAL ALD1702PAL ALD1703PAL ALD1702ADA ALD1702BDA ALD1702DA ALD1703DA 8 N/C 7 V+ 3 6 OUT 4 5 N/C N/C 1 -IN 2 +IN V- 2 TOP VIEW SAL, PAL, DA PACKAGES * N/C pins are internally connected. Do not connect externally. * Contact factory for leaded (non-RoHS) or high temperature versions. Rev 2.1 ©2010 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286 www.aldinc.com ABSOLUTE MAXIMUM RATINGS Supply voltage, V+ Differential input voltage range Power dissipation Operating temperature range SAL, PAL packages DA package Storage temperature range Lead temperature, 10 seconds CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. 10.6V -0.3V to V+ +0.3V 600 mW 0°C to +70°C -55°C to +125°C -65°C to +150°C +260°C OPERATING ELECTRICAL CHARACTERISTICS TA = 25°C VS = ±2.5V unless otherwise specified 1702A Typ Max Min 1702B Typ Max Min ±5.0 10.0 ±2.0 4.0 ±5.0 10.0 ±2.0 4.0 1702 Typ Max Parameter Symbol Min Supply Voltage VS V+ Input Offset Voltage VOS Input Offset Current IOS 1.0 25 240 1.0 25 240 1.0 25 240 Input Bias Current IB 1.0 30 300 1.0 30 300 1.0 30 300 Input Voltage Range VIR Input Resistance RIN Input Offset Voltage Drift TCVOS ±2.0 4.0 0.9 1.7 -0.3 -2.8 5.3 2.8 ±5.0 10.0 2.0 2.8 -0.3 -2.8 5.3 2.8 Min 1703 Typ 5.3 2.8 Unit Test Conditions ±5.0 10.0 V Dual Supply Single Supply 10.0 11.0 mV mV RS ≤ 100KΩ 0°C ≤ TA ≤ +70°C 1.0 30 450 pA pA TA = 25°C 0°C ≤ TA ≤ +70°C 1.0 50 600 pA pA TA = 25°C 0°C ≤ TA ≤ +70°C 4.85 2.35 V V V+ = +5V VS = ±2.5V ±2.0 4.0 4.5 5.3 -0.3 -2.8 Max 0.15 -2.35 1012 1012 1012 1012 7 7 7 10 µV/°C RS ≤ 100KΩ Ω Power Supply PSRR Rejection Ratio 70 70 80 80 65 65 80 80 65 65 80 80 60 60 80 80 dB dB RS ≤ 100KΩ 0°C ≤ TA ≤ +70°C Common Mode CMRR Rejection Ratio 70 70 83 83 65 65 83 83 65 65 83 83 60 60 83 83 dB dB RS ≤100KΩ 0°C ≤ TA ≤ +70°C Large Signal Voltage Gain 50 85 400 50 85 400 50 85 400 32 85 300 V/mV V/mV V/mV RL =10KΩ RL ≥1MΩ RL =10KΩ 0°C ≤ TA ≤ +70°C V V V RL =1MΩ V+ = 5V 0°C ≤ TA ≤ +70°C RL =10KΩ 0°C ≤ TA ≤ +70°C AV 20 Output Voltage Range Output Short Circuit Current 20 VO low 0.002 VO high 4.99 4.998 VO low -2.44 VO high 2.35 2.44 ISC 0.01 4.99 -2.35 2.35 8 20 0.002 0.01 4.998 -2.44 -2.35 2.44 4.99 2.35 8 10 0.002 0.01 4.998 -2.44 -2.35 2.44 4.99 2.3 8 0.002 4.998 -2.4 2.4 0.01 -2.3 8 mA Supply Current IS 1.1 2.0 1.1 2.0 1.1 2.0 1.1 2.5 mA VIN = 0V No Load Power Dissipation PD 5.5 10.0 5.5 10.0 5.5 10.0 5.5 12.5 mW VS = ±2.5V Input Capacitance CIN Bandwidth BW 1.0 1.5 1.0 1.5 1.0 1.5 0.7 1.5 MHz Slew Rate SR 1.4 2.1 1.4 2.1 1.4 2.1 1.1 2.1 V/µs AV = +1 RL = 10KΩ Rise time tr 0.2 µs RL = 10KΩ CL = 100pF ALD1702A/ALD1702B ALD1702/ALD1703 1 0.2 1 0.2 1 0.2 Advanced Linear Devices 1 pF 2 of 9 OPERATING ELECTRICAL CHARACTERISTICS (cont'd) TA = 25°C VS = ±2.5V unless otherwise specified Parameter Symbol Min Overshoot Factor 1702A Typ Max 1702B Typ Min Max Min 1702 Typ Max Min 1703 Typ Max Unit Test Conditions 10 10 10 10 % RL =10KΩ CL = 100pF pF pF Gain = 1 Gain = 5 Maximum Load Capacitance CL 400 4000 400 4000 400 4000 400 4000 Input Noise Voltage en 26 26 26 26 nV/√Hz f =1KHz Input Current Noise in 0.6 0.6 0.6 0.6 fA/√Hz f =10Hz Settling Time ts 8.0 3.0 8.0 3.0 8.0 3.0 8.0 3.0 µs µs 0.01% 0.1% AV = -1 RL=5KΩ CL=50pF TA = 25°C VS = ±5.0V unless otherwise specified Parameter Power Supply Symbol Min 1702A Typ Max 1702B Typ Min Max Min 1702 Typ Max Min 1703 Typ Max Unit Test Conditions PSRR 83 83 83 83 dB RS ≤ 100KΩ Common Mode CMRR 83 83 83 83 dB RS ≤ 100KΩ 250 250 250 250 V/mV RL =10KΩ V RL =10KΩ Rejection Ratio Rejection Ratio Large Signal Voltage Gain AV Output Voltage VO low Range VO high 4.8 -4.9 4.93 -4.8 -4.9 4.93 4.8 -4.8 4.8 -4.9 4.93 -4.8 4.8 -4.9 4.93 -4.8 Bandwidth BW 1.7 1.7 1.7 1.7 MHz Slew Rate SR 2.8 2.8 2.8 2.8 V/µs AV = +1 CL = 50pF VS = ±2.50V -55°C ≤ TA ≤ +125°C unless otherwise specified Min 1702BDA Typ Max 1702DA Typ Max Unit Input Offset Voltage VOS 3.0 4.0 6.5 mV Input Offset Current IOS 8.0 8.0 8.0 nA Input Bias Current IB 10.0 10.0 10.0 nA Power Supply Rejection Ratio PSRR 60 75 60 75 60 75 dB RS ≤ 100KΩ Common Mode Rejection Ratio CMRR 60 83 60 83 60 83 dB RS ≤ 100KΩ Large Signal Voltage Gain AV 10 25 10 25 7 25 V/ mV RL = 10KΩ Output Voltage Range VO low VO high 0.1 4.9 4.8 0.1 4.9 RL = 10KΩ 4.8 0.1 4.9 V 4.8 0.2 Advanced Linear Devices Min Test Conditions Symbol ALD1702A/ALD1702B ALD1702/ALD1703 Min 1702ADA Typ Max Parameter 0.2 0.2 RS ≤ 100KΩ 3 of 9 Design & Operating Notes: 1. The ALD1702A/ALD1702B/ALD1702/ALD1703 CMOS operational amplifier uses a 3 gain stage architecture and an improved frequency compensation scheme to achieve large voltage gain, high output driving capability, and better frequency stability. In a conventional CMOS operational amplifier design, compensation is achieved with a pole splitting capacitor together with a nulling resistor. This method is, however, very bias dependent and thus cannot accommodate the large range of supply voltage operation as is required from a stand alone CMOS operational amplifier. The ALD1702A/ALD1702B/ALD1702/ALD1703 is internally compensated for unity gain stability using a novel scheme that does not use a nulling resistor. This scheme produces a clean single pole roll off in the gain characteristics while providing for more than 70 degrees of phase margin at the unity gain frequency. A unity gain buffer using the ALD1702A/ALD1702B/ALD1702/ ALD1703 will typically drive 400pF of external load capacitance without stability problems. In the inverting unity gain configuration, it can drive up to 800pF of load capacitance. Compared to other CMOS operational amplifiers, the ALD1702A/ALD1702B/ALD1702/ ALD1703 has shown itself to be more resistant to parasitic oscillations. 2. The ALD1702A/ALD1702B/ALD1702/ALD1703 has complementary p-channel and n-channel input differential stages connected in parallel to accomplish rail to rail input common mode voltage range. This means that with the ranges of common mode input voltage close to the power supplies, one of the two differential stages is switched off internally. To maintain compatibility with other operational amplifiers, this switching point has been selected to be about 1.5V above the negative supply voltage. Since offset voltage trimming on the ALD1702A/ALD1702B/ALD1702/ALD1703 is made when the input voltage is symmetrical to the supply voltages, this internal switching does not affect a large variety of applications such as an inverting amplifier or non-inverting amplifier with a gain larger than 2.5 (5V operation), where the common mode voltage does not make excursions below this switching point. The user should however, be aware that this switching does take place if the operational amplifier is connected as a unity gain buffer and should make provision in his design to allow for input offset voltage variations. 3. The input bias and offset currents are essentially input protection diode reverse bias leakage currents, and are typically less than 1pA at room temperature. This low input bias current assures that the analog signal from the source will not be distorted by input bias currents. Normally, this extremely high input impedance of greater than 1012Ω would not be a problem as the source impedance would limit the node impedance. However, for applications where source impedance is very high, it may be necessary to limit noise and hum pickup through proper shielding. 4. The output stage consists of class AB complementary output drivers, capable of driving a low resistance load. The output voltage swing is limited by the drain to source on-resistance of the output transistors as determined by the bias circuitry, and the value of the load resistor. When connected in the voltage follower configuration, the oscillation resistant feature, combined with the rail to rail input and output feature, makes an effective analog signal buffer for medium to high source impedance sensors, transducers, and other circuit networks. 5. The ALD1702A/ALD1702B/ALD1702/ALD1703 operational amplifier has been designed to provide full static discharge protection. Internally, the design has been carefully implemented to minimize latch up. However, care must be exercised when handling the device to avoid strong static fields that may degrade a diode junction, causing increased input leakage currents. In using the operational amplifier, the user is advised to power up the circuit before, or simultaneously with, any input voltages applied and to limit input voltages to not exceed 0.3V of the power supply voltage levels. TYPICAL PERFORMANCE CHARACTERISTICS COMMON MODE INPUT VOLTAGE RANGE AS A FUNCTION OF SUPPLY VOLTAGE OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF SUPPLY VOLTAGE AND TEMPERATURE 1000 TA = 25°C OPEN LOOP VOLTAGE GAIN (V/mV) COMMON MODE INPUT VOLTAGE RANGE (V) ±7 ±6 ±5 ±4 ±3 ±2 } +25°C 100 } +125°C 10 RL= 10KΩ RL= 5KΩ ±1 0 1 0 ±1 ±2 ±3 ±4 ±5 ±6 ±7 0 ±2 ±4 ±6 ±8 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) INPUT BIAS CURRENT AS A FUNCTION OF AMBIENT TEMPERATURE SUPPLY CURRENT AS A FUNCTION OF SUPPLY VOLTAGE ±5 10000 1000 VS = ± 2.5V SUPPLY CURRENT (mA) INPUT BIAS CURRENT (pA) } -55°C 100 10 1.0 INPUTS GROUNDED OUTPUT UNLOADED ±4 ±3 ±2 TA = -55ºC -25°C ±1 +25°C +80°C +125°C 0 0.1 -50 -25 0 25 50 75 100 125 ALD1702A/ALD1702B ALD1702/ALD1703 0 ±1 ±2 ±3 ±4 ±5 ±6 SUPPLY VOLTAGE (V) AMBIENT TEMPERATURE (°C) Advanced Linear Devices 4 of 9 TYPICAL PERFORMANCE CHARACTERISTICS (cont'd) OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF FREQUENCY OUTPUT VOLTAGE SWING AS A FUNCTION OF SUPPLY VOLTAGE 120 OPEN LOOP VOLTAGE GAIN (dB) -55°C ≤ TA ≤ 125°C ±6 RL = 10KΩ RL = 10KΩ ±5 ±4 RL = 2KΩ ±3 ±2 VS = ±2.5V TA = 25°C 100 80 60 0 40 45 20 90 0 135 180 -20 0 ±1 ±2 ±3 ±4 ±5 ±6 ±7 1 10 100 SUPPLY VOLTAGE (V) 100K 1M 10M VS = ±2.5V +3 +2 +1 0 -1 -2 -3 -4 INPUT OFFSET VOLTAGE AS A FUNCTION OF COMMON MODE INPUT VOLTAGE 15 INPUT OFFSET VOLTAGE (mV) INPUT OFFSET VOLTAGE (mV) 10K FREQUENCY (Hz) INPUT OFFSET VOLTAGE AS A FUNCTION OF AMBIENT TEMPERATURE REPRESENTATIVE UNITS +5 +4 1K PHASE SHIFT IN DEGREES OUTPUT VOLTAGE SWING (V) ±7 VS = ±2.5V TA = 25°C 10 5 0 -5 -10 -15 -5 -2 -50 -25 0 +25 +50 +75 +100 +125 -1 0 +1 +2 +3 COMMON MODE INPUT VOLTAGE (V) AMBIENT TEMPERATURE (°C) VOLTAGE NOISE DENSITY AS A FUNCTION OF FREQUENCY OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF LOAD RESISTANCE 150 VOLTAGE NOISE DENSITY (nV/ √ Hz) OPEN LOOP VOLTAGE GAIN (V/mV) 1000 100 10 VS = ±2.5V TA = 25°C 125 VS = ±2.5V TA = 25°C 100 75 50 25 0 1 1K 10K 100K 1000K 10 100 LARGE - SIGNAL TRANSIENT RESPONSE 100mV/div VS = ±2.5V TA = 25°C RL = 10KΩ CL = 50pF ALD1702A/ALD1702B ALD1702/ALD1703 10K 100K 1000K SMALL - SIGNAL TRANSIENT RESPONSE 5V/div 1V/div 1K FREQUENCY (Hz) LOAD RESISTANCE (Ω) 20mV/div 2µs/div Advanced Linear Devices VS = ±2.5V TA = 25°C RL = 10KΩ CL = 50pF 2µs/div 5 of 9 TYPICAL APPLICATIONS RAIL-TO-RAIL VOLTAGE FOLLOWER/BUFFER RAIL-TO-RAIL VOLTAGE COMPARATOR +5V 5V ZIN =~ 1012Ω 0.1µF VIN VIN OUTPUT CL + OUTPUT + 50K RL =10KΩ 400pF 0.1µF - +5V 0 ≤ VIN ≤ 5V 10M * See rail to rail waveform LOW OFFSET SUMMING AMPLIFIER RAIL-TO-RAIL WAVEFORM 50K +2.5V 10K INPUT 1 INPUT 2 INPUT .01µF OUTPUT GAIN = 5 .01µF + CL = 4000pF * Circuit Drives Large Load Capacitance ≤ 4000pF 0V +5V OUTPUT 0V 10K +5V Performance waveforms. Upper trace is the output of a Wien Bridge Oscillator. Lower trace is the output of Rail-to-rail voltage follower. - 2.5V PHOTO DETECTOR CURRENT TO VOLTAGE CONVERTER WIEN BRIDGE OSCILLATOR (RAIL-TO-RAIL) SINE WAVE GENERATOR +2.5V - RF = 5M OUTPUT I + 10K -2.5V C = .01µF f =~ + 10K R = 10K 1 2πRC VOUT = I x RF PHOTODIODE 10K .01µF +2.5V -2.5V RL = 10K ~ 1.6KHz * See Rail to Rail Waveform ALD1702A/ALD1702B ALD1702/ALD1703 Advanced Linear Devices 6 of 9 SOIC-8 PACKAGE DRAWING 8 Pin Plastic SOIC Package E Millimeters Dim S (45°) D A Min 1.35 Max 1.75 Min 0.053 Max 0.069 A1 0.10 0.25 0.004 0.010 b 0.35 0.45 0.014 0.018 C 0.18 0.25 0.007 0.010 D-8 4.69 5.00 0.185 0.196 E 3.50 4.05 0.140 0.160 1.27 BSC e A A1 e Inches 0.050 BSC H 5.70 6.30 0.224 0.248 L 0.60 0.937 0.024 0.037 ø 0° 8° 0° 8° S 0.25 0.50 0.010 0.020 b S (45°) H L ALD1702A/ALD1702B ALD1702/ALD1703 C ø Advanced Linear Devices 7 of 9 PDIP-8 PACKAGE DRAWING 8 Pin Plastic DIP Package Millimeters E E1 D S A2 A1 e b A L Dim Min Max Min Max A 3.81 5.08 0.105 0.200 A1 0.38 1.27 0.015 0.050 A2 1.27 2.03 0.050 0.080 b 0.89 1.65 0.035 0.065 b1 0.38 0.51 0.015 0.020 c 0.20 0.30 0.008 0.012 D-8 9.40 11.68 0.370 0.460 E 5.59 7.11 0.220 0.280 E1 7.62 8.26 0.300 0.325 e 2.29 2.79 0.090 0.110 e1 7.37 7.87 0.290 0.310 L 2.79 3.81 0.110 0.150 S-8 1.02 2.03 0.040 0.080 0° 15° 0° 15° ø b1 Inches c e1 ALD1702A/ALD1702B ALD1702/ALD1703 ø Advanced Linear Devices 8 of 9 CERDIP-8 PACKAGE DRAWING 8 Pin CERDIP Package E E1 Millimeters D A1 s A L L2 b b1 e L1 Inches Dim A Min Max 3.55 5.08 Min 0.140 Max 0.200 A1 1.27 2.16 0.050 0.085 b 0.97 1.65 0.038 0.065 b1 0.36 0.58 0.014 0.023 C 0.20 0.38 0.008 0.015 D-8 -- 10.29 -- 0.405 E 5.59 7.87 0.220 0.310 E1 7.73 8.26 0.290 0.325 e 2.54 BSC 0.100 BSC e1 7.62 BSC 0.300 BSC L 3.81 5.08 0.150 0.200 L1 3.18 -- 0.125 -- L2 0.38 1.78 0.015 0.070 S -- 2.49 -- 0.098 Ø 0° 15° 0° 15° C e1 ALD1702A/ALD1702B ALD1702/ALD1703 ø Advanced Linear Devices 9 of 9
ALD1702SAL 价格&库存

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ALD1702SAL
  •  国内价格 香港价格
  • 1+57.575531+7.14222
  • 10+39.1059310+4.85108
  • 50+31.4042350+3.89568
  • 100+28.97281100+3.59407
  • 250+26.37596250+3.27193
  • 500+24.79333500+3.07560
  • 1000+23.479011000+2.91256
  • 2500+22.267002500+2.76222

库存:42