ADVANCED
LINEAR
DEVICES, INC.
TM
e
®
EPAD
D
LE
AB
EN
ALD1722/ALD1722G
PRECISION LOW POWER CMOS OPERATIONAL AMPLIFIER
GENERAL DESCRIPTION
FEATURES & BENEFITS
The ALD1722/ALD1722G is a monolithic precision low power CMOS
operational amplifier intended for a broad range of precision applications
requiring exremely low input signal power. Input signal power is the product
of input offset voltage and input bias current, which represents the minimum required power draw from the signal source in order to drive the input
of the operational amplifier. Input signal power is also a figure of merit in
source loading and its associated error, and is a measure of the basic signal
resolution possible through the operational amplifier for a given signal
source. For certain types of signal sources, signal loading directly translates into a significant distortion or "interface noise equivalent " term.
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The ALD1722/ALD1722G is designed to set a new standard in low input
signal power requirements. The typical input loading at its input is 0.03 mV
offset voltage and 0.01 pA input bias current at 25C, resulting in 0.0003 fW
input signal power draw. This input characteristic virtually eliminates any
loading effects on most types of signal sources, offering unparalled
accuracy and signal integrity and fidelity. Obviously, for capacitive and high
sensitivity, high impedance signal sources, the ALD1722/ALD1722G is
ideally suited. It is readily suited for +5V single supply (or ±2V to ±5V)
systems, with low operating power dissipation, a traditional strength of
CMOS technology. It is offered with industry standard pin configuration of
µA741 and ICL7611 types.
The ALD1722/ALD1722G can operate with rail to rail large signal input and
output voltages with relatively high slew rate. The input voltage can be
equal to or exceed the positive and negative supply voltages while the
output voltage can swing close to these supply voltage rails. This feature
significantly reduces the supply overhead voltage required to operate the
operational amplifier and allows numerous analog serial stages to operate
in a low power supply environment. circuits may operate off the same power
supply or battery. This device also features rail-to-rail input and output
voltage ranges, tolerance to over-voltage input spikes of 300mV beyond
supply rails, high open loop voltage gain, useful bandwidth of 1.5 MHz, slew
rate of 2.1 V/µs, and low supply current of 0.8mA. Finally, the output stage
can typically drive up to 400pF capacitive loads in the unity gain mode and
up to 4000 pF capacitive load at a gain of 5.
These features make the ALD1722/ALD1722G a versatile, high precision
operational amplifier that is user friendly and easy to use with virtually no
source loading and zero input-loading induced source errors. Additionally,
robust design and rigorous screening make this device especially suitable
for operation in temperature-extreme environments and rugged conditions.
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Lead Free - RoHS compatible
Robust high-temperature operation
Industry standard pinout
Rail-to-rail input/output
Exremely low input signal power
Input bias current of 0.01pA and
input offset voltage of 25µV
No external components
No internal chopper clocking noise
No chopper dynamic power dissipation
Simple and cost effective
Small package size
Drive up to 4000pF load capacitance
Low power
Suitable for rugged, temperature-extreme
environments
APPLICATIONS
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Precision cable driver
Sensor interface circuits
Unity gain buffer amplifier
Precision analog cable driver
Transducer biasing circuits
Capacitive and charge integration circuits
Biochemical probe interface
Signal conditioning
Portable instruments
High source impedance electrode
amplifiers
Precision Sample and Hold amplifiers
Precision current to voltage converter
Error correction circuits
Sensor compensation circuits
Precision gain amplifiers
System output level shifter
PIN CONFIGURATION
8
N/C
7
V+
3
6
OUT
4
5
N/C
N/C
1
-IN
2
+IN
V-
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
0°C to +70°C
Operating Temperature Range
0°C to +70°C
-55°C to +125°C
8-Pin
Small Outline
Package (SOIC)
8-Pin
Plastic Dip
Package
8-Pin
CERDIP
Package
ALD1722SAL
ALD1722GSAL
ALD1722PAL
ALD1722GPAL
ALD1722DA
ALD1722GDA
2
TOP VIEW
TOP
VIEW
SAL, PAL, DA PACKAGES
* N/C pins are internally connected. Do not connect externally.
* Contact factory for leaded (non-RoHS) or high temperature versions.
Rev 2.1 ©2011 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V+
Differential input voltage range
Power dissipation
Operating temperature range SAL, PAL packages
DA package
Storage temperature range
Lead temperature, 10 seconds
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
10.6V
-0.3V to V+ +0.3V
600 mW
0°C to +70°C
-55°C to +125°C
-65°C to +150°C
+260°C
OPERATING ELECTRICAL CHARACTERISTICS
TA = 25oC VS = ±2.5V unless otherwise specified
Parameter
Symbol
Supply Voltage
VS
V+
1722
Typ
Min
±2.0
4.0
Max
Min
±5.0
10.0
±2.0
4.0
1722G
Typ
Max
Unit
Test Conditions
±5.0
10.0
V
V
Single Supply
25
90
80
400
µV
RS ≤ 100KΩ
IOS
0.01
10
280
0.01
10
280
pA
pA
TA = 25°C
0°C ≤ TA ≤ +70°C
Input Bias Current
IB
0.01
10
280
0.01
10
280
pA
pA
TA = 25°C
0°C ≤ TA ≤ +70°C
Input Voltage Range
VIR
+5.3
+2.8
V
V
V+ = +5V
VS = ±2.5V
Input Resistance
RIN
Input Offset Voltage Drift
TCVOS
Power Supply Rejection Ratio
Input Offset Voltage
VOS
Input Offset Current
-0.3
-2.8
+5.3
+2.8
-0.3
-2.8
1014
1014
4
7
PSRR
85
Common Mode Rejection Ratio
CMRR
97
Large Signal Voltage Gain
AV
VO low
VO high
4.99
0.002
4.998
0.01
Output Voltage Range
VO low
VO high
-2.44
2.44
-2.35
2.35
50
250
500
50
Ω
µV/°C
RS ≤ 100KΩ
85
dB
RS ≤ 100KΩ
97
dB
RS ≤ 100KΩ
V/mV
V/mV
RL =10KΩ
RL ≥ 1MΩ
250
500
0.002
4.998
0.01
4.99
V
V
RL =1MΩ V+ = 5V
0°C ≤ TA ≤ +70°C
-2.44
2.44
-2.35
2.35
V
V
RL =10KΩ
0°C ≤ TA ≤ +70°C
Output Short Circuit Current
ISC
8
8
Supply Current
IS
0.8
1.5
0.8
1.5
mA
VIN = 0V
No Load
Power Dissipation
PD
4.0
7.5
4.0
7.5
mW
VS = ±2.5V
Input Capacitance
CIN
Maximum Load Capacitance
CL
1
mA
1
pF
400
400
pF
Gain = 1
4000
4000
pF
Gain = 5
Input Noise Voltage
en
26
26
nV/√ Hz
f = 1KHz
Input Current Noise
in
0.6
0.6
fA/√ Hz
f =10Hz
ALD1722/ALD1722G
Advanced Linear Devices
2 of 9
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
TA = 25°C VS = ±2.5V unless otherwise specified (cont'd)
1722
Symbol
Min
Bandwidth
BW
1.0
1.5
1.0
1.5
MHz
Slew Rate
SR
1.4
2.1
1.4
2.1
V/µs
AV = +1
RL = 10KΩ
Rise time
tr
0.2
0.2
µs
RL = 10KΩ
10
10
%
RL = 10KΩ,
CL = 100pF
8.0
3.0
8.0
3.0
µs
µs
0.01%
0.1%
AV = -1, RL= 5KΩ
CL = 50pF
Unit
Test Conditions
Overshoot Factor
Settling Time
ts
Typ
1722G
Parameter
Max
Min
Typ
Max
Unit
Test Conditions
TA = 25°C VS = ±5.0V unless otherwise specified
1722
Min
Symbol
Power Supply Rejection Ratio
PSRR
85
85
dB
RS ≤ 100KΩ
Common Mode Rejection Ratio
CMRR
97
97
dB
RS ≤ 100KΩ
Large Signal Voltage Gain
AV
250
250
V/mV
RL = 10KΩ
Output Voltage Range
VO low
VO high
V
RL = 10KΩ
4.80
Typ
1722G
Parameter
-4.90
4.93
Max
Min
-4.80
4.80
Typ
-4.90
4.93
Max
-4.80
Bandwidth
BW
1.7
1.7
MHz
Slew Rate
SR
2.8
2.8
V/µs
AV = +1, CL = 50pF
VS = ±2.5V -55°C ≤ TA ≤ +125°C unless otherwise specified
1722
Symbol
Input Offset Voltage
VOS
Input Offset Current
IOS
Input Bias Current
IB
Power Supply Rejection Ratio
PSRR
85
85
dB
RS ≤ 100KΩ
Common Mode Rejection Ratio
CMRR
97
97
dB
RS ≤ 100KΩ
Large Signal Voltage Gain
AV
10
25
V/mV
RL ≤ 10KΩ
Output Voltage Range
VO low
VO high
-2.40
2.40
V
V
RL ≤ 10KΩ
2.30
ALD1722/ALD1722G
Min
1722G
Parameter
Typ
Max
0.5
2.0
10
25
2.30
-2.40
2.40
Min
Typ
Max
Unit
Test Conditions
0.7
3.5
mV
RS ≤ 100KΩ
2.0
2.0
nA
2.0
2.0
nA
-2.30
Advanced Linear Devices
-2.30
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Design & Operating Notes:
1. The ALD1722/ALD1722G CMOS operational amplifier uses a 3 gain
stage architecture and an improved frequency compensation scheme
to achieve large voltage gain, high output driving capability, and better
frequency stability. In a conventional CMOS operational amplifier
design, compensation is achieved with a pole splitting capacitor
together with a nulling resistor. This method is, however, very bias
dependent and thus cannot accommodate the large range of supply
voltage operation as is required from a stand alone CMOS operational
amplifier. The ALD1722/ALD1722G is internally compensated for
unity gain stability using a novel scheme that does not use a nulling
resistor. This scheme produces a clean single pole roll off in the gain
characteristics while providing for more than 70 degrees of phase
margin at the unity gain frequency. A unity gain buffer using the
ALD1722/ALD1722G will typically drive 400pF of external load capacitance without stability problems. In the inverting unity gain configuration, it can drive up to 800pF of load capacitance. Compared to
other CMOS operational amplifiers, the ALD1722/ALD1722G has
shown itself to be more resistant to parasitic oscillations.
3. The input bias and offset currents are essentially input protection
diode reverse bias leakage currents, and are typically less than 1pA
at room temperature. This low input bias current assures that the
analog signal from the source will not be distorted by input bias
currents. Normally, this extremely high input impedance of greater
than 1014Ω would not be a problem as the source impedance would
limit the node impedance. However, for applications where source
impedance is very high, it may be necessary to limit noise and hum
pickup through proper shielding.
2. The ALD1722/ALD1722G has complementary p-channel and nchannel input differential stages connected in parallel to accomplish
rail to rail input common mode voltage range. This means that with the
ranges of common mode input voltage close to the power supplies,
one of the two differential stages is switched off internally. To maintain
compatibility with other operational amplifiers, this switching point has
been selected to be about 1.5V above the negative supply voltage.
Since offset voltage trimming on the ALD1722/ALD1722G is made
when the input voltage is symmetrical to the supply voltages, this
internal switching does not affect a large variety of applications such
as an inverting amplifier or non-inverting amplifier with a gain larger
than 2.5 (5V operation), where the common mode voltage does not
make excursions below this switching point. The user should however, be aware that this switching does take place if the operational
amplifier is connected as a unity gain buffer and should make
provision in his design to allow for input offset voltage variations.
5. ALD1722/ALD1722G operational amplifier has been designed to
provide full static discharge protection. Internally, the design has been
carefully implemented to minimize latch up. However, care must be
exercised when handling the device to avoid strong static fields that
may degrade a diode junction, causing increased input leakage
currents. In using the operational amplifier, the user is advised to
power up the circuit before, or simultaneously with, any input voltages
applied and to limit input voltages to not exceed 0.3V of the power
supply voltage levels.
4. The output stage consists of class AB complementary output drivers,
capable of driving a low resistance load. The output voltage swing is
limited by the drain to source on-resistance of the output transistors
as determined by the bias circuitry, and the value of the load resistor.
When connected in the voltage follower configuration, the oscillation
resistant feature, combined with the rail to rail input and output feature,
makes an effective analog signal buffer for medium to high source
impedance sensors, transducers, and other circuit networks.
6. The ALD1722/ALD1722G has an internal design architecture that
provides robust high temperature operation. Contact factory for
custom screening versions.
TYPICAL PERFORMANCE CHARACTERISTICS
0
S
COMMON MODE INPUT VOLTAGE RANGE
AS A FUNCTION OF SUPPLY VOLTAGE
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF SUPPLY VOLTAGE AND TEMPERATURE
1000
TA = 25°C
±6
OPEN LOOP VOLTAGE
GAIN (V/mV)
COMMON MODE INPUT
VOLTAGE RANGE (V)
±7
±5
±4
±3
±2
} +25°C
100
} +125°C
10
±1
RL= 10KΩ
RL= 5KΩ
0
1
±1
0
±2
±3
±4
±5
±6
±7
±2
0
±4
±8
±6
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
INPUT BIAS CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
2.5
1000
VS = ±2.5V
100
SUPPLY CURRENT (mA)
INPUT BIAS CURRENT (pA)
} -55°C
10
1.0
0.1
INPUTS GROUNDED
OUTPUT UNLOADED
2.0
1.5
TA = -55ºC
-25°C
1.0
+25°C
+80°C
+125°C
0.5
0
0.01
0
-50
-25
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
ALD1722/ALD1722G
Advanced Linear Devices
±1
±2
±3
±4
±5
±6
SUPPLY VOLTAGE (V)
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TYPICAL PERFORMANCE CHARACTERISTICS (cont'd)
OUTPUT VOLTAGE SWING AS A
FUNCTION OF SUPPLY VOLTAGE
120
OPEN LOOP VOLTAGE
GAIN (dB)
-55°C ≤ TA ≤ 125°C
±6
RL = 10KΩ
±5
RL = 10KΩ
±4
RL = 2KΩ
±3
±2
±1
0
±2
±3
±4
±5
±6
±7
100
VS = ±2.5V
TA = 25°C
80
60
0
40
45
20
90
0
135
-20
180
1
10
1K
10K
100K
1M
10M
FREQUENCY (Hz)
SUPPLY VOLTAGE (V)
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
LARGE - SIGNAL TRANSIENT
RESPONSE
1000
OPEN LOOP VOLTAGE
GAIN (V/mV)
100
PHASE SHIFT IN DEGREES
OUTPUT VOLTAGE SWING (V)
±7
OPEN LOOP VOLTAGE AS A
FUNCTION OF FREQUENCY
5V/div
VS = ±2.5V
TA = 25°C
RL = 10KΩ
CL = 50pF
100
VS = ±2.5V
TA = 25°C
10
1
1V/div
1K
10K
100K
2µs/div
1000K
LOAD RESISTANCE (Ω)
SMALL - SIGNAL TRANSIENT
RESPONSE
100mV/div
20mV/div
ALD1722/ALD1722G
Advanced Linear Devices
VS = ±2.5V
TA = 25°C
RL = 10KΩ
CL = 50pF
2µs/div
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TYPICAL APPLICATIONS
RAIL TO RAIL VOLTAGE FOLLOWER/BUFFER
RAIL-TO-RAIL WAVEFORM
INPUT
5V
ZIN =~ 1012Ω
+5V
0V
0.1µF
+5V
OUTPUT
0V
VIN
OUTPUT
CL
+
RL =10KΩ
400pF
Performance waveforms.
0 ≤ VIN ≤ 5V
Upper trace is the output of a
Wien Bridge Oscillator. Lower
trace is the output of Rail-to-rail
voltage follower.
* See rail to rail waveform
PHOTO DETECTOR CURRENT
TO VOLTAGE CONVERTER
LOW OFFSET SUMMING AMPLIFIER
50K
RF = 5M
+2.5V
10K
INPUT 1
INPUT 2
.01µF
I
OUTPUT
GAIN = 5
CL = 4000pF
+
+5V
OUTPUT
+
10K
-2.5V
10K
.01µF
RL = 10K
RAIL-TO-RAIL VOLTAGE COMPARATOR
+2.5V
-
VIN
0.1µF
-
+5V
50K
OUTPUT
+
10K
R = 10K
f =~
-2.5V
- 2.5V
WIEN BRIDGE OSCILLATOR (RAIL-TO -RAIL)
SINE WAVE GENERATOR
C = .01µF
VOUT = I x RF
PHOTODIODE
.01µF
+
* Circuit Drives Large Load
Capacitance ≤ 4000pF
+2.5V
-
10K
1
2πRC
10M
~ 1.6KHz
* See rail to rail waveform
ALD1722/ALD1722G
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6 of 9
SOIC-8 PACKAGE DRAWING
8 Pin Plastic SOIC Package
E
Millimeters
Dim
S (45°)
D
A
Min
1.35
Max
1.75
Min
0.053
Max
0.069
A1
0.10
0.25
0.004
0.010
b
0.35
0.45
0.014
0.018
C
0.18
0.25
0.007
0.010
D-8
4.69
5.00
0.185
0.196
E
3.50
4.05
0.140
0.160
1.27 BSC
e
A
A1
e
Inches
0.050 BSC
H
5.70
6.30
0.224
0.248
L
0.60
0.937
0.024
0.037
ø
0°
8°
0°
8°
S
0.25
0.50
0.010
0.020
b
S (45°)
H
L
ALD1722/ALD1722G
C
ø
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7 of 9
PDIP-8 PACKAGE DRAWING
8 Pin Plastic DIP Package
E
E1
Millimeters
D
S
A2
A1
e
b
b1
A
L
Inches
Dim
Min
Max
Min
Max
A
3.81
5.08
0.105
0.200
A1
0.38
1.27
0.015
0.050
A2
1.27
2.03
0.050
0.080
b
0.89
1.65
0.035
0.065
b1
0.38
0.51
0.015
0.020
c
0.20
0.30
0.008
0.012
D-8
9.40
11.68
0.370
0.460
E
5.59
7.11
0.220
0.280
E1
7.62
8.26
0.300
0.325
e
2.29
2.79
0.090
0.110
e1
L
7.37
7.87
0.290
0.310
2.79
3.81
0.110
0.150
S-8
1.02
2.03
0.040
0.080
0°
15°
0°
15°
ø
c
e1
ALD1722/ALD1722G
ø
Advanced Linear Devices
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CERDIP-8 PACKAGE DRAWING
8 Pin CERDIP Package
E E1
Millimeters
D
A1
s
A
L
L2
b
b1
e
L1
Min
Inches
Dim
A
3.55
Max
5.08
Min
0.140
Max
0.200
A1
1.27
2.16
0.050
0.085
b
0.97
1.65
0.038
0.065
b1
0.36
0.58
0.014
0.023
C
0.20
0.38
0.008
0.015
D-8
--
10.29
--
0.405
E
5.59
7.87
0.220
0.310
E1
7.73
8.26
0.290
0.325
e
2.54 BSC
0.100 BSC
e1
7.62 BSC
0.300 BSC
L
3.81
5.08
0.150
0.200
L1
3.18
--
0.125
--
L2
0.38
1.78
0.015
0.070
S
--
2.49
--
0.098
Ø
0°
15°
0°
15°
C
e1
ALD1722/ALD1722G
ø
Advanced Linear Devices
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