ALD4706ASBL

ADVANCED LINEAR DEVICES, INC. ALD4706A/ALD4706B ALD4706 DUAL ULTRA MICROPOWER RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER GENERAL DESCRIPTION FEATURES The ALD4706A/ALD4706B/ALD4706 is a quad monolithic CMOS ultra micropower high slew-rate operational amplifier intended for a broad range of analog applications using ±1V to ±5V dual power supply systems, as well as +2V to +10V battery operated systems. All device characteristics are specified for +5V single supply or ±2.5V dual supply systems. Total supply current for four operational amplifiers is 200µA maximum at 5V supply voltage. It is manufactured with Advanced Linear Devices' enhanced ACMOS silicon gate CMOS process. • All parameters specified for + 5V single supply or ± 2.5V dual supply systems • Rail- to- rail input and output voltage ranges • Unity gain stable • Extremely low input bias currents -- 0.1pA • High source impedance applications • Dual power supply ±1.0V to ±5.0V • Single power supply +2V to +10V • High voltage gain • Output short circuit protected • Unity gain bandwidth of 0.2MHz • Slew rate of 0.17V/µs • Power dissipation of 20µA per op amp • Symmetrical output drive • Suitable for rugged, temperature-extreme environments The ALD4706A/ALD4706B/ALD4706 is designed to offer a trade-off of performance parameters providing a wide range of desired specifications. It has been developed specifically for the +5V single supply or ±1V to ±5V dual supply user and offers the popular industry standard pin configuration of LM324 types and ICL7641 types. Several important characteristics of the device make application easier to implement at these voltages. First, each operational amplifier can operate with rail-to-rail input and output voltages. This means the signal input voltage and output voltage can be equal to or near to the positive and negative supply voltages. This feature allows numerous analog serial stages and flexibility in input signal bias levels. Second, each device was designed to accommodate mixed applications where digital and analog circuits may operate off the same power supply or battery. Third, the output stage can typically drive up to 25pF capacitive and 20KΩ resistive loads. These features, combined with extremely low input currents, high open loop voltage gain of 100V/mV, useful bandwidth of 200KHz, a slew rate of 0.17V/µs, low power dissipation of 0.5mW, low offset voltage and temperature drift, make the ALD4706A/ALD4706B/ ALD4706 a versatile, ultra micropower quad operational amplifier. The ALD4706A/ALD4706B/ALD4706, designed and fabricated with silicon gate CMOS technology, offers 0.1pA typical input bias current. Due to low voltage and low power operation, reliability and operating characteristics, such as input bias currents and warm up time, are greatly improved. Additionally, robust design and rigorous screening make this device especially suitable for operation in temperature-extreme environments and rugged conditions. ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS)) Operating Temperature Range 0°C to +70°C 0°C to +70°C -55°C to 125°C 14-Pin Small Outline Package (SOIC) 14-Pin Plastic Dip Package 14-Pin CERDIP Package ALD4706ASBL ALD4706BSBL ALD4706SBL ALD4706APBL ALD4706BPBL ALD4706PBL ALD4706ADB ALD4706BDB ALD4706DB * Contact factory for leaded (non-RoHS) or high temperature versions. APPLICATIONS • • • • • • • • • • • • Voltage follower/buffer/amplifier Charge integrator Photodiode amplifier Data acquisition systems High performance portable instruments Signal conditioning circuits Sensor and transducer amplifiers Low leakage amplifiers Active filters Sample/Hold amplifier Picoammeter Current to voltage converter PIN CONFIGURATION OUT A 1 14 OUT D -IN A 2 13 -IN D +IN A 3 12 +IN D V+ 4 11 V- +IN B 5 10 +IN C -IN B 6 9 -IN C OUT B 7 8 OUT C TOP VIEW SBL, PBL, DB PACKAGES Rev 2.0 ©2010 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286 www.aldinc.com ABSOLUTE MAXIMUM RATINGS Supply voltage, V+ Differential input voltage range Power dissipation Operating temperature range SBL, PBL packages DB package Storage temperature range Lead temperature, 10 seconds CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. 10.6V -0.3V to V+ +0.3V 600 mW 0°C to +70°C -55°C to +125°C -65°C to +150°C +260°C OPERATING ELECTRICAL CHARACTERISTICS TA = 25°C VS = ±2.5V unless otherwise specified Min 4706B Typ Max Min ±5.0 ±1.0 10.0 2.0 ±5.0 10.0 ±1.0 2.0 Symbol Supply Voltage VS V+ Input Offset Voltage VOS Input Offset Current IOS 0.1 20 200 0.1 20 200 Input Bias Current IB 0.1 20 200 0.1 20 200 Input Voltage Range VIR Input Resistance RIN Input Offset Voltage Drift TCVOS Min 4706A Typ Parameter ±1.0 2.0 Max 2.0 2.8 -0.3 -2.8 5.3 2.8 4706 Typ Max Unit Test Conditions ±5.0 10.0 V V Dual Supply Single Supply 10.0 11.0 mV mV RS ≤ 100KΩ 0°C ≤ TA ≤ +70°C 0.1 20 200 pA pA TA = 25°C 0°C ≤ TA ≤ +70°C 0.1 20 200 pA pA TA = 25°C 0°C ≤ TA ≤ +70°C 5.3 2.8 V V V+ = +5 VS = ±2.5V 5.0 5.8 -0.3 -2.8 5.3 2.8 -0.3 -2.8 1013 1013 1013 7 7 10 µV/°C RS ≤ 100KΩ Ω Power Supply Rejection Ratio PSRR 65 65 83 83 65 65 83 83 60 60 83 83 dB dB RS ≤ 100KΩ 0°C ≤ TA ≤ +70°C Common Mode Rejection Ratio CMRR 65 65 83 83 65 65 83 83 60 60 83 83 dB dB RS ≤ 100KΩ 0°C ≤ TA ≤ +70°C Large Signal Voltage Gain AV 10 60 300 10 60 300 7 50 300 V/mV V/mV V/mV RL = 100KΩ RL ≥ 1MΩ RL = 100KΩ 10 Output Voltage Range 10 VO low VO high 0.001 4.999 0.01 4.99 VO low VO high -2.40 2.40 -2.25 2.25 Output Short Circuit Current ISC 200 Supply Current IS 120 Power Dissipation PD ALD4706A/ALD4706B ALD4706 7 0.001 4.99 4.999 0.01 V V RL = 1MΩ V+ = +5V 0°C ≤ TA ≤ +70°C -2.40 -2.25 -2.40 2.40 2.25 2.40 -2.25 V V RL = 100KΩ VS = ±2.5V 0°C ≤ TA ≤ +70°C 0.001 4.99 4.999 2.25 0.01 200 200 1.0 120 200 200 1.0 Advanced Linear Devices 120 µA 200 1.0 µA µW VIN=0V No Load All amplifiers VS = ±2.5V 2 of 9 OPERATING ELECTRICAL CHARACTERISTICS (cont'd) TA = 25°C VS = ±2.5V unless otherwise specified Min 4706A Typ CIN 1 1 1 Bandwidth BW 200 200 200 KHz Slew Rate SR 0.17 0.17 0.17 V/µs RL = 100KΩ AV = +1 Rise time tr 1.0 1.0 1.0 µs RL = 100KΩ 20 20 20 % RL = 100KΩ CL = 25pF ts 10.0 10.0 10.0 µs 0.1% AV = 1 CL = 25pF RL = 100KΩ CS 140 140 140 dB AV = 100 Channel Separation Max Min Max Unit Test Conditions Input Capacitance Settling Time Min 4706 Typ Symbol Overshoot Factor Max 4706B Typ Parameter pF TA = 25°C VS = ±1.0V unless otherwise specified Min 4706A Typ PSRR 80 80 80 dB RS ≤ 1MΩ Common Mode Rejection Ratio CMRR 80 80 80 dB RS ≤ 1MΩ Large Signal Voltage Gain AV 50 50 50 V/mV RL = 1MΩ Output Voltage Range VO low VO high V V RL = 1MΩ Bandwidth BW 200 200 200 KHz Slew Rate SR 0.1 0.1 0.1 V/µs -.90 .90 -0.95 0.95 Max Min -.90 -0.95 .90 0.95 Max -.90 Unit Test Conditions Power Supply Rejection Ratio -0.95 0.95 Min 4706 Typ Symbol .90 Max 4706B Typ Parameter AV =+1 CL = 25pF VS = ±2.5V –55°C ≤ TA ≤ +125°C unless otherwise specified 4706ADB Typ Max Min Typ 4706DB Input Offset Voltage VOS Input Offset Current IOS 1 4 1 4 Input Bias Current IB 1 4 1 4 Power Supply Rejection Ratio PSRR 60 75 60 75 60 75 dB RS ≤ 1MΩ Common Mode Rejection Ratio CMRR 60 83 60 83 60 83 dB RS ≤ 1MΩ Large Signal Voltage Gain AV 10 50 10 50 7 50 V/mV RL = 1MΩ Output Voltage Range VO low VO high 2.25 -2.40 2.40 2.25 -2.40 2.40 V V RL = 1MΩ 3.0 Max Min Typ Test Symbol ALD4706A/ALD4706B ALD4706 Min 4706BDB Parameter Max Unit 15.0 mV 1 4 nA 1 4 nA 6.0 -2.25 2.25 -2.40 -2.25 2.40 Advanced Linear Devices -2.25 Conditions RS ≤ 1MΩ 3 of 9 Design & Operating Notes: 1. The ALD4706A/ALD4706B/ALD4706 CMOS operational amplifier uses a 3 gain stage architecture and an improved frequency compensation scheme to achieve large voltage gain, high output driving capability, and better frequency stability. In a conventional CMOS operational amplifier design, compensation is achieved with a pole splitting capacitor together with a nulling resistor. This method is, however, very bias dependent and thus cannot accommodate the large range of supply voltage operation as is required from a stand alone CMOS operational amplifier. The ALD4706A/ALD4706B/ ALD4706 is internally compensated for unity gain stability using a novel scheme that does not use a nulling resistor. This scheme produces a clean single pole roll off in the gain characteristics while providing for more than 70 degrees of phase margin at the unity gain frequency. 2. The ALD4706A/ALD4706B/ALD4706 has complementary p-channel and n-channel input differential stages connected in parallel to accomplish rail to rail input common mode voltage range. This means that with the ranges of common mode input voltage close to the power supplies, one of the two differential stages is switched off internally. To maintain compatibility with other operational amplifiers, this switching point has been selected to be about 1.5V below the positive supply voltage. Since offset voltage trimming on the ALD4706A/ ALD4706B/ALD4706 is made when the input voltage is symmetrical to the supply voltages, this internal switching does not affect a large variety of applications such as an inverting amplifier or non-inverting amplifier with a gain larger than 2.5 (5V operation), where the common mode voltage does not make excursions above this switching point. The user should however, be aware that this switching does take place if the operational amplifier is connected as a unity gain buffer and should make provision in his design to allow for input offset voltage variations. 3. The input bias and offset currents are essentially input protection diode reverse bias leakage currents, and are typically less than 0.1pA at room temperature. This low input bias current assures that the analog signal from the source will not be distorted by input bias currents. Normally, this extremely high input impedance of greater than 1013Ω would not be a problem as the source impedance would limit the node impedance. However, for applications where source impedance is very high, it may be necessary to limit noise and hum pickup through proper shielding. 4. The output stage consists of class AB complementary output drivers, capable of driving a low resistance load. The output voltage swing is limited by the drain to source on-resistance of the output transistors as determined by the bias circuitry, and the value of the load resistor. When connected in the voltage follower configuration, the oscillation resistant feature, combined with the rail to rail input and output feature, makes an effective analog signal buffer for medium to high source impedance sensors, transducers, and other circuit networks. 5. The ALD4706A/ALD4706B/ALD4706 operational amplifier has been designed to provide full static discharge protection. Internally, the design has been carefully implemented to minimize latch up. However, care must be exercised when handling the device to avoid strong static fields that may degrade a diode junction, causing increased input leakage currents. In using the operational amplifier, the user is advised to power up the circuit before, or simultaneously with, any input voltages applied and to limit input voltages to not exceed 0.3V of the power supply voltage levels. 6. The ALD4706A/ALD4706B/ALD4706, with its ultra micropower operation, offers numerous benefits in reduced power supply requirements, less noise coupling and current spikes, less thermally induced drift, better overall reliability due to lower self heating, and lower input bias current. It requires practically no warm up time as the chip junction heats up to only 0.1°C above ambient temperature under most operating conditions. TYPICAL PERFORMANCE CHARACTERISTICS COMMON MODE INPUT VOLTAGE RANGE AS A FUNCTION OF SUPPLY VOLTAGE ±7 INPUTS GROUNDED OUTPUT UNLOADED +25°C 320 COMMON MODE INPUT VOLTAGE RANGE (V) SUPPLY CURRENT (µA) SUPPLY CURRENT AS A FUNCTION OF SUPPLY VOLTAGE -25°C TA = -55°C 240 160 80 0 ±1 ±4 ±3 ±2 ±1 0 ±2 ±3 ±4 SUPPLY VOLTAGE (V) ±5 0 ±6 ±3 ±4 ±5 ±6 ±7 10000 100 10 VS = ±2.5V TA = 25°C INPUT BIAS CURRENT (pA) OPEN LOOP VOLTAGE GAIN (V/mV) ±2 INPUT BIAS CURRENT AS A FUNCTION OF AMBIENT TEMPERATURE 1000 VS = ±2.5V 1000 100 10 1.0 0.1 100K 1M 10M LOAD RESISTANCE (Ω) ALD4706A/ALD4706B ALD4706 ±1 SUPPLY VOLTAGE (V) OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF LOAD RESISTANCE 1 10K TA = 25°C ±5 +125°C +70°C 0 ±6 -50 -25 0 25 50 75 100 125 AMBIENT TEMPERATURE (°C) Advanced Linear Devices 4 of 9 TYPICAL PERFORMANCE CHARACTERISTICS (cont'd) OUTPUT VOLTAGE SWING AS A FUNCTION OF SUPPLY VOLTAGE OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF SUPPLY VOLTAGE AND TEMPERATURE OUTPUT VOLTAGE SWING (V) OPEN LOOP VOLTAGE GAIN (V/mV) 1000 100 10 -55°C ≤ TA ≤ +125°C RL = 100KΩ ±6 -55°C ≤ TA ≤ +125°C RL = 100KΩ ±5 ±4 ±3 ±2 ±1 1 0 ±2 ±4 ±6 0 ±8 ±1 ±2 ±4 ±5 ±6 ±7 OPEN LOOP VOLTAGE GAIN AS A FUNCTION OF FREQUENCY 120 +5 +4 OPEN LOOP VOLTAGE GAIN (dB) VS = ±2.5V +3 +2 +1 0 -1 -2 -3 -4 VS = ±2.5V TA = 25°C 100 80 60 0 40 45 20 90 0 135 180 -20 -5 -50 -25 0 +25 +50 +75 +100 +125 1 10 AMBIENT TEMPERATURE (°C) INPUT OFFSET VOLTAGE AS A FUNCTION OF COMMON MODE INPUT VOLTAGE 100 1K 10K 100K FREQUENCY (Hz) 1M PHASE SHIFT IN DEGREES INPUT OFFSET VOLTAGE (mV) INPUT OFFSET VOLTAGE AS A FUNCTION OF AMBIENT TEMPERATURE REPRESENTATIVE UNITS INPUT OFFSET VOLTAGE (mV) ±3 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) 10M LARGE - SIGNAL TRANSIENT RESPONSE 15 VS = ±2.5V TA = 25°C 10 2V/div VS = ±1.0V TA = 25°C RL = 100KΩ CL= 25pF 500mV/div 10µs/div 5 0 -5 -10 -15 -2 -1 0 +1 +2 +3 COMMON MODE INPUT VOLTAGE (V) LARGE - SIGNAL TRANSIENT RESPONSE 5V/div 2V/div ALD4706A/ALD4706B ALD4706 SMALL - SIGNAL TRANSIENT RESPONSE VS = ±2.5V TA = 25°C RL = 100KΩ CL= 25pF 100mV/div 10µs/div 50mV/div Advanced Linear Devices VS = ±2.5V TA = 25°C RL = 100KΩ CL= 25pF 10µs/div 5 of 9 TYPICAL APPLICATIONS V TO I AMPLIFIER RAIL-TO-RAIL VOLTAGE FOLLOWER/BUFFER V+ RLOAD = 220Ω 0V ≤ VIN ≤ 4V -18mA ≤ ILOAD ≤ 0 - G 20K D G S + VIN 5V RIN ~= 1013Ω 0.1µF V+ = 5V - D S ALD1101 VOUT 1/4 ALD4706 2K + VIN SUB 1/4 ALD4706 0≤ VIN ≤ 5V RS = 20Ω a) RLOAD connected to V+ PHOTO DETECTOR CURRENT TO VOLTAGE CONVERTER RLOAD = 560Ω V+ V+ = 5V - G 2K G S + 20K D RF = 5M D S ALD1102 I SUB VIN V+ 1/4 ALD4706 1V ≤ V+ ≤ 12V RAIL-TO-RAIL WINDOW COMPARATOR +5V 20K 20K VREF (HIGH) 3 100K 800Ω - 1K 2 RL 20K + 220Ω RL = 10K -2.5V b) RLOAD connected to GND TWO STAGE HIGH GAIN AMPLIFIER V+ VOUT = 1 X RF + RS = 50Ω V+ -4V ≤ VIN ≤ V+ 0 ≤ ILOAD ≤ 7mA +2.5V - PHOTODIODE 1/4 ALD4706 + 1/4 ALD4706 1 1/4 74 C00 VOUT VIN CL 1nF 8 + 5 + 7 1/4 ALD4706 1/4 ALD 4706 VREF (LOW) 6 100K - VIN 4 1/4 ALD4706 1.4µF 225Ω NOTES: 1) GAIN = 20 First Stage 2) GAIN = 25 Second Stage 3) 500Hz ≤ Operating Frequency ≤ 10KHz VOUT (LOW) for VREF (LOW) < VIN < VREF (HIGH) HIGH INPUT IMPEDANCE RAIL-TO-RAIL PRECISION DC SUMMING AMPLIFIER V+ = +2.5V V1 0.1µF 10M + 1/4 ALD4706 V2 10M 10M 10M VOUT - 0.1µF V3 V4 10M V- ≤ VOUT ≤ V+ V- = - 2.5V VOUT = V1 + V2 - V3 - V4 V- ≤ VIN ≤ V+ 10M RIN = 10MΩ Accuracy limited by resistor tolerances and input offset voltage ALD4706A/ALD4706B ALD4706 Advanced Linear Devices 6 of 9 SOIC-14 PACKAGE DRAWING 14 Pin Plastic SOIC Package Millimeters E S (45°) Dim A Min 1.35 Max 1.75 Min 0.053 Max 0.069 A1 0.10 0.25 0.004 0.010 b 0.35 0.45 0.014 0.018 C 0.18 0.25 0.007 0.010 D-14 8.55 8.75 0.336 0.345 E 3.50 4.05 0.140 0.160 1.27 BSC e D A Inches 0.050 BSC H 5.70 6.30 0.224 0.248 L 0.60 0.937 0.024 0.037 ø 0° 8° 0° 8° S 0.25 0.50 0.010 0.020 A1 e b S (45°) H L ALD4706A/ALD4706B ALD4706 C ø Advanced Linear Devices 7 of 9 PDIP-14 PACKAGE DRAWING 14 Pin Plastic DIP Package Millimeters E E1 D S A2 A1 A L Inches Dim A Min Max Min 3.81 5.08 0.105 Max 0.200 A1 0.38 1.27 0.015 0.050 A2 1.27 2.03 0.050 0.080 b 0.89 1.65 0.035 0.065 b1 0.38 0.51 0.015 0.020 c 0.20 0.30 0.008 0.012 D-14 17.27 19.30 0.680 0.760 E 5.59 7.11 0.220 0.280 E1 7.62 8.26 0.300 0.325 e 2.29 2.79 0.090 0.110 e1 7.37 7.87 0.290 0.310 L 2.79 3.81 0.110 0.150 S-14 1.02 2.03 0.040 0.080 ø 0° 15° 0° 15° e b b1 c e1 ALD4706A/ALD4706B ALD4706 ø Advanced Linear Devices 8 of 9 CERDIP-14 PACKAGE DRAWING 14 Pin CERDIP Package Millimeters E E1 D A1 s A L L1 L2 b b1 e Inches Dim A Min Max Min 3.55 5.08 0.140 Max 0.200 A1 1.27 2.16 0.050 0.085 b 0.97 1.65 0.038 0.065 b1 0.36 0.58 0.014 0.023 C 0.20 0.38 0.008 0.015 D-14 -- 19.94 -- 0.785 E 5.59 7.87 0.220 0.310 E1 7.73 8.26 0.290 0.325 e 2.54 BSC 0.100 BSC e1 7.62 BSC 0.300 BSC L 3.81 5.08 0.150 0.200 L1 3.18 -- 0.125 -- L2 0.38 1.78 0.015 0.070 S -- 2.49 -- 0.098 Ø 0° 15° 0° 15° C e1 ALD4706A/ALD4706B ALD4706 ø Advanced Linear Devices 9 of 9