A1321_06

A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor for High-Temperature Operation Features and Benefits ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ Temperature-stable quiescent output voltage Precise recoverability after temperature cycling Output voltage proportional to magnetic flux density Ratiometric rail-to-rail output Improved sensitivity 4.5 to 5.5 V operation Immunity to mechanical stress Solid-state reliability Robust EMC protection Description The A132X family of linear Hall-effect sensors are optimized, sensitive, and temperature-stable. These ratiometric Hall-effect sensors provide a voltage output that is proportional to the applied magnetic field. The A132X family has a quiescent output voltage that is 50% of the supply voltage and output sensitivity options of 2.5mV/G, 3.125mV/G, and 5mV/G. The features of this family of devices are ideal for use in the harsh environments found in automotive and industrial linear and rotary position sensing systems. Each device has a BiCMOS monolithic circuit which integrates a Hall element, improved temperature-compensating circuitry to reduce the intrinsic sensitivity drift of the Hall element, a small-signal high-gain amplifier, and a rail-to-rail lowimpedance output stage. Packages: 3 pin SOT23W (suffix LH), and 3 pin SIP (suffix UA) A proprietary dynamic offset cancellation technique, with an internal high-frequency clock, reduces the residual offset voltage normally caused by device overmolding, temperature dependencies, and thermal stress. The high frequency clock allows for a greater sampling rate, which results in higher accuracy and faster signal processing capability. This technique produces devices that have an extremely stable quiescent output voltage, are immune to mechanical stress, and have precise Continued on the next page… Not to scale Functional Block Diagram V+ VCC Dynamic Offset Cancellation Filter Amp Out VOUT Gain 0.1 μF Offset Trim Control GND A1321-DS, Rev. 8 A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor for High-Temperature Operation The A132X family is provided in a 3-pin single in-line package (UA) and a 3-pin surface mount package (LH). Each package is available in a lead (Pb) free version (suffix, –T) , with a 100% matte tin plated leadframe. Description (continued) recoverability after temperature cycling. Having the Hall element and an amplifier on a single chip minimizes many problems normally associated with low-level analog signals. Output precision is obtained by internal gain and offset trim adjustments made at end-of-line during the manufacturing process. Selection Guide Part Number A1321ELHLT-T A1321EUA-T A1321LLHLT-T A1321LUA-T A1322ELHLT-T A1322EUA-T A1322LLHLT-T A1322LUA-T A1323ELHLT-T A1323EUA-T A1323LLHLT-T A1323LUA-T 1Pb-based Pb-free1 Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Packing2 7-in. reel, 3000 pieces/reel Bulk, 500 pieces/bag 7-in. reel, 3000 pieces/reel Bulk, 500 pieces/bag 7-in. reel, 3000 pieces/reel Bulk, 500 pieces/bag 7-in. reel, 3000 pieces/reel Bulk, 500 pieces/bag 7-in. reel, 3000 pieces/reel Bulk, 500 pieces/bag 7-in. reel, 3000 pieces/reel Bulk, 500 pieces/bag Mounting Surface Mount SIP through hole Surface Mount SIP through hole Surface Mount SIP through hole Surface Mount SIP through hole Surface Mount SIP through hole Surface Mount SIP through hole Ambient, TA (ºC) –40 to 85 Sensitivity, Typ. (mV/G) 5.000 –40 to 150 –40 to 85 3.125 –40 to 150 –40 to 85 2.500 –40 to 150 variants are being phased out of the product line. a. Certain variants cited in this footnote are in production but have been determined to be LAST TIME BUY. This classification indicates that sale of this device is currently restricted to existing customer applications. The device should not be purchased for new design applications because obsolescence in the near future is probable. Samples are no longer available. Status change: October 31, 2006. Deadlilne for receipt of LAST TIME BUY ORDERS: April 27, 2007. These variants include: A1322ELHLT, A1322EUA, and A1323LLHLT. b. Certain variants cited in this footnote are in production but have been determined to be NOT FOR NEW DESIGN. This classification indicates that sale of this device is currently restricted to existing customer applications. The device should not be purchased for new design applications because obsolescence in the near future is probable. Samples are no longer available. Status change: May 1, 2006. These variants include: A1321ELHLT, A1321EUA, A1321LLHLT, A1321LUA, A1322LLHLT, A1322LUA, A1323ELHLT, A1323EUA, and A1323LUA. for additional packing options. 2Contact Allegro Absolute Maximum Ratings Characteristic Supply Voltage Output Voltage Reverse Supply Voltage Reverse Supply Voltage Output Sink Current Operating Ambient Temperature Maximum Junction Temperature Storage Temperature Symbol *Additional Notes current draw may be observed at voltages above the minimum supply Zener clamp voltage, VZ(min), due to the Zener diode turning on. Rating 8 8 –0.1 –0.1 10 Units V V V V mA ºC ºC ºC ºC VCC VOUT VRCC VRCC IOUT TA TJ(max) Tstg Range E Range L –40 to 85 –40 to 150 165 –65 to 170 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 2 A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor for High-Temperature Operation Typ.2 5.0 5.6 2.5 4.7 0.2 –1.5 8.3 30 150 – – – 1.5 – – Max. 5.5 8 2.575 – – – – – – 40 25 20 3 – 10 Units V mA V V V mA V kHz kHz mV mV mV Ω kΩ nF DEVICE CHARACTERISTICS1 over operating temperature (TA) range, unless otherwise noted Characteristic Symbol Test Conditions Min. Electrical Characteristics; VCC = 5 V, unless otherwise noted Supply Voltage Vcc(op) Operating; Tj < 165°C 4.5 Supply Current Icc B = 0, Iout = 0 – Quiescent Voltage Vout(q) B = 0, TA = 25ºC, Iout = 1 mA 2.425 Vout(H) B = +X, Iout = –1 mA – Output Voltage3 B = –X, Iout = 1 mA – Vout(L) 3 Output Source Current Limit Iout(LM) B = –X, Vout → 0 –1.0 Supply Zener Clamp Voltage VZ Icc = 11 mA = Icc(max) + 3 6 Output Bandwidth BW – Clock Frequency fC – Output Characteristics; over VCC range, unless otherwise noted A1321; Cbypass = 0.1 μF, no load – Noise, Peak-to-Peak4 VN A1322; Cbypass = 0.1 μF, no load – A1323; Cbypass = 0.1 μF, no load – Output Resistance Rout Iout ≤ ±1 mA – Output Load Resistance RL Iout ≤ ±1 mA, VOUT to GND 4.7 VOUT to GND – Output Load Capacitance CL 1 Negative 2 Typical current is defined as conventional current coming out of (sourced from) the specified device terminal. data is at TA = 25°C. They are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for individual units, within the specified maximum and minimum limits. 3 In these tests, the vector X is intended to represent positive and negative fields sufficient to swing the output driver between fully OFF and saturated (ON), respectively. It is NOT intended to indicate a range of linear operation. 4 Noise specification includes both digital and analog noise. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 3 A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor for High-Temperature Operation MAGNETIC CHARACTERISTICS1,2 over operating temperature range, TA; VCC = 5 V, Iout = –1 mA; unless otherwise noted Max Units4 Characteristics Symbol Test Condition Min Typ3 A1321; TA = 25ºC 4.750 5.000 5.250 mV/G 5 Sensitivity Sens 2.969 3.125 3.281 mV/G A1322; TA = 25ºC 2.375 2.500 2.625 mV/G A1323; TA = 25ºC Delta Vout(q) as a funcVout(q)(ΔT) Defined in terms of magnetic flux density, B – – ±10 G tion of temperature Vout(q)(ΔV) – – ±1.5 % Ratiometry, Vout(q) Ratiometry, Sens ΔSens(ΔV) – – ±1.5 % Positive Linearity Lin+ – – ±1.5 % Negative Linearity Lin– – – ±1.5 % Symmetry Sym – – ±1.5 % UA Package Delta Sens at TA = max5 ΔSens(TAmax) From hot to room temperature –2.5 – 7.5 % Delta Sens at TA = min5 ΔSens(TAmin) From cold to room temperature –6 – 4 % SensDrift TA = 25°C; after temperature cycling and over time – 1 2 % Sensitivity Drift6 LH Package Delta Sens at TA = max5 ΔSens(TAmax) From hot to room temperature –5 – 5 % Delta Sens at TA = min5 ΔSens(TAmin) From cold to room temperature –3.5 – 8.5 % Sensitivity Drift6 SensDrift TA = 25°C; after temperature cycling and over time – 0.328 2 % 1 Additional information on chracteristics is provided in the section Characteristics Definitions, on the next page. 2 Negative current is defined as conventional current coming out of (sourced from) the specified device terminal. 3 Typical data is at T = 25°C, except for ΔSens, and at x.x Sens. Typical data are for initial design estimations only, and assume optimum A manufacturing and application conditions. Performance may vary for individual units, within the specified maximum and minimum limits. In addition, the typical values vary with gain. 4 10 G = 1 millitesla. 5 After 150ºC pre-bake and factory programming. 6 Sensitivity drift is the amount of recovery with time. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 4 A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor for High-Temperature Operation Characteristic Definitions Ratiometric. The A132X family features a ratiometric output. The quiescent voltage output and sensitivity are proportional to the supply voltage (ratiometric). The percent ratiometric change in the quiescent voltage output is defined as: ΔVout(q)(ΔV) = Vout(q)(VCC) Vout(q)(5V) VCC 5 V × 100% Quiescent Voltage Output. In the quiescent state (no magnetic field), the output equals one half of the supply voltage over the operating voltage range and the operating temperature range. Due to internal component tolerances and thermal considerations, there is a tolerance on the quiescent voltage output both as a function of supply voltage and as a function of ambient temperature. For purposes of specification, the quiescent voltage output as a function of temperature is defined in terms of magnetic flux density, B, as: ΔVout(q)(ΔΤ) = Vout(q)(ΤΑ) – Vout(q)(25ºC) Sens(25ºC) (4) and the percent ratiometric change in sensitivity is defined as: ΔSens(ΔV) = Sens(VCC) Sens(5V) VCC 5 V × 100% (1) (5) This calculation yields the device’s equivalent accuracy, over the operating temperature range, in gauss (G). Sensitivity. The presence of a south-pole magnetic field perpendicular to the package face (the branded surface) increases the output voltage from its quiescent value toward the supply voltage rail by an amount proportional to the magnetic field applied. Conversely, the application of a north pole will decrease the output voltage from its quiescent value. This proportionality is specified as the sensitivity of the device and is defined as: Sens = Vout(–B) – Vout(+B) 2B Linearity and Symmetry. The on-chip output stage is designed to provide a linear output with a supply voltage of 5 V. Although application of very high magnetic fields will not damage these devices, it will force the output into a non-linear region. Linearity in percent is measured and defined as: Lin+ = Vout(+B) – Vout(q) 2(Vout(+B / 2) – Vout(q) ) Vout(–B) – Vout(q) 2(Vout(–B / 2) – Vout(q) ) × 100% (6) (2) Lin– = The stability of sensitivity as a function of temperature is defined as: ΔSens(ΔΤ) = Sens(ΤΑ) – Sens(25ºC) Sens(25ºC) × 100% × 100% (7) and output symmetry as: (3) Sym = Vout(+B) –Vout(q) Vout(q) – Vout(–B) × 100% (8) Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 5 A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor for High-Temperature Operation Typical Characteristics (30 pieces, 3 fabrication lots) Average Supply Current (ICC) vs Temperature Vcc = 5 V 8 7.5 7 6.5 6 5.5 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 ICC (mA) 115 125 TA (°C) 105 104 103 102 Average Positive Linearity (Lin+) vs Temperature Vcc = 5 V 105 104 103 102 Average Negative Linearity (Lin–) vs Temperature Vcc = 5 V Lin+ (%) 100 99 98 97 96 95 Lin– (%) 101 101 100 99 98 97 96 115 125 150 25 -40 -20 85 0 95 -40 -20 0 150 25 -40 -20 85 0 25 85 115 125 TA (°C) TA (°C) Average Ratiometry, VOUT(q)(ΔV) vs Temperature 101 100.8 100.6 100.4 4.5 to 5.0 V 5.5 to 5.0 V Average Ratiometry, ΔSens(ΔV), vs Temperature 101 100.8 100.6 100.4 4.5 to 5.0V 5.5 to 5.0V Ratiometry (%) Ratiometry (%) 100.2 100 99.8 99.6 99.4 99.2 99 100.2 100 99.8 99.6 99.4 99.2 99 115 125 150 115 125 TA (°C) TA (°C) Continued on the next page... Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 150 -40 -20 25 85 0 25 -40 -20 85 0 150 6 A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor for High-Temperature Operation Typical Characteristics, continued (30 pieces, 3 fabrication lots) Average Absolute Quiescent Output Voltage, Vout(q), vs Temperature 2.575 2.55 Vout(q) (V) Vcc = 5 V 3 2.9 2.8 Vout(q) (V) Quiescent Output Voltage, Vout(q), vs Vcc TA = 25°C 2.525 2.5 2.475 2.45 2.425 2.7 2.6 2.5 2.4 2.3 2.2 2.1 1321 1322 1323 -40 -20 25 85 115 125 150 2 4.5 5 Vcc (V) 5.5 0 TA (°C) 6 5.5 5 Average Absolute Sensitivity, Sens, vs Temperature Vcc = 5 V 6 5.5 5 4.5 A1322 A1321 A1323 Average Sensitivity, Sens, vs Vcc TA = 25°C Sens (mV/G) 4.5 4 3.5 3 2.5 2 Sens (mV/G) 4 3.5 3 2.5 2 1.5 1321 1322 1323 -40 -20 25 85 115 125 150 0 1 4.5 5 Vcc (V) 5.5 TA (°C) 10 8 6 Vout(q)(ΔT) (G) Average Delta Quiescent Output Voltage, Vout(q)(ΔT), vs Temperature Δ in readings at each temperature are relative to 25°C Vcc = 5 V 10 8 6 4 ΔSens (%) 2 0 -2 -4 -6 -8 -10 Average Delta Sensitivity, ΔSens, vs Temperature Δ in readings at each temperature are relative to 25°C Vcc = 5 V 4 2 0 -2 -4 -6 -8 -10 -40 -20 25 85 115 125 150 0 -40 -20 25 85 115 125 TA (°C) TA (°C) 150 0 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 7 A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor for High-Temperature Operation Symbol Test Conditions* Package LH, 1-layer PCB with copper limited to solder pads Package LH, 2-layer PCB with 0.463 in.2 of copper area each side connected by thermal vias Package UA, 1-layer PCB with copper limited to solder pads Value Units 228 110 165 ºC/W ºC/W ºC/W THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information Characteristic Package Thermal Resistance RθJA *Additional thermal information available on Allegro website. Power Derating Curve 6 VCC(max) Maximum Allowable VCC (V) 5 1-layer PCB, Package LH (R JA = 228 ºC/W) 1-layer PCB, Package UA (R JA = 165 ºC/W) 2-layer PCB, Package LH (R JA = 110 ºC/W) VCC(min) 4 3 2 1 0 20 40 60 80 100 120 140 160 180 Temperature (ºC) Power Dissipation versus Ambient Temperature 1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 20 Power Dissipation, PD (mW) 2l (R aye rP JA = 1 CB 10 , Pa 1-la ºC ck yer /W ag (R eL PC ) B, P JA = H 165 ack ºC/ age W) UA 1-lay er P (R CB, P JA = 2 28 º ackage C/W LH ) 40 60 80 100 120 Temperature (°C) 140 160 180 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 8 A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor for High-Temperature Operation Power Derating The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro MicroSystems Web site.) The Package Thermal Resistance, RθJA, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, RθJC, is relatively small component of RθJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD. PD = VIN × IIN ΔT = PD × RθJA (2) TJ = TA + ΔT (3) (1) Example: Reliability for VCC at TA = 150°C, package UA, using minimum-K PCB. Observe the worst-case ratings for the device, specifically: RθJA = 165°C/W, TJ(max) = 165°C, VCC(max) = 5.5 V, and ICC(max) = 8 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: ΔTmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = ΔTmax ÷ RθJA = 15°C ÷ 165 °C/W = 91 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) ÷ ICC(max) = 91 mW ÷ 8 mA = 11.4 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤VCC(est). Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions. For example, given common conditions such as: TA= 25°C, VCC = 12 V, ICC = 4 mA, and RθJA = 140 °C/W, then: PD = VCC × ICC = 12 V × 4 mA = 48 mW ΔT = PD × RθJA = 48 mW × 140 °C/W = 7°C TJ = TA + ΔT = 25°C + 7°C = 32°C A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding TJ(max), at a selected RθJA and TA. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 9 A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor for High-Temperature Operation Package LH, 3-Pin; (SOT-23W) 3.00 .118 2.70 .106 0.15 [.006] M C A B 3.04 .120 2.80 .110 A A 1.49 .059 NOM 8º 0º 0.20 .008 0.08 .003 3 B B 2.10 .083 1.85 .073 Preliminary dimensions, for reference only Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only (reference JEDEC TO-236 AB, except case width and terminal tip-to-tip) Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Hall element (not to scale) B Active Area Depth 0.28 [.011] 3X 0.10 [.004] C 3X 0.50 .020 0.30 .012 0.20 [.008] M C A B 0.95 .037 1.90 .075 A 0.96 .038 A NOM 0.60 .024 0.25 .010 1 2 0.25 .010 SEATING PLANE 1.17 .046 0.75 .030 0.15 .006 0.00 .000 C SEATING PLANE GAUGE PLANE Pin-out Drawings Package LH 3 Package UA 1 2 1 2 3 Terminal List Symbol VCC VOUT GND Number Package LH Package UA 1 1 2 3 3 2 Description Connects power supply to chip Output from circuit Ground Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 10 A1321, A1322, and A1323 Ratiometric Linear Hall Effect Sensor for High-Temperature Operation Package UA, 3-Pin SIP .164 4.17 .159 4.04 C D .0805 2.04 NOM .0565 1.44 NOM D .062 1.57 .058 1.47 D .122 3.10 .117 2.97 B .085 2.16 MAX .031 0.79 REF A .640 16.26 .600 15.24 .017 0.44 .014 0.35 1 2 3 .019 0.48 .014 0.36 .050 1.27 NOM Dimensions in inches Metric dimensions (mm) in brackets, for reference only A Dambar removal protrusion (6X) B Ejector mark on opposite side C Active Area Depth .0195 [0.50] NOM D Hall element (not to scale) The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. Copyright © 2004, 2006, Allegro MicroSystems, Inc. Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com 11