AM79574-1JC

Am79574 Subscriber Line Interface Circuit DISTINCTIVE CHARACTERISTICS s Programmable constant resistance feed s Line-feed characteristics independent of battery variations s Programmable loop-detect threshold s On-chip switching regulator for low-power dissipation s Pin for external ground-key noise filter capacitor available s Ground-key detect option available s Two-wire impedance set by single external impedance s Polarity reversal feature s Tip Open state for ground-start lines s Test relay driver optional s On-hook transmission BLOCK DIAGRAM (TIP) A Ring Relay Driver Test Relay Driver RINGOUT TESTOUT C1 C2 C3 C4 E1 E0 DET GKFIL VTX RSN HPA Ground-Key Detector Input Decoder and Control Two-Wire Interface HPB Signal Transmission B(RING) Power-Feed Controller DA DB VREG L VBAT BGND Off-Hook Detector RD RDC Ring-Trip Detector Switching Regulator CHS QBAT CHCLK VCC VEE AGND 16855C-001 Notes: 1. Am79574—E0 and E1 inputs; ring and test relay drivers sourced internally to BGND. 2. Output amplifier current gain (K1) = 1000. Publication# 16855 Rev: E Amendment: /0 Issue Date: October 1999 ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below. Am79574 J C TEMPERATURE RANGE C = Commercial (0°C to 70°C)* PACKAGE TYPE J = 32-Pin Plastic Leaded Chip Carrier (PL 032) PERFORMANCE GRADE Blank = Standard Specification –1 = Performance Grading –2 = Performance Grading DEVICE NAME/DESCRIPTION Am79574 Subscriber Line Interface Circuit Valid Combinations Am79574 –1 –2 JC Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations, to check on newly released combinations, and to obtain additional data on AMD’s standard military grade products. Note: * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterization and periodic sampling of production units. 2 Am79574 Data Sheet CONNECTION DIAGRAM Top View RINGOUT BGND B(RING) A(TIP) VCC VREG 4 TP TESTOUT L VBAT QBAT CHS CHCLK C4 E1 5 6 7 8 9 10 11 12 13 14 E0 3 2 1 32 31 30 29 28 27 26 25 24 23 22 21 TP DA RD HPB HPA VTX VEE RSN AGND 15 16 DET C2 17 C3 18 19 20 RDC DGND C1 Notes: 1. Pin 1 is marked for orientation. 2. TP is a thermal conduction pin tied to substrate (QBAT). SLIC Products DB 3 PIN DESCRIPTIONS Pin Names AGND A(TIP) BGND B(RING) C3–C1 C4 CHCLK CHS DA DB DET DGND E0 E1 HPA HPB L Type Gnd Output Gnd Output Input Input Input Input Input Input Output Gnd Input Input Analog (quiet) ground Output of A(TIP) power amplifier Battery (power) ground Output of B(RING) power amplifier Decoder. TTL compatible. C3 is MSB and C1 is LSB. Test relay driver command. TTL compatible. Logic Low enables the driver. Chopper clock. Input to switching regulator (TTL compatible). Freq = 256 kHz (Nominal). Chopper stabilization. Connection for external stabilization components. Ring-trip negative. Negative input to ring-trip comparator. Ring-trip positive. Positive input to ring-trip comparator. Detector. Logic Low indicates that the selected detector is tripped. Logic inputs C3–C1, E1, and E0 select the detector. Open-collector with a built-in 15 kΩ pull-up resistor. Digital ground A logic High enables DET. A logic Low disables DET. E1 = High connects the ground-key detector to DET, and E1 = Low connects the off-hook or ring-trip detector to DET. Description Capacitor High-pass filter capacitor. A(TIP) side of high-pass filter capacitor. Capacitor High-pass filter capacitor. B(RING) side of high-pass filter capacitor. Output Switching Regulator Power Transistor. Connection point for filter inductor and anode of catch diode. Has up to 60 V of pulse waveform on it and must be isolated from sensitive circuits. Keep the diode connections short because of the high currents and high di/dt. Filtered battery supply for the signal processing circuits. Detector resistor. Threshold modification and filter point for the off-hook detector. DC feed resistor. Connection point for the DC feed current programming network, which also connects to the Receiver Summing Node (RSN). VRDC is negative for normal polarity and positive for reverse polarity. Ring relay driver. Sourcing from BGND with internal diode to QBAT. The metallic current (AC and DC) between A(TIP) and B(RING) = 1000 x the current into this pin. The networks that program receive gain, two-wire impedance, and feed resistance all connect to this node. This node is extremely sensitive. Route the 256 kHz chopper clock and switch lines away from the RSN node. Test relay driver. Source from BGND with internal diode to QBAT. Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to an area of copper on the board to enhance heat dissipation. Battery supply. Connected through an external protection diode. +5 V power supply. –5 V power supply. Regulated voltage. Provides negative power supply for power amplifiers, connection point for inductor, filter capacitor, and chopper stabilization. Transmit Audio. Unity gain version of the A(TIP) and B(RING) metallic voltage. VTX also sources the two-wire input impedance programming network. QBAT RD RDC Battery Resistor Resistor RINGOUT RSN Output Input TESTOUT TP Output Thermal VBAT VCC VEE VREG VTX Battery Power Power Input Output 4 Am79574 Data Sheet ABSOLUTE MAXIMUM RATINGS Storage temperature ......................... –55°C to +150°C VCC with respect to AGND/DGND...... –0.4 V to +7.0 V VEE with respect to AGND/DGND ...... +0.4 V to –7.0 V VBAT with respect to AGND/DGND ..... +0.4 V to –70 V Note: Rise time of VBAT (dv/dt) must be limited to 27 V/µs or less when QBAT bypass = 0.33 µF. OPERATING RANGES Commercial (C) Devices Ambient temperature ............................. 0°C to +70°C* VCC ..................................................... 4.75 V to 5.25 V VEE .................................................. –4.75 V to –5.25 V VBAT ...................................................... –40 V to –58 V AGND/DGND.......................................................... 0 V BGND with respect to AGND/DGND ........................ –100 mV to +100 mV Load Resistance on VTX to ground............. 10 kΩ min Operating Ranges define those limits between which the functionality of the device is guaranteed. * Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guaranteed by characterization and periodic sampling of production units. BGND with respect to AGND/DGND.. +1.0 V to –3.0 V A(TIP) or B(RING) to BGND: Continuous..................................... –70 V to +1.0 V 10 ms (f = 0.1 Hz) .......................... –70 V to +5.0 V 1 µs (f = 0.1 Hz) .............................. –90 V to +10 V 250 ns (f = 0.1 Hz) ........................ –120 V to +15 V Current from A(TIP) or B(RING) ....................... ±150 mA Voltage on RINGOUT ........BGND to 70 V above QBAT Voltage on TESTOUT ........BGND to 70 V above QBAT Current through relay drivers .............................60 mA Voltage on ring-trip inputs (DA and DB) ......................................... VBAT to 0 V Current into ring-trip inputs.................................. ±10 mA Peak current into regulator Switch (L pin) ..............................................150 mA Switcher transient peak off Voltage on L pin ............................................+1.0 V C4–C1, E1, CHCLK to AGND/DGND ....................... –0.4 V to VCC + 0.4 V Maximum power dissipation, (see note) ...... TA = 70°C In 32-pin PLCC package..............................1.74 W Note: Thermal limiting circuitry on-chip will shut down the circuit at a junction temperature of about 165°C. The device should never be exposed to this temperature. Operation above 145 ° C junction temperature may degrade device reliability. See the SLIC Packaging Considerations for more information. Stresses above those listed under Absolute Maximum Ratings may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. SLIC Products 5 ELECTRICAL CHARACTERISTICS Description Analog (VTX ) output impedance Analog (VTX) output offset 0°C to 70°C –1* –40°C to +85°C –1 Analog (RSN) input impedance Longitudinal impedance at A or B Overload level Z2WIN = 600 to 900 Ω 2-wire return loss (See Test Circuit D) 300 Hz to 3.4 kHz 4-wire 2-wire 300 Hz to 500 Hz 500 Hz to 2.5 kHz 2500 Hz to 3.4 kHz 300 Hz to 3.4 kHz 300 Hz to 3.4 kHz 200 Hz to 1 kHz normal polarity 0°C to +70°C normal polarity –40°C to +85°C reverse polarity 1 kHz to 3.4 kHz normal polarity 0°C to +70°C normal polarity –40°C to +85°C reverse polarity Longitudinal signal generation 4-L Longitudinal current capability per wire Gain accuracy 300 Hz to 800 Hz 300 Hz to 800 Hz Active state OHT state 0 dBm, 1 kHz, 0 dBm, 1 kHz, 0 dBm, 1 kHz, 0 dBm, 1 kHz, 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C –0.15 –0.20 –0.1 –0.15 –3.1 –35 –30 –40 –35 1 Test Conditions (See Note 1) Min Typ 3 +35 +30 mV +40 +35 20 35 +3.1 Ω Vpk Max Unit Ω Note 4 — — — 4 4 4 2 Transmission Performance, 2-Wire Impedance 26 26 20 48 52 63 58 54 58 54 54 40 42 25 18 +0.15 +0.20 +0.1 +0.15 dB –0.1 –0.15 –0.1 –0.15 +0.1 +0.15 +0.1 +0.15 — 4 — 4 mArms 4 — 4 — — 4 — dB 4, 11 Longitudinal Balance (2-Wire and 4-Wire, See Test Circuit C) RL = 600 Ω Longitudinal to metallic L-T, L-4 Longitudinal to metallic L-T, L-4 –1* –2* –2 –2 –2* –2 –2 –1* dB Insertion Loss (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B) — 4 — 4 –1* –1 Variation with frequency 300 Hz to 3.4 kHz Relative to 1 kHz 0°C to +70°C –40°C to +85°C +7 dBm to –55 dBm 0°C to +70°C –40°C to +85°C Gain tracking Notes: * P.G. = Performance Grade –2 grade performance parameters are equivalent to –1 performance parameters except where indicated. 6 Am79574 Data Sheet ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min –0.15 –0.20 –0.1 –0.15 Typ Max +0.15 +0.20 +0.1 +0.15 dB –0.1 –0.15 –0.1 –0.15 5.3 –64 –55 +7 +7 +7 +7 +7 +7 –83 –83 –83 –83 –83 –83 –50 –40 +15 +12 +15 +15 +12 +15 –75 –78 –75 –75 –78 –75 +0.1 +0.15 +0.1 +0.15 — 4 — 4 Unit Note — 4 — 4 Balance Return Signal (4- to 4-Wire, See Test Circuit B) Gain accuracy 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C 0 dBm, 1 kHz, 0°C to +70°C 0 dBm, 1 kHz, –40°C to +85°C Variation with frequency 300 Hz to 3.4 kHz Relative to 1 kHz 0°C to +70°C –40°C to +85°C +7 dBm to –55 dBm 0°C to +70°C –40°C to +85°C f = 1 kHz 0 dBm, 300 Hz to 3.4 kHz +9 dBm, 300 Hz to 3.4 kHz 2-wire, 2-wire, 2-wire, 4-wire, 4-wire, 4-wire, Psophometric weighted noise 2-wire, 2-wire, 2-wire, 4-wire, 4-wire, 4-wire, 0°C to +70°C 0°C to +70°C –40°C to +85°C 0°C to +70°C 0°C to +70°C –40°C to +85°C 0°C to +70°C 0°C to +70°C –40°C to +85°C 0°C to +70°C 0°C to +70°C –40°C to +85°C –1* –1 Gain tracking Group delay Total harmonic distortion Idle Channel Noise C-message weighted noise µs dB 4 Total Harmonic Distortion (2- to 4-Wire or 4- to 2-Wire, See Test Circuits A and B) –1* dBrnc — — 4 — — 4 7 — 4, 7 7 — 4, 7 4, 5, 9 4, 5, 9 4, 5 4, 5, 9 4, 5, 9 4, 5 –1* –1* dBmp –1* Single Frequency Out-of-Band Noise (See Test Circuit E) Metallic 4 kHz to 9 kHz –76 9 kHz to 1 MHz –76 256 kHz and harmonics –57 Longitudinal 1 kHz to 15 kHz –70 Above 15 kHz –85 256 kHz and harmonics –57 Line Characteristics (See Figure 1) BAT = –48 V, RL = 600 Ω and 900 Ω, RFEED = 800 Ω Apparent battery voltage Loop current accuracy Loop current—Tip Open Loop current—Open Circuit Loop current limit accuracy Fault current limit, ILLIM (IAX + IBX) Active state Active state RL = 600 Ω RL = 0 Ω OHT state Active state A and B shorted to GND –20 47 –7.5 50 53 +7.5 1.0 1.0 +20 130 dBm V % mA % mA 10 SLIC Products 7 ELECTRICAL CHARACTERISTICS (continued) Description Test Conditions (See Note 1) Min Typ 35 35 135 135 200 200 500 650 3.0 6.0 8.0 1.0 2.3 3.0 0.4 3.2 4.5 25 30 22 25 20 25 10 10 27 30 20 25 –20 2.0 5.0 9 9 –5 –50 –0.05 0 45 45 35 40 40 40 25 25 45 45 40 40 +20 10.0 dB 6, 7 Max 120 80 250 200 400 300 750 1000 4.5 10.0 13.0 2.3 3.7 6.0 1.0 5.5 7.0 mA mW Unit Note Power Dissipation, BAT = –48 V, Normal Polarity On-hook Open Circuit state –1* On-hook OHT state –1* On-hook Active state –1* Off-hook OHT state Off-hook Active state Supply Currents VCC on-hook supply current Open Circuit state OHT state Active state Open Circuit state OHT state Active state Open Circuit state OHT state Active state 50 Hz to 3.4 kHz –1* 3.4 kHz to 50 kHz –1* VEE 50 Hz to 3.4 kHz –1* 3.4 kHz to 50 kHz –1* VBAT 50 Hz to 3.4 kHz –1* 3.4 kHz to 50 kHz –1* Off-Hook Detector Current threshold accuracy Ground-key resistance threshold Ground-key current threshold Ring-Trip Detector Input Bias current Offset voltage Source resistance 0 Ω to 2 MΩ +50 µA mV 12 IDET = 365/RD Nominal B(RING) to GND B(RING) to GND Midpoint to GND RL = 600 Ω RL = 600 Ω VEE on-hook supply current VBAT on-hook supply current Power Supply Rejection Ratio (VRIPPLE = 50 mVrms) VCC % kΩ mA 8 Ground-Key Detector Thresholds, Active State, BAT = –48 V (See Test Circuit F) Logic Inputs (C4–C1, E0, E1, and CHCLK) Input High voltage Input Low voltage Input High current Input High current Input Low current All inputs except E1 Input E1 2.0 –75 –75 –0.4 0.8 40 45 V µA mA 8 Am79574 Data Sheet ELECTRICAL CHARACTERISTICS (continued) Description Logic Output (DET) Output Low voltage Output High voltage Test Conditions (See Note 1) IOUT = 0.8 mA IOUT = –0.1 mA 2.4 BGND – 2 BGND –.95 0.5 50 mA sink QBAT –2 100 Min Typ Max 0.4 V Unit Note Relay Driver Outputs (RINGOUT, TESTOUT) On voltage 50 mA source Off leakage Clamp voltage V µA V RELAY DRIVER SCHEMATICS BGND BGND RINGOUT TESTOUT QBAT QBAT SWITCHING CHARACTERISTICS Symbol Parameter Test Conditions Temperature Range 0°C to +70°C –40°C to +85°C Ground-Key Detect state RL open, RG connected (See Figure H) 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C Switchhook Detect state RL = 600 Ω, RG open (See Figure G) 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C 0°C to +70°C –40°C to +85°C Min Typ Max Unit Note *tgkde E1 Low to DET High (E0 = 1) E1 Low to DET Low (E0 = 1) 3.8 4.0 1.1 1.6 1.1 1.6 3.8 4.0 1.2 1.7 3.8 4.0 1.1 1.6 3.8 4.0 tgkdd E0 High to DET Low (E1 = 0) tgkd0 E0 Low to DET High (E1 = 0) µs 4 *tshde E1 High to DET Low (E0 = 1) E1 High to DET High (E0 = 1) *tshdd E0 High to DET Low (E1 = 1) *tshd0 E0 Low to DET High (E1 = 1) Note: E1 is internally connected to a logical 0. SLIC Products 9 SWITCHING WAVEFORMS E1 to DET* E1* DET* tgkde tshde tgkde tshde E0 to DET E1* E0 DET tshdd Notes: * E1 is internally connected to a logical 0. 1. All delays measured at 1.4 V level. tshd0 tgkdd tgkd0 Notes: 1. Unless otherwise noted, test conditions are BAT = –48 V, VCC = +5 V, VEE = –5 V, RL = 600 Ω, CHP = 0.22 µF, RDC1 = RDC2 = 20 kΩ, CDC = 0.1 µF, Rd = 51.1 kΩ, no fuse resistors, two-wire AC output impedance, programming impedance (ZT) = 600 kΩ resistive, receive input summing impedance (ZRX) = 300 kΩ resistive. (See Table 2 for component formulas.) 2. Overload level is defined when THD = 1%. 3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire AC load impedance matches the impedance programmed by ZT. 4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests. 5. These tests are performed with a longitudinal impedance of 90 Ω and metallic impedance of 300 Ω for frequencies below 12 kHz and 135 Ω for frequencies greater than 12 kHz. These tests are extremely sensitive to circuit board layout. 6. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization. 7. When the SLIC is in the anti-sat 2 operating region, this parameter is degraded. The exact degradation depends on system design. The anti-sat 2 region occurs at high loop resistances when VBAT – VAX – VBX is less than 14 V. 8. Midpoint is defined as the connection point between two 300 Ω series resistors connected between A(TIP) and B(RING). 9. Fundamental and harmonics from 256 kHz switch-regulator chopper are not included. 10. Calculate loop-current limit using the following equations: In OHT state: V APPARENT I LIMIT = 0.5 -------------------------------------R FEED V APPARENT I LIMIT = 0.8 -------------------------------------R FEED In Active state: 10 Am79574 Data Sheet 11. Assumes the following ZT network: VTX 300 kΩ 30 pF 12. Tested with 0 Ω source impedance. 2 MΩ is specified for system design purposes only. 13. Group delay can be considerably reduced by using a ZT network such as that shown in Note 11 above. The network reduces the group delay to less than 2 µs. The effect of group delay on linecard performance may be compensated for by using QSLAC™ or DSLAC™ devices. 300 kΩ RSN Table 1. SLIC Decoding DET Output State C3 C2 C1 Two-Wire Status E0 = 1* E1 = 0 Ring trip Ring trip Loop detector Loop detector Loop detector Loop detector Loop detector Loop detector E0 = 1* E1 = 1 Ring trip Ring trip Ground key Ground key — — Ground key Ground key 0 1 2 3 4 5 6 7 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Open Circuit Ringing Active On-hook TX (OHT) Tip Open Reserved Active Polarity Reversal OHT Polarity Reversal Note: * A logic Low on E0 disables the DET output into the Open Collector state. Table 2. User-Programmable Components Z T = 1000 ( Z 2WIN – 2R F ) ZT is connected between the VTX and RSN pins. The fuse resistors are RF, and Z2WIN is the desired 2-wire AC input impedance. When computing ZT, the internal current amplifier pole and any external stray capacitance between VTX and RSN must be taken into account. ZRX is connected from VRX to the RSN pin, ZT is defined above, and G42L is the desired receive gain. RDC1, RDC2, and CDC form the network connected to the RDC pin. RDC1 and RDC2 are approximately equal. ZL 1000 • Z T Z RX = ---------- • ---------------------------------------------------G 42L Z T + 1000 ( Z L + 2R F ) R DC1 + R DC2 = 50 ( R FEED – 2R F ) R DC1 + R DC2 C DC = 1.5 ms • ------------------------------R DC1 • R DC2 365 R D = -------- , IT 0.5 ms C D = ----------------RD RD and CD form the network connected from RD to –5 V and IT is the threshold current between on hook and off hook. SLIC Products 11 DC FEED CHARACTERISTICS 4 3 5 2 6 1 7 VBAT = –47.3 V RDC = 40 kΩ Notes: 1. Constant-resistance feed region: Active state OHT state R DC V AB = 50 – I L  ---------   50  V AB = 31.8 V 2. Anti-sat –1 turn-on: 3. Anti-sat –2 turn-on: V AB = 1.077 V BAT – 12.538 = 0.377 V BAT + 20.48 , V BAT < 50.2 V V BAT ≥ 50.2 V 4. Open circuit voltage: AB V AB = 39.39 V 5. Anti-sat –1 region: R DC V AB = 39.39 – I L  ------------   118.3 AB 6. Anti-sat –2 region: R DC = 0.377 V BAT + 20.48 – I L  ---------   200  7. Current Limit: Active state, 2500 I L = 0.8  -----------  R DC  2500 I L = 0.5  -----------  R DC  OHT state, a. VA–VB (VAB) Voltage vs. Loop Current (Typical) 12 Am79574 Data Sheet DC FEED CHARACTERISTICS (continued) VBAT = –47.3 V RDC = 40 kΩ b. Loop Current vs. Load Resistance (Typical) A a RL IL SLIC b RSN RDC1 RDC2 B RDC CDC Feed resistance programmed by RDC1 and RDC2 c. Feed Programming Figure 1. DC Feed Characteristics SLIC Products 13 TEST CIRCUITS A(TIP) RL 2 VL RL 2 VAB SLIC VTX RT A(TIP) VTX SLIC VAB RL AGND RT AGND RRX RSN B(RING) RRX B(RING) RSN VRX IL2-4 = –20 log (VTX / VAB) A. Two- to Four-Wire Insertion Loss IL4-2 = –20 log (VAB / VRX) BRS = 20 log (VTX / VRX) B. Four- to Two-Wire Insertion Loss and Balance Return Signal 900 Ω 1/ωC