AS2533T

austriamicrosystems Multi-Standard CMOS Telephone IC for Basic Telephones AS2533-36 D ATA SHEET G eneral Description T he AS253x is a CMOS integrated circuit that contains all the functions needed to build a high performance electronic telephone set with basic features. T he AS253x incorporates a line interface, a speech circuit, a dialler and ringer. It is a real single-chip / single-die IC with 28 pins. It allows either package mounting or chip-onboard mounting. T he device is available in 4 versions (pin-compatible) with different features ranging from LNR only (last number redial) to 4 direct (one-touch) memories and 10 indirect (two-touch) memories. The sliding cursor procedure makes the LNR function easy to use under various PABX systems. T he versatility of the circuit is provided by pin options and a few external components. This allows fast time-to-market and easy adaptation to different PTT requirements. A unique EMI performance has been achieved due to the consequent use of CMOS amplifiers. - R x and Tx soft clipping to avoid harsh distortion R eal or complex impedance (EU compliant) S tabilized supply for dialler and peripherals A utomatic line loss compensation O perating range from 13 to 100 mA (down to 5 mA with reduced performance) U nique EMI performance (EU compliant) D ialler - L D/MF dialing and mixed-mode dialing 3 1 digit last number redial (LNR) 4 d irect/10 indirect (AS2533/36), 12 direct (AS2535) R epeat dialing by busy or engaged (not AS2535) C onfidence tone during memory programming and mute N otepad memory function P ause key for access pause or wait function 3 f lash timings, 100 ms, 280 ms and 375/600 ms S liding cursor protocol with comparison R inger - K ey Features L ine Interface and Speech Circuit - E lectronic Rx volume control E lectronic microphone mute M icrophone amplifier with symmetrical input R ing frequency discrimination 3 -tone melody generator R ing melody selection via keyboard R ing volume selection via keyboard V ersion available with fixed ring melody and ring volume P ackage - S OIC 28 or DIE Block Diagram F igure 1 Block Diagram R evision 8.8 Page 1 of 25 D ata Sheet AS2533-36 a ustria micro systems P in Description P in # 4 5 S ymbol V DD A GND Positive Voltage Supply T his is the supply pin for the circuit. F unction A nalog G round T his is the analogue ground for the amplifiers. 6 S TB S ide T one B alance Input T his is the input for side tone cancellation. 7 CI C omplex I mpedance Pin F or complex impedance a capacitor should be connected to 8 MO M elody O utput P DM output of the melody generator for tone ringing with internal open-drain transistor. H i-Z when not active. 9 L LC L ine L oss C ompensation S elect pin for line loss compensation (see also F igure 6 a nd F igure 7 ). L LC = A GND : 2 0 - 50 mA LLC = V DD : 4 5 - 75 mA LLC = V SS : n one. 10 H S/DP H ook S witch Input and D ial P ulse Output T his is an I/O that is pulled high by the hook switch when off-hook and an open drain pulls it low during break periods of pulse dialing and flash. 11 O SC O SC illator Input P in for ceramic resonator (3.58 MHz). Reference: Murata CSTCC3M58GD3346-R0 Murata CSTLS3M58GD3458-B0 SMD Lead 12 M ODE S ignaling M ODE S elect Input F unction D ialing inhibited L D mode, 10 pps, 33/66 ms L D mode, 10 pps, 40/60 ms L D mode, 20 pps, 33/66 ms L D mode, 20 pps, 40/60 ms L D mode, 10 pps, 33/66 ms, Temp. MF with tone on first * key entry MF only, 82/82 ms MF only, 82/160 ms M ode pin O pen R ow 1 R ow 2 R ow 3 R ow 4 R ow 5 R ow 61 R ow 7 D uring temporary MF: 82/160 ms 13 14 15 16 C4 C3 C2 C1 K eyboard Columns ( see key arrangements in F igure 2 , F igure 3 a nd F igure 4 ) R evision 8.8 Page 2 of 25 D ata Sheet AS2533-36 a ustria micro systems P in # 17 18 19 20 21 S ymbol R4 R3 R2 R1 F CI F unction K eyboard Rows ( see key arrangements in F igure 2 , F igure 3 a nd F igure 4 ) F requency C omparator I nput T his is a Schmitt trigger input for ring frequency discrimination. Disabled during off-hook. 22 L ED L ED O utput Driver O utput for driving an LED that will be flashing when in Program/Mute state. M icrophone Inputs D ifferential inputs for the microphone (electret). 23 24 25 M1 M2 CS C urrent S hunt Control Output T his N-channel open drain output controls the external high power shunt transistor for the modulation of the line voltage and for shorting the line during make period of pulse dialing. 26 27 V SS LI Negative Power Supply L ine I nput T his input is used for power extraction and line current sensing. 28 RI R eceive I nput T his is the input for the receive signal. 1 LS L ine Current S ense Input T his is the input for sensing the line current. 2 M FL M F L evel Setting A v oltage divider connected from this pin to A GND a nd V SS c an be used to set the DTMF level. 3 RO R eceive O utput T his is the output for driving a dynamic earpiece with an impedance of 150 to 300 Ω . S election Overview F unction D irect memories (one-key) I ndirect memories (two-key) R epeat dialing L NR key P ause insertion by LNR key P ause (PS) key P /M or MT key T one/Pulse (T/P) key T emporary MF by * key C entrex (A - D) keys V olume (VOL, –/+) keys V olume reset by off-hook P rogramming of tone ringer A S2533 4 10 y es y es y es y es P /M y es y es y es y es y es A S2534/34R A S2535 A S2536 0 12 4 0 0 10 y es no y es y es y es y es y es y es y es y es no y es P /M P /M P /M y es no y es y es y es y es y es no y es y es y es y es no y es no A S2534:yes y es y es y es AS2534R: no R 3 Flash duration 6 00 ms 6 00 ms 6 00 ms 6 00 ms T he corresponding product (AS2533-36) can be selected via bond-options (see chapter “Bond options” for details). R evision 8.8 Page 3 of 25 D ata Sheet AS2533-36 a ustria micro systems F unctional Description K eyboard Connections K ey closure, R ON m ax. = 1 k Ω K ey open, R OFF m in. = 1 M Ω ( Either V OL o r + /– k eys) C1 R1 R2 R3 R4 P // M PM 4 4 8 8 # # LNR LNR A A RP RP M2 M2 C2 1 1 5 5 9 9 R1 R1 VOL VOL B B PS PS M3 M3 C3 2 2 6 6 0 0 R2 R2 + + C C T // P TP M4 M4 C4 3 3 7 7 * * R3 R3 − − D D M1 M1 MR MR F igure 2 Keyboard Connection AS2533/36 C1 R1 R2 R3 R4 P // M PM 4 4 8 8 # # LNR LNR A A RP RP C2 1 1 5 5 9 9 R1 R1 VOL VOL B B PS PS C3 2 2 6 6 0 0 R2 R2 + + C C T // P TP C4 3 3 7 7 * * R3 R3 − − D D F igure 3 Keyboard Connection AS2534 R evision 8.8 Page 4 of 25 D ata Sheet AS2533-36 a ustria micro systems ( either V OL o r + /– k eys) K eyboard Connections continued C1 R1 R2 R3 R4 P // M PM 4 4 8 8 # # LNR LNR M1 M1 M5 M5 M9 M9 C2 1 1 5 5 9 9 R1 R1 VOL VOL M2 M2 M6 M6 M 10 M 10 C3 2 2 6 6 0 0 R2 R2 + + M3 M3 M7 M7 M 11 M 11 C4 3 3 7 7 * * R3 R3 − − M4 M4 M8 M8 M 12 M 12 F igure 4 Keyboard Connection AS2535 P ower On Reset T he on chip power on reset circuit monitors the supply voltage (V DD ) d uring off-hook. When V DD r ises above approx. 1.2V, a power on reset occurs which clears the RAM. D uring pulse dialing the speech circuit and other part of t he device not operating is in a power down mode to save current. The CS pin is pulled to V SS i n order to turn the external shunt transistor on to keep a low voltage drop at the LS pin during make periods. D C Conditions T he normal operating range is from 13 mA to 100 mA. Operating range with reduced performance is from 5 mA to 13 mA (parallel operation). In the operating range all functions are operational. A t line currents below 13 mA the AS253x provides an additional slope below 4.5V in order to allow parallel operation (see F igure 12 ). T he dc characteristic (excluding diode bridge) is d etermined by the voltage at LI and the resistor R1 at line currents above 13 mA as follows: V LS = VLI + ILINE × R1 T he voltage at LI is 4.5V in the normal operating range. A C Impedance T he ac impedance of the circuit is set by external components. The impedance can be real or complex. T he ac impedance is determined as follows: Z AC = 33 · Z1 T he dc value of Z1 should be 30 Ω t o maintain correct dc p erformance. R eturn loss and side tone cancellation can be determined i ndependent of each other. S peech Circuit T he speech circuit consists of a transmit and a receive p ath with dual soft clipping, mute, line loss compensation a nd sidetone cancellation. R evision 8.8 Page 5 of 25 D ata Sheet AS2533-36 a ustria micro systems L ine Loss Compensation T he line loss compensation is a pin option. When it is activated, the transmit and receive gains are decreased by 6 dB at line currents from 20 to 50 mA when LLC = A GND a nd 45 to 75 mA when LLC = high (@ R1 = 30 Ω ). The line loss compensation is disabled when LLC = low (see F igure 6 a nd F igure 7 ). T ransmit T he gain of the transmit path is 37 dB for 600 Ω l ine t ermination from M1/M2 to LS (see test circuit F igure 9 ). T he microphone input is differential with an input impedance of 20 k Ω . T he soft clip circuit limits the output voltage at LI to 2V PEAK ( see F igure 11 ). The attack time is 30 μ s/6 dB and the decay time is 20 ms/6 dB. When mute is active, during d ialing or after pressing the P /M k ey, the gain reduced by > 60 dB. R eceive T he gain of the receive path is 3 dB for 600 Ω l ine termination (test circuit F igure 9 ). The receive input the differential signal of RI and STB. When mute is active during dialing the gain is reduced by > 60 dB. During DTMF dialing a MF comfort tone is applied to the receiver. The comfort tone is the DTMF signal with level that is -30 dB relative to the line signal. T he receive gain can be changed by pressing the volume keys. The V OL k ey gives a +5.4 dB boost and has a toggle function, i.e. repressing the key resets the gain to default. As an alternative the +/– keys can be used. The + key increases the gain by 8.1 dB in 3 steps and the – key decreases the gain by 5.4 dB in 2 steps (total range 13.5 dB). On AS2533/35 the volume is reset to default by next off-hook and on AS2534/36 the volume setting will remain at last setting. A POR will always reset the volume to default. T he soft clip circuit limits the voltage at the receive output (RO) to 1V P EAK ( see F igure 10 ). It prevents harsh distortion and acoustic shock. S idetone A g ood sidetone cancellation is achieved by using the following equation: D ialing Functions V alid Keys T he key scanning is enabled when HS/DPN is pulled high and V DD i s above V REF . A valid key is detected from the keyboard by connecting the appropriate row to the column (R ON < 1 k Ω ). This can be done using an n x m keyboard matrix with single contacts. Four diodes are used to extend the number of rows (see keyboard arrangement fig. 2). It is also possible to connect a microcontroller to the rows and columns (see application note AN3010). P /M and MT Key T he P /M k ey is used to enter the Program/Mute state. Depressing the P /M k ey mutes the speech circuit and the device is in program state. Repressing the P /M k ey deactivates the mute and program state (toggle function).The M T k ey works in similar way, but has no program function. W hen program/mute is activated, the LED indication is turned on (flashing: 80 ms 'on' and 1 sec 'off'). D ial Mode Selection T he default mode (LD or MF) can be selected by the mode pin. When default LD mode is selected, a temporary change to MF can be invoked by pressing T /P k ey (not AS2535) or the * key (when mode pin = row 5, the MF tone is generated with the first * key entry). The circuit will revert to LD by repression the T /P k ey (not AS2535) or by pressing the R ( R1 , R 2 o r R 3 ) key or by next on-hook. W hen MF mode is selected by the mode pin, the circuit can not be changed temporary to LD but will remain in MF mode. C entrex Keys (not AS2535) T he alphanumeric keys accommodate easy use of centrex services. The A, B, C and D keys are only valid in MF mode (including temporary MF) and are not storable. Pressing one of these keys will invoke the appropriate M F tones to be transmitted. T he centrex keys are not stored in the RAM, and subsequently entered digits are buffered in FIFO. Z Line Z 2 = Z BAL Z1 T he sidetone cancellation signal is applied to the STB i nput. Z LI Z1 Z BA Z2 F igure 5 Side Tone Balance R evision 8.8 Page 6 of 25 D ata Sheet AS2533-36 a ustria micro systems M emory Keys ( not AS2534) T he keys M 1 t o M 12 a re direct memory access keys and the M R k ey (AS2533/36 only) is used for abbreviated dialing. M emory arrangement S torable numbers D irect memory keys I ndirect memories A S2533/36 A S2534 14 4 10 0 0 0 A S2535 12 12 0 L ast Number Redial L NR is a facility that allows resignalling of the last manually dialed number without keying in all the digits again. The LNR is repeatable after each off-hook. T he current content of the RAM is overwritten by new entries. A m anually entered number is automatically stored in the LNR RAM. The capacity of the RAM is 31 digits. If a number greater than 31 digits is entered, the LNR facility will be inhibited (until new entries < 32 digits) and further entries will be buffered in FIFO. P auses can be inserted by pressing the P S k ey (not AS2535). P ost dialed digits, i.e. digits manually entered after LNR has been invoked, are not stored in RAM but buffered in FIFO. R epeat Dialing (not AS2535) T he last manually dialed number can be repeated without going on-hook by pressing the R P k ey. If a called number is engaged, pressing the R P k ey will break the line for 1.6 second (to get a new dial tone) and after a pause the number will be repeated. T he repeat function is enabled when prior to pressing the R P k ey, a number has been dialed, and it can be invoked an unlimited number of times until next on-hook. During the 1.6 second break the device is in power down mode to save current. R ecall Function A r ecall ( R 1, R 2 o r R 3 k ey) activation will invoke a flash (timed loop break), however, the R 1 f lash is never executed in LD mode. R 2 a nd R 3 w ill be executed independent of the mode. I f recall is the first entry in a digit string, it will be stored in LNR RAM when digit(s) are entered after the recall. I f the recall key is depressed after a digit string has been entered or dialed out, the recall will not be stored but buffered in the FIFO together with subsequently entered digit. I f pressing the recall key is not followed by digit entries, the LNR RAM remains intact. A fter a recall a 270 ms pause will automatically be I n the on chip RAM, numbers can be stored. Each number can contain up to 21 digits (including pauses). D uring programming multiple pauses can be inserted by pressing the P S ( not AS2535) or the L NR k ey. Each pause inserted within the first 5 entries will automatically be terminated after 2 seconds whereas pauses inserted after location 5 in a digit string will halt dialing and can be terminated manually by pressing the P S ( not AS2535) or the L NR k ey. The halt function allows in-dialing to an extension on a PABX. E xample (45678–123 is stored in M1, where – is a pause/wait and 123 the extension number): o ff-hook, wait for dial tone p ress M 1 ( 45678 is dialed out) a wait dial tone from called PABX p ress P S o r L NR ( 123 is dialed out) M emory dialing is cascadable. However, the content of one memory must be dialed out before a new can be invoked. S liding Cursor Procedure T o accommodate easy and uncomplicated redialing (LNR) behind a PABX, a sliding cursor protocol is implemented. If new entries match the previous RAM contents, pressing the L NR k ey will dial out the remaining digits. I f there is an error in matching, the LNR will be inhibited until next on-hook, and the RAM will contain the new number. E xample (LNR content 912345, where 9 is access code): o ff-hook, wait for PABX dial tone p ress 9 and wait for external dial tone p ress L NR ( 12345 will be dialed out). T one Generator T he tone generator incorporates the DTMF tones, 3 basic frequencies for the tone ringer and pacifier tones. D TMF T he DTMF generator provides 8 frequencies, namely: R evision 8.8 Page 7 of 25 D ata Sheet AS2533-36 a ustria micro systems L ow group D igit 1-2-3-A D igit 4-5-6-B D igit 7-8-9-C D igit * -0-# -D H igh group D igit 1-4-7- * D igit 2-5-8-0 D igit 3-6-9-# D igit A-B-C-D 697 770 852 941 Hz Hz Hz Hz Hz Hz Hz Hz (not AS2535) T he procedure is ended by repressing the P /M k ey. T he default setting is digit 6, i.e. after a power on reset the device will start up with repetition rate 4 and maximum volume. If digit 0 i s programmed, the tone ringer will be turned off until next off-hook where it will turn back to the last setting before 0. The programmed settings are stored in the on chip RAM. R epetition rate means that a sequence of 6 frequencies i s repeated 1, 4 or 10 times within 1 second. T he sequence of the frequencies is controlled by the s equence register as follows: S equence F1 F2 F3 F1 F2 F3 … P acifier Tone B y MF dialing the DTMF tones are provided to the earpiece as comfort tone. D uring programming a key entry is acknowledged by a pacifier tone of 1477 Hz. The level of the pacifier tone is approximately 60 mV at the RO output. The duration is 40 ms after every key entry in program mode. W hen terminating the program mode with the P /M k ey an acknowledge tone of 140 ms is provided. An invalid key entry, however, will cause a termination of the program mode indicated by a rejection tone of 4 times 40 ms with 28 ms pauses between the tone bursts. 1209 1336 1477 1633 T he MF output level can be set with an external voltage d ivider on pin MFL. V oltage at pin MFL (2) A GND 0 .878 * A GND 0 .791 * A GND 0 .705 * A GND 0 .620 * A GND 0 .495 * A GND 0 .372 * A GND 0 .290 * A GND 0 .210 * A GND 0 .130 * A GND V SS ( Z LINE = 6 00) * typical MFL values for A GND = 1 .5V T he preemphasis is 2.6 dB. T he MF tones are according to CEPT recommendations. T one Ringer (Melody/Volume) T he three basic frequencies of the melodies are: F 1 = 800 Hz, F2 = 1067 Hz, and F3 = 1333 Hz (± 5%). T he repetition rate and the volume of the tone ringer melodies can be programmed by pressing P /M a nd # f ollowed by a digit as follows: D igit 1 2 3 4 5 6 7 8 9 0 R epetition Rate 1 t ime (50 ms pause) 1 t ime (50 ms pause) 1 t ime (50 ms pause) 4 t imes 4 t imes 4 t imes (default, AS2534R) 1 0 times 1 0 times 1 0 times N one V olume - 1 6 dB - 7 dB 0 d B (max.) - 1 6 dB - 7 dB 0 d B (max.) - 1 6 dB - 7 dB 0 d B (max.) O ff typ. 1.50* V 1.317 V 1.187 V 1.058 V 0.930 V 0.743 V 0.558 V 0.435 V 0.315 V 0.195 V 0.000 V (V SS ) D TMF Level ( Low Grp.) - 4.0 dBm - 5.2 dBm - 6.4 dBm - 7.6 dBm - 8.8 dBm - 10.0 dBm - 11.2 dBm - 12.4 dBm - 13.6 dBm - 14.8 dBm - 16.0 dBm R ing Frequency Discrimination T he ring frequency discriminator assures that only signals with a frequency between 13Hz and 70 Hz are regarded as valid ring signals. The time for recognizing a valid ring signal is 1/f seconds, where 'f' is the ring frequency. W hen a valid ring signal is present for 73 ms continuously, the melody generator is activated and remains active as long as the ring signal is present. O nce the melody generator has been started, the ring signal is continuously monitored and the melody generator is instantly turned on or off according to the momentary presence of a valid or invalid ring signal respectively (until next POR or off-hook). R evision 8.8 Page 8 of 25 D ata Sheet AS2533-36 a ustria micro systems Typical Characteristics of Line Loss Compensation (dB) 35 34 33 32 31 30 29 Tx Gain L LC = A GND L LC = V DD LLC = V SS f = 8 00 Hz Z LINE = 6 00 Ω V LS = - 10 dBm 20 30 40 50 60 70 80 DC Line Current (mA) F igure 6 Typical Tx Gain Characteristics Line Loss Compensation (dB) +4 +3 +2 +1 0 -1 -2 Rx Gain L LC = A GND f = 8 00 Hz Z LINE = 6 00 Ω V LS = - 10 dBm VOL = 0 dB (neutral) 20 30 40 50 60 70 80 L LC = V DD LLC = V SS DC Line Current (mA) F igure 7 Typical Rx Gain Characteristics Line Loss Compensation R evision 8.8 Page 9 of 25 D ata Sheet AS2533-36 a ustria micro systems Typical Application C omplex Impedance ( 270 W + 750 W // 150 nF) O nly the components n ecessary for p resenting the c omplete functions of t he AS253x are i ncluded. T he external components m ight change to comply w ith various national PTT r egulations and to interface t o different transducers. S ince the AS253x is a c omponent and not a complete s ystem, it can not be approved a s a stand alone part by the s tandard bodies. Hence, full c onformance to any standards i s depending on the application i n which the AS253x is being u sed, and therefore, approvals b y the standard bodies are the r esponsibility of the customer a nd austriamicrosystems AG will n ot have tested the product to m eet specific standards. F or further application i nformation please refer to a pplication note AN2201 . F igure 8 Typical Application R evision 8.8 Page 10 of 25 D ata Sheet AS2533-36 a ustria micro systems W hen Code 0 (tone ringer off) has been programmed, the device will automatically return to previous setting (different from 0) by next off-hook. P rogramming Procedures P rocedure Principles T he procedures for utilizing the features of the AS253x are optimized out of consideration for the human factor in order to: m eet the user’s expectations b e easy to learn and relearn n ot invoke any automatic functions which the user doesn’t expect p rotect the user from committing critical errors, e.g. dialing wrong numbers, deleting stored numbers, etc. b e consistent, simple and usable. T he following chapters describe the operating procedures for the provided features. Pressing an invalid key or key combination during programming will cause the device to abort the program state. Pressing any key combination or sequence which is not described or defined may cause the device to enter a state or mode that does not comply with the expectation of the user. In such cases, any undesired state can be terminated at any time by going on-hook / offhook which will generate a functional reset. T emporary MF T he procedure below assumes that the device is operated in puls mode. 1. 2. 3. 4. G o off-hook P ress [ *] o r [ T/P] t o switch to DTMF mode P ress [ R] o r [ T/P] t o switch back to PULS mode G ot to 2. to switch again to DTMF mode M ode pin is connected to row 1, 2, 3, 4, or 5. When mode pin = row 5, pressing the [ *] k ey also transmits the tone by MF selected. The [ T/P] k ey (not AS2535) can be used alternatively to the [ *] k ey. A utomatic Dialing T he following procedure describes the dialing procedure and the internal sequences: 1. G o off-hook E nter the number by pressing digit, [ M1]-[M12], [ LNR] o r [ MR] + d igit 3. 4. 5. 6. T he number is internally buffed in the FIFO T one- or Puls-Dialing starts W ait for connection G ot to 2 for entering postdialed digits S toring Numbers (not AS2534) U p to 14 numbers, each with maximum 21 digits, can be stored into the internal RAM. 1. 2. 3. P ress [ P/M] t o enter program mode E nter location (MR + digit 1 ; or M1 to M12) E nter number - entries (0-9, *, #, PS or LNR, R1, R2, R3) will b written directly into the selected memory location) 4. 5. P ress [ P/M] t o store and exit or go on-hook to abort G o to 1 for storing further numbers 2. P ostdialed digits are not stored but buffed in the FIFO. P rogramming Tone Ringer T hree different ringer melodies with three levels each can be programmed. AS2534R cannot be programmed. 1. 2. 3. 4. 1 P ress [ P/M] t o enter program mode P ress [ #] f or ringer programming mode E nter C ode t o select ringer melody and volume(see code table in section Tone Ringer (Melody/Volume) P ress [ P/M] t o store and exit or go on-hook to abort D igit includes 0 – 9 R evision 8.8 Page 11 of 25 D ata Sheet AS2533-36 a ustria micro systems Timing Diagrams L D Dialing M UTE MASK H S/DPN t IDP t PDP tB tM tB tM t IDP t PDP tB tM L D Dialing with Access Pause M UTE MASK HS/DPN t IDP t PDP tB tM tB tM t AP t IDP t PDP tB tM M F Dialing M UTE HS/DPN LS t TD t ITP t TD t ITP t AP t TD t ITP R evision 8.8 Page 12 of 25 D ata Sheet AS2533-36 a ustria micro systems F lash M UTE MASK HS/DPN tM t FD tM t PFP tM t FD tM R epeat Dialing (not AS2535) N umber engaged New connection R P key M UTE DIALLING HS/DPN Power Down t RP t AP R evision 8.8 Page 13 of 25 D ata Sheet AS2533-36 a ustria micro systems E lectrical Characteristics A bsolute maximum ratings P ositive Supply Voltage I nput Current I nput Voltage (LS) I nput Voltage (LI, CS) I nput Voltage (STB, RI) I nput Voltage (MO) D igital Input Voltage E lectrostatic Discharge (HBM 1.5k Ω -100pF) S torage Temperature - 0.3V < V DD < 7 V ± 2 5mA - 0.3V < V IN < 1 0V - 0.3V < V IN < 8 V - 2V < V I N < V D D +0.3V - 0.3V < V IN < + 35V - 0.3V < V IN < V D D +0.3V ± 1 000V - 65°C to +125°C R ecommended operating conditions S upply Voltage * (Speech Mode) O scillator Frequency (Resonator: Murata CSA 3.58M G312AM) Operating Temperature * T his voltage is generated internally 3 .8V < V DD < 5 V 3 .58 MHz - 25°C to +70°C D C Characteristics ( I LINE = 1 5 mA unless otherwise specified) Symbol I DD Parameter Operating Current Conditions S peech mode M F dialing L D dialing, V DD = 2 .5V R ing mode, V DD = 2 .5V Min. Typ. 3 4 2 00 3 00 0 .05 Max. 5 Units mA mA µA µA µA I DD0 Retention Current I dle mode, V DD = 2 V , T AMB = 2 5°C B V LI I OL I OL V IL Line Voltage (default) Output Current, Sink CS, HS/DP, MO Output Current, Sink; LED Input Low Voltage 1 3 mA < I LINE < 1 00 mA V OL = 0 .4V V OL = 0 .4V H S/DPN; FCI T AMB = 2 5°C B 4 .5 1 .5 4 V SS 0 .3 V DD V mA mA V V IH Input High Voltage H S/DPN; FCI T AMB = 2 5°C B 0.7 V DD V DD V R evision 8.8 Page 14 of 25 D ata Sheet AS2533-36 a ustria micro systems A C Characteristics ( I LINE = 15 mA; f = 800 Hz unless otherwise specified) S ymbol Tx A TX Δ A TX/F T HD V AGC A SCO t ATTACK t DECAY Z IN A MUTE V NO V IN Max BJT V IN MAX V TX RL Δ Z AC/TEMP Rx A RX A VOL A VOL Δ A RX/F T HD V AGC A SCO t ATTACT t DECAY V NO V UFC Z IN V IN RI A ST V IN ST Z IN P arameter T ransmit Gain, Transmit V ariation with Frequency D istortion Soft Clip Level Soft Clip Overdrive Attack Time Decay Time Input Impedance (M1/M2) Mute Attenuation Noise Output Voltage Input Voltage Range ( M1/M2) O utput Driver Input Voltage Range (LI) Dynamic Range R eturn Loss Temperature Variation R eceive Receive Gain (Vol. default) Volume Gain Volume Gain Variation with Frequency D istortion Soft Clip Level Soft Clip Overdrive Attack Time Decay Time Noise Output Voltage Unwanted F. Components Input Impedance (RI) Input Voltage Range (RI) Sidetone Cancellation Input Voltage Range (STB) Input Impedance (STB) C onditions T est Circuit F igure 9 M 1/M2 to LI f = 5 00 Hz to 3.4 kHz V LI < 0 .25V RMS M in 3 5.1 T yp 3 6.6 ± 0.8 M ax 3 8.1 U nits dB dB 2 2 20 30 20 20 % V PEAK dB μ s/6 dB m s/6dB kΩ dB M ute activated T AMB = 2 5°C B 60 - 72 ±1 ± 0.5 ±2 ±2 d Bmp V PEAK V PEAK V PEAK V PEAK dB D ifferential S ingle Ended Z RL = 1000 Ω ; T AMB = 2 5°C B 18 0 .5 Ω /°C 4 .5 dB d Br d Br dB 2 % V PEAK dB μ s/6 dB m s/6dB - 72 - 60 d Bmp d Bm kΩ V PEAK dB T est Circuit F igure 9 L I to RO V OL k ey – /+ k eys f = 5 00 Hz to 3.4 kHz V RI < 0 .25V RMS V RO = V RI > 0 .8V RMS 1 10 30 20 T AMB = 2 5°C B 1 .5 3 + 5.4 - 5.4/+8.1 ± 0.8 5 0 Hz....20 kHz 8 ±2 V RI < 0 .25V RMS 26 ±2 80 V PEAK kΩ R evision 8.8 Page 15 of 25 D ata Sheet AS2533-36 a ustria micro systems A C Characteristics (cont´d) ( I LINE = 1 5 mA; f = 800 Hz unless otherwise specified ) S ymbol P arameter K eyboard tD K ey Debounce Time H S/DPN Input t HS-L t HS-H Low to High Debounce High to Low Debounce G oing off-hook N ot LD dialing D uring LD dialing D TMF F V MF V MF Δ V L-H V UFC F requency deviation MF Tone Level (Low group) MF Tone Level (Low group) Preemphasis Low to High Unwanted F. Components N ote 3; MFL = V SS T AMB = 2 5°C, Note 5 B C onditions M in T yp 15 M ax U nits ms 15 2 10 2 70 1 .2 - 2.5 -4 - 16…-4 1.8 2 .4 3 .0 - 40 - 50 - 70 - 80 80 80 1 50 8 2.3 8 2.3 1 65 85 85 1 70 5 5 - 5 .5 ms ms ms % dB dB dB d Bm d Bm d Bm d Bm ms ms ms ms ms M FL = A GND , T AMB = 2 5°C B M FL Range = V SS … A GND , T AMB = 2 5°C B T AMB = 2 5°C, B 3 00 Hz...5 kHz 5 kHz...14 kHz 1 4 kHz...28.5 kHz 2 8.5 kHz...40 kHz t TD t ITP t ITP t TR t TF Tone Duration Inter Tone Pause Inter Tone Pause Tone Rise Time Tone Fall Time LD N ote 1&6; Mode=row 6 or 7 N ote1; Mode=row 6 N ote 1 & 6; Mode=row 7 N ote 2 N ote 2 t DR Dial Rate M ode = row 1, 2 or 5 M ode = row 3 or 4 9 .53 1 9.05 57 2 8.5 63 3 1.5 38 19 3 1.5 1 5.7 10 20 6 1.2 3 0.6 66 33 4 0.8 2 0.4 33 1 6.5 35 1 0.5 21 63 3 1.5 69 3 4.5 42 21 3 4.5 1 7.3 p ps p ps ms ms ms ms ms ms ms ms ms t /B t /B t /B t /B t M/ t M/ t M/ t M/ t PDP t IDP t HS-H t MO Break Period Break Period Break Period Break Period Make Period Make Period Make Period Make Period Pre-Digit Pause Inter Digit Pause High to Low Debounce Mute Overhang M ode = row 2 M ode = row 4 M ode = row 1 or 5 M ode = row 3 M ode = row 2 M ode = row 4 M ode = row 1 or 5 M ode = row 3 M ode = row 1, 2, 3, 4 or 5 f osc = 3.58 MHz D uring LD dialing 7 80 7 90 2 70 tM 8 00 ms ms R evision 8.8 Page 16 of 25 D ata Sheet AS2533-36 a ustria micro systems Symbol t FD Parameter Flash Duration 1 F lash Duration 2 F lash Duration 3 Conditions R 1 k ey R 2 k ey R 3 k ey (AS2533/34/35/36) N ote 8 Min 1 00 2 70 6 00 Typ Max 1 02 3 00 6 50 Units ms ms ms ms s ec s ec t PFP t AP t RP V MO t MD F1 F2 F3 t DT t TO f MIN f MAX f PT V RT t RTD-E t RTD-A t RTD-R t LED-ON t LED-OFF V CT Post Flash Pause Access Pause Repeat Break Time T one Ringer Melody Output Melody Delay F requency 1 F requency 2 F requency 3 Detection Time Detection Time-out Min. Detection Frequency Max. Detection Frequency P acifier Tone Frequency Level (RO) Duration, Key Entry Duration, Acknowledge Duration, Reject L ED Output "on-time" Interval C omfort Tone (DTMF) Level (RO) R elative to LS P /M state P /M state P rogram Mode Only P /M mode, key entry K ey entry V alid key entry, prog. T erminate with P/M key I nvalid key entry, note 7 I nitial 2 .0 2 74 2 .05 1 .6 P DM 10 8 00 1 067 1 333 1 /f + 73ms 2 .12 ms Hz Hz Hz s ms Hz Hz Hz mV ms ms ms ms s ec d Br n ote 4 13 70 1 477 60 40 1 40 4 x40 80 1 - 30 N ote 1: The values are valid during automatic dialing and are minimum values during manual dialing, i.e. the tones will continue as long as the key is depressed. N ote 2: The rise time is the time from 10% of final value till the tone amplitude has reached 90 % of its final value. N ote 3: Relative to high group. N ote 4: The FCI circuit is reset by POR and HS/DPN pulled high (off-hook). After a reset the FCI circuit is in a standby state. A positive edge on FCI will start a 73 ms timer and the frequency discrimination is initiated. Whenever a period of the ring signal is missing, the timer is reset. When a valid ring signal is present for 73 ms, the melody generator is started and is directly controlled by the ring signal. This condition will remain until a new reset. N ote 5: This does not include the frequency deviation of the ceramic resonator. N ote 6: During temporary MF mode. N ote 7: An invalid key entry in program mode will invoke a tone sequence with 4 tone bursts of 40 ms and pauses between bursts of 28 ms and abort the program mode. N ote 8: Pauses inserted within the first 5 entries of a digit string will be automatically terminated after 2 seconds. Pauses inserted after location 5 can only be terminated manually by pressing the PS or LNR key. R evision 8.8 Page 17 of 25 D ata Sheet AS2533-36 a ustria micro systems Test Circuit F igure 9 Test Circuit R evision 8.8 Page 18 of 25 D ata Sheet AS2533-36 a ustria micro systems C haracteristic Curves (Typical) 1,2 [Vp] Receive Output Voltage (RO) 1,0 soft clipping VRO 12 11 [%] 10 Line Output Voltage (LS) 2,5 [Vp] soft clipping 2,0 VLS 10 [%] 9 8 7 Distortion 9 0,8 Line Current: 20mA Frequency: 800Hz Tamb: 25°C Typically 8 Distortion 7 6 5 1,5 0,6 Line Current: 20mA Frequency: 800Hz Tamb: 25°C Typically 6 5 4 0,4 THD 4 3 1,0 THD 3 2 1 0,2 2 1 0,5 0,0 0,00 0,25 0,50 0,75 1,00 1,25 1,50 1,75 [Vp] 0 2,00 0,0 0 25 50 75 100 125 Microphone Input Voltage (M1/M2) 0 150 [mVp] Line Input Voltage (LS) F igure 10 Receive Soft Clipping and Distortion F igure 11 Transmit Soft Clipping and Distortion 8 7 6 DC Mask [V] VLS 5 4 3 2 1 0 0 10 20 30 40 50 Line Current [mA] VLI Typically No AC signals Tamb: 25°C 60 70 80 90 100 F igure 12 DC Mask Revision 8.8 Page 19 of 25 D ata Sheet AS2533-36 a ustria micro systems B ond Pad Layout B ond Options P roduct Version A S2533 A S2534/34R A S2535 A S2536 ( 1) B ond Pad B OND_AS2535 BOND_AS2536 BOND_AS2535 BOND_AS2536 B OND_AS2535 BOND_AS2536 B OND_AS2535 BOND_AS2536 C onnection n ot bonded not bonded n ot bonded bonded to MODE b onded to MODE not bonded n ot bonded bonded to MODE ( 1) F or deliveries as packaged devices (SOIC28), LNR only is tested, direct and indirect memories are not tested! Revision 8.8 Page 20 of 25 D ata Sheet AS2533-36 a ustria micro systems S izes and Coordinates D ie Size: B ond Pad Size: B ond Pad Co-ordinates: 3.190mm x 2.975mm 85µm x 85µm Reference co-ordinate of DIE = DIE center R eference co-ordinate of PAD = PAD center X [ µm] - 1413.50 - 1413.50 - 1413.50 - 1413.50 - 1392.50 - 1392.50 - 1392.50 y [ µm] 1 052.25 7 96.25 5 86.25 2 26.25 - 107.75 - 399.35 - 974.20 P ad Name V DD A GND S TB CI MO L LC H S/DP P in No 4 5 6 7 8 9 10 x [ µm] 1 392.50 1 392.50 1 392.50 1 413.50 1 413.50 y [ µm] - 1053.80 - 663.00 - 319.80 4 08.75 6 83.75 P ad Name R1 F CI L ED M1 M2 P in No 20 21 22 23 24 P ads on the Left P ads on the Right P ads on the Top 1 227.50 1 079.50 1 301.25 1 301.25 1 301.25 1 301.25 1 301.25 1 301.25 1 301.25 1 301.25 CS V SS V SS LI RI LS M FL RO 25 26 26 27 28 1 2 3 P ads on the Bottom - 1244.00 - 862.10 - 696.70 - 432.50 - 215.10 - 49.70 2 14.50 3 79.90 6 77.30 8 42.70 1 173.30 - 1285.00 - 1285.00 - 1285.00 - 1285.00 - 1285.00 - 1285.00 - 1285.00 - 1285.00 - 1285.00 - 1285.00 - 1285.00 O SC B OND_AS2535 M ODE B OND_AS2536 C4 C3 C2 C1 R4 R3 R2 13 14 15 16 17 18 19 12 11 9 69.50 6 27.50 5 4.50 - 90.50 - 449.50 - 744.50 R evision 8.8 Page 21 of 25 D ata Sheet AS2533-36 a ustria micro systems Vertical Structure of Bond Pads P rocess CXQ/CXB – FAB B L ayer Specification m etal 2 u pper layer: m etal 2 m etal 1 m etal 1 barrier p ol y silicon o xide Si substrate m etal 1 barrier p olysilicon o xide s ilicon substrate m etal 1 9 60 nm AISiCu 9 8.5% Aluminium 1 .0% Silicon 0 .5 % Copper 4 0 nm Titanium l ower layer: 4 50 nm AISiCu u pper layer: 9 8.5 % Aluminium 1 .0% Silicon 0 .5 % Copper 4 0 nm Titanium l ower layer: u pper layer 8 0nm Titanium Nitride l ower layer 3 0nm Titanium 2 70 nm polysilicon 4 60 nm thermal oxide G eneral Conditions P assivation M arking of Failure Dice A llowed Loss after Assembly 2 00 nm silicon oxynitride + 550 nm silicon nitride I nk Dots, water resistant, Diameter 0.4...1.2 mm < 5 % in average < 1 0% for a single delivery lot C ompensation is limited to replacement of the number of defectives exceeding the above allowances. Q uantity of dice per delivery lot O nly complete wafers can be delivered, therefore the number of good dice delivered may differ from the order quantity up to ± 1000 pcs. S torage Conditions D ice on wafer or dice on foil must be stored in originally sealed boxes or bags. F or storage period - see below. E xcept for RMA, opened boxes or bags will not be accepted by a ustriamicrosystems f or return C onditions for Delivery as Wafer W afer diameter 2 00 mm W afer thickness 3 80 ± 2 0µm B ack finishing S cribe lane width P acking M ax. Storage time in sealed box b ack grinding, silicon 1 00 ± 2 0µm W afer Box Ultrapack 200 / sealed in foil bags 6 m onth, Tamb = 25 ° C R evision 8.8 Page 22 of 25 D ata Sheet AS2533-36 a ustria micro systems C onditions for Delivery as Dice on Foil, sawn D ie thickness 3 80 ± 2 0µm B ack finishing F rame F rame Position Tolerance b ack grinding, silicon M aterial: Plastic S ize: see figure C enter wafer to frame: ± 4 mm A ngle deviation wafer to frame: ± 8 ° O rientation wafer to frame: Wafer flat to frame side with kerfs C overing adhesive foil to frame: >5mm T ype: PVC with acrylic adhesive T hickness: 70 ± 2 0 µm S awing conditions S awing mode: Saw - through mode S awing width: typ. 60 µm K erf depth in foil: typ. 20 µm X V -dimension deviation: max.25 µm f rame sealed in foil bags filled with nitrogen 2 m onths, Tamb = 25 ° C T ape P acking S torage time In sealed bags M echanical Drawing of Frame R evision 8.8 Page 23 of 25 D ata Sheet AS2533-36 a ustria micro systems P in Configuration 2 8 Pin SOIC (suffix T) P ackaging T he device is available in the packages outlined below (not to scale). For exact mechanical package dimensions please see austriamicrosystems AG p ackaging information. 2 8-pin plastic SOIC (suffix T) M ax. Body Length M ax. Body Width P itch 18.1mm / 713mil 7.6mm / 300mil 1.27mm / 50mil O rdering Information D evice A S2533 T A S2533 F A S2533 W A S2534B T AS2534B F A S2534B W A S2534R T AS2534R F A S2534R W A S2535 T A S2535 F A S2535 W A S2536 T A S2536 F A S2536 W A S253x F AS253x W AS253xR F AS253xR W O rder Number A S2533U-ZSO-U p ls see bottom rows p ls see bottom rows A S2534U-ZSO-U p ls see bottom rows p ls see bottom rows A S2534R-ZSO-U p ls see bottom rows p ls see bottom rows A S2535U-ZSO-U p ls see bottom rows p ls see bottom rows A S2535U-ZSO-U p ls see bottom rows p ls see bottom rows A S253xU-ZSW-F A S253xU-ZSW A S253xR-ZSW-F A S253xR-ZSW P ackage 2 8 pin SOIC in tubes D ice on foil, sawn D ice on wafer 2 8 pin SOIC in tubes D ice on Foil, sawn D ice on Wafer 2 8 pin SOIC in tubes D ice on Foil, sawn D ice on Wafer 2 8 pin SOIC D ice on Foil, sawn D ice on Wafer 2 8 pin SOIC D ice on Foil, sawn D ice on Wafer D ice on Foil, sawn D ice on Wafer D ice on Foil, sawn D ice on Wafer F eatures L NR, 4 direct/10 indirect memories L NR, 4 direct/10 indirect memories L NR, 4 direct/10 indirect memories L NR only, no direct/indirect memories L NR only, no direct/indirect memories L NR only, no direct/indirect memories L NR only, no direct/indirect memories, ringer fixed L NR only, no direct/indirect memories, ringer fixed L NR only, no direct/indirect memories, ringer fixed L NR, 12 direct memories L NR, 12 direct L NR, 12 direct L NR, 4 direct/10 indirect memories L NR, 4 direct/10 indirect memories L NR, 4 direct/10 indirect memories A ll versions A ll versions ( 1) ( 1) ( 1) ( 1) ( 2) ( 2) A ll versions, ringer fixed A ll versions, ringer fixed ( 1) Please Note: F or wafer delivery or dice-on-foil delivery, the versions can be selected by bond options. ( 2) F or deliveries as packaged devices (SOIC28), LNR only is tested, direct and indirect memories are not tested! Revision 8.8 Page 24 of 25 D ata Sheet AS2533-36 a ustria micro systems C ontact Information a ustriamicrosystems AG B usiness Unit Communications A 8 141 Schloss Premstaetten, Austria-EU T . +43 (0) 3136 500 0 F . +43 (0) 3136 500 5692 h ttp://www.austriamicrosystems.com F or Sales Offices, Distributors and Representatives, please visit: h ttp://www.austriamicrosystems.com/contact C opyright C opyright © 1997-2006, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. A ll products and companies mentioned are trademarks of their respective companies. D isclaimer D evices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. T he information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. austriamicrosystems R evision 8.8 – a l eap ahead Page 25 of 25