AP2002SLA

AP2002 Synchronous PWM Controller Features - Single or Dual Supply Application - 0.8V + 1.0% Voltage Reference. - Fast transient response. - Synchronous operation for high efficiency (95%) - On-chip power good, OVP protect. - Small size with minimum external components - Soft Start and enable functions - Industrial temperature range - Under Voltage Lockout function - SOP-14L package General Description The AP2002 is a low-cost, full featured, and synchronous voltage-mode controller designed for use in single ended power supply applications where efficiency is of primary concern. This synchronous operation allows the elimination of heat sinks in many applications. The AP2002 is ideal for implementing DC/DC converters that is needed for the power advanced microprocessors in low cost systems, or in distributed power applications where efficiency is important. Internal level-shift, high-side drive circuitry, and preset shoot-thru control, allows the use of inexpensive N-channel power switches. AP2002 features include temperature compensated voltage reference, an internal 200Khz virtual frequency oscillator, under voltage lockout protection, soft-start function and current sense comparator circuitry. Power good signaling, shutdown, and over voltage protection are also provided by AP2002. Applications - Microprocessor core supply - Low cost synchronous applications - Voltage Regulator Modules (VRM) - DDR termination supplies - Networking power supplies - Sequenced power supplies Pin Assignment (Top View) VCC PWRGD OVP OCSET PHASE DRVH PGND 1 2 3 5 6 7 14 13 12 10 Pin Descriptions GND SS/SHDN COMP SENSE BSTH BSTL DRVL Name VCC PWRGD OVP OCSET PHASE DRVH PGND DRVL BSTL BSTH SENSE COMP SS/ SHDN GND Description Chip supply voltage Logic high indicates correct output voltage (open drain output) Over voltage protection Sets the converter over-current trip point Input from the phase node between the MOSFETs High side driver output Power ground Low side driver output Bootstrap, low side driver Bootstrap, high side driver Voltage sense input Compensation pin Soft start, a capacitor to ground sets the slow start time Signal ground 4 AP2002 11 9 8 SOP-14L Ordering Information AP2002 X Package S: SOP-14L X X Lead Free Packing Blank : Tube Blank : Normal L : Lead Free Package A : Taping This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product. Rev. 0.2 Apr 14, 2004 1/7 AP2002 Synchronous PWM Controller Block Diagram VCC +10% - 10% 0.8V +20% Vbg Under Voltage + Oscillator + - 200uA Over Current + OCSET PWRGD Vcc OVP COMP SENSE Vbg Vcc 10uA SS/SHDN 2uA GND 0.5V Absolute Maximum Ratings Symbol VIN VPHASE ΘJC ΘJA TOP TST TLEAD PGND to GND PHASE to GND BSTH to PHASE Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering) 10 Sec. Parameter VCC, BSTL to GND Max. -1 to 14 + 0.5 -1 to 18 14 45 115 -40 to +85 -65 to +150 300 o o Anachip Corp. www.anachip.com.tw 2/7 + - + + - One-Shot Error Amp PWM DRVH BSTH DRVH S R Ob Foult 0.6V + Cross Current Control PHASE VCC BSTL DRVL PGND + - DRVL Unit V V V V C/W C/W o o o C C C Rev. 0.2 Apr 14, 2004 AP2002 Synchronous PWM Controller Electrical Characteristics Symbol Power Supply VCC ICC ∆VLINE Error Amplifier AOL IB Oscillator FOSC DCMAX IDRVH IDRVL Protection DTH IOVP DPG TDEAD IOCSET Reference VREF Soft Start ISSC Charge Current VSS = 1.5V VSS = 1.5V 8.0 1.3 10 2 4.2 IO(REF) = 0.1mA TA = 25ºC 4.0 200 12 2.7 4.4 uA uA V V mV ISSD Discharge Current Under voltage lockout (UVLO) Upper threshold voltage VUT (VCC) Lower threshold voltage VLWT (VCC) VHT Hysteresis (VCC) Reference Voltage Accuracy 0oC to 70oC 0.792 -1 0.8 0.808 +1 V % OVP Threshold OVP Source Current Power Good Threshold Dead Time Over Current Set Isink 2.0V < VOCSET < 12V VOVP = 3V 10 88 45 180 200 112 100 220 20 % mA % nS uA Oscillator Frequency Oscillator Max Duty Cycle DRVH Source/Sink DRVL Source/Sink VBSTH – VDRVH =4.5V VDRVH – VPHASE = 2V VBSTH – VDRVL = 4.5V VDRVL – VPGND = 2V 180 90 1 1 200 95 220 KHz % A A Gain (AOL) Input Bias 50 5 8 dB uA Supply Voltage Supply Current Line Regulation VO = 2.5V VCC 4.2 6 0.5 12.6 10 V mA % Parameter Unless specified: VCC = 4.75V to 12.6V; GND = PGND = 0V; FB = VO; VBSTL = 12V; VBSTH-PHASE = 12V; TJ = 25oC Conditions Min. Typ. Max. Unit MOSFET Drivers Note 1. Specification refers to Typical Application Circuit. Note 2. This device is ESD sensitive. Use of standard ESD handling precautions is required. Anachip Corp. www.anachip.com.tw 3/7 Rev. 0.2 Apr 14, 2004 AP2002 Synchronous PWM Controller Typical Application Circuit (1) +5V R1 1k R2 10k C1 0.1 C2 0.1 +12V R4 10 1 VCC GND 14 C3 0.1 R7 C5 0.1 C6 C7 680/ 680/ 16V 16V C8 680/ 16V + VIN 5V/12V PWRGD OVP R3 1k 2 PWRGD SS/SHDN 13 3 OVP 4 OCSET 5 PHASE 6 DRVH 7 PGND SHDN R9 270* R8 120 R5 1.2O R6 1.2O L1 Q1 PFD3000 3.3uH Q2 PFD3000 D1 Option Vout=2.5V + C10 0.1 C11 680/ 16V C12 680/ 16V C13 C14 680/ 680/ 16V 16V C9 COMP 12 47k 18nF SENSE 11 BSTH 10 BSTL 9 DRVL 8 0.1u C4 - R10 4.7O Note: *Vout =Vref x (1+R9/R8) 5V & 12V dual input circuit (2) +5V R1 1k R2 10k C1 0.1 C2 0.1 R4 10 D2 1 VCC GND 14 2 PWRGD SS/SHDN 13 3 OVP 4 OCSET 5 PHASE 6 DRVH 7 PGND COMP 12 SENSE 11 BSTH 10 BSTL DRVL 9 8 C4 0.1u R5 1.2 Ω R6 1.2 Ω R10 4.7 Ω C9 Q1 L1 0.1 PFD3000 3.3uH Q2 PFD3000 D1 Option C3 0.1 R7 47k 18nF SHDN C9 C5 0.1 C6 C7 680/ 680/ 16V 16V C8 680/ 16V + VIN 5V or 12V PWRGD OVP R3 1k R9 270* R8 120 + C10 0.1 C11 C12 680/ 680/ 16V 16V C13 680/ 16V C14 Vout=2.5V* 680/ 16V - Note: * Vout=Vref x (1+R9/R8) 5V or 12V input with Bootstrapped BSTH Anachip Corp. www.anachip.com.tw 4/7 Rev. 0.2 Apr 14, 2004 AP2002 Synchronous PWM Controller Function Description Synchronous Buck Converter Primary VCORE power is provided by a synchronous, voltage-mode pulse width modulated (PWM) controller. This section has all the features required to build a high efficiency synchronous buck converter, including “Power Good” flag, shutdown, and cycle-by-cycle current limit. The output voltage of the synchronous converter is set and controlled by the output of the error amplifier. The external resistive divider reference voltage is derived from an internal trimmed band-gap voltage reference. The inverting input of the error amplifier receives its voltage from the SENSE pin. The internal oscillator uses an on-chip capacitor and trimmed precision current sources to set the oscillation frequency to 200KHz. The triangular output of the oscillator sets the reference voltage at the inverting input of the comparator. When the oscillator output voltage drops below the error amplifier output voltage, the comparator output goes high. This pulls DRVL low, turning off the low-side FET, and DRVH is pulled high, turning on the high-side FET (once the cross-current control allows it). When the oscillator voltage rises back above the error amplifier output voltage, the comparator output goes low. This pulls DRVH low, turning off the high-side FET, and DRVL is pulled high, turning on the low-side FET (once the cross-current control allows it). As SENSE increases, the output voltage of the error amplifier decreases. This causes a reduction in the on-time of the high-side MOSFET connected to DRVH, hence lowering the output voltage. Under Voltage Lockout The under voltage lockout circuit of the AP2002 assures that the high-side MOSFET driver outputs remain in the off state whenever the supply voltage drops below set parameters. Lockout occurs if VCC falls below 4.1V. Normal operation resumes once VCC rises above 4.2V. Over-Voltage Protection The over-voltage protection pin (OVP) is high only when the voltage at SENSE is 20% higher than the target value programmed by the external resistor divider. The OVP pin is internally connected to a PNP’s collector. Anachip Corp. www.anachip.com.tw 5/7 Rev. 0.2 Apr 14, 2004 Power Good The power good function is to confirm that the regulator outputs are within +/- 10% of the programmed level. PWRGD remains high as long as this condition is met. PWRGD is connected to an internal open collector NPN transistor. Soft Start Initially, SS/ SHDN sources 10uA of current to charge an external capacitor. The outputs of the error amplifiers are clamped to a voltage proportional to the voltage on SS/ SHDN . This limits the on-time of the high-side MOSFET, thus leading to a controlled ramp-up of the output voltages. RDS(ON) Current Limiting The current limit threshold is setting by connecting an external resistor from VCC supply to OCSET. The voltage drop across this resistor is due to the 200uA internal sink sets the voltage at the pin. This voltage is compared to the voltage at the PHASE node. This comparison is made only when the high-side drive is high to avoid false current limit triggering due to un-contributing measurements from the MOSFETs off-voltage. When the voltage at PHASE is less than the voltage at OCSET, an over-current condition occurs and the soft start cycle is initiated. The synchronous switch turns off and SS/ SHDN starts to sink 2uA. When SS/ SHDN reaches 0.8V, it then starts to source 10uA and a new cycle begins. AP2002 Synchronous PWM Controller Function Description (Continued) Hiccup Mode During power up, the SS/ SHDN pin is internally pulled low until VCC reaches the under-voltage lockout level of 4.2V. Once VCC has reached 4.2V, the SS/ SHDN pin is released and begins to source 10uA of current to the external soft-start capacitor. As the soft-start voltage rises, the output of the internal error amplifier is clamped to this voltage. When the error signal reaches the level of the internal triangular oscillator, which swings from 1V to 2V at a fixed frequency of 200KHz, switching occurs. As the error signal crosses over the oscillator signal, the duty cycle of the PWM signal continues to increase until the output comes into regulation. If an over-current condition has not occurred the soft-start voltage will continue to rise and level off at about 2.2V. An over-current condition occurs when the high-side drive is turned on, but the PHASE node does not reach the voltage level set at the OCSET pin. The PHASE node is sampled only once per cycle during the vally of the triangular oscillator. Once an over-current occurs, the high-side drive is turned off and the low-side drive turns on and the SS/ SHDN pin begins to sink 2uA. The soft-start voltage will begin to decrease as the 2uA of current discharge the external capacitor. When the soft-start voltage reaches 0.8V, the SS/ SHDN pin will begin to source 10uA and begin to charge the external capacitor causing the soft-start voltage to rise again. Again, when the soft-start voltage reaches the level of the internal oscillator, switching will occur. If the over-current condition is no longer present, normal operation will continue. If the over-current condition is still present, the SS/ SHDN pin will again begin to sink 2uA. This cycle will continue indefinitely until the over-current condition is removed. In conclusion, above is shown a typical “12V Application Circuit” which has a BSTH voltage derived by bootstrapping input voltage to the PHASE node through diode D1. This circuit is very useful in cases where only input power of 5V(or 12V) is available. In order to prevent substrate glitching, a small-signal diode should be placed in close proximity to the chip with cathode connected to PHASE and anode connected to PGND. Marking Information ( Top View ) 14 8 Logo Part No. AC AP2002 YY WW X X 1 7 ID code: internal Blank: normal L: Lead Free Package Xth week: 01~52 Year: "01" = 2001 "02" = 2002 ~ SOP-14L Anachip Corp. www.anachip.com.tw 6/7 Rev. 0.2 Apr 14, 2004 AP2002 Synchronous PWM Controller Package Information (1) Package Type: SOP-14L 0.010 E1 Pin 1 indent Gage Plane E L Θ Detail A D 7o (4x) A2 A 0.015x45 o 7o(4x) C A1 y e b Detail A Symbol A A1 A2 b C D E E1 e L Y Dimensions In Millimeters Min. Nom. Max. 1.47 1.60 1.730 0.10 Dimensions In Inches Min. Nom. Max. 0.0580 0.063 0.0680 0.0040 1.45 0.41 0.20 8.64 6.00 3.90 1.27 0.71 0.250 0.510 0.250 8.740 6.200 3.990 0.057 0.016 0.008 0.340 0.236 0.153 0.050 0.028 0.0100 0.33 0.19 8.53 5.80 3.80 0.0130 0.0075 0.3360 0.2283 0.1496 0.0200 0.0098 0.3440 0.2441 0.1571 0.38 1.270 0.076 8 O 0.0150 0.0500 0.0030 8O 0 O θ - 0 O - Anachip Corp. www.anachip.com.tw 7/7 Rev. 0.2 Apr 14, 2004